1*b9efd75bSJin Yao[
2*b9efd75bSJin Yao    {
3*b9efd75bSJin Yao        "BriefDescription": "Instructions Per Cycle (per Logical Processor)",
4*b9efd75bSJin Yao        "MetricExpr": "INST_RETIRED.ANY / CPU_CLK_UNHALTED.THREAD",
5*b9efd75bSJin Yao        "MetricGroup": "Summary",
6*b9efd75bSJin Yao        "MetricName": "IPC"
7*b9efd75bSJin Yao    },
8*b9efd75bSJin Yao    {
9*b9efd75bSJin Yao        "BriefDescription": "Instruction per taken branch",
10*b9efd75bSJin Yao        "MetricExpr": "INST_RETIRED.ANY / BR_INST_RETIRED.NEAR_TAKEN",
11*b9efd75bSJin Yao        "MetricGroup": "Branches;FetchBW;PGO",
12*b9efd75bSJin Yao        "MetricName": "IpTB"
13*b9efd75bSJin Yao    },
14*b9efd75bSJin Yao    {
15*b9efd75bSJin Yao        "BriefDescription": "Cycles Per Instruction (per Logical Processor)",
16*b9efd75bSJin Yao        "MetricExpr": "1 / IPC",
17*b9efd75bSJin Yao        "MetricGroup": "Pipeline",
18*b9efd75bSJin Yao        "MetricName": "CPI"
19*b9efd75bSJin Yao    },
20*b9efd75bSJin Yao    {
21*b9efd75bSJin Yao        "BriefDescription": "Per-Logical Processor actual clocks when the Logical Processor is active.",
22*b9efd75bSJin Yao        "MetricExpr": "CPU_CLK_UNHALTED.THREAD",
23*b9efd75bSJin Yao        "MetricGroup": "Pipeline",
24*b9efd75bSJin Yao        "MetricName": "CLKS"
25*b9efd75bSJin Yao    },
26*b9efd75bSJin Yao    {
27*b9efd75bSJin Yao        "BriefDescription": "Instructions Per Cycle (per physical core)",
28*b9efd75bSJin Yao        "MetricExpr": "INST_RETIRED.ANY / CPU_CLK_UNHALTED.DISTRIBUTED",
29*b9efd75bSJin Yao        "MetricGroup": "SMT;TmaL1",
30*b9efd75bSJin Yao        "MetricName": "CoreIPC"
31*b9efd75bSJin Yao    },
32*b9efd75bSJin Yao    {
33*b9efd75bSJin Yao        "BriefDescription": "Floating Point Operations Per Cycle",
34*b9efd75bSJin Yao        "MetricExpr": "( 1 * ( FP_ARITH_INST_RETIRED.SCALAR_SINGLE + FP_ARITH_INST_RETIRED.SCALAR_DOUBLE ) + 2 * FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE + 4 * ( FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE ) + 8 * ( FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.512B_PACKED_DOUBLE ) + 16 * FP_ARITH_INST_RETIRED.512B_PACKED_SINGLE ) / CPU_CLK_UNHALTED.DISTRIBUTED",
35*b9efd75bSJin Yao        "MetricGroup": "Flops",
36*b9efd75bSJin Yao        "MetricName": "FLOPc"
37*b9efd75bSJin Yao    },
38*b9efd75bSJin Yao    {
39*b9efd75bSJin Yao        "BriefDescription": "Instruction-Level-Parallelism (average number of uops executed when there is at least 1 uop executed)",
40*b9efd75bSJin Yao        "MetricExpr": "UOPS_EXECUTED.THREAD / ( UOPS_EXECUTED.CORE_CYCLES_GE_1 / 2 )",
41*b9efd75bSJin Yao        "MetricGroup": "Pipeline;PortsUtil",
42*b9efd75bSJin Yao        "MetricName": "ILP"
43*b9efd75bSJin Yao    },
44*b9efd75bSJin Yao    {
45*b9efd75bSJin Yao        "BriefDescription": "Number of Instructions per non-speculative Branch Misprediction (JEClear)",
46*b9efd75bSJin Yao        "MetricExpr": "INST_RETIRED.ANY / BR_MISP_RETIRED.ALL_BRANCHES",
47*b9efd75bSJin Yao        "MetricGroup": "BrMispredicts",
48*b9efd75bSJin Yao        "MetricName": "IpMispredict"
49*b9efd75bSJin Yao    },
50*b9efd75bSJin Yao    {
51*b9efd75bSJin Yao        "BriefDescription": "Core actual clocks when any Logical Processor is active on the Physical Core",
52*b9efd75bSJin Yao        "MetricExpr": "CPU_CLK_UNHALTED.DISTRIBUTED",
53*b9efd75bSJin Yao        "MetricGroup": "SMT",
54*b9efd75bSJin Yao        "MetricName": "CORE_CLKS"
55*b9efd75bSJin Yao    },
56*b9efd75bSJin Yao    {
57*b9efd75bSJin Yao        "BriefDescription": "Instructions per Load (lower number means higher occurrence rate)",
58*b9efd75bSJin Yao        "MetricExpr": "INST_RETIRED.ANY / MEM_INST_RETIRED.ALL_LOADS",
59*b9efd75bSJin Yao        "MetricGroup": "InsType",
60*b9efd75bSJin Yao        "MetricName": "IpLoad"
61*b9efd75bSJin Yao    },
62*b9efd75bSJin Yao    {
63*b9efd75bSJin Yao        "BriefDescription": "Instructions per Store (lower number means higher occurrence rate)",
64*b9efd75bSJin Yao        "MetricExpr": "INST_RETIRED.ANY / MEM_INST_RETIRED.ALL_STORES",
65*b9efd75bSJin Yao        "MetricGroup": "InsType",
66*b9efd75bSJin Yao        "MetricName": "IpStore"
67*b9efd75bSJin Yao    },
68*b9efd75bSJin Yao    {
69*b9efd75bSJin Yao        "BriefDescription": "Instructions per Branch (lower number means higher occurrence rate)",
70*b9efd75bSJin Yao        "MetricExpr": "INST_RETIRED.ANY / BR_INST_RETIRED.ALL_BRANCHES",
71*b9efd75bSJin Yao        "MetricGroup": "Branches;InsType",
72*b9efd75bSJin Yao        "MetricName": "IpBranch"
73*b9efd75bSJin Yao    },
74*b9efd75bSJin Yao    {
75*b9efd75bSJin Yao        "BriefDescription": "Instructions per (near) call (lower number means higher occurrence rate)",
76*b9efd75bSJin Yao        "MetricExpr": "INST_RETIRED.ANY / BR_INST_RETIRED.NEAR_CALL",
77*b9efd75bSJin Yao        "MetricGroup": "Branches",
78*b9efd75bSJin Yao        "MetricName": "IpCall"
79*b9efd75bSJin Yao    },
80*b9efd75bSJin Yao    {
81*b9efd75bSJin Yao        "BriefDescription": "Branch instructions per taken branch. ",
82*b9efd75bSJin Yao        "MetricExpr": "BR_INST_RETIRED.ALL_BRANCHES / BR_INST_RETIRED.NEAR_TAKEN",
83*b9efd75bSJin Yao        "MetricGroup": "Branches;PGO",
84*b9efd75bSJin Yao        "MetricName": "BpTkBranch"
85*b9efd75bSJin Yao    },
86*b9efd75bSJin Yao    {
87*b9efd75bSJin Yao        "BriefDescription": "Instructions per Floating Point (FP) Operation (lower number means higher occurrence rate)",
88*b9efd75bSJin Yao        "MetricExpr": "INST_RETIRED.ANY / ( 1 * ( FP_ARITH_INST_RETIRED.SCALAR_SINGLE + FP_ARITH_INST_RETIRED.SCALAR_DOUBLE ) + 2 * FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE + 4 * ( FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE ) + 8 * ( FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.512B_PACKED_DOUBLE ) + 16 * FP_ARITH_INST_RETIRED.512B_PACKED_SINGLE )",
89*b9efd75bSJin Yao        "MetricGroup": "Flops;FpArith;InsType",
90*b9efd75bSJin Yao        "MetricName": "IpFLOP"
91*b9efd75bSJin Yao    },
92*b9efd75bSJin Yao    {
93*b9efd75bSJin Yao        "BriefDescription": "Total number of retired Instructions, Sample with: INST_RETIRED.PREC_DIST",
94*b9efd75bSJin Yao        "MetricExpr": "INST_RETIRED.ANY",
95*b9efd75bSJin Yao        "MetricGroup": "Summary;TmaL1",
96*b9efd75bSJin Yao        "MetricName": "Instructions"
97*b9efd75bSJin Yao    },
98*b9efd75bSJin Yao    {
99*b9efd75bSJin Yao        "BriefDescription": "Fraction of Uops delivered by the LSD (Loop Stream Detector; aka Loop Cache)",
100*b9efd75bSJin Yao        "MetricExpr": "LSD.UOPS / (IDQ.DSB_UOPS + LSD.UOPS + IDQ.MITE_UOPS + IDQ.MS_UOPS)",
101*b9efd75bSJin Yao        "MetricGroup": "LSD",
102*b9efd75bSJin Yao        "MetricName": "LSD_Coverage"
103*b9efd75bSJin Yao    },
104*b9efd75bSJin Yao    {
105*b9efd75bSJin Yao        "BriefDescription": "Fraction of Uops delivered by the DSB (aka Decoded ICache; or Uop Cache)",
106*b9efd75bSJin Yao        "MetricExpr": "IDQ.DSB_UOPS / (IDQ.DSB_UOPS + LSD.UOPS + IDQ.MITE_UOPS + IDQ.MS_UOPS)",
107*b9efd75bSJin Yao        "MetricGroup": "DSB;FetchBW",
108*b9efd75bSJin Yao        "MetricName": "DSB_Coverage"
109*b9efd75bSJin Yao    },
110*b9efd75bSJin Yao    {
111*b9efd75bSJin Yao        "BriefDescription": "Actual Average Latency for L1 data-cache miss demand loads (in core cycles)",
112*b9efd75bSJin Yao        "MetricExpr": "L1D_PEND_MISS.PENDING / ( MEM_LOAD_RETIRED.L1_MISS + MEM_LOAD_RETIRED.FB_HIT )",
113*b9efd75bSJin Yao        "MetricGroup": "MemoryBound;MemoryLat",
114*b9efd75bSJin Yao        "MetricName": "Load_Miss_Real_Latency"
115*b9efd75bSJin Yao    },
116*b9efd75bSJin Yao    {
117*b9efd75bSJin Yao        "BriefDescription": "Memory-Level-Parallelism (average number of L1 miss demand load when there is at least one such miss. Per-Logical Processor)",
118*b9efd75bSJin Yao        "MetricExpr": "L1D_PEND_MISS.PENDING / L1D_PEND_MISS.PENDING_CYCLES",
119*b9efd75bSJin Yao        "MetricGroup": "MemoryBound;MemoryBW",
120*b9efd75bSJin Yao        "MetricName": "MLP"
121*b9efd75bSJin Yao    },
122*b9efd75bSJin Yao    {
123*b9efd75bSJin Yao        "BriefDescription": "Utilization of the core's Page Walker(s) serving STLB misses triggered by instruction/Load/Store accesses",
124*b9efd75bSJin Yao        "MetricConstraint": "NO_NMI_WATCHDOG",
125*b9efd75bSJin Yao        "MetricExpr": "( ITLB_MISSES.WALK_PENDING + DTLB_LOAD_MISSES.WALK_PENDING + DTLB_STORE_MISSES.WALK_PENDING ) / ( 2 * CORE_CLKS )",
126*b9efd75bSJin Yao        "MetricGroup": "MemoryTLB",
127*b9efd75bSJin Yao        "MetricName": "Page_Walks_Utilization"
128*b9efd75bSJin Yao    },
129*b9efd75bSJin Yao    {
130*b9efd75bSJin Yao        "BriefDescription": "Average data fill bandwidth to the L1 data cache [GB / sec]",
131*b9efd75bSJin Yao        "MetricExpr": "64 * L1D.REPLACEMENT / 1000000000 / duration_time",
132*b9efd75bSJin Yao        "MetricGroup": "MemoryBW",
133*b9efd75bSJin Yao        "MetricName": "L1D_Cache_Fill_BW"
134*b9efd75bSJin Yao    },
135*b9efd75bSJin Yao    {
136*b9efd75bSJin Yao        "BriefDescription": "Average data fill bandwidth to the L2 cache [GB / sec]",
137*b9efd75bSJin Yao        "MetricExpr": "64 * L2_LINES_IN.ALL / 1000000000 / duration_time",
138*b9efd75bSJin Yao        "MetricGroup": "MemoryBW",
139*b9efd75bSJin Yao        "MetricName": "L2_Cache_Fill_BW"
140*b9efd75bSJin Yao    },
141*b9efd75bSJin Yao    {
142*b9efd75bSJin Yao        "BriefDescription": "Average per-core data access bandwidth to the L3 cache [GB / sec]",
143*b9efd75bSJin Yao        "MetricExpr": "64 * OFFCORE_REQUESTS.ALL_REQUESTS / 1000000000 / duration_time",
144*b9efd75bSJin Yao        "MetricGroup": "MemoryBW;Offcore",
145*b9efd75bSJin Yao        "MetricName": "L3_Cache_Access_BW"
146*b9efd75bSJin Yao    },
147*b9efd75bSJin Yao    {
148*b9efd75bSJin Yao        "BriefDescription": "L1 cache true misses per kilo instruction for retired demand loads",
149*b9efd75bSJin Yao        "MetricExpr": "1000 * MEM_LOAD_RETIRED.L1_MISS / INST_RETIRED.ANY",
150*b9efd75bSJin Yao        "MetricGroup": "CacheMisses",
151*b9efd75bSJin Yao        "MetricName": "L1MPKI"
152*b9efd75bSJin Yao    },
153*b9efd75bSJin Yao    {
154*b9efd75bSJin Yao        "BriefDescription": "L2 cache true misses per kilo instruction for retired demand loads",
155*b9efd75bSJin Yao        "MetricExpr": "1000 * MEM_LOAD_RETIRED.L2_MISS / INST_RETIRED.ANY",
156*b9efd75bSJin Yao        "MetricGroup": "CacheMisses",
157*b9efd75bSJin Yao        "MetricName": "L2MPKI"
158*b9efd75bSJin Yao    },
159*b9efd75bSJin Yao    {
160*b9efd75bSJin Yao        "BriefDescription": "L3 cache true misses per kilo instruction for retired demand loads",
161*b9efd75bSJin Yao        "MetricExpr": "1000 * MEM_LOAD_RETIRED.L3_MISS / INST_RETIRED.ANY",
162*b9efd75bSJin Yao        "MetricGroup": "CacheMisses",
163*b9efd75bSJin Yao        "MetricName": "L3MPKI"
164*b9efd75bSJin Yao    },
165*b9efd75bSJin Yao    {
166*b9efd75bSJin Yao        "BriefDescription": "Average CPU Utilization",
167*b9efd75bSJin Yao        "MetricExpr": "CPU_CLK_UNHALTED.REF_TSC / msr@tsc@",
168*b9efd75bSJin Yao        "MetricGroup": "HPC;Summary",
169*b9efd75bSJin Yao        "MetricName": "CPU_Utilization"
170*b9efd75bSJin Yao    },
171*b9efd75bSJin Yao    {
172*b9efd75bSJin Yao        "BriefDescription": "Measured Average Frequency for unhalted processors [GHz]",
173*b9efd75bSJin Yao        "MetricExpr": "(CPU_CLK_UNHALTED.THREAD / CPU_CLK_UNHALTED.REF_TSC) * msr@tsc@ / 1000000000 / duration_time",
174*b9efd75bSJin Yao        "MetricGroup": "Summary;Power",
175*b9efd75bSJin Yao        "MetricName": "Average_Frequency"
176*b9efd75bSJin Yao    },
177*b9efd75bSJin Yao    {
178*b9efd75bSJin Yao        "BriefDescription": "Giga Floating Point Operations Per Second",
179*b9efd75bSJin Yao        "MetricExpr": "( ( 1 * ( FP_ARITH_INST_RETIRED.SCALAR_SINGLE + FP_ARITH_INST_RETIRED.SCALAR_DOUBLE ) + 2 * FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE + 4 * ( FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE ) + 8 * ( FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.512B_PACKED_DOUBLE ) + 16 * FP_ARITH_INST_RETIRED.512B_PACKED_SINGLE ) / 1000000000 ) / duration_time",
180*b9efd75bSJin Yao        "MetricGroup": "Flops;HPC",
181*b9efd75bSJin Yao        "MetricName": "GFLOPs"
182*b9efd75bSJin Yao    },
183*b9efd75bSJin Yao    {
184*b9efd75bSJin Yao        "BriefDescription": "Average Frequency Utilization relative nominal frequency",
185*b9efd75bSJin Yao        "MetricExpr": "CPU_CLK_UNHALTED.THREAD / CPU_CLK_UNHALTED.REF_TSC",
186*b9efd75bSJin Yao        "MetricGroup": "Power",
187*b9efd75bSJin Yao        "MetricName": "Turbo_Utilization"
188*b9efd75bSJin Yao    },
189*b9efd75bSJin Yao    {
190*b9efd75bSJin Yao        "BriefDescription": "Fraction of cycles where both hardware Logical Processors were active",
191*b9efd75bSJin Yao        "MetricExpr": "1 - CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_DISTRIBUTED",
192*b9efd75bSJin Yao        "MetricGroup": "SMT",
193*b9efd75bSJin Yao        "MetricName": "SMT_2T_Utilization"
194*b9efd75bSJin Yao    },
195*b9efd75bSJin Yao    {
196*b9efd75bSJin Yao        "BriefDescription": "Fraction of cycles spent in the Operating System (OS) Kernel mode",
197*b9efd75bSJin Yao        "MetricExpr": "CPU_CLK_UNHALTED.THREAD_P:k / CPU_CLK_UNHALTED.THREAD",
198*b9efd75bSJin Yao        "MetricGroup": "OS",
199*b9efd75bSJin Yao        "MetricName": "Kernel_Utilization"
200*b9efd75bSJin Yao    },
201*b9efd75bSJin Yao    {
202*b9efd75bSJin Yao        "BriefDescription": "Instructions per Far Branch ( Far Branches apply upon transition from application to operating system, handling interrupts, exceptions) [lower number means higher occurrence rate]",
203*b9efd75bSJin Yao        "MetricExpr": "INST_RETIRED.ANY / BR_INST_RETIRED.FAR_BRANCH:u",
204*b9efd75bSJin Yao        "MetricGroup": "Branches;OS",
205*b9efd75bSJin Yao        "MetricName": "IpFarBranch"
206*b9efd75bSJin Yao    },
207*b9efd75bSJin Yao    {
208*b9efd75bSJin Yao        "BriefDescription": "C6 residency percent per core",
209*b9efd75bSJin Yao        "MetricExpr": "(cstate_core@c6\\-residency@ / msr@tsc@) * 100",
210*b9efd75bSJin Yao        "MetricGroup": "Power",
211*b9efd75bSJin Yao        "MetricName": "C6_Core_Residency"
212*b9efd75bSJin Yao    },
213*b9efd75bSJin Yao    {
214*b9efd75bSJin Yao        "BriefDescription": "C7 residency percent per core",
215*b9efd75bSJin Yao        "MetricExpr": "(cstate_core@c7\\-residency@ / msr@tsc@) * 100",
216*b9efd75bSJin Yao        "MetricGroup": "Power",
217*b9efd75bSJin Yao        "MetricName": "C7_Core_Residency"
218*b9efd75bSJin Yao    },
219*b9efd75bSJin Yao    {
220*b9efd75bSJin Yao        "BriefDescription": "C6 residency percent per package",
221*b9efd75bSJin Yao        "MetricExpr": "(cstate_pkg@c6\\-residency@ / msr@tsc@) * 100",
222*b9efd75bSJin Yao        "MetricGroup": "Power",
223*b9efd75bSJin Yao        "MetricName": "C6_Pkg_Residency"
224*b9efd75bSJin Yao    },
225*b9efd75bSJin Yao    {
226*b9efd75bSJin Yao        "BriefDescription": "C7 residency percent per package",
227*b9efd75bSJin Yao        "MetricExpr": "(cstate_pkg@c7\\-residency@ / msr@tsc@) * 100",
228*b9efd75bSJin Yao        "MetricGroup": "Power",
229*b9efd75bSJin Yao        "MetricName": "C7_Pkg_Residency"
230*b9efd75bSJin Yao    }
231*b9efd75bSJin Yao]
232