1[ 2 { 3 "BriefDescription": "Instructions Per Cycle (per Logical Processor)", 4 "MetricExpr": "INST_RETIRED.ANY / CPU_CLK_UNHALTED.THREAD", 5 "MetricGroup": "Summary", 6 "MetricName": "IPC" 7 }, 8 { 9 "BriefDescription": "Uops Per Instruction", 10 "MetricExpr": "UOPS_RETIRED.RETIRE_SLOTS / INST_RETIRED.ANY", 11 "MetricGroup": "Pipeline;Retire", 12 "MetricName": "UPI" 13 }, 14 { 15 "BriefDescription": "Instruction per taken branch", 16 "MetricExpr": "INST_RETIRED.ANY / BR_INST_RETIRED.NEAR_TAKEN", 17 "MetricGroup": "Branches;FetchBW;PGO", 18 "MetricName": "IpTB" 19 }, 20 { 21 "BriefDescription": "Cycles Per Instruction (per Logical Processor)", 22 "MetricExpr": "1 / (INST_RETIRED.ANY / CPU_CLK_UNHALTED.THREAD)", 23 "MetricGroup": "Pipeline", 24 "MetricName": "CPI" 25 }, 26 { 27 "BriefDescription": "Per-Logical Processor actual clocks when the Logical Processor is active.", 28 "MetricExpr": "CPU_CLK_UNHALTED.THREAD", 29 "MetricGroup": "Pipeline", 30 "MetricName": "CLKS" 31 }, 32 { 33 "BriefDescription": "Instructions Per Cycle (per physical core)", 34 "MetricExpr": "INST_RETIRED.ANY / CPU_CLK_UNHALTED.THREAD", 35 "MetricGroup": "SMT;TmaL1", 36 "MetricName": "CoreIPC" 37 }, 38 { 39 "BriefDescription": "Instructions Per Cycle (per physical core)", 40 "MetricExpr": "INST_RETIRED.ANY / ( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )", 41 "MetricGroup": "SMT;TmaL1", 42 "MetricName": "CoreIPC_SMT" 43 }, 44 { 45 "BriefDescription": "Floating Point Operations Per Cycle", 46 "MetricExpr": "( 1 * ( FP_ARITH_INST_RETIRED.SCALAR_SINGLE + FP_ARITH_INST_RETIRED.SCALAR_DOUBLE ) + 2 * FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE + 4 * ( FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE ) + 8 * ( FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.512B_PACKED_DOUBLE ) + 16 * FP_ARITH_INST_RETIRED.512B_PACKED_SINGLE ) / CPU_CLK_UNHALTED.THREAD", 47 "MetricGroup": "Flops", 48 "MetricName": "FLOPc" 49 }, 50 { 51 "BriefDescription": "Floating Point Operations Per Cycle", 52 "MetricExpr": "( 1 * ( FP_ARITH_INST_RETIRED.SCALAR_SINGLE + FP_ARITH_INST_RETIRED.SCALAR_DOUBLE ) + 2 * FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE + 4 * ( FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE ) + 8 * ( FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.512B_PACKED_DOUBLE ) + 16 * FP_ARITH_INST_RETIRED.512B_PACKED_SINGLE ) / ( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )", 53 "MetricGroup": "Flops_SMT", 54 "MetricName": "FLOPc_SMT" 55 }, 56 { 57 "BriefDescription": "Instruction-Level-Parallelism (average number of uops executed when there is at least 1 uop executed)", 58 "MetricExpr": "UOPS_EXECUTED.THREAD / (( UOPS_EXECUTED.CORE_CYCLES_GE_1 / 2 ) if #SMT_on else UOPS_EXECUTED.CORE_CYCLES_GE_1)", 59 "MetricGroup": "Pipeline;PortsUtil", 60 "MetricName": "ILP" 61 }, 62 { 63 "BriefDescription": "Number of Instructions per non-speculative Branch Misprediction (JEClear)", 64 "MetricExpr": "INST_RETIRED.ANY / BR_MISP_RETIRED.ALL_BRANCHES", 65 "MetricGroup": "BrMispredicts", 66 "MetricName": "IpMispredict" 67 }, 68 { 69 "BriefDescription": "Core actual clocks when any Logical Processor is active on the Physical Core", 70 "MetricExpr": "( CPU_CLK_UNHALTED.THREAD_ANY / 2 ) if #SMT_on else CPU_CLK_UNHALTED.THREAD", 71 "MetricGroup": "SMT", 72 "MetricName": "CORE_CLKS" 73 }, 74 { 75 "BriefDescription": "Instructions per Load (lower number means higher occurrence rate)", 76 "MetricExpr": "INST_RETIRED.ANY / MEM_INST_RETIRED.ALL_LOADS", 77 "MetricGroup": "InsType", 78 "MetricName": "IpLoad" 79 }, 80 { 81 "BriefDescription": "Instructions per Store (lower number means higher occurrence rate)", 82 "MetricExpr": "INST_RETIRED.ANY / MEM_INST_RETIRED.ALL_STORES", 83 "MetricGroup": "InsType", 84 "MetricName": "IpStore" 85 }, 86 { 87 "BriefDescription": "Instructions per Branch (lower number means higher occurrence rate)", 88 "MetricExpr": "INST_RETIRED.ANY / BR_INST_RETIRED.ALL_BRANCHES", 89 "MetricGroup": "Branches;InsType", 90 "MetricName": "IpBranch" 91 }, 92 { 93 "BriefDescription": "Instructions per (near) call (lower number means higher occurrence rate)", 94 "MetricExpr": "INST_RETIRED.ANY / BR_INST_RETIRED.NEAR_CALL", 95 "MetricGroup": "Branches", 96 "MetricName": "IpCall" 97 }, 98 { 99 "BriefDescription": "Branch instructions per taken branch. ", 100 "MetricExpr": "BR_INST_RETIRED.ALL_BRANCHES / BR_INST_RETIRED.NEAR_TAKEN", 101 "MetricGroup": "Branches;PGO", 102 "MetricName": "BpTkBranch" 103 }, 104 { 105 "BriefDescription": "Instructions per Floating Point (FP) Operation (lower number means higher occurrence rate)", 106 "MetricExpr": "INST_RETIRED.ANY / ( 1 * ( FP_ARITH_INST_RETIRED.SCALAR_SINGLE + FP_ARITH_INST_RETIRED.SCALAR_DOUBLE ) + 2 * FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE + 4 * ( FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE ) + 8 * ( FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.512B_PACKED_DOUBLE ) + 16 * FP_ARITH_INST_RETIRED.512B_PACKED_SINGLE )", 107 "MetricGroup": "Flops;FpArith;InsType", 108 "MetricName": "IpFLOP" 109 }, 110 { 111 "BriefDescription": "Total number of retired Instructions, Sample with: INST_RETIRED.PREC_DIST", 112 "MetricExpr": "INST_RETIRED.ANY", 113 "MetricGroup": "Summary;TmaL1", 114 "MetricName": "Instructions" 115 }, 116 { 117 "BriefDescription": "Fraction of Uops delivered by the DSB (aka Decoded ICache; or Uop Cache)", 118 "MetricExpr": "IDQ.DSB_UOPS / (IDQ.DSB_UOPS + IDQ.MITE_UOPS + IDQ.MS_UOPS)", 119 "MetricGroup": "DSB;FetchBW", 120 "MetricName": "DSB_Coverage" 121 }, 122 { 123 "BriefDescription": "Actual Average Latency for L1 data-cache miss demand loads (in core cycles)", 124 "MetricExpr": "L1D_PEND_MISS.PENDING / ( MEM_LOAD_RETIRED.L1_MISS + MEM_LOAD_RETIRED.FB_HIT )", 125 "MetricGroup": "MemoryBound;MemoryLat", 126 "MetricName": "Load_Miss_Real_Latency" 127 }, 128 { 129 "BriefDescription": "Memory-Level-Parallelism (average number of L1 miss demand load when there is at least one such miss. Per-Logical Processor)", 130 "MetricExpr": "L1D_PEND_MISS.PENDING / L1D_PEND_MISS.PENDING_CYCLES", 131 "MetricGroup": "MemoryBound;MemoryBW", 132 "MetricName": "MLP" 133 }, 134 { 135 "BriefDescription": "Utilization of the core's Page Walker(s) serving STLB misses triggered by instruction/Load/Store accesses", 136 "MetricConstraint": "NO_NMI_WATCHDOG", 137 "MetricExpr": "( ITLB_MISSES.WALK_PENDING + DTLB_LOAD_MISSES.WALK_PENDING + DTLB_STORE_MISSES.WALK_PENDING + EPT.WALK_PENDING ) / ( 2 * CORE_CLKS )", 138 "MetricGroup": "MemoryTLB", 139 "MetricName": "Page_Walks_Utilization" 140 }, 141 { 142 "BriefDescription": "Average data fill bandwidth to the L1 data cache [GB / sec]", 143 "MetricExpr": "64 * L1D.REPLACEMENT / 1000000000 / duration_time", 144 "MetricGroup": "MemoryBW", 145 "MetricName": "L1D_Cache_Fill_BW" 146 }, 147 { 148 "BriefDescription": "Average data fill bandwidth to the L2 cache [GB / sec]", 149 "MetricExpr": "64 * L2_LINES_IN.ALL / 1000000000 / duration_time", 150 "MetricGroup": "MemoryBW", 151 "MetricName": "L2_Cache_Fill_BW" 152 }, 153 { 154 "BriefDescription": "Average per-core data fill bandwidth to the L3 cache [GB / sec]", 155 "MetricExpr": "64 * LONGEST_LAT_CACHE.MISS / 1000000000 / duration_time", 156 "MetricGroup": "MemoryBW", 157 "MetricName": "L3_Cache_Fill_BW" 158 }, 159 { 160 "BriefDescription": "Average per-core data access bandwidth to the L3 cache [GB / sec]", 161 "MetricExpr": "64 * OFFCORE_REQUESTS.ALL_REQUESTS / 1000000000 / duration_time", 162 "MetricGroup": "MemoryBW;Offcore", 163 "MetricName": "L3_Cache_Access_BW" 164 }, 165 { 166 "BriefDescription": "L1 cache true misses per kilo instruction for retired demand loads", 167 "MetricExpr": "1000 * MEM_LOAD_RETIRED.L1_MISS / INST_RETIRED.ANY", 168 "MetricGroup": "CacheMisses", 169 "MetricName": "L1MPKI" 170 }, 171 { 172 "BriefDescription": "L2 cache true misses per kilo instruction for retired demand loads", 173 "MetricExpr": "1000 * MEM_LOAD_RETIRED.L2_MISS / INST_RETIRED.ANY", 174 "MetricGroup": "CacheMisses", 175 "MetricName": "L2MPKI" 176 }, 177 { 178 "BriefDescription": "L2 cache misses per kilo instruction for all request types (including speculative)", 179 "MetricExpr": "1000 * L2_RQSTS.MISS / INST_RETIRED.ANY", 180 "MetricGroup": "CacheMisses;Offcore", 181 "MetricName": "L2MPKI_All" 182 }, 183 { 184 "BriefDescription": "L2 cache hits per kilo instruction for all request types (including speculative)", 185 "MetricExpr": "1000 * ( L2_RQSTS.REFERENCES - L2_RQSTS.MISS ) / INST_RETIRED.ANY", 186 "MetricGroup": "CacheMisses", 187 "MetricName": "L2HPKI_All" 188 }, 189 { 190 "BriefDescription": "L3 cache true misses per kilo instruction for retired demand loads", 191 "MetricExpr": "1000 * MEM_LOAD_RETIRED.L3_MISS / INST_RETIRED.ANY", 192 "MetricGroup": "CacheMisses", 193 "MetricName": "L3MPKI" 194 }, 195 { 196 "BriefDescription": "Rate of silent evictions from the L2 cache per Kilo instruction where the evicted lines are dropped (no writeback to L3 or memory)", 197 "MetricExpr": "1000 * L2_LINES_OUT.SILENT / INST_RETIRED.ANY", 198 "MetricGroup": "L2Evicts;Server", 199 "MetricName": "L2_Evictions_Silent_PKI" 200 }, 201 { 202 "BriefDescription": "Rate of non silent evictions from the L2 cache per Kilo instruction", 203 "MetricExpr": "1000 * L2_LINES_OUT.NON_SILENT / INST_RETIRED.ANY", 204 "MetricGroup": "L2Evicts;Server", 205 "MetricName": "L2_Evictions_NonSilent_PKI" 206 }, 207 { 208 "BriefDescription": "Average CPU Utilization", 209 "MetricExpr": "CPU_CLK_UNHALTED.REF_TSC / msr@tsc@", 210 "MetricGroup": "HPC;Summary", 211 "MetricName": "CPU_Utilization" 212 }, 213 { 214 "BriefDescription": "Measured Average Frequency for unhalted processors [GHz]", 215 "MetricExpr": "(CPU_CLK_UNHALTED.THREAD / CPU_CLK_UNHALTED.REF_TSC) * msr@tsc@ / 1000000000 / duration_time", 216 "MetricGroup": "Summary;Power", 217 "MetricName": "Average_Frequency" 218 }, 219 { 220 "BriefDescription": "Giga Floating Point Operations Per Second", 221 "MetricExpr": "( ( 1 * ( FP_ARITH_INST_RETIRED.SCALAR_SINGLE + FP_ARITH_INST_RETIRED.SCALAR_DOUBLE ) + 2 * FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE + 4 * ( FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE ) + 8 * ( FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.512B_PACKED_DOUBLE ) + 16 * FP_ARITH_INST_RETIRED.512B_PACKED_SINGLE ) / 1000000000 ) / duration_time", 222 "MetricGroup": "Flops;HPC", 223 "MetricName": "GFLOPs" 224 }, 225 { 226 "BriefDescription": "Average Frequency Utilization relative nominal frequency", 227 "MetricExpr": "CPU_CLK_UNHALTED.THREAD / CPU_CLK_UNHALTED.REF_TSC", 228 "MetricGroup": "Power", 229 "MetricName": "Turbo_Utilization" 230 }, 231 { 232 "BriefDescription": "Fraction of cycles where both hardware Logical Processors were active", 233 "MetricExpr": "1 - CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / ( CPU_CLK_UNHALTED.REF_XCLK_ANY / 2 ) if #SMT_on else 0", 234 "MetricGroup": "SMT", 235 "MetricName": "SMT_2T_Utilization" 236 }, 237 { 238 "BriefDescription": "Fraction of cycles spent in the Operating System (OS) Kernel mode", 239 "MetricExpr": "CPU_CLK_UNHALTED.THREAD_P:k / CPU_CLK_UNHALTED.THREAD", 240 "MetricGroup": "OS", 241 "MetricName": "Kernel_Utilization" 242 }, 243 { 244 "BriefDescription": "Average external Memory Bandwidth Use for reads and writes [GB / sec]", 245 "MetricExpr": "( 64 * ( uncore_imc@cas_count_read@ + uncore_imc@cas_count_write@ ) / 1000000000 ) / duration_time", 246 "MetricGroup": "HPC;MemoryBW;SoC", 247 "MetricName": "DRAM_BW_Use" 248 }, 249 { 250 "BriefDescription": "Average latency of data read request to external memory (in nanoseconds). Accounts for demand loads and L1/L2 prefetches", 251 "MetricExpr": "1000000000 * ( cha@event\\=0x36\\,umask\\=0x21\\,config\\=0x40433@ / cha@event\\=0x35\\,umask\\=0x21\\,config\\=0x40433@ ) / ( cha_0@event\\=0x0@ / duration_time )", 252 "MetricGroup": "MemoryLat;SoC", 253 "MetricName": "MEM_Read_Latency" 254 }, 255 { 256 "BriefDescription": "Average number of parallel data read requests to external memory. Accounts for demand loads and L1/L2 prefetches", 257 "MetricExpr": "cha@event\\=0x36\\,umask\\=0x21\\,config\\=0x40433@ / cha@event\\=0x36\\,umask\\=0x21\\,config\\=0x40433\\,thresh\\=1@", 258 "MetricGroup": "MemoryBW;SoC", 259 "MetricName": "MEM_Parallel_Reads" 260 }, 261 { 262 "BriefDescription": "Average IO (network or disk) Bandwidth Use for Writes [GB / sec]", 263 "MetricExpr": "( UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART0 + UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART1 + UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART2 + UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART3 ) * 4 / 1000000000 / duration_time", 264 "MetricGroup": "IoBW;SoC;Server", 265 "MetricName": "IO_Write_BW" 266 }, 267 { 268 "BriefDescription": "Average IO (network or disk) Bandwidth Use for Reads [GB / sec]", 269 "MetricExpr": "( UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART0 + UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART1 + UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART2 + UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART3 ) * 4 / 1000000000 / duration_time", 270 "MetricGroup": "IoBW;SoC;Server", 271 "MetricName": "IO_Read_BW" 272 }, 273 { 274 "BriefDescription": "Socket actual clocks when any core is active on that socket", 275 "MetricExpr": "cha_0@event\\=0x0@", 276 "MetricGroup": "SoC", 277 "MetricName": "Socket_CLKS" 278 }, 279 { 280 "BriefDescription": "Instructions per Far Branch ( Far Branches apply upon transition from application to operating system, handling interrupts, exceptions) [lower number means higher occurrence rate]", 281 "MetricExpr": "INST_RETIRED.ANY / BR_INST_RETIRED.FAR_BRANCH:u", 282 "MetricGroup": "Branches;OS", 283 "MetricName": "IpFarBranch" 284 }, 285 { 286 "BriefDescription": "C3 residency percent per core", 287 "MetricExpr": "(cstate_core@c3\\-residency@ / msr@tsc@) * 100", 288 "MetricGroup": "Power", 289 "MetricName": "C3_Core_Residency" 290 }, 291 { 292 "BriefDescription": "C6 residency percent per core", 293 "MetricExpr": "(cstate_core@c6\\-residency@ / msr@tsc@) * 100", 294 "MetricGroup": "Power", 295 "MetricName": "C6_Core_Residency" 296 }, 297 { 298 "BriefDescription": "C7 residency percent per core", 299 "MetricExpr": "(cstate_core@c7\\-residency@ / msr@tsc@) * 100", 300 "MetricGroup": "Power", 301 "MetricName": "C7_Core_Residency" 302 }, 303 { 304 "BriefDescription": "C2 residency percent per package", 305 "MetricExpr": "(cstate_pkg@c2\\-residency@ / msr@tsc@) * 100", 306 "MetricGroup": "Power", 307 "MetricName": "C2_Pkg_Residency" 308 }, 309 { 310 "BriefDescription": "C3 residency percent per package", 311 "MetricExpr": "(cstate_pkg@c3\\-residency@ / msr@tsc@) * 100", 312 "MetricGroup": "Power", 313 "MetricName": "C3_Pkg_Residency" 314 }, 315 { 316 "BriefDescription": "C6 residency percent per package", 317 "MetricExpr": "(cstate_pkg@c6\\-residency@ / msr@tsc@) * 100", 318 "MetricGroup": "Power", 319 "MetricName": "C6_Pkg_Residency" 320 }, 321 { 322 "BriefDescription": "C7 residency percent per package", 323 "MetricExpr": "(cstate_pkg@c7\\-residency@ / msr@tsc@) * 100", 324 "MetricGroup": "Power", 325 "MetricName": "C7_Pkg_Residency" 326 } 327] 328