1*12c6385eSIan Rogers[
2*12c6385eSIan Rogers    {
3*12c6385eSIan Rogers        "BriefDescription": "TBD",
4*12c6385eSIan Rogers        "CollectPEBSRecord": "2",
5*12c6385eSIan Rogers        "Counter": "0,1,2,3,4,5,6,7",
6*12c6385eSIan Rogers        "EventCode": "0xc1",
7*12c6385eSIan Rogers        "EventName": "ASSISTS.PAGE_FAULT",
8*12c6385eSIan Rogers        "PEBScounters": "0,1,2,3,4,5,6,7",
9*12c6385eSIan Rogers        "SampleAfterValue": "1000003",
10*12c6385eSIan Rogers        "UMask": "0x8"
11*12c6385eSIan Rogers    },
12*12c6385eSIan Rogers    {
13*12c6385eSIan Rogers        "BriefDescription": "Counts the cycles where the AMX (Advance Matrix Extension) unit is busy performing an operation.",
14*12c6385eSIan Rogers        "Counter": "0,1,2,3,4,5,6,7",
15*12c6385eSIan Rogers        "EventCode": "0xb7",
16*12c6385eSIan Rogers        "EventName": "EXE.AMX_BUSY",
17*12c6385eSIan Rogers        "PEBScounters": "0,1,2,3,4,5,6,7",
18*12c6385eSIan Rogers        "SampleAfterValue": "2000003",
19*12c6385eSIan Rogers        "UMask": "0x2"
20*12c6385eSIan Rogers    },
21*12c6385eSIan Rogers    {
22*12c6385eSIan Rogers        "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that have any type of response.",
23*12c6385eSIan Rogers        "Counter": "0,1,2,3",
24*12c6385eSIan Rogers        "EventCode": "0x2A,0x2B",
25*12c6385eSIan Rogers        "EventName": "OCR.DEMAND_CODE_RD.ANY_RESPONSE",
26*12c6385eSIan Rogers        "MSRIndex": "0x1a6,0x1a7",
27*12c6385eSIan Rogers        "MSRValue": "0x10004",
28*12c6385eSIan Rogers        "Offcore": "1",
29*12c6385eSIan Rogers        "SampleAfterValue": "100003",
30*12c6385eSIan Rogers        "UMask": "0x1"
31*12c6385eSIan Rogers    },
32*12c6385eSIan Rogers    {
33*12c6385eSIan Rogers        "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that were supplied by DRAM.",
34*12c6385eSIan Rogers        "Counter": "0,1,2,3",
35*12c6385eSIan Rogers        "EventCode": "0x2A,0x2B",
36*12c6385eSIan Rogers        "EventName": "OCR.DEMAND_CODE_RD.DRAM",
37*12c6385eSIan Rogers        "MSRIndex": "0x1a6,0x1a7",
38*12c6385eSIan Rogers        "MSRValue": "0x73C000004",
39*12c6385eSIan Rogers        "Offcore": "1",
40*12c6385eSIan Rogers        "SampleAfterValue": "100003",
41*12c6385eSIan Rogers        "UMask": "0x1"
42*12c6385eSIan Rogers    },
43*12c6385eSIan Rogers    {
44*12c6385eSIan Rogers        "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that were supplied by DRAM attached to this socket, unless in Sub NUMA Cluster(SNC) Mode.  In SNC Mode counts only those DRAM accesses that are controlled by the close SNC Cluster.",
45*12c6385eSIan Rogers        "Counter": "0,1,2,3",
46*12c6385eSIan Rogers        "EventCode": "0x2A,0x2B",
47*12c6385eSIan Rogers        "EventName": "OCR.DEMAND_CODE_RD.LOCAL_DRAM",
48*12c6385eSIan Rogers        "MSRIndex": "0x1a6,0x1a7",
49*12c6385eSIan Rogers        "MSRValue": "0x104000004",
50*12c6385eSIan Rogers        "Offcore": "1",
51*12c6385eSIan Rogers        "SampleAfterValue": "100003",
52*12c6385eSIan Rogers        "UMask": "0x1"
53*12c6385eSIan Rogers    },
54*12c6385eSIan Rogers    {
55*12c6385eSIan Rogers        "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that were supplied by DRAM on a distant memory controller of this socket when the system is in SNC (sub-NUMA cluster) mode.",
56*12c6385eSIan Rogers        "Counter": "0,1,2,3",
57*12c6385eSIan Rogers        "EventCode": "0x2A,0x2B",
58*12c6385eSIan Rogers        "EventName": "OCR.DEMAND_CODE_RD.SNC_DRAM",
59*12c6385eSIan Rogers        "MSRIndex": "0x1a6,0x1a7",
60*12c6385eSIan Rogers        "MSRValue": "0x708000004",
61*12c6385eSIan Rogers        "Offcore": "1",
62*12c6385eSIan Rogers        "SampleAfterValue": "100003",
63*12c6385eSIan Rogers        "UMask": "0x1"
64*12c6385eSIan Rogers    },
65*12c6385eSIan Rogers    {
66*12c6385eSIan Rogers        "BriefDescription": "Counts demand data reads that have any type of response.",
67*12c6385eSIan Rogers        "Counter": "0,1,2,3",
68*12c6385eSIan Rogers        "EventCode": "0x2A,0x2B",
69*12c6385eSIan Rogers        "EventName": "OCR.DEMAND_DATA_RD.ANY_RESPONSE",
70*12c6385eSIan Rogers        "MSRIndex": "0x1a6,0x1a7",
71*12c6385eSIan Rogers        "MSRValue": "0x10001",
72*12c6385eSIan Rogers        "Offcore": "1",
73*12c6385eSIan Rogers        "SampleAfterValue": "100003",
74*12c6385eSIan Rogers        "UMask": "0x1"
75*12c6385eSIan Rogers    },
76*12c6385eSIan Rogers    {
77*12c6385eSIan Rogers        "BriefDescription": "Counts demand data reads that were supplied by DRAM.",
78*12c6385eSIan Rogers        "Counter": "0,1,2,3",
79*12c6385eSIan Rogers        "EventCode": "0x2A,0x2B",
80*12c6385eSIan Rogers        "EventName": "OCR.DEMAND_DATA_RD.DRAM",
81*12c6385eSIan Rogers        "MSRIndex": "0x1a6,0x1a7",
82*12c6385eSIan Rogers        "MSRValue": "0x73C000001",
83*12c6385eSIan Rogers        "Offcore": "1",
84*12c6385eSIan Rogers        "SampleAfterValue": "100003",
85*12c6385eSIan Rogers        "UMask": "0x1"
86*12c6385eSIan Rogers    },
87*12c6385eSIan Rogers    {
88*12c6385eSIan Rogers        "BriefDescription": "Counts demand data reads that were supplied by DRAM attached to this socket, unless in Sub NUMA Cluster(SNC) Mode.  In SNC Mode counts only those DRAM accesses that are controlled by the close SNC Cluster.",
89*12c6385eSIan Rogers        "Counter": "0,1,2,3",
90*12c6385eSIan Rogers        "EventCode": "0x2A,0x2B",
91*12c6385eSIan Rogers        "EventName": "OCR.DEMAND_DATA_RD.LOCAL_DRAM",
92*12c6385eSIan Rogers        "MSRIndex": "0x1a6,0x1a7",
93*12c6385eSIan Rogers        "MSRValue": "0x104000001",
94*12c6385eSIan Rogers        "Offcore": "1",
95*12c6385eSIan Rogers        "SampleAfterValue": "100003",
96*12c6385eSIan Rogers        "UMask": "0x1"
97*12c6385eSIan Rogers    },
98*12c6385eSIan Rogers    {
99*12c6385eSIan Rogers        "BriefDescription": "Counts demand data reads that were supplied by DRAM attached to another socket.",
100*12c6385eSIan Rogers        "Counter": "0,1,2,3",
101*12c6385eSIan Rogers        "EventCode": "0x2A,0x2B",
102*12c6385eSIan Rogers        "EventName": "OCR.DEMAND_DATA_RD.REMOTE_DRAM",
103*12c6385eSIan Rogers        "MSRIndex": "0x1a6,0x1a7",
104*12c6385eSIan Rogers        "MSRValue": "0x730000001",
105*12c6385eSIan Rogers        "Offcore": "1",
106*12c6385eSIan Rogers        "SampleAfterValue": "100003",
107*12c6385eSIan Rogers        "UMask": "0x1"
108*12c6385eSIan Rogers    },
109*12c6385eSIan Rogers    {
110*12c6385eSIan Rogers        "BriefDescription": "Counts demand data reads that were supplied by PMM attached to another socket.",
111*12c6385eSIan Rogers        "Counter": "0,1,2,3",
112*12c6385eSIan Rogers        "EventCode": "0x2A,0x2B",
113*12c6385eSIan Rogers        "EventName": "OCR.DEMAND_DATA_RD.REMOTE_PMM",
114*12c6385eSIan Rogers        "MSRIndex": "0x1a6,0x1a7",
115*12c6385eSIan Rogers        "MSRValue": "0x703000001",
116*12c6385eSIan Rogers        "Offcore": "1",
117*12c6385eSIan Rogers        "SampleAfterValue": "100003",
118*12c6385eSIan Rogers        "UMask": "0x1"
119*12c6385eSIan Rogers    },
120*12c6385eSIan Rogers    {
121*12c6385eSIan Rogers        "BriefDescription": "Counts demand data reads that were supplied by DRAM on a distant memory controller of this socket when the system is in SNC (sub-NUMA cluster) mode.",
122*12c6385eSIan Rogers        "Counter": "0,1,2,3",
123*12c6385eSIan Rogers        "EventCode": "0x2A,0x2B",
124*12c6385eSIan Rogers        "EventName": "OCR.DEMAND_DATA_RD.SNC_DRAM",
125*12c6385eSIan Rogers        "MSRIndex": "0x1a6,0x1a7",
126*12c6385eSIan Rogers        "MSRValue": "0x708000001",
127*12c6385eSIan Rogers        "Offcore": "1",
128*12c6385eSIan Rogers        "SampleAfterValue": "100003",
129*12c6385eSIan Rogers        "UMask": "0x1"
130*12c6385eSIan Rogers    },
131*12c6385eSIan Rogers    {
132*12c6385eSIan Rogers        "BriefDescription": "Counts demand reads for ownership (RFO) requests and software prefetches for exclusive ownership (PREFETCHW) that have any type of response.",
133*12c6385eSIan Rogers        "Counter": "0,1,2,3",
134*12c6385eSIan Rogers        "EventCode": "0x2A,0x2B",
135*12c6385eSIan Rogers        "EventName": "OCR.DEMAND_RFO.ANY_RESPONSE",
136*12c6385eSIan Rogers        "MSRIndex": "0x1a6,0x1a7",
137*12c6385eSIan Rogers        "MSRValue": "0x3F3FFC0002",
138*12c6385eSIan Rogers        "Offcore": "1",
139*12c6385eSIan Rogers        "SampleAfterValue": "100003",
140*12c6385eSIan Rogers        "UMask": "0x1"
141*12c6385eSIan Rogers    },
142*12c6385eSIan Rogers    {
143*12c6385eSIan Rogers        "BriefDescription": "Counts demand reads for ownership (RFO) requests and software prefetches for exclusive ownership (PREFETCHW) that were supplied by DRAM.",
144*12c6385eSIan Rogers        "Counter": "0,1,2,3",
145*12c6385eSIan Rogers        "EventCode": "0x2A,0x2B",
146*12c6385eSIan Rogers        "EventName": "OCR.DEMAND_RFO.DRAM",
147*12c6385eSIan Rogers        "MSRIndex": "0x1a6,0x1a7",
148*12c6385eSIan Rogers        "MSRValue": "0x73C000002",
149*12c6385eSIan Rogers        "Offcore": "1",
150*12c6385eSIan Rogers        "SampleAfterValue": "100003",
151*12c6385eSIan Rogers        "UMask": "0x1"
152*12c6385eSIan Rogers    },
153*12c6385eSIan Rogers    {
154*12c6385eSIan Rogers        "BriefDescription": "Counts demand reads for ownership (RFO) requests and software prefetches for exclusive ownership (PREFETCHW) that were supplied by DRAM attached to this socket, unless in Sub NUMA Cluster(SNC) Mode.  In SNC Mode counts only those DRAM accesses that are controlled by the close SNC Cluster.",
155*12c6385eSIan Rogers        "Counter": "0,1,2,3",
156*12c6385eSIan Rogers        "EventCode": "0x2A,0x2B",
157*12c6385eSIan Rogers        "EventName": "OCR.DEMAND_RFO.LOCAL_DRAM",
158*12c6385eSIan Rogers        "MSRIndex": "0x1a6,0x1a7",
159*12c6385eSIan Rogers        "MSRValue": "0x104000002",
160*12c6385eSIan Rogers        "Offcore": "1",
161*12c6385eSIan Rogers        "SampleAfterValue": "100003",
162*12c6385eSIan Rogers        "UMask": "0x1"
163*12c6385eSIan Rogers    },
164*12c6385eSIan Rogers    {
165*12c6385eSIan Rogers        "BriefDescription": "Counts demand reads for ownership (RFO) requests and software prefetches for exclusive ownership (PREFETCHW) that were supplied by DRAM on a distant memory controller of this socket when the system is in SNC (sub-NUMA cluster) mode.",
166*12c6385eSIan Rogers        "Counter": "0,1,2,3",
167*12c6385eSIan Rogers        "EventCode": "0x2A,0x2B",
168*12c6385eSIan Rogers        "EventName": "OCR.DEMAND_RFO.SNC_DRAM",
169*12c6385eSIan Rogers        "MSRIndex": "0x1a6,0x1a7",
170*12c6385eSIan Rogers        "MSRValue": "0x708000002",
171*12c6385eSIan Rogers        "Offcore": "1",
172*12c6385eSIan Rogers        "SampleAfterValue": "100003",
173*12c6385eSIan Rogers        "UMask": "0x1"
174*12c6385eSIan Rogers    },
175*12c6385eSIan Rogers    {
176*12c6385eSIan Rogers        "BriefDescription": "Counts hardware prefetches (which bring data to L2) that have any type of response.",
177*12c6385eSIan Rogers        "Counter": "0,1,2,3",
178*12c6385eSIan Rogers        "EventCode": "0x2A,0x2B",
179*12c6385eSIan Rogers        "EventName": "OCR.HWPF_L2.ANY_RESPONSE",
180*12c6385eSIan Rogers        "MSRIndex": "0x1a6,0x1a7",
181*12c6385eSIan Rogers        "MSRValue": "0x10070",
182*12c6385eSIan Rogers        "Offcore": "1",
183*12c6385eSIan Rogers        "SampleAfterValue": "100003",
184*12c6385eSIan Rogers        "UMask": "0x1"
185*12c6385eSIan Rogers    },
186*12c6385eSIan Rogers    {
187*12c6385eSIan Rogers        "BriefDescription": "Counts hardware prefetches to the L3 only that have any type of response.",
188*12c6385eSIan Rogers        "Counter": "0,1,2,3",
189*12c6385eSIan Rogers        "EventCode": "0x2A,0x2B",
190*12c6385eSIan Rogers        "EventName": "OCR.HWPF_L3.ANY_RESPONSE",
191*12c6385eSIan Rogers        "MSRIndex": "0x1a6,0x1a7",
192*12c6385eSIan Rogers        "MSRValue": "0x12380",
193*12c6385eSIan Rogers        "Offcore": "1",
194*12c6385eSIan Rogers        "SampleAfterValue": "100003",
195*12c6385eSIan Rogers        "UMask": "0x1"
196*12c6385eSIan Rogers    },
197*12c6385eSIan Rogers    {
198*12c6385eSIan Rogers        "BriefDescription": "Counts hardware prefetches to the L3 only that were not supplied by the local socket's L1, L2, or L3 caches and the cacheline was homed in a remote socket.",
199*12c6385eSIan Rogers        "Counter": "0,1,2,3",
200*12c6385eSIan Rogers        "EventCode": "0x2A,0x2B",
201*12c6385eSIan Rogers        "EventName": "OCR.HWPF_L3.REMOTE",
202*12c6385eSIan Rogers        "MSRIndex": "0x1a6,0x1a7",
203*12c6385eSIan Rogers        "MSRValue": "0x90002380",
204*12c6385eSIan Rogers        "Offcore": "1",
205*12c6385eSIan Rogers        "SampleAfterValue": "100003",
206*12c6385eSIan Rogers        "UMask": "0x1"
207*12c6385eSIan Rogers    },
208*12c6385eSIan Rogers    {
209*12c6385eSIan Rogers        "BriefDescription": "Counts all data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that have any type of response.",
210*12c6385eSIan Rogers        "Counter": "0,1,2,3",
211*12c6385eSIan Rogers        "EventCode": "0x2A,0x2B",
212*12c6385eSIan Rogers        "EventName": "OCR.READS_TO_CORE.ANY_RESPONSE",
213*12c6385eSIan Rogers        "MSRIndex": "0x1a6,0x1a7",
214*12c6385eSIan Rogers        "MSRValue": "0x3F3FFC4477",
215*12c6385eSIan Rogers        "Offcore": "1",
216*12c6385eSIan Rogers        "SampleAfterValue": "100003",
217*12c6385eSIan Rogers        "UMask": "0x1"
218*12c6385eSIan Rogers    },
219*12c6385eSIan Rogers    {
220*12c6385eSIan Rogers        "BriefDescription": "Counts all data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that were supplied by DRAM.",
221*12c6385eSIan Rogers        "Counter": "0,1,2,3",
222*12c6385eSIan Rogers        "EventCode": "0x2A,0x2B",
223*12c6385eSIan Rogers        "EventName": "OCR.READS_TO_CORE.DRAM",
224*12c6385eSIan Rogers        "MSRIndex": "0x1a6,0x1a7",
225*12c6385eSIan Rogers        "MSRValue": "0x73C004477",
226*12c6385eSIan Rogers        "Offcore": "1",
227*12c6385eSIan Rogers        "SampleAfterValue": "100003",
228*12c6385eSIan Rogers        "UMask": "0x1"
229*12c6385eSIan Rogers    },
230*12c6385eSIan Rogers    {
231*12c6385eSIan Rogers        "BriefDescription": "Counts all data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that were supplied by DRAM attached to this socket, unless in Sub NUMA Cluster(SNC) Mode.  In SNC Mode counts only those DRAM accesses that are controlled by the close SNC Cluster.",
232*12c6385eSIan Rogers        "Counter": "0,1,2,3",
233*12c6385eSIan Rogers        "EventCode": "0x2A,0x2B",
234*12c6385eSIan Rogers        "EventName": "OCR.READS_TO_CORE.LOCAL_DRAM",
235*12c6385eSIan Rogers        "MSRIndex": "0x1a6,0x1a7",
236*12c6385eSIan Rogers        "MSRValue": "0x104004477",
237*12c6385eSIan Rogers        "Offcore": "1",
238*12c6385eSIan Rogers        "SampleAfterValue": "100003",
239*12c6385eSIan Rogers        "UMask": "0x1"
240*12c6385eSIan Rogers    },
241*12c6385eSIan Rogers    {
242*12c6385eSIan Rogers        "BriefDescription": "Counts all data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that were supplied by DRAM attached to this socket, whether or not in Sub NUMA Cluster(SNC) Mode.  In SNC Mode counts DRAM accesses that are controlled by the close or distant SNC Cluster.",
243*12c6385eSIan Rogers        "Counter": "0,1,2,3",
244*12c6385eSIan Rogers        "EventCode": "0x2A,0x2B",
245*12c6385eSIan Rogers        "EventName": "OCR.READS_TO_CORE.LOCAL_SOCKET_DRAM",
246*12c6385eSIan Rogers        "MSRIndex": "0x1a6,0x1a7",
247*12c6385eSIan Rogers        "MSRValue": "0x70C004477",
248*12c6385eSIan Rogers        "Offcore": "1",
249*12c6385eSIan Rogers        "SampleAfterValue": "100003",
250*12c6385eSIan Rogers        "UMask": "0x1"
251*12c6385eSIan Rogers    },
252*12c6385eSIan Rogers    {
253*12c6385eSIan Rogers        "BriefDescription": "Counts all data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that were supplied by PMM attached to this socket, whether or not in Sub NUMA Cluster(SNC) Mode.  In SNC Mode counts PMM accesses that are controlled by the close or distant SNC Cluster.",
254*12c6385eSIan Rogers        "Counter": "0,1,2,3",
255*12c6385eSIan Rogers        "EventCode": "0x2A,0x2B",
256*12c6385eSIan Rogers        "EventName": "OCR.READS_TO_CORE.LOCAL_SOCKET_PMM",
257*12c6385eSIan Rogers        "MSRIndex": "0x1a6,0x1a7",
258*12c6385eSIan Rogers        "MSRValue": "0x700C04477",
259*12c6385eSIan Rogers        "Offcore": "1",
260*12c6385eSIan Rogers        "SampleAfterValue": "100003",
261*12c6385eSIan Rogers        "UMask": "0x1"
262*12c6385eSIan Rogers    },
263*12c6385eSIan Rogers    {
264*12c6385eSIan Rogers        "BriefDescription": "Counts all data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that were not supplied by the local socket's L1, L2, or L3 caches and were supplied by a remote socket.",
265*12c6385eSIan Rogers        "Counter": "0,1,2,3",
266*12c6385eSIan Rogers        "EventCode": "0x2A,0x2B",
267*12c6385eSIan Rogers        "EventName": "OCR.READS_TO_CORE.REMOTE",
268*12c6385eSIan Rogers        "MSRIndex": "0x1a6,0x1a7",
269*12c6385eSIan Rogers        "MSRValue": "0x3F33004477",
270*12c6385eSIan Rogers        "Offcore": "1",
271*12c6385eSIan Rogers        "SampleAfterValue": "100003",
272*12c6385eSIan Rogers        "UMask": "0x1"
273*12c6385eSIan Rogers    },
274*12c6385eSIan Rogers    {
275*12c6385eSIan Rogers        "BriefDescription": "Counts all data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that were supplied by DRAM attached to another socket.",
276*12c6385eSIan Rogers        "Counter": "0,1,2,3",
277*12c6385eSIan Rogers        "EventCode": "0x2A,0x2B",
278*12c6385eSIan Rogers        "EventName": "OCR.READS_TO_CORE.REMOTE_DRAM",
279*12c6385eSIan Rogers        "MSRIndex": "0x1a6,0x1a7",
280*12c6385eSIan Rogers        "MSRValue": "0x730004477",
281*12c6385eSIan Rogers        "Offcore": "1",
282*12c6385eSIan Rogers        "SampleAfterValue": "100003",
283*12c6385eSIan Rogers        "UMask": "0x1"
284*12c6385eSIan Rogers    },
285*12c6385eSIan Rogers    {
286*12c6385eSIan Rogers        "BriefDescription": "Counts all data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that were supplied by DRAM on a distant memory controller of this socket when the system is in SNC (sub-NUMA cluster) mode.",
287*12c6385eSIan Rogers        "Counter": "0,1,2,3",
288*12c6385eSIan Rogers        "EventCode": "0x2A,0x2B",
289*12c6385eSIan Rogers        "EventName": "OCR.READS_TO_CORE.SNC_DRAM",
290*12c6385eSIan Rogers        "MSRIndex": "0x1a6,0x1a7",
291*12c6385eSIan Rogers        "MSRValue": "0x708004477",
292*12c6385eSIan Rogers        "Offcore": "1",
293*12c6385eSIan Rogers        "SampleAfterValue": "100003",
294*12c6385eSIan Rogers        "UMask": "0x1"
295*12c6385eSIan Rogers    },
296*12c6385eSIan Rogers    {
297*12c6385eSIan Rogers        "BriefDescription": "Counts streaming stores that have any type of response.",
298*12c6385eSIan Rogers        "Counter": "0,1,2,3",
299*12c6385eSIan Rogers        "EventCode": "0x2A,0x2B",
300*12c6385eSIan Rogers        "EventName": "OCR.STREAMING_WR.ANY_RESPONSE",
301*12c6385eSIan Rogers        "MSRIndex": "0x1a6,0x1a7",
302*12c6385eSIan Rogers        "MSRValue": "0x10800",
303*12c6385eSIan Rogers        "Offcore": "1",
304*12c6385eSIan Rogers        "SampleAfterValue": "100003",
305*12c6385eSIan Rogers        "UMask": "0x1"
306*12c6385eSIan Rogers    },
307*12c6385eSIan Rogers    {
308*12c6385eSIan Rogers        "BriefDescription": "Cycles when Reservation Station (RS) is empty for the thread.",
309*12c6385eSIan Rogers        "CollectPEBSRecord": "2",
310*12c6385eSIan Rogers        "Counter": "0,1,2,3,4,5,6,7",
311*12c6385eSIan Rogers        "EventCode": "0xa5",
312*12c6385eSIan Rogers        "EventName": "RS_EMPTY.CYCLES",
313*12c6385eSIan Rogers        "PEBScounters": "0,1,2,3,4,5,6,7",
314*12c6385eSIan Rogers        "PublicDescription": "Counts cycles during which the reservation station (RS) is empty for this logical processor.",
315*12c6385eSIan Rogers        "SampleAfterValue": "1000003",
316*12c6385eSIan Rogers        "UMask": "0x7"
317*12c6385eSIan Rogers    },
318*12c6385eSIan Rogers    {
319*12c6385eSIan Rogers        "BriefDescription": "TBD",
320*12c6385eSIan Rogers        "CollectPEBSRecord": "2",
321*12c6385eSIan Rogers        "Counter": "0,1,2,3",
322*12c6385eSIan Rogers        "CounterMask": "1",
323*12c6385eSIan Rogers        "EventCode": "0x2d",
324*12c6385eSIan Rogers        "EventName": "XQ.FULL_CYCLES",
325*12c6385eSIan Rogers        "PEBScounters": "0,1,2,3",
326*12c6385eSIan Rogers        "SampleAfterValue": "1000003",
327*12c6385eSIan Rogers        "UMask": "0x1"
328*12c6385eSIan Rogers    }
329*12c6385eSIan Rogers]
330