1d8c30385SAndi Kleen[ 2d8c30385SAndi Kleen { 3*8fe33fd5SIan Rogers "BriefDescription": "Cycles the divider is busy", 4d8c30385SAndi Kleen "Counter": "0,1,2,3", 5*8fe33fd5SIan Rogers "EventCode": "0x14", 6d8c30385SAndi Kleen "EventName": "ARITH.CYCLES_DIV_BUSY", 7d8c30385SAndi Kleen "SampleAfterValue": "2000000", 8*8fe33fd5SIan Rogers "UMask": "0x1" 9d8c30385SAndi Kleen }, 10d8c30385SAndi Kleen { 11d8c30385SAndi Kleen "BriefDescription": "Divide Operations executed", 12*8fe33fd5SIan Rogers "Counter": "0,1,2,3", 13d8c30385SAndi Kleen "CounterMask": "1", 14*8fe33fd5SIan Rogers "EdgeDetect": "1", 15*8fe33fd5SIan Rogers "EventCode": "0x14", 16*8fe33fd5SIan Rogers "EventName": "ARITH.DIV", 17*8fe33fd5SIan Rogers "Invert": "1", 18*8fe33fd5SIan Rogers "SampleAfterValue": "2000000", 19*8fe33fd5SIan Rogers "UMask": "0x1" 20d8c30385SAndi Kleen }, 21d8c30385SAndi Kleen { 22*8fe33fd5SIan Rogers "BriefDescription": "Multiply operations executed", 23d8c30385SAndi Kleen "Counter": "0,1,2,3", 24*8fe33fd5SIan Rogers "EventCode": "0x14", 25d8c30385SAndi Kleen "EventName": "ARITH.MUL", 26d8c30385SAndi Kleen "SampleAfterValue": "2000000", 27*8fe33fd5SIan Rogers "UMask": "0x2" 28d8c30385SAndi Kleen }, 29d8c30385SAndi Kleen { 30*8fe33fd5SIan Rogers "BriefDescription": "BACLEAR asserted with bad target address", 31d8c30385SAndi Kleen "Counter": "0,1,2,3", 32*8fe33fd5SIan Rogers "EventCode": "0xE6", 33d8c30385SAndi Kleen "EventName": "BACLEAR.BAD_TARGET", 34d8c30385SAndi Kleen "SampleAfterValue": "2000000", 35*8fe33fd5SIan Rogers "UMask": "0x2" 36d8c30385SAndi Kleen }, 37d8c30385SAndi Kleen { 38*8fe33fd5SIan Rogers "BriefDescription": "BACLEAR asserted, regardless of cause", 39d8c30385SAndi Kleen "Counter": "0,1,2,3", 40*8fe33fd5SIan Rogers "EventCode": "0xE6", 41d8c30385SAndi Kleen "EventName": "BACLEAR.CLEAR", 42d8c30385SAndi Kleen "SampleAfterValue": "2000000", 43*8fe33fd5SIan Rogers "UMask": "0x1" 44d8c30385SAndi Kleen }, 45d8c30385SAndi Kleen { 46*8fe33fd5SIan Rogers "BriefDescription": "Instruction queue forced BACLEAR", 47d8c30385SAndi Kleen "Counter": "0,1,2,3", 48*8fe33fd5SIan Rogers "EventCode": "0xA7", 49d8c30385SAndi Kleen "EventName": "BACLEAR_FORCE_IQ", 50d8c30385SAndi Kleen "SampleAfterValue": "2000000", 51*8fe33fd5SIan Rogers "UMask": "0x1" 52d8c30385SAndi Kleen }, 53d8c30385SAndi Kleen { 54*8fe33fd5SIan Rogers "BriefDescription": "Early Branch Prediciton Unit clears", 55d8c30385SAndi Kleen "Counter": "0,1,2,3", 56*8fe33fd5SIan Rogers "EventCode": "0xE8", 57*8fe33fd5SIan Rogers "EventName": "BPU_CLEARS.EARLY", 58*8fe33fd5SIan Rogers "SampleAfterValue": "2000000", 59*8fe33fd5SIan Rogers "UMask": "0x1" 60*8fe33fd5SIan Rogers }, 61*8fe33fd5SIan Rogers { 62*8fe33fd5SIan Rogers "BriefDescription": "Late Branch Prediction Unit clears", 63*8fe33fd5SIan Rogers "Counter": "0,1,2,3", 64*8fe33fd5SIan Rogers "EventCode": "0xE8", 65*8fe33fd5SIan Rogers "EventName": "BPU_CLEARS.LATE", 66*8fe33fd5SIan Rogers "SampleAfterValue": "2000000", 67*8fe33fd5SIan Rogers "UMask": "0x2" 68*8fe33fd5SIan Rogers }, 69*8fe33fd5SIan Rogers { 70*8fe33fd5SIan Rogers "BriefDescription": "Branch prediction unit missed call or return", 71*8fe33fd5SIan Rogers "Counter": "0,1,2,3", 72*8fe33fd5SIan Rogers "EventCode": "0xE5", 73*8fe33fd5SIan Rogers "EventName": "BPU_MISSED_CALL_RET", 74*8fe33fd5SIan Rogers "SampleAfterValue": "2000000", 75*8fe33fd5SIan Rogers "UMask": "0x1" 76*8fe33fd5SIan Rogers }, 77*8fe33fd5SIan Rogers { 78*8fe33fd5SIan Rogers "BriefDescription": "Branch instructions decoded", 79*8fe33fd5SIan Rogers "Counter": "0,1,2,3", 80*8fe33fd5SIan Rogers "EventCode": "0xE0", 81d8c30385SAndi Kleen "EventName": "BR_INST_DECODED", 82d8c30385SAndi Kleen "SampleAfterValue": "2000000", 83*8fe33fd5SIan Rogers "UMask": "0x1" 84d8c30385SAndi Kleen }, 85d8c30385SAndi Kleen { 86*8fe33fd5SIan Rogers "BriefDescription": "Branch instructions executed", 87d8c30385SAndi Kleen "Counter": "0,1,2,3", 88*8fe33fd5SIan Rogers "EventCode": "0x88", 89d8c30385SAndi Kleen "EventName": "BR_INST_EXEC.ANY", 90d8c30385SAndi Kleen "SampleAfterValue": "200000", 91*8fe33fd5SIan Rogers "UMask": "0x7f" 92d8c30385SAndi Kleen }, 93d8c30385SAndi Kleen { 94*8fe33fd5SIan Rogers "BriefDescription": "Conditional branch instructions executed", 95d8c30385SAndi Kleen "Counter": "0,1,2,3", 96*8fe33fd5SIan Rogers "EventCode": "0x88", 97d8c30385SAndi Kleen "EventName": "BR_INST_EXEC.COND", 98d8c30385SAndi Kleen "SampleAfterValue": "200000", 99*8fe33fd5SIan Rogers "UMask": "0x1" 100d8c30385SAndi Kleen }, 101d8c30385SAndi Kleen { 102*8fe33fd5SIan Rogers "BriefDescription": "Unconditional branches executed", 103d8c30385SAndi Kleen "Counter": "0,1,2,3", 104*8fe33fd5SIan Rogers "EventCode": "0x88", 105d8c30385SAndi Kleen "EventName": "BR_INST_EXEC.DIRECT", 106d8c30385SAndi Kleen "SampleAfterValue": "200000", 107*8fe33fd5SIan Rogers "UMask": "0x2" 108d8c30385SAndi Kleen }, 109d8c30385SAndi Kleen { 110*8fe33fd5SIan Rogers "BriefDescription": "Unconditional call branches executed", 111d8c30385SAndi Kleen "Counter": "0,1,2,3", 112*8fe33fd5SIan Rogers "EventCode": "0x88", 113d8c30385SAndi Kleen "EventName": "BR_INST_EXEC.DIRECT_NEAR_CALL", 114d8c30385SAndi Kleen "SampleAfterValue": "20000", 115*8fe33fd5SIan Rogers "UMask": "0x10" 116d8c30385SAndi Kleen }, 117d8c30385SAndi Kleen { 118*8fe33fd5SIan Rogers "BriefDescription": "Indirect call branches executed", 119d8c30385SAndi Kleen "Counter": "0,1,2,3", 120*8fe33fd5SIan Rogers "EventCode": "0x88", 121d8c30385SAndi Kleen "EventName": "BR_INST_EXEC.INDIRECT_NEAR_CALL", 122d8c30385SAndi Kleen "SampleAfterValue": "20000", 123*8fe33fd5SIan Rogers "UMask": "0x20" 124d8c30385SAndi Kleen }, 125d8c30385SAndi Kleen { 126*8fe33fd5SIan Rogers "BriefDescription": "Indirect non call branches executed", 127d8c30385SAndi Kleen "Counter": "0,1,2,3", 128*8fe33fd5SIan Rogers "EventCode": "0x88", 129d8c30385SAndi Kleen "EventName": "BR_INST_EXEC.INDIRECT_NON_CALL", 130d8c30385SAndi Kleen "SampleAfterValue": "20000", 131*8fe33fd5SIan Rogers "UMask": "0x4" 132d8c30385SAndi Kleen }, 133d8c30385SAndi Kleen { 134*8fe33fd5SIan Rogers "BriefDescription": "Call branches executed", 135d8c30385SAndi Kleen "Counter": "0,1,2,3", 136*8fe33fd5SIan Rogers "EventCode": "0x88", 137d8c30385SAndi Kleen "EventName": "BR_INST_EXEC.NEAR_CALLS", 138d8c30385SAndi Kleen "SampleAfterValue": "20000", 139*8fe33fd5SIan Rogers "UMask": "0x30" 140d8c30385SAndi Kleen }, 141d8c30385SAndi Kleen { 142*8fe33fd5SIan Rogers "BriefDescription": "All non call branches executed", 143d8c30385SAndi Kleen "Counter": "0,1,2,3", 144*8fe33fd5SIan Rogers "EventCode": "0x88", 145d8c30385SAndi Kleen "EventName": "BR_INST_EXEC.NON_CALLS", 146d8c30385SAndi Kleen "SampleAfterValue": "200000", 147*8fe33fd5SIan Rogers "UMask": "0x7" 148d8c30385SAndi Kleen }, 149d8c30385SAndi Kleen { 150*8fe33fd5SIan Rogers "BriefDescription": "Indirect return branches executed", 151d8c30385SAndi Kleen "Counter": "0,1,2,3", 152*8fe33fd5SIan Rogers "EventCode": "0x88", 153d8c30385SAndi Kleen "EventName": "BR_INST_EXEC.RETURN_NEAR", 154d8c30385SAndi Kleen "SampleAfterValue": "20000", 155*8fe33fd5SIan Rogers "UMask": "0x8" 156d8c30385SAndi Kleen }, 157d8c30385SAndi Kleen { 158*8fe33fd5SIan Rogers "BriefDescription": "Taken branches executed", 159d8c30385SAndi Kleen "Counter": "0,1,2,3", 160*8fe33fd5SIan Rogers "EventCode": "0x88", 161d8c30385SAndi Kleen "EventName": "BR_INST_EXEC.TAKEN", 162d8c30385SAndi Kleen "SampleAfterValue": "200000", 163*8fe33fd5SIan Rogers "UMask": "0x40" 164d8c30385SAndi Kleen }, 165d8c30385SAndi Kleen { 166*8fe33fd5SIan Rogers "BriefDescription": "Retired branch instructions (Precise Event)", 167d8c30385SAndi Kleen "Counter": "0,1,2,3", 168*8fe33fd5SIan Rogers "EventCode": "0xC4", 169d8c30385SAndi Kleen "EventName": "BR_INST_RETIRED.ALL_BRANCHES", 170*8fe33fd5SIan Rogers "PEBS": "1", 171d8c30385SAndi Kleen "SampleAfterValue": "200000", 172*8fe33fd5SIan Rogers "UMask": "0x4" 173d8c30385SAndi Kleen }, 174d8c30385SAndi Kleen { 175*8fe33fd5SIan Rogers "BriefDescription": "Retired conditional branch instructions (Precise Event)", 176d8c30385SAndi Kleen "Counter": "0,1,2,3", 177*8fe33fd5SIan Rogers "EventCode": "0xC4", 178d8c30385SAndi Kleen "EventName": "BR_INST_RETIRED.CONDITIONAL", 179d8c30385SAndi Kleen "PEBS": "1", 180*8fe33fd5SIan Rogers "SampleAfterValue": "200000", 181*8fe33fd5SIan Rogers "UMask": "0x1" 182d8c30385SAndi Kleen }, 183d8c30385SAndi Kleen { 184*8fe33fd5SIan Rogers "BriefDescription": "Retired near call instructions (Precise Event)", 185d8c30385SAndi Kleen "Counter": "0,1,2,3", 186*8fe33fd5SIan Rogers "EventCode": "0xC4", 187*8fe33fd5SIan Rogers "EventName": "BR_INST_RETIRED.NEAR_CALL", 188*8fe33fd5SIan Rogers "PEBS": "1", 189*8fe33fd5SIan Rogers "SampleAfterValue": "20000", 190*8fe33fd5SIan Rogers "UMask": "0x2" 191*8fe33fd5SIan Rogers }, 192*8fe33fd5SIan Rogers { 193*8fe33fd5SIan Rogers "BriefDescription": "Mispredicted branches executed", 194*8fe33fd5SIan Rogers "Counter": "0,1,2,3", 195*8fe33fd5SIan Rogers "EventCode": "0x89", 196d8c30385SAndi Kleen "EventName": "BR_MISP_EXEC.ANY", 197d8c30385SAndi Kleen "SampleAfterValue": "20000", 198*8fe33fd5SIan Rogers "UMask": "0x7f" 199d8c30385SAndi Kleen }, 200d8c30385SAndi Kleen { 201*8fe33fd5SIan Rogers "BriefDescription": "Mispredicted conditional branches executed", 202d8c30385SAndi Kleen "Counter": "0,1,2,3", 203*8fe33fd5SIan Rogers "EventCode": "0x89", 204d8c30385SAndi Kleen "EventName": "BR_MISP_EXEC.COND", 205d8c30385SAndi Kleen "SampleAfterValue": "20000", 206*8fe33fd5SIan Rogers "UMask": "0x1" 207d8c30385SAndi Kleen }, 208d8c30385SAndi Kleen { 209*8fe33fd5SIan Rogers "BriefDescription": "Mispredicted unconditional branches executed", 210d8c30385SAndi Kleen "Counter": "0,1,2,3", 211*8fe33fd5SIan Rogers "EventCode": "0x89", 212d8c30385SAndi Kleen "EventName": "BR_MISP_EXEC.DIRECT", 213d8c30385SAndi Kleen "SampleAfterValue": "20000", 214*8fe33fd5SIan Rogers "UMask": "0x2" 215d8c30385SAndi Kleen }, 216d8c30385SAndi Kleen { 217*8fe33fd5SIan Rogers "BriefDescription": "Mispredicted non call branches executed", 218d8c30385SAndi Kleen "Counter": "0,1,2,3", 219*8fe33fd5SIan Rogers "EventCode": "0x89", 220d8c30385SAndi Kleen "EventName": "BR_MISP_EXEC.DIRECT_NEAR_CALL", 221d8c30385SAndi Kleen "SampleAfterValue": "2000", 222*8fe33fd5SIan Rogers "UMask": "0x10" 223d8c30385SAndi Kleen }, 224d8c30385SAndi Kleen { 225*8fe33fd5SIan Rogers "BriefDescription": "Mispredicted indirect call branches executed", 226d8c30385SAndi Kleen "Counter": "0,1,2,3", 227*8fe33fd5SIan Rogers "EventCode": "0x89", 228d8c30385SAndi Kleen "EventName": "BR_MISP_EXEC.INDIRECT_NEAR_CALL", 229d8c30385SAndi Kleen "SampleAfterValue": "2000", 230*8fe33fd5SIan Rogers "UMask": "0x20" 231d8c30385SAndi Kleen }, 232d8c30385SAndi Kleen { 233*8fe33fd5SIan Rogers "BriefDescription": "Mispredicted indirect non call branches executed", 234d8c30385SAndi Kleen "Counter": "0,1,2,3", 235*8fe33fd5SIan Rogers "EventCode": "0x89", 236d8c30385SAndi Kleen "EventName": "BR_MISP_EXEC.INDIRECT_NON_CALL", 237d8c30385SAndi Kleen "SampleAfterValue": "2000", 238*8fe33fd5SIan Rogers "UMask": "0x4" 239d8c30385SAndi Kleen }, 240d8c30385SAndi Kleen { 241*8fe33fd5SIan Rogers "BriefDescription": "Mispredicted call branches executed", 242d8c30385SAndi Kleen "Counter": "0,1,2,3", 243*8fe33fd5SIan Rogers "EventCode": "0x89", 244d8c30385SAndi Kleen "EventName": "BR_MISP_EXEC.NEAR_CALLS", 245d8c30385SAndi Kleen "SampleAfterValue": "2000", 246*8fe33fd5SIan Rogers "UMask": "0x30" 247d8c30385SAndi Kleen }, 248d8c30385SAndi Kleen { 249*8fe33fd5SIan Rogers "BriefDescription": "Mispredicted non call branches executed", 250d8c30385SAndi Kleen "Counter": "0,1,2,3", 251*8fe33fd5SIan Rogers "EventCode": "0x89", 252d8c30385SAndi Kleen "EventName": "BR_MISP_EXEC.NON_CALLS", 253d8c30385SAndi Kleen "SampleAfterValue": "20000", 254*8fe33fd5SIan Rogers "UMask": "0x7" 255d8c30385SAndi Kleen }, 256d8c30385SAndi Kleen { 257*8fe33fd5SIan Rogers "BriefDescription": "Mispredicted return branches executed", 258d8c30385SAndi Kleen "Counter": "0,1,2,3", 259*8fe33fd5SIan Rogers "EventCode": "0x89", 260d8c30385SAndi Kleen "EventName": "BR_MISP_EXEC.RETURN_NEAR", 261d8c30385SAndi Kleen "SampleAfterValue": "2000", 262*8fe33fd5SIan Rogers "UMask": "0x8" 263d8c30385SAndi Kleen }, 264d8c30385SAndi Kleen { 265*8fe33fd5SIan Rogers "BriefDescription": "Mispredicted taken branches executed", 266d8c30385SAndi Kleen "Counter": "0,1,2,3", 267*8fe33fd5SIan Rogers "EventCode": "0x89", 268d8c30385SAndi Kleen "EventName": "BR_MISP_EXEC.TAKEN", 269d8c30385SAndi Kleen "SampleAfterValue": "20000", 270*8fe33fd5SIan Rogers "UMask": "0x40" 271d8c30385SAndi Kleen }, 272d8c30385SAndi Kleen { 273*8fe33fd5SIan Rogers "BriefDescription": "Mispredicted near retired calls (Precise Event)", 274d8c30385SAndi Kleen "Counter": "0,1,2,3", 275*8fe33fd5SIan Rogers "EventCode": "0xC5", 276d8c30385SAndi Kleen "EventName": "BR_MISP_RETIRED.NEAR_CALL", 277*8fe33fd5SIan Rogers "PEBS": "1", 278d8c30385SAndi Kleen "SampleAfterValue": "2000", 279*8fe33fd5SIan Rogers "UMask": "0x2" 280d8c30385SAndi Kleen }, 281d8c30385SAndi Kleen { 282*8fe33fd5SIan Rogers "BriefDescription": "Reference cycles when thread is not halted (fixed counter)", 283d8c30385SAndi Kleen "Counter": "Fixed counter 3", 284*8fe33fd5SIan Rogers "EventCode": "0x0", 285d8c30385SAndi Kleen "EventName": "CPU_CLK_UNHALTED.REF", 286d8c30385SAndi Kleen "SampleAfterValue": "2000000", 287*8fe33fd5SIan Rogers "UMask": "0x0" 288d8c30385SAndi Kleen }, 289d8c30385SAndi Kleen { 290*8fe33fd5SIan Rogers "BriefDescription": "Reference base clock (133 Mhz) cycles when thread is not halted (programmable counter)", 291d8c30385SAndi Kleen "Counter": "0,1,2,3", 292*8fe33fd5SIan Rogers "EventCode": "0x3C", 293d8c30385SAndi Kleen "EventName": "CPU_CLK_UNHALTED.REF_P", 294d8c30385SAndi Kleen "SampleAfterValue": "100000", 295*8fe33fd5SIan Rogers "UMask": "0x1" 296d8c30385SAndi Kleen }, 297d8c30385SAndi Kleen { 298*8fe33fd5SIan Rogers "BriefDescription": "Cycles when thread is not halted (fixed counter)", 299d8c30385SAndi Kleen "Counter": "Fixed counter 2", 300*8fe33fd5SIan Rogers "EventCode": "0x0", 301d8c30385SAndi Kleen "EventName": "CPU_CLK_UNHALTED.THREAD", 302d8c30385SAndi Kleen "SampleAfterValue": "2000000", 303*8fe33fd5SIan Rogers "UMask": "0x0" 304d8c30385SAndi Kleen }, 305d8c30385SAndi Kleen { 306*8fe33fd5SIan Rogers "BriefDescription": "Cycles when thread is not halted (programmable counter)", 307d8c30385SAndi Kleen "Counter": "0,1,2,3", 308*8fe33fd5SIan Rogers "EventCode": "0x3C", 309d8c30385SAndi Kleen "EventName": "CPU_CLK_UNHALTED.THREAD_P", 310d8c30385SAndi Kleen "SampleAfterValue": "2000000", 311*8fe33fd5SIan Rogers "UMask": "0x0" 312d8c30385SAndi Kleen }, 313d8c30385SAndi Kleen { 314d8c30385SAndi Kleen "BriefDescription": "Total CPU cycles", 315*8fe33fd5SIan Rogers "Counter": "0,1,2,3", 316*8fe33fd5SIan Rogers "CounterMask": "2", 317*8fe33fd5SIan Rogers "EventCode": "0x3C", 318*8fe33fd5SIan Rogers "EventName": "CPU_CLK_UNHALTED.TOTAL_CYCLES", 319*8fe33fd5SIan Rogers "Invert": "1", 320*8fe33fd5SIan Rogers "SampleAfterValue": "2000000", 321*8fe33fd5SIan Rogers "UMask": "0x0" 322d8c30385SAndi Kleen }, 323d8c30385SAndi Kleen { 324*8fe33fd5SIan Rogers "BriefDescription": "Any Instruction Length Decoder stall cycles", 325d8c30385SAndi Kleen "Counter": "0,1,2,3", 326*8fe33fd5SIan Rogers "EventCode": "0x87", 327d8c30385SAndi Kleen "EventName": "ILD_STALL.ANY", 328d8c30385SAndi Kleen "SampleAfterValue": "2000000", 329*8fe33fd5SIan Rogers "UMask": "0xf" 330d8c30385SAndi Kleen }, 331d8c30385SAndi Kleen { 332*8fe33fd5SIan Rogers "BriefDescription": "Instruction Queue full stall cycles", 333d8c30385SAndi Kleen "Counter": "0,1,2,3", 334*8fe33fd5SIan Rogers "EventCode": "0x87", 335d8c30385SAndi Kleen "EventName": "ILD_STALL.IQ_FULL", 336d8c30385SAndi Kleen "SampleAfterValue": "2000000", 337*8fe33fd5SIan Rogers "UMask": "0x4" 338d8c30385SAndi Kleen }, 339d8c30385SAndi Kleen { 340*8fe33fd5SIan Rogers "BriefDescription": "Length Change Prefix stall cycles", 341d8c30385SAndi Kleen "Counter": "0,1,2,3", 342*8fe33fd5SIan Rogers "EventCode": "0x87", 343d8c30385SAndi Kleen "EventName": "ILD_STALL.LCP", 344d8c30385SAndi Kleen "SampleAfterValue": "2000000", 345*8fe33fd5SIan Rogers "UMask": "0x1" 346d8c30385SAndi Kleen }, 347d8c30385SAndi Kleen { 348*8fe33fd5SIan Rogers "BriefDescription": "Stall cycles due to BPU MRU bypass", 349d8c30385SAndi Kleen "Counter": "0,1,2,3", 350*8fe33fd5SIan Rogers "EventCode": "0x87", 351d8c30385SAndi Kleen "EventName": "ILD_STALL.MRU", 352d8c30385SAndi Kleen "SampleAfterValue": "2000000", 353*8fe33fd5SIan Rogers "UMask": "0x2" 354d8c30385SAndi Kleen }, 355d8c30385SAndi Kleen { 356*8fe33fd5SIan Rogers "BriefDescription": "Regen stall cycles", 357d8c30385SAndi Kleen "Counter": "0,1,2,3", 358*8fe33fd5SIan Rogers "EventCode": "0x87", 359d8c30385SAndi Kleen "EventName": "ILD_STALL.REGEN", 360d8c30385SAndi Kleen "SampleAfterValue": "2000000", 361*8fe33fd5SIan Rogers "UMask": "0x8" 362d8c30385SAndi Kleen }, 363d8c30385SAndi Kleen { 364*8fe33fd5SIan Rogers "BriefDescription": "Instructions that must be decoded by decoder 0", 365d8c30385SAndi Kleen "Counter": "0,1,2,3", 366*8fe33fd5SIan Rogers "EventCode": "0x18", 367d8c30385SAndi Kleen "EventName": "INST_DECODED.DEC0", 368d8c30385SAndi Kleen "SampleAfterValue": "2000000", 369*8fe33fd5SIan Rogers "UMask": "0x1" 370d8c30385SAndi Kleen }, 371d8c30385SAndi Kleen { 372*8fe33fd5SIan Rogers "BriefDescription": "Instructions written to instruction queue.", 373d8c30385SAndi Kleen "Counter": "0,1,2,3", 374d8c30385SAndi Kleen "EventCode": "0x17", 375d8c30385SAndi Kleen "EventName": "INST_QUEUE_WRITES", 376d8c30385SAndi Kleen "SampleAfterValue": "2000000", 377*8fe33fd5SIan Rogers "UMask": "0x1" 378d8c30385SAndi Kleen }, 379d8c30385SAndi Kleen { 380*8fe33fd5SIan Rogers "BriefDescription": "Cycles instructions are written to the instruction queue", 381*8fe33fd5SIan Rogers "Counter": "0,1,2,3", 382*8fe33fd5SIan Rogers "EventCode": "0x1E", 383*8fe33fd5SIan Rogers "EventName": "INST_QUEUE_WRITE_CYCLES", 384*8fe33fd5SIan Rogers "SampleAfterValue": "2000000", 385*8fe33fd5SIan Rogers "UMask": "0x1" 386*8fe33fd5SIan Rogers }, 387*8fe33fd5SIan Rogers { 388*8fe33fd5SIan Rogers "BriefDescription": "Instructions retired (fixed counter)", 389d8c30385SAndi Kleen "Counter": "Fixed counter 1", 390*8fe33fd5SIan Rogers "EventCode": "0x0", 391d8c30385SAndi Kleen "EventName": "INST_RETIRED.ANY", 392d8c30385SAndi Kleen "SampleAfterValue": "2000000", 393*8fe33fd5SIan Rogers "UMask": "0x0" 394d8c30385SAndi Kleen }, 395d8c30385SAndi Kleen { 396*8fe33fd5SIan Rogers "BriefDescription": "Instructions retired (Programmable counter and Precise Event)", 397d8c30385SAndi Kleen "Counter": "0,1,2,3", 398*8fe33fd5SIan Rogers "EventCode": "0xC0", 399d8c30385SAndi Kleen "EventName": "INST_RETIRED.ANY_P", 400*8fe33fd5SIan Rogers "PEBS": "1", 401d8c30385SAndi Kleen "SampleAfterValue": "2000000", 402*8fe33fd5SIan Rogers "UMask": "0x1" 403d8c30385SAndi Kleen }, 404d8c30385SAndi Kleen { 405*8fe33fd5SIan Rogers "BriefDescription": "Retired MMX instructions (Precise Event)", 406d8c30385SAndi Kleen "Counter": "0,1,2,3", 407*8fe33fd5SIan Rogers "EventCode": "0xC0", 408d8c30385SAndi Kleen "EventName": "INST_RETIRED.MMX", 409*8fe33fd5SIan Rogers "PEBS": "1", 410d8c30385SAndi Kleen "SampleAfterValue": "2000000", 411*8fe33fd5SIan Rogers "UMask": "0x4" 412d8c30385SAndi Kleen }, 413d8c30385SAndi Kleen { 414d8c30385SAndi Kleen "BriefDescription": "Total cycles (Precise Event)", 415d8c30385SAndi Kleen "Counter": "0,1,2,3", 416*8fe33fd5SIan Rogers "CounterMask": "16", 417*8fe33fd5SIan Rogers "EventCode": "0xC0", 418*8fe33fd5SIan Rogers "EventName": "INST_RETIRED.TOTAL_CYCLES", 419*8fe33fd5SIan Rogers "Invert": "1", 420*8fe33fd5SIan Rogers "PEBS": "1", 421d8c30385SAndi Kleen "SampleAfterValue": "2000000", 422*8fe33fd5SIan Rogers "UMask": "0x1" 423d8c30385SAndi Kleen }, 424d8c30385SAndi Kleen { 425*8fe33fd5SIan Rogers "BriefDescription": "Total cycles (Precise Event)", 426*8fe33fd5SIan Rogers "Counter": "0,1,2,3", 427*8fe33fd5SIan Rogers "CounterMask": "16", 428*8fe33fd5SIan Rogers "EventCode": "0xC0", 429*8fe33fd5SIan Rogers "EventName": "INST_RETIRED.TOTAL_CYCLES_PS", 430*8fe33fd5SIan Rogers "Invert": "1", 431*8fe33fd5SIan Rogers "PEBS": "2", 432*8fe33fd5SIan Rogers "SampleAfterValue": "2000000", 433*8fe33fd5SIan Rogers "UMask": "0x1" 434*8fe33fd5SIan Rogers }, 435*8fe33fd5SIan Rogers { 436*8fe33fd5SIan Rogers "BriefDescription": "Retired floating-point operations (Precise Event)", 437*8fe33fd5SIan Rogers "Counter": "0,1,2,3", 438*8fe33fd5SIan Rogers "EventCode": "0xC0", 439*8fe33fd5SIan Rogers "EventName": "INST_RETIRED.X87", 440*8fe33fd5SIan Rogers "PEBS": "1", 441*8fe33fd5SIan Rogers "SampleAfterValue": "2000000", 442*8fe33fd5SIan Rogers "UMask": "0x2" 443*8fe33fd5SIan Rogers }, 444*8fe33fd5SIan Rogers { 445*8fe33fd5SIan Rogers "BriefDescription": "Load operations conflicting with software prefetches", 446d8c30385SAndi Kleen "Counter": "0,1", 447*8fe33fd5SIan Rogers "EventCode": "0x4C", 448d8c30385SAndi Kleen "EventName": "LOAD_HIT_PRE", 449d8c30385SAndi Kleen "SampleAfterValue": "200000", 450*8fe33fd5SIan Rogers "UMask": "0x1" 451d8c30385SAndi Kleen }, 452d8c30385SAndi Kleen { 453*8fe33fd5SIan Rogers "BriefDescription": "Cycles when uops were delivered by the LSD", 454d8c30385SAndi Kleen "Counter": "0,1,2,3", 455*8fe33fd5SIan Rogers "CounterMask": "1", 456*8fe33fd5SIan Rogers "EventCode": "0xA8", 457d8c30385SAndi Kleen "EventName": "LSD.ACTIVE", 458d8c30385SAndi Kleen "SampleAfterValue": "2000000", 459*8fe33fd5SIan Rogers "UMask": "0x1" 460d8c30385SAndi Kleen }, 461d8c30385SAndi Kleen { 462d8c30385SAndi Kleen "BriefDescription": "Cycles no uops were delivered by the LSD", 463*8fe33fd5SIan Rogers "Counter": "0,1,2,3", 464*8fe33fd5SIan Rogers "CounterMask": "1", 465*8fe33fd5SIan Rogers "EventCode": "0xA8", 466*8fe33fd5SIan Rogers "EventName": "LSD.INACTIVE", 467*8fe33fd5SIan Rogers "Invert": "1", 468*8fe33fd5SIan Rogers "SampleAfterValue": "2000000", 469*8fe33fd5SIan Rogers "UMask": "0x1" 470d8c30385SAndi Kleen }, 471d8c30385SAndi Kleen { 472*8fe33fd5SIan Rogers "BriefDescription": "Loops that can't stream from the instruction queue", 473d8c30385SAndi Kleen "Counter": "0,1,2,3", 474*8fe33fd5SIan Rogers "EventCode": "0x20", 475d8c30385SAndi Kleen "EventName": "LSD_OVERFLOW", 476d8c30385SAndi Kleen "SampleAfterValue": "2000000", 477*8fe33fd5SIan Rogers "UMask": "0x1" 478d8c30385SAndi Kleen }, 479d8c30385SAndi Kleen { 480*8fe33fd5SIan Rogers "BriefDescription": "Cycles machine clear asserted", 481d8c30385SAndi Kleen "Counter": "0,1,2,3", 482*8fe33fd5SIan Rogers "EventCode": "0xC3", 483d8c30385SAndi Kleen "EventName": "MACHINE_CLEARS.CYCLES", 484d8c30385SAndi Kleen "SampleAfterValue": "20000", 485*8fe33fd5SIan Rogers "UMask": "0x1" 486d8c30385SAndi Kleen }, 487d8c30385SAndi Kleen { 488*8fe33fd5SIan Rogers "BriefDescription": "Execution pipeline restart due to Memory ordering conflicts", 489d8c30385SAndi Kleen "Counter": "0,1,2,3", 490*8fe33fd5SIan Rogers "EventCode": "0xC3", 491d8c30385SAndi Kleen "EventName": "MACHINE_CLEARS.MEM_ORDER", 492d8c30385SAndi Kleen "SampleAfterValue": "20000", 493*8fe33fd5SIan Rogers "UMask": "0x2" 494d8c30385SAndi Kleen }, 495d8c30385SAndi Kleen { 496*8fe33fd5SIan Rogers "BriefDescription": "Self-Modifying Code detected", 497d8c30385SAndi Kleen "Counter": "0,1,2,3", 498*8fe33fd5SIan Rogers "EventCode": "0xC3", 499d8c30385SAndi Kleen "EventName": "MACHINE_CLEARS.SMC", 500d8c30385SAndi Kleen "SampleAfterValue": "20000", 501*8fe33fd5SIan Rogers "UMask": "0x4" 502d8c30385SAndi Kleen }, 503d8c30385SAndi Kleen { 504*8fe33fd5SIan Rogers "BriefDescription": "All RAT stall cycles", 505d8c30385SAndi Kleen "Counter": "0,1,2,3", 506*8fe33fd5SIan Rogers "EventCode": "0xD2", 507*8fe33fd5SIan Rogers "EventName": "RAT_STALLS.ANY", 508*8fe33fd5SIan Rogers "SampleAfterValue": "2000000", 509*8fe33fd5SIan Rogers "UMask": "0xf" 510*8fe33fd5SIan Rogers }, 511*8fe33fd5SIan Rogers { 512*8fe33fd5SIan Rogers "BriefDescription": "Flag stall cycles", 513*8fe33fd5SIan Rogers "Counter": "0,1,2,3", 514*8fe33fd5SIan Rogers "EventCode": "0xD2", 515*8fe33fd5SIan Rogers "EventName": "RAT_STALLS.FLAGS", 516*8fe33fd5SIan Rogers "SampleAfterValue": "2000000", 517*8fe33fd5SIan Rogers "UMask": "0x1" 518*8fe33fd5SIan Rogers }, 519*8fe33fd5SIan Rogers { 520*8fe33fd5SIan Rogers "BriefDescription": "Partial register stall cycles", 521*8fe33fd5SIan Rogers "Counter": "0,1,2,3", 522*8fe33fd5SIan Rogers "EventCode": "0xD2", 523*8fe33fd5SIan Rogers "EventName": "RAT_STALLS.REGISTERS", 524*8fe33fd5SIan Rogers "SampleAfterValue": "2000000", 525*8fe33fd5SIan Rogers "UMask": "0x2" 526*8fe33fd5SIan Rogers }, 527*8fe33fd5SIan Rogers { 528*8fe33fd5SIan Rogers "BriefDescription": "ROB read port stalls cycles", 529*8fe33fd5SIan Rogers "Counter": "0,1,2,3", 530*8fe33fd5SIan Rogers "EventCode": "0xD2", 531*8fe33fd5SIan Rogers "EventName": "RAT_STALLS.ROB_READ_PORT", 532*8fe33fd5SIan Rogers "SampleAfterValue": "2000000", 533*8fe33fd5SIan Rogers "UMask": "0x4" 534*8fe33fd5SIan Rogers }, 535*8fe33fd5SIan Rogers { 536*8fe33fd5SIan Rogers "BriefDescription": "Scoreboard stall cycles", 537*8fe33fd5SIan Rogers "Counter": "0,1,2,3", 538*8fe33fd5SIan Rogers "EventCode": "0xD2", 539*8fe33fd5SIan Rogers "EventName": "RAT_STALLS.SCOREBOARD", 540*8fe33fd5SIan Rogers "SampleAfterValue": "2000000", 541*8fe33fd5SIan Rogers "UMask": "0x8" 542*8fe33fd5SIan Rogers }, 543*8fe33fd5SIan Rogers { 544*8fe33fd5SIan Rogers "BriefDescription": "Resource related stall cycles", 545*8fe33fd5SIan Rogers "Counter": "0,1,2,3", 546*8fe33fd5SIan Rogers "EventCode": "0xA2", 547d8c30385SAndi Kleen "EventName": "RESOURCE_STALLS.ANY", 548d8c30385SAndi Kleen "SampleAfterValue": "2000000", 549*8fe33fd5SIan Rogers "UMask": "0x1" 550d8c30385SAndi Kleen }, 551d8c30385SAndi Kleen { 552*8fe33fd5SIan Rogers "BriefDescription": "FPU control word write stall cycles", 553d8c30385SAndi Kleen "Counter": "0,1,2,3", 554*8fe33fd5SIan Rogers "EventCode": "0xA2", 555d8c30385SAndi Kleen "EventName": "RESOURCE_STALLS.FPCW", 556d8c30385SAndi Kleen "SampleAfterValue": "2000000", 557*8fe33fd5SIan Rogers "UMask": "0x20" 558d8c30385SAndi Kleen }, 559d8c30385SAndi Kleen { 560*8fe33fd5SIan Rogers "BriefDescription": "Load buffer stall cycles", 561d8c30385SAndi Kleen "Counter": "0,1,2,3", 562*8fe33fd5SIan Rogers "EventCode": "0xA2", 563d8c30385SAndi Kleen "EventName": "RESOURCE_STALLS.LOAD", 564d8c30385SAndi Kleen "SampleAfterValue": "2000000", 565*8fe33fd5SIan Rogers "UMask": "0x2" 566d8c30385SAndi Kleen }, 567d8c30385SAndi Kleen { 568*8fe33fd5SIan Rogers "BriefDescription": "MXCSR rename stall cycles", 569d8c30385SAndi Kleen "Counter": "0,1,2,3", 570*8fe33fd5SIan Rogers "EventCode": "0xA2", 571d8c30385SAndi Kleen "EventName": "RESOURCE_STALLS.MXCSR", 572d8c30385SAndi Kleen "SampleAfterValue": "2000000", 573*8fe33fd5SIan Rogers "UMask": "0x40" 574d8c30385SAndi Kleen }, 575d8c30385SAndi Kleen { 576*8fe33fd5SIan Rogers "BriefDescription": "Other Resource related stall cycles", 577d8c30385SAndi Kleen "Counter": "0,1,2,3", 578*8fe33fd5SIan Rogers "EventCode": "0xA2", 579d8c30385SAndi Kleen "EventName": "RESOURCE_STALLS.OTHER", 580d8c30385SAndi Kleen "SampleAfterValue": "2000000", 581*8fe33fd5SIan Rogers "UMask": "0x80" 582d8c30385SAndi Kleen }, 583d8c30385SAndi Kleen { 584*8fe33fd5SIan Rogers "BriefDescription": "ROB full stall cycles", 585d8c30385SAndi Kleen "Counter": "0,1,2,3", 586*8fe33fd5SIan Rogers "EventCode": "0xA2", 587d8c30385SAndi Kleen "EventName": "RESOURCE_STALLS.ROB_FULL", 588d8c30385SAndi Kleen "SampleAfterValue": "2000000", 589*8fe33fd5SIan Rogers "UMask": "0x10" 590d8c30385SAndi Kleen }, 591d8c30385SAndi Kleen { 592*8fe33fd5SIan Rogers "BriefDescription": "Reservation Station full stall cycles", 593d8c30385SAndi Kleen "Counter": "0,1,2,3", 594*8fe33fd5SIan Rogers "EventCode": "0xA2", 595d8c30385SAndi Kleen "EventName": "RESOURCE_STALLS.RS_FULL", 596d8c30385SAndi Kleen "SampleAfterValue": "2000000", 597*8fe33fd5SIan Rogers "UMask": "0x4" 598d8c30385SAndi Kleen }, 599d8c30385SAndi Kleen { 600*8fe33fd5SIan Rogers "BriefDescription": "Store buffer stall cycles", 601d8c30385SAndi Kleen "Counter": "0,1,2,3", 602*8fe33fd5SIan Rogers "EventCode": "0xA2", 603d8c30385SAndi Kleen "EventName": "RESOURCE_STALLS.STORE", 604d8c30385SAndi Kleen "SampleAfterValue": "2000000", 605*8fe33fd5SIan Rogers "UMask": "0x8" 606d8c30385SAndi Kleen }, 607d8c30385SAndi Kleen { 608*8fe33fd5SIan Rogers "BriefDescription": "SIMD Packed-Double Uops retired (Precise Event)", 609d8c30385SAndi Kleen "Counter": "0,1,2,3", 610*8fe33fd5SIan Rogers "EventCode": "0xC7", 611d8c30385SAndi Kleen "EventName": "SSEX_UOPS_RETIRED.PACKED_DOUBLE", 612*8fe33fd5SIan Rogers "PEBS": "1", 613d8c30385SAndi Kleen "SampleAfterValue": "200000", 614*8fe33fd5SIan Rogers "UMask": "0x4" 615d8c30385SAndi Kleen }, 616d8c30385SAndi Kleen { 617*8fe33fd5SIan Rogers "BriefDescription": "SIMD Packed-Single Uops retired (Precise Event)", 618d8c30385SAndi Kleen "Counter": "0,1,2,3", 619*8fe33fd5SIan Rogers "EventCode": "0xC7", 620d8c30385SAndi Kleen "EventName": "SSEX_UOPS_RETIRED.PACKED_SINGLE", 621*8fe33fd5SIan Rogers "PEBS": "1", 622d8c30385SAndi Kleen "SampleAfterValue": "200000", 623*8fe33fd5SIan Rogers "UMask": "0x1" 624d8c30385SAndi Kleen }, 625d8c30385SAndi Kleen { 626*8fe33fd5SIan Rogers "BriefDescription": "SIMD Scalar-Double Uops retired (Precise Event)", 627d8c30385SAndi Kleen "Counter": "0,1,2,3", 628*8fe33fd5SIan Rogers "EventCode": "0xC7", 629d8c30385SAndi Kleen "EventName": "SSEX_UOPS_RETIRED.SCALAR_DOUBLE", 630*8fe33fd5SIan Rogers "PEBS": "1", 631d8c30385SAndi Kleen "SampleAfterValue": "200000", 632*8fe33fd5SIan Rogers "UMask": "0x8" 633d8c30385SAndi Kleen }, 634d8c30385SAndi Kleen { 635*8fe33fd5SIan Rogers "BriefDescription": "SIMD Scalar-Single Uops retired (Precise Event)", 636d8c30385SAndi Kleen "Counter": "0,1,2,3", 637*8fe33fd5SIan Rogers "EventCode": "0xC7", 638d8c30385SAndi Kleen "EventName": "SSEX_UOPS_RETIRED.SCALAR_SINGLE", 639d8c30385SAndi Kleen "PEBS": "1", 640d8c30385SAndi Kleen "SampleAfterValue": "200000", 641*8fe33fd5SIan Rogers "UMask": "0x2" 642d8c30385SAndi Kleen }, 643d8c30385SAndi Kleen { 644*8fe33fd5SIan Rogers "BriefDescription": "SIMD Vector Integer Uops retired (Precise Event)", 645d8c30385SAndi Kleen "Counter": "0,1,2,3", 646*8fe33fd5SIan Rogers "EventCode": "0xC7", 647*8fe33fd5SIan Rogers "EventName": "SSEX_UOPS_RETIRED.VECTOR_INTEGER", 648*8fe33fd5SIan Rogers "PEBS": "1", 649*8fe33fd5SIan Rogers "SampleAfterValue": "200000", 650*8fe33fd5SIan Rogers "UMask": "0x10" 651d8c30385SAndi Kleen }, 652d8c30385SAndi Kleen { 653*8fe33fd5SIan Rogers "BriefDescription": "Stack pointer instructions decoded", 654*8fe33fd5SIan Rogers "Counter": "0,1,2,3", 655d8c30385SAndi Kleen "EventCode": "0xD1", 656d8c30385SAndi Kleen "EventName": "UOPS_DECODED.ESP_FOLDING", 657d8c30385SAndi Kleen "SampleAfterValue": "2000000", 658*8fe33fd5SIan Rogers "UMask": "0x4" 659d8c30385SAndi Kleen }, 660d8c30385SAndi Kleen { 661*8fe33fd5SIan Rogers "BriefDescription": "Stack pointer sync operations", 662d8c30385SAndi Kleen "Counter": "0,1,2,3", 663*8fe33fd5SIan Rogers "EventCode": "0xD1", 664d8c30385SAndi Kleen "EventName": "UOPS_DECODED.ESP_SYNC", 665d8c30385SAndi Kleen "SampleAfterValue": "2000000", 666*8fe33fd5SIan Rogers "UMask": "0x8" 667d8c30385SAndi Kleen }, 668d8c30385SAndi Kleen { 669*8fe33fd5SIan Rogers "BriefDescription": "Uops decoded by Microcode Sequencer", 670d8c30385SAndi Kleen "Counter": "0,1,2,3", 671*8fe33fd5SIan Rogers "CounterMask": "1", 672*8fe33fd5SIan Rogers "EventCode": "0xD1", 673d8c30385SAndi Kleen "EventName": "UOPS_DECODED.MS_CYCLES_ACTIVE", 674d8c30385SAndi Kleen "SampleAfterValue": "2000000", 675*8fe33fd5SIan Rogers "UMask": "0x2" 676d8c30385SAndi Kleen }, 677d8c30385SAndi Kleen { 678d8c30385SAndi Kleen "BriefDescription": "Cycles no Uops are decoded", 679*8fe33fd5SIan Rogers "Counter": "0,1,2,3", 680*8fe33fd5SIan Rogers "CounterMask": "1", 681*8fe33fd5SIan Rogers "EventCode": "0xD1", 682*8fe33fd5SIan Rogers "EventName": "UOPS_DECODED.STALL_CYCLES", 683*8fe33fd5SIan Rogers "Invert": "1", 684*8fe33fd5SIan Rogers "SampleAfterValue": "2000000", 685*8fe33fd5SIan Rogers "UMask": "0x1" 686d8c30385SAndi Kleen }, 687d8c30385SAndi Kleen { 688d8c30385SAndi Kleen "AnyThread": "1", 689*8fe33fd5SIan Rogers "BriefDescription": "Cycles Uops executed on any port (core count)", 690*8fe33fd5SIan Rogers "Counter": "0,1,2,3", 691*8fe33fd5SIan Rogers "CounterMask": "1", 692*8fe33fd5SIan Rogers "EventCode": "0xB1", 693d8c30385SAndi Kleen "EventName": "UOPS_EXECUTED.CORE_ACTIVE_CYCLES", 694d8c30385SAndi Kleen "SampleAfterValue": "2000000", 695*8fe33fd5SIan Rogers "UMask": "0x3f" 696d8c30385SAndi Kleen }, 697d8c30385SAndi Kleen { 698d8c30385SAndi Kleen "AnyThread": "1", 699*8fe33fd5SIan Rogers "BriefDescription": "Cycles Uops executed on ports 0-4 (core count)", 700*8fe33fd5SIan Rogers "Counter": "0,1,2,3", 701*8fe33fd5SIan Rogers "CounterMask": "1", 702*8fe33fd5SIan Rogers "EventCode": "0xB1", 703d8c30385SAndi Kleen "EventName": "UOPS_EXECUTED.CORE_ACTIVE_CYCLES_NO_PORT5", 704d8c30385SAndi Kleen "SampleAfterValue": "2000000", 705*8fe33fd5SIan Rogers "UMask": "0x1f" 706d8c30385SAndi Kleen }, 707d8c30385SAndi Kleen { 708d8c30385SAndi Kleen "AnyThread": "1", 709d8c30385SAndi Kleen "BriefDescription": "Uops executed on any port (core count)", 710*8fe33fd5SIan Rogers "Counter": "0,1,2,3", 711d8c30385SAndi Kleen "CounterMask": "1", 712*8fe33fd5SIan Rogers "EdgeDetect": "1", 713*8fe33fd5SIan Rogers "EventCode": "0xB1", 714*8fe33fd5SIan Rogers "EventName": "UOPS_EXECUTED.CORE_STALL_COUNT", 715*8fe33fd5SIan Rogers "Invert": "1", 716*8fe33fd5SIan Rogers "SampleAfterValue": "2000000", 717*8fe33fd5SIan Rogers "UMask": "0x3f" 718d8c30385SAndi Kleen }, 719d8c30385SAndi Kleen { 720d8c30385SAndi Kleen "AnyThread": "1", 721d8c30385SAndi Kleen "BriefDescription": "Uops executed on ports 0-4 (core count)", 722*8fe33fd5SIan Rogers "Counter": "0,1,2,3", 723d8c30385SAndi Kleen "CounterMask": "1", 724*8fe33fd5SIan Rogers "EdgeDetect": "1", 725*8fe33fd5SIan Rogers "EventCode": "0xB1", 726*8fe33fd5SIan Rogers "EventName": "UOPS_EXECUTED.CORE_STALL_COUNT_NO_PORT5", 727*8fe33fd5SIan Rogers "Invert": "1", 728*8fe33fd5SIan Rogers "SampleAfterValue": "2000000", 729*8fe33fd5SIan Rogers "UMask": "0x1f" 730d8c30385SAndi Kleen }, 731d8c30385SAndi Kleen { 732d8c30385SAndi Kleen "AnyThread": "1", 733d8c30385SAndi Kleen "BriefDescription": "Cycles no Uops issued on any port (core count)", 734*8fe33fd5SIan Rogers "Counter": "0,1,2,3", 735*8fe33fd5SIan Rogers "CounterMask": "1", 736d8c30385SAndi Kleen "EventCode": "0xB1", 737*8fe33fd5SIan Rogers "EventName": "UOPS_EXECUTED.CORE_STALL_CYCLES", 738d8c30385SAndi Kleen "Invert": "1", 739d8c30385SAndi Kleen "SampleAfterValue": "2000000", 740*8fe33fd5SIan Rogers "UMask": "0x3f" 741d8c30385SAndi Kleen }, 742d8c30385SAndi Kleen { 743*8fe33fd5SIan Rogers "AnyThread": "1", 744*8fe33fd5SIan Rogers "BriefDescription": "Cycles no Uops issued on ports 0-4 (core count)", 745d8c30385SAndi Kleen "Counter": "0,1,2,3", 746*8fe33fd5SIan Rogers "CounterMask": "1", 747*8fe33fd5SIan Rogers "EventCode": "0xB1", 748*8fe33fd5SIan Rogers "EventName": "UOPS_EXECUTED.CORE_STALL_CYCLES_NO_PORT5", 749*8fe33fd5SIan Rogers "Invert": "1", 750*8fe33fd5SIan Rogers "SampleAfterValue": "2000000", 751*8fe33fd5SIan Rogers "UMask": "0x1f" 752*8fe33fd5SIan Rogers }, 753*8fe33fd5SIan Rogers { 754*8fe33fd5SIan Rogers "BriefDescription": "Uops executed on port 0", 755*8fe33fd5SIan Rogers "Counter": "0,1,2,3", 756*8fe33fd5SIan Rogers "EventCode": "0xB1", 757d8c30385SAndi Kleen "EventName": "UOPS_EXECUTED.PORT0", 758d8c30385SAndi Kleen "SampleAfterValue": "2000000", 759*8fe33fd5SIan Rogers "UMask": "0x1" 760d8c30385SAndi Kleen }, 761d8c30385SAndi Kleen { 762*8fe33fd5SIan Rogers "BriefDescription": "Uops issued on ports 0, 1 or 5", 763d8c30385SAndi Kleen "Counter": "0,1,2,3", 764*8fe33fd5SIan Rogers "EventCode": "0xB1", 765d8c30385SAndi Kleen "EventName": "UOPS_EXECUTED.PORT015", 766d8c30385SAndi Kleen "SampleAfterValue": "2000000", 767*8fe33fd5SIan Rogers "UMask": "0x40" 768d8c30385SAndi Kleen }, 769d8c30385SAndi Kleen { 770d8c30385SAndi Kleen "BriefDescription": "Cycles no Uops issued on ports 0, 1 or 5", 771*8fe33fd5SIan Rogers "Counter": "0,1,2,3", 772*8fe33fd5SIan Rogers "CounterMask": "1", 773*8fe33fd5SIan Rogers "EventCode": "0xB1", 774*8fe33fd5SIan Rogers "EventName": "UOPS_EXECUTED.PORT015_STALL_CYCLES", 775*8fe33fd5SIan Rogers "Invert": "1", 776*8fe33fd5SIan Rogers "SampleAfterValue": "2000000", 777*8fe33fd5SIan Rogers "UMask": "0x40" 778d8c30385SAndi Kleen }, 779d8c30385SAndi Kleen { 780*8fe33fd5SIan Rogers "BriefDescription": "Uops executed on port 1", 781d8c30385SAndi Kleen "Counter": "0,1,2,3", 782*8fe33fd5SIan Rogers "EventCode": "0xB1", 783d8c30385SAndi Kleen "EventName": "UOPS_EXECUTED.PORT1", 784d8c30385SAndi Kleen "SampleAfterValue": "2000000", 785*8fe33fd5SIan Rogers "UMask": "0x2" 786d8c30385SAndi Kleen }, 787d8c30385SAndi Kleen { 788d8c30385SAndi Kleen "AnyThread": "1", 789*8fe33fd5SIan Rogers "BriefDescription": "Uops issued on ports 2, 3 or 4", 790d8c30385SAndi Kleen "Counter": "0,1,2,3", 791*8fe33fd5SIan Rogers "EventCode": "0xB1", 792d8c30385SAndi Kleen "EventName": "UOPS_EXECUTED.PORT234_CORE", 793d8c30385SAndi Kleen "SampleAfterValue": "2000000", 794*8fe33fd5SIan Rogers "UMask": "0x80" 795d8c30385SAndi Kleen }, 796d8c30385SAndi Kleen { 797d8c30385SAndi Kleen "AnyThread": "1", 798*8fe33fd5SIan Rogers "BriefDescription": "Uops executed on port 2 (core count)", 799*8fe33fd5SIan Rogers "Counter": "0,1,2,3", 800*8fe33fd5SIan Rogers "EventCode": "0xB1", 801*8fe33fd5SIan Rogers "EventName": "UOPS_EXECUTED.PORT2_CORE", 802*8fe33fd5SIan Rogers "SampleAfterValue": "2000000", 803*8fe33fd5SIan Rogers "UMask": "0x4" 804*8fe33fd5SIan Rogers }, 805*8fe33fd5SIan Rogers { 806*8fe33fd5SIan Rogers "AnyThread": "1", 807*8fe33fd5SIan Rogers "BriefDescription": "Uops executed on port 3 (core count)", 808*8fe33fd5SIan Rogers "Counter": "0,1,2,3", 809*8fe33fd5SIan Rogers "EventCode": "0xB1", 810d8c30385SAndi Kleen "EventName": "UOPS_EXECUTED.PORT3_CORE", 811d8c30385SAndi Kleen "SampleAfterValue": "2000000", 812*8fe33fd5SIan Rogers "UMask": "0x8" 813d8c30385SAndi Kleen }, 814d8c30385SAndi Kleen { 815d8c30385SAndi Kleen "AnyThread": "1", 816*8fe33fd5SIan Rogers "BriefDescription": "Uops executed on port 4 (core count)", 817*8fe33fd5SIan Rogers "Counter": "0,1,2,3", 818*8fe33fd5SIan Rogers "EventCode": "0xB1", 819d8c30385SAndi Kleen "EventName": "UOPS_EXECUTED.PORT4_CORE", 820d8c30385SAndi Kleen "SampleAfterValue": "2000000", 821*8fe33fd5SIan Rogers "UMask": "0x10" 822d8c30385SAndi Kleen }, 823d8c30385SAndi Kleen { 824*8fe33fd5SIan Rogers "BriefDescription": "Uops executed on port 5", 825d8c30385SAndi Kleen "Counter": "0,1,2,3", 826*8fe33fd5SIan Rogers "EventCode": "0xB1", 827d8c30385SAndi Kleen "EventName": "UOPS_EXECUTED.PORT5", 828d8c30385SAndi Kleen "SampleAfterValue": "2000000", 829*8fe33fd5SIan Rogers "UMask": "0x20" 830d8c30385SAndi Kleen }, 831d8c30385SAndi Kleen { 832*8fe33fd5SIan Rogers "BriefDescription": "Uops issued", 833d8c30385SAndi Kleen "Counter": "0,1,2,3", 834*8fe33fd5SIan Rogers "EventCode": "0xE", 835d8c30385SAndi Kleen "EventName": "UOPS_ISSUED.ANY", 836d8c30385SAndi Kleen "SampleAfterValue": "2000000", 837*8fe33fd5SIan Rogers "UMask": "0x1" 838d8c30385SAndi Kleen }, 839d8c30385SAndi Kleen { 840d8c30385SAndi Kleen "AnyThread": "1", 841d8c30385SAndi Kleen "BriefDescription": "Cycles no Uops were issued on any thread", 842*8fe33fd5SIan Rogers "Counter": "0,1,2,3", 843*8fe33fd5SIan Rogers "CounterMask": "1", 844*8fe33fd5SIan Rogers "EventCode": "0xE", 845*8fe33fd5SIan Rogers "EventName": "UOPS_ISSUED.CORE_STALL_CYCLES", 846*8fe33fd5SIan Rogers "Invert": "1", 847*8fe33fd5SIan Rogers "SampleAfterValue": "2000000", 848*8fe33fd5SIan Rogers "UMask": "0x1" 849d8c30385SAndi Kleen }, 850d8c30385SAndi Kleen { 851d8c30385SAndi Kleen "AnyThread": "1", 852*8fe33fd5SIan Rogers "BriefDescription": "Cycles Uops were issued on either thread", 853*8fe33fd5SIan Rogers "Counter": "0,1,2,3", 854*8fe33fd5SIan Rogers "CounterMask": "1", 855*8fe33fd5SIan Rogers "EventCode": "0xE", 856d8c30385SAndi Kleen "EventName": "UOPS_ISSUED.CYCLES_ALL_THREADS", 857d8c30385SAndi Kleen "SampleAfterValue": "2000000", 858*8fe33fd5SIan Rogers "UMask": "0x1" 859d8c30385SAndi Kleen }, 860d8c30385SAndi Kleen { 861*8fe33fd5SIan Rogers "BriefDescription": "Fused Uops issued", 862d8c30385SAndi Kleen "Counter": "0,1,2,3", 863*8fe33fd5SIan Rogers "EventCode": "0xE", 864d8c30385SAndi Kleen "EventName": "UOPS_ISSUED.FUSED", 865d8c30385SAndi Kleen "SampleAfterValue": "2000000", 866*8fe33fd5SIan Rogers "UMask": "0x2" 867d8c30385SAndi Kleen }, 868d8c30385SAndi Kleen { 869d8c30385SAndi Kleen "BriefDescription": "Cycles no Uops were issued", 870*8fe33fd5SIan Rogers "Counter": "0,1,2,3", 871*8fe33fd5SIan Rogers "CounterMask": "1", 872*8fe33fd5SIan Rogers "EventCode": "0xE", 873*8fe33fd5SIan Rogers "EventName": "UOPS_ISSUED.STALL_CYCLES", 874*8fe33fd5SIan Rogers "Invert": "1", 875*8fe33fd5SIan Rogers "SampleAfterValue": "2000000", 876*8fe33fd5SIan Rogers "UMask": "0x1" 877d8c30385SAndi Kleen }, 878d8c30385SAndi Kleen { 879d8c30385SAndi Kleen "BriefDescription": "Cycles Uops are being retired", 880*8fe33fd5SIan Rogers "Counter": "0,1,2,3", 881*8fe33fd5SIan Rogers "CounterMask": "1", 882*8fe33fd5SIan Rogers "EventCode": "0xC2", 883*8fe33fd5SIan Rogers "EventName": "UOPS_RETIRED.ACTIVE_CYCLES", 884*8fe33fd5SIan Rogers "PEBS": "1", 885*8fe33fd5SIan Rogers "SampleAfterValue": "2000000", 886*8fe33fd5SIan Rogers "UMask": "0x1" 887d8c30385SAndi Kleen }, 888d8c30385SAndi Kleen { 889*8fe33fd5SIan Rogers "BriefDescription": "Uops retired (Precise Event)", 890d8c30385SAndi Kleen "Counter": "0,1,2,3", 891*8fe33fd5SIan Rogers "EventCode": "0xC2", 892d8c30385SAndi Kleen "EventName": "UOPS_RETIRED.ANY", 893*8fe33fd5SIan Rogers "PEBS": "1", 894d8c30385SAndi Kleen "SampleAfterValue": "2000000", 895*8fe33fd5SIan Rogers "UMask": "0x1" 896d8c30385SAndi Kleen }, 897d8c30385SAndi Kleen { 898*8fe33fd5SIan Rogers "BriefDescription": "Macro-fused Uops retired (Precise Event)", 899d8c30385SAndi Kleen "Counter": "0,1,2,3", 900*8fe33fd5SIan Rogers "EventCode": "0xC2", 901d8c30385SAndi Kleen "EventName": "UOPS_RETIRED.MACRO_FUSED", 902*8fe33fd5SIan Rogers "PEBS": "1", 903d8c30385SAndi Kleen "SampleAfterValue": "2000000", 904*8fe33fd5SIan Rogers "UMask": "0x4" 905d8c30385SAndi Kleen }, 906d8c30385SAndi Kleen { 907*8fe33fd5SIan Rogers "BriefDescription": "Retirement slots used (Precise Event)", 908d8c30385SAndi Kleen "Counter": "0,1,2,3", 909*8fe33fd5SIan Rogers "EventCode": "0xC2", 910d8c30385SAndi Kleen "EventName": "UOPS_RETIRED.RETIRE_SLOTS", 911*8fe33fd5SIan Rogers "PEBS": "1", 912d8c30385SAndi Kleen "SampleAfterValue": "2000000", 913*8fe33fd5SIan Rogers "UMask": "0x2" 914d8c30385SAndi Kleen }, 915d8c30385SAndi Kleen { 916d8c30385SAndi Kleen "BriefDescription": "Cycles Uops are not retiring (Precise Event)", 917*8fe33fd5SIan Rogers "Counter": "0,1,2,3", 918*8fe33fd5SIan Rogers "CounterMask": "1", 919d8c30385SAndi Kleen "EventCode": "0xC2", 920*8fe33fd5SIan Rogers "EventName": "UOPS_RETIRED.STALL_CYCLES", 921d8c30385SAndi Kleen "Invert": "1", 922*8fe33fd5SIan Rogers "PEBS": "1", 923d8c30385SAndi Kleen "SampleAfterValue": "2000000", 924*8fe33fd5SIan Rogers "UMask": "0x1" 925d8c30385SAndi Kleen }, 926d8c30385SAndi Kleen { 927*8fe33fd5SIan Rogers "BriefDescription": "Total cycles using precise uop retired event (Precise Event)", 928d8c30385SAndi Kleen "Counter": "0,1,2,3", 929*8fe33fd5SIan Rogers "CounterMask": "16", 930*8fe33fd5SIan Rogers "EventCode": "0xC2", 931*8fe33fd5SIan Rogers "EventName": "UOPS_RETIRED.TOTAL_CYCLES", 932*8fe33fd5SIan Rogers "Invert": "1", 933*8fe33fd5SIan Rogers "PEBS": "1", 934d8c30385SAndi Kleen "SampleAfterValue": "2000000", 935*8fe33fd5SIan Rogers "UMask": "0x1" 936*8fe33fd5SIan Rogers }, 937*8fe33fd5SIan Rogers { 938*8fe33fd5SIan Rogers "BriefDescription": "Uop unfusions due to FP exceptions", 939*8fe33fd5SIan Rogers "Counter": "0,1,2,3", 940*8fe33fd5SIan Rogers "EventCode": "0xDB", 941*8fe33fd5SIan Rogers "EventName": "UOP_UNFUSION", 942*8fe33fd5SIan Rogers "SampleAfterValue": "2000000", 943*8fe33fd5SIan Rogers "UMask": "0x1" 944d8c30385SAndi Kleen } 945d8c30385SAndi Kleen] 946