1[ 2 { 3 "BriefDescription": "ES segment renames", 4 "EventCode": "0xD5", 5 "EventName": "ES_REG_RENAMES", 6 "SampleAfterValue": "2000000", 7 "UMask": "0x1" 8 }, 9 { 10 "BriefDescription": "I/O transactions", 11 "EventCode": "0x6C", 12 "EventName": "IO_TRANSACTIONS", 13 "SampleAfterValue": "2000000", 14 "UMask": "0x1" 15 }, 16 { 17 "BriefDescription": "L1I instruction fetch stall cycles", 18 "EventCode": "0x80", 19 "EventName": "L1I.CYCLES_STALLED", 20 "SampleAfterValue": "2000000", 21 "UMask": "0x4" 22 }, 23 { 24 "BriefDescription": "L1I instruction fetch hits", 25 "EventCode": "0x80", 26 "EventName": "L1I.HITS", 27 "SampleAfterValue": "2000000", 28 "UMask": "0x1" 29 }, 30 { 31 "BriefDescription": "L1I instruction fetch misses", 32 "EventCode": "0x80", 33 "EventName": "L1I.MISSES", 34 "SampleAfterValue": "2000000", 35 "UMask": "0x2" 36 }, 37 { 38 "BriefDescription": "L1I Instruction fetches", 39 "EventCode": "0x80", 40 "EventName": "L1I.READS", 41 "SampleAfterValue": "2000000", 42 "UMask": "0x3" 43 }, 44 { 45 "BriefDescription": "Large ITLB hit", 46 "EventCode": "0x82", 47 "EventName": "LARGE_ITLB.HIT", 48 "SampleAfterValue": "200000", 49 "UMask": "0x1" 50 }, 51 { 52 "BriefDescription": "All loads dispatched", 53 "EventCode": "0x13", 54 "EventName": "LOAD_DISPATCH.ANY", 55 "SampleAfterValue": "2000000", 56 "UMask": "0x7" 57 }, 58 { 59 "BriefDescription": "Loads dispatched from the MOB", 60 "EventCode": "0x13", 61 "EventName": "LOAD_DISPATCH.MOB", 62 "SampleAfterValue": "2000000", 63 "UMask": "0x4" 64 }, 65 { 66 "BriefDescription": "Loads dispatched that bypass the MOB", 67 "EventCode": "0x13", 68 "EventName": "LOAD_DISPATCH.RS", 69 "SampleAfterValue": "2000000", 70 "UMask": "0x1" 71 }, 72 { 73 "BriefDescription": "Loads dispatched from stage 305", 74 "EventCode": "0x13", 75 "EventName": "LOAD_DISPATCH.RS_DELAYED", 76 "SampleAfterValue": "2000000", 77 "UMask": "0x2" 78 }, 79 { 80 "BriefDescription": "False dependencies due to partial address aliasing", 81 "EventCode": "0x7", 82 "EventName": "PARTIAL_ADDRESS_ALIAS", 83 "SampleAfterValue": "200000", 84 "UMask": "0x1" 85 }, 86 { 87 "BriefDescription": "All Store buffer stall cycles", 88 "EventCode": "0x4", 89 "EventName": "SB_DRAIN.ANY", 90 "SampleAfterValue": "200000", 91 "UMask": "0x7" 92 }, 93 { 94 "BriefDescription": "Segment rename stall cycles", 95 "EventCode": "0xD4", 96 "EventName": "SEG_RENAME_STALLS", 97 "SampleAfterValue": "2000000", 98 "UMask": "0x1" 99 }, 100 { 101 "BriefDescription": "Thread responded HIT to snoop", 102 "EventCode": "0xB8", 103 "EventName": "SNOOP_RESPONSE.HIT", 104 "SampleAfterValue": "100000", 105 "UMask": "0x1" 106 }, 107 { 108 "BriefDescription": "Thread responded HITE to snoop", 109 "EventCode": "0xB8", 110 "EventName": "SNOOP_RESPONSE.HITE", 111 "SampleAfterValue": "100000", 112 "UMask": "0x2" 113 }, 114 { 115 "BriefDescription": "Thread responded HITM to snoop", 116 "EventCode": "0xB8", 117 "EventName": "SNOOP_RESPONSE.HITM", 118 "SampleAfterValue": "100000", 119 "UMask": "0x4" 120 }, 121 { 122 "BriefDescription": "Super Queue full stall cycles", 123 "EventCode": "0xF6", 124 "EventName": "SQ_FULL_STALL_CYCLES", 125 "SampleAfterValue": "2000000", 126 "UMask": "0x1" 127 } 128] 129