1[ 2 { 3 "PublicDescription": "Speculative cache-line split load uops dispatched to L1D.", 4 "EventCode": "0x05", 5 "Counter": "0,1,2,3", 6 "UMask": "0x1", 7 "EventName": "MISALIGN_MEM_REF.LOADS", 8 "SampleAfterValue": "2000003", 9 "BriefDescription": "Speculative cache line split load uops dispatched to L1 cache", 10 "CounterHTOff": "0,1,2,3,4,5,6,7" 11 }, 12 { 13 "PublicDescription": "Speculative cache-line split Store-address uops dispatched to L1D.", 14 "EventCode": "0x05", 15 "Counter": "0,1,2,3", 16 "UMask": "0x2", 17 "EventName": "MISALIGN_MEM_REF.STORES", 18 "SampleAfterValue": "2000003", 19 "BriefDescription": "Speculative cache line split STA uops dispatched to L1 cache", 20 "CounterHTOff": "0,1,2,3,4,5,6,7" 21 }, 22 { 23 "EventCode": "0xC3", 24 "Counter": "0,1,2,3", 25 "UMask": "0x2", 26 "EventName": "MACHINE_CLEARS.MEMORY_ORDERING", 27 "SampleAfterValue": "100003", 28 "BriefDescription": "Counts the number of machine clears due to memory order conflicts.", 29 "CounterHTOff": "0,1,2,3,4,5,6,7" 30 }, 31 { 32 "PEBS": "2", 33 "PublicDescription": "Loads with latency value being above 4.", 34 "EventCode": "0xCD", 35 "MSRValue": "0x4", 36 "Counter": "3", 37 "UMask": "0x1", 38 "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_4", 39 "MSRIndex": "0x3F6", 40 "SampleAfterValue": "100003", 41 "BriefDescription": "Loads with latency value being above 4", 42 "TakenAlone": "1", 43 "CounterHTOff": "3" 44 }, 45 { 46 "PEBS": "2", 47 "PublicDescription": "Loads with latency value being above 8.", 48 "EventCode": "0xCD", 49 "MSRValue": "0x8", 50 "Counter": "3", 51 "UMask": "0x1", 52 "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_8", 53 "MSRIndex": "0x3F6", 54 "SampleAfterValue": "50021", 55 "BriefDescription": "Loads with latency value being above 8", 56 "TakenAlone": "1", 57 "CounterHTOff": "3" 58 }, 59 { 60 "PEBS": "2", 61 "PublicDescription": "Loads with latency value being above 16.", 62 "EventCode": "0xCD", 63 "MSRValue": "0x10", 64 "Counter": "3", 65 "UMask": "0x1", 66 "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_16", 67 "MSRIndex": "0x3F6", 68 "SampleAfterValue": "20011", 69 "BriefDescription": "Loads with latency value being above 16", 70 "TakenAlone": "1", 71 "CounterHTOff": "3" 72 }, 73 { 74 "PEBS": "2", 75 "PublicDescription": "Loads with latency value being above 32.", 76 "EventCode": "0xCD", 77 "MSRValue": "0x20", 78 "Counter": "3", 79 "UMask": "0x1", 80 "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_32", 81 "MSRIndex": "0x3F6", 82 "SampleAfterValue": "100007", 83 "BriefDescription": "Loads with latency value being above 32", 84 "TakenAlone": "1", 85 "CounterHTOff": "3" 86 }, 87 { 88 "PEBS": "2", 89 "PublicDescription": "Loads with latency value being above 64.", 90 "EventCode": "0xCD", 91 "MSRValue": "0x40", 92 "Counter": "3", 93 "UMask": "0x1", 94 "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_64", 95 "MSRIndex": "0x3F6", 96 "SampleAfterValue": "2003", 97 "BriefDescription": "Loads with latency value being above 64", 98 "TakenAlone": "1", 99 "CounterHTOff": "3" 100 }, 101 { 102 "PEBS": "2", 103 "PublicDescription": "Loads with latency value being above 128.", 104 "EventCode": "0xCD", 105 "MSRValue": "0x80", 106 "Counter": "3", 107 "UMask": "0x1", 108 "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_128", 109 "MSRIndex": "0x3F6", 110 "SampleAfterValue": "1009", 111 "BriefDescription": "Loads with latency value being above 128", 112 "TakenAlone": "1", 113 "CounterHTOff": "3" 114 }, 115 { 116 "PEBS": "2", 117 "PublicDescription": "Loads with latency value being above 256.", 118 "EventCode": "0xCD", 119 "MSRValue": "0x100", 120 "Counter": "3", 121 "UMask": "0x1", 122 "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_256", 123 "MSRIndex": "0x3F6", 124 "SampleAfterValue": "503", 125 "BriefDescription": "Loads with latency value being above 256", 126 "TakenAlone": "1", 127 "CounterHTOff": "3" 128 }, 129 { 130 "PEBS": "2", 131 "PublicDescription": "Loads with latency value being above 512.", 132 "EventCode": "0xCD", 133 "MSRValue": "0x200", 134 "Counter": "3", 135 "UMask": "0x1", 136 "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_512", 137 "MSRIndex": "0x3F6", 138 "SampleAfterValue": "101", 139 "BriefDescription": "Loads with latency value being above 512", 140 "TakenAlone": "1", 141 "CounterHTOff": "3" 142 }, 143 { 144 "PEBS": "2", 145 "EventCode": "0xCD", 146 "Counter": "3", 147 "UMask": "0x2", 148 "EventName": "MEM_TRANS_RETIRED.PRECISE_STORE", 149 "SampleAfterValue": "2000003", 150 "BriefDescription": "Sample stores and collect precise store operation via PEBS record. PMC3 only.", 151 "PRECISE_STORE": "1", 152 "TakenAlone": "1", 153 "CounterHTOff": "3" 154 }, 155 { 156 "EventCode": "0xB7, 0xBB", 157 "MSRValue": "0x3fffc00244", 158 "Counter": "0,1,2,3", 159 "UMask": "0x1", 160 "Offcore": "1", 161 "EventName": "OFFCORE_RESPONSE.ALL_CODE_RD.LLC_MISS.ANY_RESPONSE", 162 "MSRIndex": "0x1a6,0x1a7", 163 "SampleAfterValue": "100003", 164 "BriefDescription": "Counts all demand & prefetch code reads that miss the LLC", 165 "CounterHTOff": "0,1,2,3" 166 }, 167 { 168 "EventCode": "0xB7, 0xBB", 169 "MSRValue": "0x67f800244", 170 "Counter": "0,1,2,3", 171 "UMask": "0x1", 172 "Offcore": "1", 173 "EventName": "OFFCORE_RESPONSE.ALL_CODE_RD.LLC_MISS.REMOTE_DRAM", 174 "MSRIndex": "0x1a6,0x1a7", 175 "SampleAfterValue": "100003", 176 "BriefDescription": "Counts all demand & prefetch code reads that miss the LLC and the data returned from remote dram", 177 "CounterHTOff": "0,1,2,3" 178 }, 179 { 180 "EventCode": "0xB7, 0xBB", 181 "MSRValue": "0x87f800244", 182 "Counter": "0,1,2,3", 183 "UMask": "0x1", 184 "Offcore": "1", 185 "EventName": "OFFCORE_RESPONSE.ALL_CODE_RD.LLC_MISS.REMOTE_HIT_FORWARD", 186 "MSRIndex": "0x1a6,0x1a7", 187 "SampleAfterValue": "100003", 188 "BriefDescription": "Counts all demand & prefetch code reads that miss the LLC and the data forwarded from remote cache", 189 "CounterHTOff": "0,1,2,3" 190 }, 191 { 192 "EventCode": "0xB7, 0xBB", 193 "MSRValue": "0x3fffc20091", 194 "Counter": "0,1,2,3", 195 "UMask": "0x1", 196 "Offcore": "1", 197 "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.LLC_MISS.ANY_RESPONSE", 198 "MSRIndex": "0x1a6,0x1a7", 199 "SampleAfterValue": "100003", 200 "BriefDescription": "Counts all demand & prefetch data reads that hits the LLC", 201 "CounterHTOff": "0,1,2,3" 202 }, 203 { 204 "EventCode": "0xB7, 0xBB", 205 "MSRValue": "0x3fffc203f7", 206 "Counter": "0,1,2,3", 207 "UMask": "0x1", 208 "Offcore": "1", 209 "EventName": "OFFCORE_RESPONSE.ALL_READS.LLC_MISS.ANY_RESPONSE", 210 "MSRIndex": "0x1a6,0x1a7", 211 "SampleAfterValue": "100003", 212 "BriefDescription": "Counts all data/code/rfo reads (demand & prefetch) that hit the LLC", 213 "CounterHTOff": "0,1,2,3" 214 }, 215 { 216 "EventCode": "0xB7, 0xBB", 217 "MSRValue": "0x6004003f7", 218 "Counter": "0,1,2,3", 219 "UMask": "0x1", 220 "Offcore": "1", 221 "EventName": "OFFCORE_RESPONSE.ALL_READS.LLC_MISS.LOCAL_DRAM", 222 "MSRIndex": "0x1a6,0x1a7", 223 "SampleAfterValue": "100003", 224 "BriefDescription": "Counts all data/code/rfo reads (demand & prefetch) that miss the LLC and the data returned from local dram", 225 "CounterHTOff": "0,1,2,3" 226 }, 227 { 228 "EventCode": "0xB7, 0xBB", 229 "MSRValue": "0x87f8203f7", 230 "Counter": "0,1,2,3", 231 "UMask": "0x1", 232 "Offcore": "1", 233 "EventName": "OFFCORE_RESPONSE.ALL_READS.LLC_MISS.REMOTE_HIT_FORWARD", 234 "MSRIndex": "0x1a6,0x1a7", 235 "SampleAfterValue": "100003", 236 "BriefDescription": "Counts all data/code/rfo reads (demand & prefetch) that miss the LLC and the data forwarded from remote cache", 237 "CounterHTOff": "0,1,2,3" 238 }, 239 { 240 "EventCode": "0xB7, 0xBB", 241 "MSRValue": "0x107fc003f7", 242 "Counter": "0,1,2,3", 243 "UMask": "0x1", 244 "Offcore": "1", 245 "EventName": "OFFCORE_RESPONSE.ALL_READS.LLC_MISS.REMOTE_HITM", 246 "MSRIndex": "0x1a6,0x1a7", 247 "SampleAfterValue": "100003", 248 "BriefDescription": "Counts all data/code/rfo reads (demand & prefetch) that miss the LLC the data is found in M state in remote cache and forwarded from there", 249 "CounterHTOff": "0,1,2,3" 250 }, 251 { 252 "EventCode": "0xB7, 0xBB", 253 "MSRValue": "0x3fffc20004", 254 "Counter": "0,1,2,3", 255 "UMask": "0x1", 256 "Offcore": "1", 257 "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.LLC_MISS.ANY_RESPONSE", 258 "MSRIndex": "0x1a6,0x1a7", 259 "SampleAfterValue": "100003", 260 "BriefDescription": "Counts all demand code reads that miss the LLC", 261 "CounterHTOff": "0,1,2,3" 262 }, 263 { 264 "EventCode": "0xB7, 0xBB", 265 "MSRValue": "0x600400004", 266 "Counter": "0,1,2,3", 267 "UMask": "0x1", 268 "Offcore": "1", 269 "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.LLC_MISS.LOCAL_DRAM", 270 "MSRIndex": "0x1a6,0x1a7", 271 "SampleAfterValue": "100003", 272 "BriefDescription": "Counts all demand code reads that miss the LLC and the data returned from local dram", 273 "CounterHTOff": "0,1,2,3" 274 }, 275 { 276 "EventCode": "0xB7, 0xBB", 277 "MSRValue": "0x67f800004", 278 "Counter": "0,1,2,3", 279 "UMask": "0x1", 280 "Offcore": "1", 281 "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.LLC_MISS.REMOTE_DRAM", 282 "MSRIndex": "0x1a6,0x1a7", 283 "SampleAfterValue": "100003", 284 "BriefDescription": "Counts all demand code reads that miss the LLC and the data returned from remote dram", 285 "CounterHTOff": "0,1,2,3" 286 }, 287 { 288 "EventCode": "0xB7, 0xBB", 289 "MSRValue": "0x87f820004", 290 "Counter": "0,1,2,3", 291 "UMask": "0x1", 292 "Offcore": "1", 293 "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.LLC_MISS.REMOTE_HIT_FORWARD", 294 "MSRIndex": "0x1a6,0x1a7", 295 "SampleAfterValue": "100003", 296 "BriefDescription": "Counts all demand code reads that miss the LLC and the data forwarded from remote cache", 297 "CounterHTOff": "0,1,2,3" 298 }, 299 { 300 "EventCode": "0xB7, 0xBB", 301 "MSRValue": "0x107fc00004", 302 "Counter": "0,1,2,3", 303 "UMask": "0x1", 304 "Offcore": "1", 305 "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.LLC_MISS.REMOTE_HITM", 306 "MSRIndex": "0x1a6,0x1a7", 307 "SampleAfterValue": "100003", 308 "BriefDescription": "Counts all demand code reads that miss the LLC the data is found in M state in remote cache and forwarded from there", 309 "CounterHTOff": "0,1,2,3" 310 }, 311 { 312 "EventCode": "0xB7, 0xBB", 313 "MSRValue": "0x67fc00001", 314 "Counter": "0,1,2,3", 315 "UMask": "0x1", 316 "Offcore": "1", 317 "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.LLC_MISS.ANY_DRAM", 318 "MSRIndex": "0x1a6,0x1a7", 319 "SampleAfterValue": "100003", 320 "BriefDescription": "Counts demand data reads that miss the LLC and the data returned from remote & local dram", 321 "CounterHTOff": "0,1,2,3" 322 }, 323 { 324 "EventCode": "0xB7, 0xBB", 325 "MSRValue": "0x3fffc20001", 326 "Counter": "0,1,2,3", 327 "UMask": "0x1", 328 "Offcore": "1", 329 "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.LLC_MISS.ANY_RESPONSE", 330 "MSRIndex": "0x1a6,0x1a7", 331 "SampleAfterValue": "100003", 332 "BriefDescription": "Counts demand data reads that miss in the LLC", 333 "CounterHTOff": "0,1,2,3" 334 }, 335 { 336 "EventCode": "0xB7, 0xBB", 337 "MSRValue": "0x600400001", 338 "Counter": "0,1,2,3", 339 "UMask": "0x1", 340 "Offcore": "1", 341 "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.LLC_MISS.LOCAL_DRAM", 342 "MSRIndex": "0x1a6,0x1a7", 343 "SampleAfterValue": "100003", 344 "BriefDescription": "Counts demand data reads that miss the LLC and the data returned from local dram", 345 "CounterHTOff": "0,1,2,3" 346 }, 347 { 348 "EventCode": "0xB7, 0xBB", 349 "MSRValue": "0x67f800001", 350 "Counter": "0,1,2,3", 351 "UMask": "0x1", 352 "Offcore": "1", 353 "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.LLC_MISS.REMOTE_DRAM", 354 "MSRIndex": "0x1a6,0x1a7", 355 "SampleAfterValue": "100003", 356 "BriefDescription": "Counts demand data reads that miss the LLC and the data returned from remote dram", 357 "CounterHTOff": "0,1,2,3" 358 }, 359 { 360 "EventCode": "0xB7, 0xBB", 361 "MSRValue": "0x87f820001", 362 "Counter": "0,1,2,3", 363 "UMask": "0x1", 364 "Offcore": "1", 365 "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.LLC_MISS.REMOTE_HIT_FORWARD", 366 "MSRIndex": "0x1a6,0x1a7", 367 "SampleAfterValue": "100003", 368 "BriefDescription": "Counts demand data reads that miss the LLC and the data forwarded from remote cache", 369 "CounterHTOff": "0,1,2,3" 370 }, 371 { 372 "EventCode": "0xB7, 0xBB", 373 "MSRValue": "0x107fc00001", 374 "Counter": "0,1,2,3", 375 "UMask": "0x1", 376 "Offcore": "1", 377 "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.LLC_MISS.REMOTE_HITM", 378 "MSRIndex": "0x1a6,0x1a7", 379 "SampleAfterValue": "100003", 380 "BriefDescription": "Counts demand data reads that miss the LLC the data is found in M state in remote cache and forwarded from there", 381 "CounterHTOff": "0,1,2,3" 382 }, 383 { 384 "EventCode": "0xB7, 0xBB", 385 "MSRValue": "0x107fc20002", 386 "Counter": "0,1,2,3", 387 "UMask": "0x1", 388 "Offcore": "1", 389 "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.LLC_MISS.REMOTE_HITM", 390 "MSRIndex": "0x1a6,0x1a7", 391 "SampleAfterValue": "100003", 392 "BriefDescription": "Counts all demand data writes (RFOs) that miss the LLC and the data is found in M state in remote cache and forwarded from there.", 393 "CounterHTOff": "0,1,2,3" 394 }, 395 { 396 "EventCode": "0xB7, 0xBB", 397 "MSRValue": "0x3fffc20040", 398 "Counter": "0,1,2,3", 399 "UMask": "0x1", 400 "Offcore": "1", 401 "EventName": "OFFCORE_RESPONSE.PF_L2_CODE_RD.LLC_MISS.ANY_RESPONSE", 402 "MSRIndex": "0x1a6,0x1a7", 403 "SampleAfterValue": "100003", 404 "BriefDescription": "Counts all prefetch (that bring data to L2) code reads that miss the LLC and the data returned from remote & local dram", 405 "CounterHTOff": "0,1,2,3" 406 }, 407 { 408 "EventCode": "0xB7, 0xBB", 409 "MSRValue": "0x67fc00010", 410 "Counter": "0,1,2,3", 411 "UMask": "0x1", 412 "Offcore": "1", 413 "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.LLC_MISS.ANY_DRAM", 414 "MSRIndex": "0x1a6,0x1a7", 415 "SampleAfterValue": "100003", 416 "BriefDescription": "Counts prefetch (that bring data to L2) data reads that miss the LLC and the data returned from remote & local dram", 417 "CounterHTOff": "0,1,2,3" 418 }, 419 { 420 "EventCode": "0xB7, 0xBB", 421 "MSRValue": "0x3fffc20010", 422 "Counter": "0,1,2,3", 423 "UMask": "0x1", 424 "Offcore": "1", 425 "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.LLC_MISS.ANY_RESPONSE", 426 "MSRIndex": "0x1a6,0x1a7", 427 "SampleAfterValue": "100003", 428 "BriefDescription": "Counts prefetch (that bring data to L2) data reads that miss in the LLC", 429 "CounterHTOff": "0,1,2,3" 430 }, 431 { 432 "EventCode": "0xB7, 0xBB", 433 "MSRValue": "0x600400010", 434 "Counter": "0,1,2,3", 435 "UMask": "0x1", 436 "Offcore": "1", 437 "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.LLC_MISS.LOCAL_DRAM", 438 "MSRIndex": "0x1a6,0x1a7", 439 "SampleAfterValue": "100003", 440 "BriefDescription": "Counts prefetch (that bring data to L2) data reads that miss the LLC and the data returned from local dram", 441 "CounterHTOff": "0,1,2,3" 442 }, 443 { 444 "EventCode": "0xB7, 0xBB", 445 "MSRValue": "0x67f800010", 446 "Counter": "0,1,2,3", 447 "UMask": "0x1", 448 "Offcore": "1", 449 "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.LLC_MISS.REMOTE_DRAM", 450 "MSRIndex": "0x1a6,0x1a7", 451 "SampleAfterValue": "100003", 452 "BriefDescription": "Counts prefetch (that bring data to L2) data reads that miss the LLC and the data returned from remote dram", 453 "CounterHTOff": "0,1,2,3" 454 }, 455 { 456 "EventCode": "0xB7, 0xBB", 457 "MSRValue": "0x87f820010", 458 "Counter": "0,1,2,3", 459 "UMask": "0x1", 460 "Offcore": "1", 461 "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.LLC_MISS.REMOTE_HIT_FORWARD", 462 "MSRIndex": "0x1a6,0x1a7", 463 "SampleAfterValue": "100003", 464 "BriefDescription": "Counts prefetch (that bring data to L2) data reads that miss the LLC and the data forwarded from remote cache", 465 "CounterHTOff": "0,1,2,3" 466 }, 467 { 468 "EventCode": "0xB7, 0xBB", 469 "MSRValue": "0x107fc00010", 470 "Counter": "0,1,2,3", 471 "UMask": "0x1", 472 "Offcore": "1", 473 "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.LLC_MISS.REMOTE_HITM", 474 "MSRIndex": "0x1a6,0x1a7", 475 "SampleAfterValue": "100003", 476 "BriefDescription": "Counts prefetch (that bring data to L2) data reads that miss the LLC the data is found in M state in remote cache and forwarded from there", 477 "CounterHTOff": "0,1,2,3" 478 }, 479 { 480 "EventCode": "0xB7, 0xBB", 481 "MSRValue": "0x3fffc20200", 482 "Counter": "0,1,2,3", 483 "UMask": "0x1", 484 "Offcore": "1", 485 "EventName": "OFFCORE_RESPONSE.PF_LLC_CODE_RD.LLC_MISS.ANY_RESPONSE", 486 "MSRIndex": "0x1a6,0x1a7", 487 "SampleAfterValue": "100003", 488 "BriefDescription": "Counts all prefetch (that bring data to LLC only) code reads that miss in the LLC", 489 "CounterHTOff": "0,1,2,3" 490 }, 491 { 492 "EventCode": "0xB7, 0xBB", 493 "MSRValue": "0x3fffc20080", 494 "Counter": "0,1,2,3", 495 "UMask": "0x1", 496 "Offcore": "1", 497 "EventName": "OFFCORE_RESPONSE.PF_LLC_DATA_RD.LLC_MISS.ANY_RESPONSE", 498 "MSRIndex": "0x1a6,0x1a7", 499 "SampleAfterValue": "100003", 500 "BriefDescription": "Counts prefetch (that bring data to LLC only) data reads that miss in the LLC", 501 "CounterHTOff": "0,1,2,3" 502 } 503]