1[
2    {
3        "BriefDescription": "Core cycles where the core was running in a manner where Turbo may be clipped to the Non-AVX turbo schedule.",
4        "CollectPEBSRecord": "2",
5        "Counter": "0,1,2,3",
6        "EventCode": "0x28",
7        "EventName": "CORE_POWER.LVL0_TURBO_LICENSE",
8        "PEBScounters": "0,1,2,3",
9        "PublicDescription": "Counts Core cycles where the core was running with power-delivery for baseline license level 0.  This includes non-AVX codes, SSE, AVX 128-bit, and low-current AVX 256-bit codes.",
10        "SampleAfterValue": "200003",
11        "Speculative": "1",
12        "UMask": "0x7"
13    },
14    {
15        "BriefDescription": "Core cycles where the core was running in a manner where Turbo may be clipped to the AVX2 turbo schedule.",
16        "CollectPEBSRecord": "2",
17        "Counter": "0,1,2,3",
18        "EventCode": "0x28",
19        "EventName": "CORE_POWER.LVL1_TURBO_LICENSE",
20        "PEBScounters": "0,1,2,3",
21        "PublicDescription": "Counts Core cycles where the core was running with power-delivery for license level 1.  This includes high current AVX 256-bit instructions as well as low current AVX 512-bit instructions.",
22        "SampleAfterValue": "200003",
23        "Speculative": "1",
24        "UMask": "0x18"
25    },
26    {
27        "BriefDescription": "Core cycles where the core was running in a manner where Turbo may be clipped to the AVX512 turbo schedule.",
28        "CollectPEBSRecord": "2",
29        "Counter": "0,1,2,3",
30        "EventCode": "0x28",
31        "EventName": "CORE_POWER.LVL2_TURBO_LICENSE",
32        "PEBScounters": "0,1,2,3",
33        "PublicDescription": "Core cycles where the core was running with power-delivery for license level 2 (introduced in Skylake Server microarchtecture).  This includes high current AVX 512-bit instructions.",
34        "SampleAfterValue": "200003",
35        "Speculative": "1",
36        "UMask": "0x20"
37    },
38    {
39        "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that have any type of response.",
40        "CollectPEBSRecord": "2",
41        "Counter": "0,1,2,3",
42        "EventCode": "0xB7, 0xBB",
43        "EventName": "OCR.DEMAND_CODE_RD.ANY_RESPONSE",
44        "MSRIndex": "0x1a6,0x1a7",
45        "MSRValue": "0x10004",
46        "Offcore": "1",
47        "PEBScounters": "0,1,2,3",
48        "SampleAfterValue": "100003",
49        "Speculative": "1",
50        "UMask": "0x1"
51    },
52    {
53        "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that DRAM supplied the request.",
54        "CollectPEBSRecord": "2",
55        "Counter": "0,1,2,3",
56        "EventCode": "0xB7, 0xBB",
57        "EventName": "OCR.DEMAND_CODE_RD.DRAM",
58        "MSRIndex": "0x1a6,0x1a7",
59        "MSRValue": "0x184000004",
60        "Offcore": "1",
61        "PEBScounters": "0,1,2,3",
62        "SampleAfterValue": "100003",
63        "Speculative": "1",
64        "UMask": "0x1"
65    },
66    {
67        "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that DRAM supplied the request.",
68        "CollectPEBSRecord": "2",
69        "Counter": "0,1,2,3",
70        "EventCode": "0xB7, 0xBB",
71        "EventName": "OCR.DEMAND_CODE_RD.LOCAL_DRAM",
72        "MSRIndex": "0x1a6,0x1a7",
73        "MSRValue": "0x184000004",
74        "Offcore": "1",
75        "PEBScounters": "0,1,2,3",
76        "SampleAfterValue": "100003",
77        "Speculative": "1",
78        "UMask": "0x1"
79    },
80    {
81        "BriefDescription": "Counts demand data reads that have any type of response.",
82        "CollectPEBSRecord": "2",
83        "Counter": "0,1,2,3",
84        "EventCode": "0xB7, 0xBB",
85        "EventName": "OCR.DEMAND_DATA_RD.ANY_RESPONSE",
86        "MSRIndex": "0x1a6,0x1a7",
87        "MSRValue": "0x10001",
88        "Offcore": "1",
89        "PEBScounters": "0,1,2,3",
90        "SampleAfterValue": "100003",
91        "Speculative": "1",
92        "UMask": "0x1"
93    },
94    {
95        "BriefDescription": "Counts demand data reads that DRAM supplied the request.",
96        "CollectPEBSRecord": "2",
97        "Counter": "0,1,2,3",
98        "EventCode": "0xB7, 0xBB",
99        "EventName": "OCR.DEMAND_DATA_RD.DRAM",
100        "MSRIndex": "0x1a6,0x1a7",
101        "MSRValue": "0x184000001",
102        "Offcore": "1",
103        "PEBScounters": "0,1,2,3",
104        "SampleAfterValue": "100003",
105        "Speculative": "1",
106        "UMask": "0x1"
107    },
108    {
109        "BriefDescription": "Counts demand data reads that DRAM supplied the request.",
110        "CollectPEBSRecord": "2",
111        "Counter": "0,1,2,3",
112        "EventCode": "0xB7, 0xBB",
113        "EventName": "OCR.DEMAND_DATA_RD.LOCAL_DRAM",
114        "MSRIndex": "0x1a6,0x1a7",
115        "MSRValue": "0x184000001",
116        "Offcore": "1",
117        "PEBScounters": "0,1,2,3",
118        "SampleAfterValue": "100003",
119        "Speculative": "1",
120        "UMask": "0x1"
121    },
122    {
123        "BriefDescription": "Counts demand reads for ownership (RFO) requests and software prefetches for exclusive ownership (PREFETCHW) that have any type of response.",
124        "CollectPEBSRecord": "2",
125        "Counter": "0,1,2,3",
126        "EventCode": "0xB7, 0xBB",
127        "EventName": "OCR.DEMAND_RFO.ANY_RESPONSE",
128        "MSRIndex": "0x1a6,0x1a7",
129        "MSRValue": "0x10002",
130        "Offcore": "1",
131        "PEBScounters": "0,1,2,3",
132        "SampleAfterValue": "100003",
133        "Speculative": "1",
134        "UMask": "0x1"
135    },
136    {
137        "BriefDescription": "Counts demand reads for ownership (RFO) requests and software prefetches for exclusive ownership (PREFETCHW) that DRAM supplied the request.",
138        "CollectPEBSRecord": "2",
139        "Counter": "0,1,2,3",
140        "EventCode": "0xB7, 0xBB",
141        "EventName": "OCR.DEMAND_RFO.DRAM",
142        "MSRIndex": "0x1a6,0x1a7",
143        "MSRValue": "0x184000002",
144        "Offcore": "1",
145        "PEBScounters": "0,1,2,3",
146        "SampleAfterValue": "100003",
147        "Speculative": "1",
148        "UMask": "0x1"
149    },
150    {
151        "BriefDescription": "Counts demand reads for ownership (RFO) requests and software prefetches for exclusive ownership (PREFETCHW) that DRAM supplied the request.",
152        "CollectPEBSRecord": "2",
153        "Counter": "0,1,2,3",
154        "EventCode": "0xB7, 0xBB",
155        "EventName": "OCR.DEMAND_RFO.LOCAL_DRAM",
156        "MSRIndex": "0x1a6,0x1a7",
157        "MSRValue": "0x184000002",
158        "Offcore": "1",
159        "PEBScounters": "0,1,2,3",
160        "SampleAfterValue": "100003",
161        "Speculative": "1",
162        "UMask": "0x1"
163    },
164    {
165        "BriefDescription": "Counts L1 data cache prefetch requests and software prefetches (except PREFETCHW) that have any type of response.",
166        "CollectPEBSRecord": "2",
167        "Counter": "0,1,2,3",
168        "EventCode": "0xB7, 0xBB",
169        "EventName": "OCR.HWPF_L1D_AND_SWPF.ANY_RESPONSE",
170        "MSRIndex": "0x1a6,0x1a7",
171        "MSRValue": "0x10400",
172        "Offcore": "1",
173        "PEBScounters": "0,1,2,3",
174        "SampleAfterValue": "100003",
175        "Speculative": "1",
176        "UMask": "0x1"
177    },
178    {
179        "BriefDescription": "Counts L1 data cache prefetch requests and software prefetches (except PREFETCHW) that DRAM supplied the request.",
180        "CollectPEBSRecord": "2",
181        "Counter": "0,1,2,3",
182        "EventCode": "0xB7, 0xBB",
183        "EventName": "OCR.HWPF_L1D_AND_SWPF.DRAM",
184        "MSRIndex": "0x1a6,0x1a7",
185        "MSRValue": "0x184000400",
186        "Offcore": "1",
187        "PEBScounters": "0,1,2,3",
188        "SampleAfterValue": "100003",
189        "Speculative": "1",
190        "UMask": "0x1"
191    },
192    {
193        "BriefDescription": "Counts L1 data cache prefetch requests and software prefetches (except PREFETCHW) that DRAM supplied the request.",
194        "CollectPEBSRecord": "2",
195        "Counter": "0,1,2,3",
196        "EventCode": "0xB7, 0xBB",
197        "EventName": "OCR.HWPF_L1D_AND_SWPF.LOCAL_DRAM",
198        "MSRIndex": "0x1a6,0x1a7",
199        "MSRValue": "0x184000400",
200        "Offcore": "1",
201        "PEBScounters": "0,1,2,3",
202        "SampleAfterValue": "100003",
203        "Speculative": "1",
204        "UMask": "0x1"
205    },
206    {
207        "BriefDescription": "Counts hardware prefetch data reads (which bring data to L2)  that have any type of response.",
208        "CollectPEBSRecord": "2",
209        "Counter": "0,1,2,3",
210        "EventCode": "0xB7, 0xBB",
211        "EventName": "OCR.HWPF_L2_DATA_RD.ANY_RESPONSE",
212        "MSRIndex": "0x1a6,0x1a7",
213        "MSRValue": "0x10010",
214        "Offcore": "1",
215        "PEBScounters": "0,1,2,3",
216        "SampleAfterValue": "100003",
217        "Speculative": "1",
218        "UMask": "0x1"
219    },
220    {
221        "BriefDescription": "Counts hardware prefetch data reads (which bring data to L2)  that DRAM supplied the request.",
222        "CollectPEBSRecord": "2",
223        "Counter": "0,1,2,3",
224        "EventCode": "0xB7, 0xBB",
225        "EventName": "OCR.HWPF_L2_DATA_RD.DRAM",
226        "MSRIndex": "0x1a6,0x1a7",
227        "MSRValue": "0x184000010",
228        "Offcore": "1",
229        "PEBScounters": "0,1,2,3",
230        "SampleAfterValue": "100003",
231        "Speculative": "1",
232        "UMask": "0x1"
233    },
234    {
235        "BriefDescription": "Counts hardware prefetch data reads (which bring data to L2)  that DRAM supplied the request.",
236        "CollectPEBSRecord": "2",
237        "Counter": "0,1,2,3",
238        "EventCode": "0xB7, 0xBB",
239        "EventName": "OCR.HWPF_L2_DATA_RD.LOCAL_DRAM",
240        "MSRIndex": "0x1a6,0x1a7",
241        "MSRValue": "0x184000010",
242        "Offcore": "1",
243        "PEBScounters": "0,1,2,3",
244        "SampleAfterValue": "100003",
245        "Speculative": "1",
246        "UMask": "0x1"
247    },
248    {
249        "BriefDescription": "Counts hardware prefetch RFOs (which bring data to L2) that have any type of response.",
250        "CollectPEBSRecord": "2",
251        "Counter": "0,1,2,3",
252        "EventCode": "0xB7, 0xBB",
253        "EventName": "OCR.HWPF_L2_RFO.ANY_RESPONSE",
254        "MSRIndex": "0x1a6,0x1a7",
255        "MSRValue": "0x10020",
256        "Offcore": "1",
257        "PEBScounters": "0,1,2,3",
258        "SampleAfterValue": "100003",
259        "Speculative": "1",
260        "UMask": "0x1"
261    },
262    {
263        "BriefDescription": "Counts hardware prefetch RFOs (which bring data to L2) that DRAM supplied the request.",
264        "CollectPEBSRecord": "2",
265        "Counter": "0,1,2,3",
266        "EventCode": "0xB7, 0xBB",
267        "EventName": "OCR.HWPF_L2_RFO.DRAM",
268        "MSRIndex": "0x1a6,0x1a7",
269        "MSRValue": "0x184000020",
270        "Offcore": "1",
271        "PEBScounters": "0,1,2,3",
272        "SampleAfterValue": "100003",
273        "Speculative": "1",
274        "UMask": "0x1"
275    },
276    {
277        "BriefDescription": "Counts hardware prefetch RFOs (which bring data to L2) that DRAM supplied the request.",
278        "CollectPEBSRecord": "2",
279        "Counter": "0,1,2,3",
280        "EventCode": "0xB7, 0xBB",
281        "EventName": "OCR.HWPF_L2_RFO.LOCAL_DRAM",
282        "MSRIndex": "0x1a6,0x1a7",
283        "MSRValue": "0x184000020",
284        "Offcore": "1",
285        "PEBScounters": "0,1,2,3",
286        "SampleAfterValue": "100003",
287        "Speculative": "1",
288        "UMask": "0x1"
289    },
290    {
291        "BriefDescription": "Counts miscellaneous requests, such as I/O and un-cacheable accesses that have any type of response.",
292        "CollectPEBSRecord": "2",
293        "Counter": "0,1,2,3",
294        "EventCode": "0xB7, 0xBB",
295        "EventName": "OCR.OTHER.ANY_RESPONSE",
296        "MSRIndex": "0x1a6,0x1a7",
297        "MSRValue": "0x18000",
298        "Offcore": "1",
299        "PEBScounters": "0,1,2,3",
300        "SampleAfterValue": "100003",
301        "Speculative": "1",
302        "UMask": "0x1"
303    },
304    {
305        "BriefDescription": "Counts miscellaneous requests, such as I/O and un-cacheable accesses that DRAM supplied the request.",
306        "CollectPEBSRecord": "2",
307        "Counter": "0,1,2,3",
308        "EventCode": "0xB7, 0xBB",
309        "EventName": "OCR.OTHER.DRAM",
310        "MSRIndex": "0x1a6,0x1a7",
311        "MSRValue": "0x184008000",
312        "Offcore": "1",
313        "PEBScounters": "0,1,2,3",
314        "SampleAfterValue": "100003",
315        "Speculative": "1",
316        "UMask": "0x1"
317    },
318    {
319        "BriefDescription": "Counts miscellaneous requests, such as I/O and un-cacheable accesses that DRAM supplied the request.",
320        "CollectPEBSRecord": "2",
321        "Counter": "0,1,2,3",
322        "EventCode": "0xB7, 0xBB",
323        "EventName": "OCR.OTHER.LOCAL_DRAM",
324        "MSRIndex": "0x1a6,0x1a7",
325        "MSRValue": "0x184008000",
326        "Offcore": "1",
327        "PEBScounters": "0,1,2,3",
328        "SampleAfterValue": "100003",
329        "Speculative": "1",
330        "UMask": "0x1"
331    },
332    {
333        "BriefDescription": "Counts streaming stores that have any type of response.",
334        "CollectPEBSRecord": "2",
335        "Counter": "0,1,2,3",
336        "EventCode": "0xB7, 0xBB",
337        "EventName": "OCR.STREAMING_WR.ANY_RESPONSE",
338        "MSRIndex": "0x1a6,0x1a7",
339        "MSRValue": "0x10800",
340        "Offcore": "1",
341        "PEBScounters": "0,1,2,3",
342        "SampleAfterValue": "100003",
343        "Speculative": "1",
344        "UMask": "0x1"
345    },
346    {
347        "BriefDescription": "Counts streaming stores that DRAM supplied the request.",
348        "CollectPEBSRecord": "2",
349        "Counter": "0,1,2,3",
350        "EventCode": "0xB7, 0xBB",
351        "EventName": "OCR.STREAMING_WR.DRAM",
352        "MSRIndex": "0x1a6,0x1a7",
353        "MSRValue": "0x184000800",
354        "Offcore": "1",
355        "PEBScounters": "0,1,2,3",
356        "SampleAfterValue": "100003",
357        "Speculative": "1",
358        "UMask": "0x1"
359    },
360    {
361        "BriefDescription": "Counts streaming stores that DRAM supplied the request.",
362        "CollectPEBSRecord": "2",
363        "Counter": "0,1,2,3",
364        "EventCode": "0xB7, 0xBB",
365        "EventName": "OCR.STREAMING_WR.LOCAL_DRAM",
366        "MSRIndex": "0x1a6,0x1a7",
367        "MSRValue": "0x184000800",
368        "Offcore": "1",
369        "PEBScounters": "0,1,2,3",
370        "SampleAfterValue": "100003",
371        "Speculative": "1",
372        "UMask": "0x1"
373    }
374]
375