1[
2    {
3        "BriefDescription": "Total pipeline cost of branch related instructions (used for program control-flow including function calls)",
4        "MetricExpr": "100 * (( BR_INST_RETIRED.COND + 3 * BR_INST_RETIRED.NEAR_CALL + (BR_INST_RETIRED.NEAR_TAKEN - BR_INST_RETIRED.COND_TAKEN - 2 * BR_INST_RETIRED.NEAR_CALL) ) / TOPDOWN.SLOTS)",
5        "MetricGroup": "Ret",
6        "MetricName": "Branching_Overhead"
7    },
8    {
9        "BriefDescription": "Total pipeline cost of instruction fetch related bottlenecks by large code footprint programs (i-side cache; TLB and BTB misses)",
10        "MetricExpr": "100 * (( 5 * IDQ_UOPS_NOT_DELIVERED.CYCLES_0_UOPS_DELIV.CORE - INT_MISC.UOP_DROPPING ) / TOPDOWN.SLOTS) * ( (ICACHE_64B.IFTAG_STALL / CPU_CLK_UNHALTED.THREAD) + (ICACHE_16B.IFDATA_STALL / CPU_CLK_UNHALTED.THREAD) + (10 * BACLEARS.ANY / CPU_CLK_UNHALTED.THREAD) ) / #(( 5 * IDQ_UOPS_NOT_DELIVERED.CYCLES_0_UOPS_DELIV.CORE - INT_MISC.UOP_DROPPING ) / TOPDOWN.SLOTS)",
11        "MetricGroup": "BigFoot;Fed;Frontend;IcMiss;MemoryTLB",
12        "MetricName": "Big_Code"
13    },
14    {
15        "BriefDescription": "Instructions Per Cycle (per Logical Processor)",
16        "MetricExpr": "INST_RETIRED.ANY / CPU_CLK_UNHALTED.THREAD",
17        "MetricGroup": "Ret;Summary",
18        "MetricName": "IPC"
19    },
20    {
21        "BriefDescription": "Cycles Per Instruction (per Logical Processor)",
22        "MetricExpr": "1 / (INST_RETIRED.ANY / CPU_CLK_UNHALTED.THREAD)",
23        "MetricGroup": "Pipeline;Mem",
24        "MetricName": "CPI"
25    },
26    {
27        "BriefDescription": "Per-Logical Processor actual clocks when the Logical Processor is active.",
28        "MetricExpr": "CPU_CLK_UNHALTED.THREAD",
29        "MetricGroup": "Pipeline",
30        "MetricName": "CLKS"
31    },
32    {
33        "BriefDescription": "Total issue-pipeline slots (per-Physical Core till ICL; per-Logical Processor ICL onward)",
34        "MetricExpr": "TOPDOWN.SLOTS",
35        "MetricGroup": "TmaL1",
36        "MetricName": "SLOTS"
37    },
38    {
39        "BriefDescription": "Fraction of Physical Core issue-slots utilized by this Logical Processor",
40        "MetricExpr": "TOPDOWN.SLOTS / ( TOPDOWN.SLOTS / 2 ) if #SMT_on else 1",
41        "MetricGroup": "SMT;TmaL1",
42        "MetricName": "Slots_Utilization"
43    },
44    {
45        "BriefDescription": "The ratio of Executed- by Issued-Uops",
46        "MetricExpr": "UOPS_EXECUTED.THREAD / UOPS_ISSUED.ANY",
47        "MetricGroup": "Cor;Pipeline",
48        "MetricName": "Execute_per_Issue",
49        "PublicDescription": "The ratio of Executed- by Issued-Uops. Ratio > 1 suggests high rate of uop micro-fusions. Ratio < 1 suggest high rate of \"execute\" at rename stage."
50    },
51    {
52        "BriefDescription": "Instructions Per Cycle across hyper-threads (per physical core)",
53        "MetricExpr": "INST_RETIRED.ANY / CPU_CLK_UNHALTED.DISTRIBUTED",
54        "MetricGroup": "Ret;SMT;TmaL1",
55        "MetricName": "CoreIPC"
56    },
57    {
58        "BriefDescription": "Floating Point Operations Per Cycle",
59        "MetricExpr": "( 1 * ( FP_ARITH_INST_RETIRED.SCALAR_SINGLE + FP_ARITH_INST_RETIRED.SCALAR_DOUBLE ) + 2 * FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE + 4 * ( FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE ) + 8 * ( FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.512B_PACKED_DOUBLE ) + 16 * FP_ARITH_INST_RETIRED.512B_PACKED_SINGLE ) / CPU_CLK_UNHALTED.DISTRIBUTED",
60        "MetricGroup": "Ret;Flops",
61        "MetricName": "FLOPc"
62    },
63    {
64        "BriefDescription": "Actual per-core usage of the Floating Point non-X87 execution units (regardless of precision or vector-width)",
65        "MetricExpr": "( (FP_ARITH_INST_RETIRED.SCALAR_SINGLE + FP_ARITH_INST_RETIRED.SCALAR_DOUBLE) + (FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE + FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE + FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.512B_PACKED_DOUBLE + FP_ARITH_INST_RETIRED.512B_PACKED_SINGLE) ) / ( 2 * CPU_CLK_UNHALTED.DISTRIBUTED )",
66        "MetricGroup": "Cor;Flops;HPC",
67        "MetricName": "FP_Arith_Utilization",
68        "PublicDescription": "Actual per-core usage of the Floating Point non-X87 execution units (regardless of precision or vector-width). Values > 1 are possible due to ([BDW+] Fused-Multiply Add (FMA) counting - common; [ADL+] use all of ADD/MUL/FMA in Scalar or 128/256-bit vectors - less common)."
69    },
70    {
71        "BriefDescription": "Instruction-Level-Parallelism (average number of uops executed when there is execution) per-core",
72        "MetricExpr": "UOPS_EXECUTED.THREAD / (( UOPS_EXECUTED.CORE_CYCLES_GE_1 / 2 ) if #SMT_on else UOPS_EXECUTED.CORE_CYCLES_GE_1)",
73        "MetricGroup": "Backend;Cor;Pipeline;PortsUtil",
74        "MetricName": "ILP"
75    },
76    {
77        "BriefDescription": "Core actual clocks when any Logical Processor is active on the Physical Core",
78        "MetricExpr": "CPU_CLK_UNHALTED.DISTRIBUTED",
79        "MetricGroup": "SMT",
80        "MetricName": "CORE_CLKS"
81    },
82    {
83        "BriefDescription": "Instructions per Load (lower number means higher occurrence rate)",
84        "MetricExpr": "INST_RETIRED.ANY / MEM_INST_RETIRED.ALL_LOADS",
85        "MetricGroup": "InsType",
86        "MetricName": "IpLoad"
87    },
88    {
89        "BriefDescription": "Instructions per Store (lower number means higher occurrence rate)",
90        "MetricExpr": "INST_RETIRED.ANY / MEM_INST_RETIRED.ALL_STORES",
91        "MetricGroup": "InsType",
92        "MetricName": "IpStore"
93    },
94    {
95        "BriefDescription": "Instructions per Branch (lower number means higher occurrence rate)",
96        "MetricExpr": "INST_RETIRED.ANY / BR_INST_RETIRED.ALL_BRANCHES",
97        "MetricGroup": "Branches;Fed;InsType",
98        "MetricName": "IpBranch"
99    },
100    {
101        "BriefDescription": "Instructions per (near) call (lower number means higher occurrence rate)",
102        "MetricExpr": "INST_RETIRED.ANY / BR_INST_RETIRED.NEAR_CALL",
103        "MetricGroup": "Branches;Fed;PGO",
104        "MetricName": "IpCall"
105    },
106    {
107        "BriefDescription": "Instruction per taken branch",
108        "MetricExpr": "INST_RETIRED.ANY / BR_INST_RETIRED.NEAR_TAKEN",
109        "MetricGroup": "Branches;Fed;FetchBW;Frontend;PGO",
110        "MetricName": "IpTB"
111    },
112    {
113        "BriefDescription": "Branch instructions per taken branch. ",
114        "MetricExpr": "BR_INST_RETIRED.ALL_BRANCHES / BR_INST_RETIRED.NEAR_TAKEN",
115        "MetricGroup": "Branches;Fed;PGO",
116        "MetricName": "BpTkBranch"
117    },
118    {
119        "BriefDescription": "Instructions per Floating Point (FP) Operation (lower number means higher occurrence rate)",
120        "MetricExpr": "INST_RETIRED.ANY / ( 1 * ( FP_ARITH_INST_RETIRED.SCALAR_SINGLE + FP_ARITH_INST_RETIRED.SCALAR_DOUBLE ) + 2 * FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE + 4 * ( FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE ) + 8 * ( FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.512B_PACKED_DOUBLE ) + 16 * FP_ARITH_INST_RETIRED.512B_PACKED_SINGLE )",
121        "MetricGroup": "Flops;InsType",
122        "MetricName": "IpFLOP"
123    },
124    {
125        "BriefDescription": "Instructions per FP Arithmetic instruction (lower number means higher occurrence rate)",
126        "MetricExpr": "INST_RETIRED.ANY / ( (FP_ARITH_INST_RETIRED.SCALAR_SINGLE + FP_ARITH_INST_RETIRED.SCALAR_DOUBLE) + (FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE + FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE + FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.512B_PACKED_DOUBLE + FP_ARITH_INST_RETIRED.512B_PACKED_SINGLE) )",
127        "MetricGroup": "Flops;InsType",
128        "MetricName": "IpArith",
129        "PublicDescription": "Instructions per FP Arithmetic instruction (lower number means higher occurrence rate). May undercount due to FMA double counting. Approximated prior to BDW."
130    },
131    {
132        "BriefDescription": "Instructions per FP Arithmetic Scalar Single-Precision instruction (lower number means higher occurrence rate)",
133        "MetricExpr": "INST_RETIRED.ANY / FP_ARITH_INST_RETIRED.SCALAR_SINGLE",
134        "MetricGroup": "Flops;FpScalar;InsType",
135        "MetricName": "IpArith_Scalar_SP",
136        "PublicDescription": "Instructions per FP Arithmetic Scalar Single-Precision instruction (lower number means higher occurrence rate). May undercount due to FMA double counting."
137    },
138    {
139        "BriefDescription": "Instructions per FP Arithmetic Scalar Double-Precision instruction (lower number means higher occurrence rate)",
140        "MetricExpr": "INST_RETIRED.ANY / FP_ARITH_INST_RETIRED.SCALAR_DOUBLE",
141        "MetricGroup": "Flops;FpScalar;InsType",
142        "MetricName": "IpArith_Scalar_DP",
143        "PublicDescription": "Instructions per FP Arithmetic Scalar Double-Precision instruction (lower number means higher occurrence rate). May undercount due to FMA double counting."
144    },
145    {
146        "BriefDescription": "Instructions per FP Arithmetic AVX/SSE 128-bit instruction (lower number means higher occurrence rate)",
147        "MetricExpr": "INST_RETIRED.ANY / ( FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE + FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE )",
148        "MetricGroup": "Flops;FpVector;InsType",
149        "MetricName": "IpArith_AVX128",
150        "PublicDescription": "Instructions per FP Arithmetic AVX/SSE 128-bit instruction (lower number means higher occurrence rate). May undercount due to FMA double counting."
151    },
152    {
153        "BriefDescription": "Instructions per FP Arithmetic AVX* 256-bit instruction (lower number means higher occurrence rate)",
154        "MetricExpr": "INST_RETIRED.ANY / ( FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE + FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE )",
155        "MetricGroup": "Flops;FpVector;InsType",
156        "MetricName": "IpArith_AVX256",
157        "PublicDescription": "Instructions per FP Arithmetic AVX* 256-bit instruction (lower number means higher occurrence rate). May undercount due to FMA double counting."
158    },
159    {
160        "BriefDescription": "Instructions per FP Arithmetic AVX 512-bit instruction (lower number means higher occurrence rate)",
161        "MetricExpr": "INST_RETIRED.ANY / ( FP_ARITH_INST_RETIRED.512B_PACKED_DOUBLE + FP_ARITH_INST_RETIRED.512B_PACKED_SINGLE )",
162        "MetricGroup": "Flops;FpVector;InsType",
163        "MetricName": "IpArith_AVX512",
164        "PublicDescription": "Instructions per FP Arithmetic AVX 512-bit instruction (lower number means higher occurrence rate). May undercount due to FMA double counting."
165    },
166    {
167        "BriefDescription": "Instructions per Software prefetch instruction (of any type: NTA/T0/T1/T2/Prefetch) (lower number means higher occurrence rate)",
168        "MetricExpr": "INST_RETIRED.ANY / cpu@SW_PREFETCH_ACCESS.T0\\,umask\\=0xF@",
169        "MetricGroup": "Prefetches",
170        "MetricName": "IpSWPF"
171    },
172    {
173        "BriefDescription": "Total number of retired Instructions, Sample with: INST_RETIRED.PREC_DIST",
174        "MetricExpr": "INST_RETIRED.ANY",
175        "MetricGroup": "Summary;TmaL1",
176        "MetricName": "Instructions"
177    },
178    {
179        "BriefDescription": "",
180        "MetricExpr": "UOPS_EXECUTED.THREAD / cpu@UOPS_EXECUTED.THREAD\\,cmask\\=1@",
181        "MetricGroup": "Cor;Pipeline;PortsUtil;SMT",
182        "MetricName": "Execute"
183    },
184    {
185        "BriefDescription": "Average number of Uops issued by front-end when it issued something",
186        "MetricExpr": "UOPS_ISSUED.ANY / cpu@UOPS_ISSUED.ANY\\,cmask\\=1@",
187        "MetricGroup": "Fed;FetchBW",
188        "MetricName": "Fetch_UpC"
189    },
190    {
191        "BriefDescription": "Fraction of Uops delivered by the LSD (Loop Stream Detector; aka Loop Cache)",
192        "MetricExpr": "LSD.UOPS / (IDQ.DSB_UOPS + LSD.UOPS + IDQ.MITE_UOPS + IDQ.MS_UOPS)",
193        "MetricGroup": "Fed;LSD",
194        "MetricName": "LSD_Coverage"
195    },
196    {
197        "BriefDescription": "Fraction of Uops delivered by the DSB (aka Decoded ICache; or Uop Cache)",
198        "MetricExpr": "IDQ.DSB_UOPS / (IDQ.DSB_UOPS + LSD.UOPS + IDQ.MITE_UOPS + IDQ.MS_UOPS)",
199        "MetricGroup": "DSB;Fed;FetchBW",
200        "MetricName": "DSB_Coverage"
201    },
202    {
203        "BriefDescription": "Average number of cycles of a switch from the DSB fetch-unit to MITE fetch unit - see DSB_Switches tree node for details.",
204        "MetricExpr": "DSB2MITE_SWITCHES.PENALTY_CYCLES / cpu@DSB2MITE_SWITCHES.PENALTY_CYCLES\\,cmask\\=1\\,edge@",
205        "MetricGroup": "DSBmiss",
206        "MetricName": "DSB_Switch_Cost"
207    },
208    {
209        "BriefDescription": "Number of Instructions per non-speculative DSB miss (lower number means higher occurrence rate)",
210        "MetricExpr": "INST_RETIRED.ANY / FRONTEND_RETIRED.ANY_DSB_MISS",
211        "MetricGroup": "DSBmiss;Fed",
212        "MetricName": "IpDSB_Miss_Ret"
213    },
214    {
215        "BriefDescription": "Number of Instructions per non-speculative Branch Misprediction (JEClear) (lower number means higher occurrence rate)",
216        "MetricExpr": "INST_RETIRED.ANY / BR_MISP_RETIRED.ALL_BRANCHES",
217        "MetricGroup": "Bad;BadSpec;BrMispredicts",
218        "MetricName": "IpMispredict"
219    },
220    {
221        "BriefDescription": "Fraction of branches that are non-taken conditionals",
222        "MetricExpr": "BR_INST_RETIRED.COND_NTAKEN / BR_INST_RETIRED.ALL_BRANCHES",
223        "MetricGroup": "Bad;Branches;CodeGen;PGO",
224        "MetricName": "Cond_NT"
225    },
226    {
227        "BriefDescription": "Fraction of branches that are taken conditionals",
228        "MetricExpr": "BR_INST_RETIRED.COND_TAKEN / BR_INST_RETIRED.ALL_BRANCHES",
229        "MetricGroup": "Bad;Branches;CodeGen;PGO",
230        "MetricName": "Cond_TK"
231    },
232    {
233        "BriefDescription": "Fraction of branches that are CALL or RET",
234        "MetricExpr": "( BR_INST_RETIRED.NEAR_CALL + BR_INST_RETIRED.NEAR_RETURN ) / BR_INST_RETIRED.ALL_BRANCHES",
235        "MetricGroup": "Bad;Branches",
236        "MetricName": "CallRet"
237    },
238    {
239        "BriefDescription": "Fraction of branches that are unconditional (direct or indirect) jumps",
240        "MetricExpr": "(BR_INST_RETIRED.NEAR_TAKEN - BR_INST_RETIRED.COND_TAKEN - 2 * BR_INST_RETIRED.NEAR_CALL) / BR_INST_RETIRED.ALL_BRANCHES",
241        "MetricGroup": "Bad;Branches",
242        "MetricName": "Jump"
243    },
244    {
245        "BriefDescription": "Fraction of branches of other types (not individually covered by other metrics in Info.Branches group)",
246        "MetricExpr": "1 - ( (BR_INST_RETIRED.COND_NTAKEN / BR_INST_RETIRED.ALL_BRANCHES) + (BR_INST_RETIRED.COND_TAKEN / BR_INST_RETIRED.ALL_BRANCHES) + (( BR_INST_RETIRED.NEAR_CALL + BR_INST_RETIRED.NEAR_RETURN ) / BR_INST_RETIRED.ALL_BRANCHES) + ((BR_INST_RETIRED.NEAR_TAKEN - BR_INST_RETIRED.COND_TAKEN - 2 * BR_INST_RETIRED.NEAR_CALL) / BR_INST_RETIRED.ALL_BRANCHES) )",
247        "MetricGroup": "Bad;Branches",
248        "MetricName": "Other_Branches"
249    },
250    {
251        "BriefDescription": "Actual Average Latency for L1 data-cache miss demand load operations (in core cycles)",
252        "MetricExpr": "L1D_PEND_MISS.PENDING / ( MEM_LOAD_RETIRED.L1_MISS + MEM_LOAD_RETIRED.FB_HIT )",
253        "MetricGroup": "Mem;MemoryBound;MemoryLat",
254        "MetricName": "Load_Miss_Real_Latency"
255    },
256    {
257        "BriefDescription": "Memory-Level-Parallelism (average number of L1 miss demand load when there is at least one such miss. Per-Logical Processor)",
258        "MetricExpr": "L1D_PEND_MISS.PENDING / L1D_PEND_MISS.PENDING_CYCLES",
259        "MetricGroup": "Mem;MemoryBound;MemoryBW",
260        "MetricName": "MLP"
261    },
262    {
263        "BriefDescription": "L1 cache true misses per kilo instruction for retired demand loads",
264        "MetricExpr": "1000 * MEM_LOAD_RETIRED.L1_MISS / INST_RETIRED.ANY",
265        "MetricGroup": "Mem;CacheMisses",
266        "MetricName": "L1MPKI"
267    },
268    {
269        "BriefDescription": "L1 cache true misses per kilo instruction for all demand loads (including speculative)",
270        "MetricExpr": "1000 * L2_RQSTS.ALL_DEMAND_DATA_RD / INST_RETIRED.ANY",
271        "MetricGroup": "Mem;CacheMisses",
272        "MetricName": "L1MPKI_Load"
273    },
274    {
275        "BriefDescription": "L2 cache true misses per kilo instruction for retired demand loads",
276        "MetricExpr": "1000 * MEM_LOAD_RETIRED.L2_MISS / INST_RETIRED.ANY",
277        "MetricGroup": "Mem;Backend;CacheMisses",
278        "MetricName": "L2MPKI"
279    },
280    {
281        "BriefDescription": "L2 cache ([RKL+] true) misses per kilo instruction for all request types (including speculative)",
282        "MetricExpr": "1000 * ( ( OFFCORE_REQUESTS.ALL_DATA_RD - OFFCORE_REQUESTS.DEMAND_DATA_RD ) + L2_RQSTS.ALL_DEMAND_MISS + L2_RQSTS.SWPF_MISS ) / INST_RETIRED.ANY",
283        "MetricGroup": "Mem;CacheMisses;Offcore",
284        "MetricName": "L2MPKI_All"
285    },
286    {
287        "BriefDescription": "L2 cache ([RKL+] true) misses per kilo instruction for all demand loads  (including speculative)",
288        "MetricExpr": "1000 * L2_RQSTS.DEMAND_DATA_RD_MISS / INST_RETIRED.ANY",
289        "MetricGroup": "Mem;CacheMisses",
290        "MetricName": "L2MPKI_Load"
291    },
292    {
293        "BriefDescription": "L2 cache hits per kilo instruction for all demand loads  (including speculative)",
294        "MetricExpr": "1000 * L2_RQSTS.DEMAND_DATA_RD_HIT / INST_RETIRED.ANY",
295        "MetricGroup": "Mem;CacheMisses",
296        "MetricName": "L2HPKI_Load"
297    },
298    {
299        "BriefDescription": "L3 cache true misses per kilo instruction for retired demand loads",
300        "MetricExpr": "1000 * MEM_LOAD_RETIRED.L3_MISS / INST_RETIRED.ANY",
301        "MetricGroup": "Mem;CacheMisses",
302        "MetricName": "L3MPKI"
303    },
304    {
305        "BriefDescription": "Fill Buffer (FB) hits per kilo instructions for retired demand loads (L1D misses that merge into ongoing miss-handling entries)",
306        "MetricExpr": "1000 * MEM_LOAD_RETIRED.FB_HIT / INST_RETIRED.ANY",
307        "MetricGroup": "Mem;CacheMisses",
308        "MetricName": "FB_HPKI"
309    },
310    {
311        "BriefDescription": "Utilization of the core's Page Walker(s) serving STLB misses triggered by instruction/Load/Store accesses",
312        "MetricConstraint": "NO_NMI_WATCHDOG",
313        "MetricExpr": "( ITLB_MISSES.WALK_PENDING + DTLB_LOAD_MISSES.WALK_PENDING + DTLB_STORE_MISSES.WALK_PENDING ) / ( 2 * CPU_CLK_UNHALTED.DISTRIBUTED )",
314        "MetricGroup": "Mem;MemoryTLB",
315        "MetricName": "Page_Walks_Utilization"
316    },
317    {
318        "BriefDescription": "Average per-core data fill bandwidth to the L1 data cache [GB / sec]",
319        "MetricExpr": "64 * L1D.REPLACEMENT / 1000000000 / duration_time",
320        "MetricGroup": "Mem;MemoryBW",
321        "MetricName": "L1D_Cache_Fill_BW"
322    },
323    {
324        "BriefDescription": "Average per-core data fill bandwidth to the L2 cache [GB / sec]",
325        "MetricExpr": "64 * L2_LINES_IN.ALL / 1000000000 / duration_time",
326        "MetricGroup": "Mem;MemoryBW",
327        "MetricName": "L2_Cache_Fill_BW"
328    },
329    {
330        "BriefDescription": "Average per-core data fill bandwidth to the L3 cache [GB / sec]",
331        "MetricExpr": "64 * LONGEST_LAT_CACHE.MISS / 1000000000 / duration_time",
332        "MetricGroup": "Mem;MemoryBW",
333        "MetricName": "L3_Cache_Fill_BW"
334    },
335    {
336        "BriefDescription": "Average per-core data access bandwidth to the L3 cache [GB / sec]",
337        "MetricExpr": "64 * OFFCORE_REQUESTS.ALL_REQUESTS / 1000000000 / duration_time",
338        "MetricGroup": "Mem;MemoryBW;Offcore",
339        "MetricName": "L3_Cache_Access_BW"
340    },
341    {
342        "BriefDescription": "Average per-thread data fill bandwidth to the L1 data cache [GB / sec]",
343        "MetricExpr": "(64 * L1D.REPLACEMENT / 1000000000 / duration_time)",
344        "MetricGroup": "Mem;MemoryBW",
345        "MetricName": "L1D_Cache_Fill_BW_1T"
346    },
347    {
348        "BriefDescription": "Average per-thread data fill bandwidth to the L2 cache [GB / sec]",
349        "MetricExpr": "(64 * L2_LINES_IN.ALL / 1000000000 / duration_time)",
350        "MetricGroup": "Mem;MemoryBW",
351        "MetricName": "L2_Cache_Fill_BW_1T"
352    },
353    {
354        "BriefDescription": "Average per-thread data fill bandwidth to the L3 cache [GB / sec]",
355        "MetricExpr": "(64 * LONGEST_LAT_CACHE.MISS / 1000000000 / duration_time)",
356        "MetricGroup": "Mem;MemoryBW",
357        "MetricName": "L3_Cache_Fill_BW_1T"
358    },
359    {
360        "BriefDescription": "Average per-thread data access bandwidth to the L3 cache [GB / sec]",
361        "MetricExpr": "(64 * OFFCORE_REQUESTS.ALL_REQUESTS / 1000000000 / duration_time)",
362        "MetricGroup": "Mem;MemoryBW;Offcore",
363        "MetricName": "L3_Cache_Access_BW_1T"
364    },
365    {
366        "BriefDescription": "Average CPU Utilization",
367        "MetricExpr": "CPU_CLK_UNHALTED.REF_TSC / msr@tsc@",
368        "MetricGroup": "HPC;Summary",
369        "MetricName": "CPU_Utilization"
370    },
371    {
372        "BriefDescription": "Measured Average Frequency for unhalted processors [GHz]",
373        "MetricExpr": "(CPU_CLK_UNHALTED.THREAD / CPU_CLK_UNHALTED.REF_TSC) * msr@tsc@ / 1000000000 / duration_time",
374        "MetricGroup": "Summary;Power",
375        "MetricName": "Average_Frequency"
376    },
377    {
378        "BriefDescription": "Giga Floating Point Operations Per Second",
379        "MetricExpr": "( ( 1 * ( FP_ARITH_INST_RETIRED.SCALAR_SINGLE + FP_ARITH_INST_RETIRED.SCALAR_DOUBLE ) + 2 * FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE + 4 * ( FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE ) + 8 * ( FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.512B_PACKED_DOUBLE ) + 16 * FP_ARITH_INST_RETIRED.512B_PACKED_SINGLE ) / 1000000000 ) / duration_time",
380        "MetricGroup": "Cor;Flops;HPC",
381        "MetricName": "GFLOPs",
382        "PublicDescription": "Giga Floating Point Operations Per Second. Aggregate across all supported options of: FP precisions, scalar and vector instructions, vector-width and AMX engine."
383    },
384    {
385        "BriefDescription": "Average Frequency Utilization relative nominal frequency",
386        "MetricExpr": "CPU_CLK_UNHALTED.THREAD / CPU_CLK_UNHALTED.REF_TSC",
387        "MetricGroup": "Power",
388        "MetricName": "Turbo_Utilization"
389    },
390    {
391        "BriefDescription": "Fraction of Core cycles where the core was running with power-delivery for baseline license level 0",
392        "MetricExpr": "CORE_POWER.LVL0_TURBO_LICENSE / CPU_CLK_UNHALTED.DISTRIBUTED",
393        "MetricGroup": "Power",
394        "MetricName": "Power_License0_Utilization",
395        "PublicDescription": "Fraction of Core cycles where the core was running with power-delivery for baseline license level 0.  This includes non-AVX codes, SSE, AVX 128-bit, and low-current AVX 256-bit codes."
396    },
397    {
398        "BriefDescription": "Fraction of Core cycles where the core was running with power-delivery for license level 1",
399        "MetricExpr": "CORE_POWER.LVL1_TURBO_LICENSE / CPU_CLK_UNHALTED.DISTRIBUTED",
400        "MetricGroup": "Power",
401        "MetricName": "Power_License1_Utilization",
402        "PublicDescription": "Fraction of Core cycles where the core was running with power-delivery for license level 1.  This includes high current AVX 256-bit instructions as well as low current AVX 512-bit instructions."
403    },
404    {
405        "BriefDescription": "Fraction of Core cycles where the core was running with power-delivery for license level 2 (introduced in SKX)",
406        "MetricExpr": "CORE_POWER.LVL2_TURBO_LICENSE / CPU_CLK_UNHALTED.DISTRIBUTED",
407        "MetricGroup": "Power",
408        "MetricName": "Power_License2_Utilization",
409        "PublicDescription": "Fraction of Core cycles where the core was running with power-delivery for license level 2 (introduced in SKX).  This includes high current AVX 512-bit instructions."
410    },
411    {
412        "BriefDescription": "Fraction of cycles where both hardware Logical Processors were active",
413        "MetricExpr": "1 - CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_DISTRIBUTED if #SMT_on else 0",
414        "MetricGroup": "SMT",
415        "MetricName": "SMT_2T_Utilization"
416    },
417    {
418        "BriefDescription": "Fraction of cycles spent in the Operating System (OS) Kernel mode",
419        "MetricExpr": "CPU_CLK_UNHALTED.THREAD_P:k / CPU_CLK_UNHALTED.THREAD",
420        "MetricGroup": "OS",
421        "MetricName": "Kernel_Utilization"
422    },
423    {
424        "BriefDescription": "Cycles Per Instruction for the Operating System (OS) Kernel mode",
425        "MetricExpr": "CPU_CLK_UNHALTED.THREAD_P:k / INST_RETIRED.ANY_P:k",
426        "MetricGroup": "OS",
427        "MetricName": "Kernel_CPI"
428    },
429    {
430        "BriefDescription": "Average external Memory Bandwidth Use for reads and writes [GB / sec]",
431        "MetricExpr": "64 * ( arb@event\\=0x81\\,umask\\=0x1@ + arb@event\\=0x84\\,umask\\=0x1@ ) / 1000000 / duration_time / 1000",
432        "MetricGroup": "HPC;Mem;MemoryBW;SoC",
433        "MetricName": "DRAM_BW_Use"
434    },
435    {
436        "BriefDescription": "Instructions per Far Branch ( Far Branches apply upon transition from application to operating system, handling interrupts, exceptions) [lower number means higher occurrence rate]",
437        "MetricExpr": "INST_RETIRED.ANY / BR_INST_RETIRED.FAR_BRANCH:u",
438        "MetricGroup": "Branches;OS",
439        "MetricName": "IpFarBranch"
440    },
441    {
442        "BriefDescription": "C6 residency percent per core",
443        "MetricExpr": "(cstate_core@c6\\-residency@ / msr@tsc@) * 100",
444        "MetricGroup": "Power",
445        "MetricName": "C6_Core_Residency"
446    },
447    {
448        "BriefDescription": "C7 residency percent per core",
449        "MetricExpr": "(cstate_core@c7\\-residency@ / msr@tsc@) * 100",
450        "MetricGroup": "Power",
451        "MetricName": "C7_Core_Residency"
452    },
453    {
454        "BriefDescription": "C2 residency percent per package",
455        "MetricExpr": "(cstate_pkg@c2\\-residency@ / msr@tsc@) * 100",
456        "MetricGroup": "Power",
457        "MetricName": "C2_Pkg_Residency"
458    },
459    {
460        "BriefDescription": "C3 residency percent per package",
461        "MetricExpr": "(cstate_pkg@c3\\-residency@ / msr@tsc@) * 100",
462        "MetricGroup": "Power",
463        "MetricName": "C3_Pkg_Residency"
464    },
465    {
466        "BriefDescription": "C6 residency percent per package",
467        "MetricExpr": "(cstate_pkg@c6\\-residency@ / msr@tsc@) * 100",
468        "MetricGroup": "Power",
469        "MetricName": "C6_Pkg_Residency"
470    },
471    {
472        "BriefDescription": "C7 residency percent per package",
473        "MetricExpr": "(cstate_pkg@c7\\-residency@ / msr@tsc@) * 100",
474        "MetricGroup": "Power",
475        "MetricName": "C7_Pkg_Residency"
476    },
477    {
478        "BriefDescription": "C8 residency percent per package",
479        "MetricExpr": "(cstate_pkg@c8\\-residency@ / msr@tsc@) * 100",
480        "MetricGroup": "Power",
481        "MetricName": "C8_Pkg_Residency"
482    },
483    {
484        "BriefDescription": "C9 residency percent per package",
485        "MetricExpr": "(cstate_pkg@c9\\-residency@ / msr@tsc@) * 100",
486        "MetricGroup": "Power",
487        "MetricName": "C9_Pkg_Residency"
488    },
489    {
490        "BriefDescription": "C10 residency percent per package",
491        "MetricExpr": "(cstate_pkg@c10\\-residency@ / msr@tsc@) * 100",
492        "MetricGroup": "Power",
493        "MetricName": "C10_Pkg_Residency"
494    }
495]
496