1ede00740SAndi Kleen[ 2ede00740SAndi Kleen { 3032c16b2SAndi Kleen "BriefDescription": "Approximate counts of AVX & AVX2 256-bit instructions, including non-arithmetic instructions, loads, and stores. May count non-AVX instructions that employ 256-bit operations, including (but not necessarily limited to) rep string instructions that use 256-bit loads and stores for optimized performance, XSAVE* and XRSTOR*, and operations that transition the x87 FPU data registers between x87 and MMX.", 4*f16c3236SIan Rogers "EventCode": "0xC6", 5032c16b2SAndi Kleen "EventName": "AVX_INSTS.ALL", 6032c16b2SAndi Kleen "PublicDescription": "Note that a whole rep string only counts AVX_INST.ALL once.", 7032c16b2SAndi Kleen "SampleAfterValue": "2000003", 8*f16c3236SIan Rogers "UMask": "0x7" 9032c16b2SAndi Kleen }, 10032c16b2SAndi Kleen { 11*f16c3236SIan Rogers "BriefDescription": "Cycles with any input/output SSE or FP assist", 12*f16c3236SIan Rogers "CounterMask": "1", 13*f16c3236SIan Rogers "EventCode": "0xCA", 14*f16c3236SIan Rogers "EventName": "FP_ASSIST.ANY", 15*f16c3236SIan Rogers "PublicDescription": "Cycles with any input/output SSE* or FP assists.", 16ede00740SAndi Kleen "SampleAfterValue": "100003", 17*f16c3236SIan Rogers "UMask": "0x1e" 18ede00740SAndi Kleen }, 19ede00740SAndi Kleen { 20ede00740SAndi Kleen "BriefDescription": "Number of SIMD FP assists due to input values", 21*f16c3236SIan Rogers "EventCode": "0xCA", 22ede00740SAndi Kleen "EventName": "FP_ASSIST.SIMD_INPUT", 23ede00740SAndi Kleen "PublicDescription": "Number of SIMD FP assists due to input values.", 24ede00740SAndi Kleen "SampleAfterValue": "100003", 25*f16c3236SIan Rogers "UMask": "0x10" 26ede00740SAndi Kleen }, 27ede00740SAndi Kleen { 28*f16c3236SIan Rogers "BriefDescription": "Number of SIMD FP assists due to Output values", 29*f16c3236SIan Rogers "EventCode": "0xCA", 30*f16c3236SIan Rogers "EventName": "FP_ASSIST.SIMD_OUTPUT", 31*f16c3236SIan Rogers "PublicDescription": "Number of SIMD FP assists due to output values.", 32ede00740SAndi Kleen "SampleAfterValue": "100003", 33*f16c3236SIan Rogers "UMask": "0x8" 34*f16c3236SIan Rogers }, 35*f16c3236SIan Rogers { 36*f16c3236SIan Rogers "BriefDescription": "Number of X87 assists due to input value.", 37*f16c3236SIan Rogers "EventCode": "0xCA", 38*f16c3236SIan Rogers "EventName": "FP_ASSIST.X87_INPUT", 39*f16c3236SIan Rogers "PublicDescription": "Number of X87 FP assists due to input values.", 40*f16c3236SIan Rogers "SampleAfterValue": "100003", 41*f16c3236SIan Rogers "UMask": "0x4" 42*f16c3236SIan Rogers }, 43*f16c3236SIan Rogers { 44*f16c3236SIan Rogers "BriefDescription": "Number of X87 assists due to output value.", 45*f16c3236SIan Rogers "EventCode": "0xCA", 46*f16c3236SIan Rogers "EventName": "FP_ASSIST.X87_OUTPUT", 47*f16c3236SIan Rogers "PublicDescription": "Number of X87 FP assists due to output values.", 48*f16c3236SIan Rogers "SampleAfterValue": "100003", 49*f16c3236SIan Rogers "UMask": "0x2" 50*f16c3236SIan Rogers }, 51*f16c3236SIan Rogers { 52*f16c3236SIan Rogers "BriefDescription": "Number of SIMD Move Elimination candidate uops that were eliminated.", 53*f16c3236SIan Rogers "EventCode": "0x58", 54*f16c3236SIan Rogers "EventName": "MOVE_ELIMINATION.SIMD_ELIMINATED", 55*f16c3236SIan Rogers "PublicDescription": "Number of SIMD move elimination candidate uops that were eliminated.", 56*f16c3236SIan Rogers "SampleAfterValue": "1000003", 57*f16c3236SIan Rogers "UMask": "0x2" 58*f16c3236SIan Rogers }, 59*f16c3236SIan Rogers { 60*f16c3236SIan Rogers "BriefDescription": "Number of SIMD Move Elimination candidate uops that were not eliminated.", 61*f16c3236SIan Rogers "EventCode": "0x58", 62*f16c3236SIan Rogers "EventName": "MOVE_ELIMINATION.SIMD_NOT_ELIMINATED", 63*f16c3236SIan Rogers "PublicDescription": "Number of SIMD move elimination candidate uops that were not eliminated.", 64*f16c3236SIan Rogers "SampleAfterValue": "1000003", 65*f16c3236SIan Rogers "UMask": "0x8" 66*f16c3236SIan Rogers }, 67*f16c3236SIan Rogers { 68*f16c3236SIan Rogers "BriefDescription": "Number of transitions from AVX-256 to legacy SSE when penalty applicable.", 69*f16c3236SIan Rogers "Errata": "HSD56, HSM57", 70*f16c3236SIan Rogers "EventCode": "0xC1", 71*f16c3236SIan Rogers "EventName": "OTHER_ASSISTS.AVX_TO_SSE", 72*f16c3236SIan Rogers "SampleAfterValue": "100003", 73*f16c3236SIan Rogers "UMask": "0x8" 74*f16c3236SIan Rogers }, 75*f16c3236SIan Rogers { 76*f16c3236SIan Rogers "BriefDescription": "Number of transitions from SSE to AVX-256 when penalty applicable.", 77*f16c3236SIan Rogers "Errata": "HSD56, HSM57", 78*f16c3236SIan Rogers "EventCode": "0xC1", 79*f16c3236SIan Rogers "EventName": "OTHER_ASSISTS.SSE_TO_AVX", 80*f16c3236SIan Rogers "SampleAfterValue": "100003", 81*f16c3236SIan Rogers "UMask": "0x10" 82ede00740SAndi Kleen } 83ede00740SAndi Kleen] 84