1[ 2 { 3 "EventCode": "0xC1", 4 "Counter": "0,1,2,3", 5 "UMask": "0x8", 6 "Errata": "HSD56, HSM57", 7 "EventName": "OTHER_ASSISTS.AVX_TO_SSE", 8 "SampleAfterValue": "100003", 9 "BriefDescription": "Number of transitions from AVX-256 to legacy SSE when penalty applicable.", 10 "CounterHTOff": "0,1,2,3,4,5,6,7" 11 }, 12 { 13 "EventCode": "0xC1", 14 "Counter": "0,1,2,3", 15 "UMask": "0x10", 16 "Errata": "HSD56, HSM57", 17 "EventName": "OTHER_ASSISTS.SSE_TO_AVX", 18 "SampleAfterValue": "100003", 19 "BriefDescription": "Number of transitions from SSE to AVX-256 when penalty applicable.", 20 "CounterHTOff": "0,1,2,3,4,5,6,7" 21 }, 22 { 23 "PublicDescription": "Note that a whole rep string only counts AVX_INST.ALL once.", 24 "EventCode": "0xC6", 25 "Counter": "0,1,2,3", 26 "UMask": "0x7", 27 "EventName": "AVX_INSTS.ALL", 28 "SampleAfterValue": "2000003", 29 "BriefDescription": "Approximate counts of AVX & AVX2 256-bit instructions, including non-arithmetic instructions, loads, and stores. May count non-AVX instructions that employ 256-bit operations, including (but not necessarily limited to) rep string instructions that use 256-bit loads and stores for optimized performance, XSAVE* and XRSTOR*, and operations that transition the x87 FPU data registers between x87 and MMX.", 30 "CounterHTOff": "0,1,2,3,4,5,6,7" 31 }, 32 { 33 "PublicDescription": "Number of X87 FP assists due to output values.", 34 "EventCode": "0xCA", 35 "Counter": "0,1,2,3", 36 "UMask": "0x2", 37 "EventName": "FP_ASSIST.X87_OUTPUT", 38 "SampleAfterValue": "100003", 39 "BriefDescription": "Number of X87 assists due to output value.", 40 "CounterHTOff": "0,1,2,3,4,5,6,7" 41 }, 42 { 43 "PublicDescription": "Number of X87 FP assists due to input values.", 44 "EventCode": "0xCA", 45 "Counter": "0,1,2,3", 46 "UMask": "0x4", 47 "EventName": "FP_ASSIST.X87_INPUT", 48 "SampleAfterValue": "100003", 49 "BriefDescription": "Number of X87 assists due to input value.", 50 "CounterHTOff": "0,1,2,3,4,5,6,7" 51 }, 52 { 53 "PublicDescription": "Number of SIMD FP assists due to output values.", 54 "EventCode": "0xCA", 55 "Counter": "0,1,2,3", 56 "UMask": "0x8", 57 "EventName": "FP_ASSIST.SIMD_OUTPUT", 58 "SampleAfterValue": "100003", 59 "BriefDescription": "Number of SIMD FP assists due to Output values", 60 "CounterHTOff": "0,1,2,3,4,5,6,7" 61 }, 62 { 63 "PublicDescription": "Number of SIMD FP assists due to input values.", 64 "EventCode": "0xCA", 65 "Counter": "0,1,2,3", 66 "UMask": "0x10", 67 "EventName": "FP_ASSIST.SIMD_INPUT", 68 "SampleAfterValue": "100003", 69 "BriefDescription": "Number of SIMD FP assists due to input values", 70 "CounterHTOff": "0,1,2,3,4,5,6,7" 71 }, 72 { 73 "PublicDescription": "Cycles with any input/output SSE* or FP assists.", 74 "EventCode": "0xCA", 75 "Counter": "0,1,2,3", 76 "UMask": "0x1e", 77 "EventName": "FP_ASSIST.ANY", 78 "SampleAfterValue": "100003", 79 "BriefDescription": "Cycles with any input/output SSE or FP assist", 80 "CounterMask": "1", 81 "CounterHTOff": "0,1,2,3" 82 } 83]