1dcfbad10SAndi Kleen[ 2dcfbad10SAndi Kleen { 3*4dd25272SIan Rogers "BriefDescription": "Approximate counts of AVX & AVX2 256-bit instructions, including non-arithmetic instructions, loads, and stores. May count non-AVX instructions that employ 256-bit operations, including (but not necessarily limited to) rep string instructions that use 256-bit loads and stores for optimized performance, XSAVE* and XRSTOR*, and operations that transition the x87 FPU data registers between x87 and MMX.", 4*4dd25272SIan Rogers "EventCode": "0xC6", 5*4dd25272SIan Rogers "EventName": "AVX_INSTS.ALL", 6*4dd25272SIan Rogers "PublicDescription": "Note that a whole rep string only counts AVX_INST.ALL once.", 7*4dd25272SIan Rogers "SampleAfterValue": "2000003", 8*4dd25272SIan Rogers "UMask": "0x7" 9*4dd25272SIan Rogers }, 10*4dd25272SIan Rogers { 11*4dd25272SIan Rogers "BriefDescription": "Cycles with any input/output SSE or FP assist", 12*4dd25272SIan Rogers "CounterMask": "1", 13*4dd25272SIan Rogers "EventCode": "0xCA", 14*4dd25272SIan Rogers "EventName": "FP_ASSIST.ANY", 15*4dd25272SIan Rogers "PublicDescription": "Cycles with any input/output SSE* or FP assists.", 16*4dd25272SIan Rogers "SampleAfterValue": "100003", 17*4dd25272SIan Rogers "UMask": "0x1e" 18*4dd25272SIan Rogers }, 19*4dd25272SIan Rogers { 20*4dd25272SIan Rogers "BriefDescription": "Number of SIMD FP assists due to input values", 21*4dd25272SIan Rogers "EventCode": "0xCA", 22*4dd25272SIan Rogers "EventName": "FP_ASSIST.SIMD_INPUT", 23*4dd25272SIan Rogers "PublicDescription": "Number of SIMD FP assists due to input values.", 24*4dd25272SIan Rogers "SampleAfterValue": "100003", 25*4dd25272SIan Rogers "UMask": "0x10" 26*4dd25272SIan Rogers }, 27*4dd25272SIan Rogers { 28*4dd25272SIan Rogers "BriefDescription": "Number of SIMD FP assists due to Output values", 29*4dd25272SIan Rogers "EventCode": "0xCA", 30*4dd25272SIan Rogers "EventName": "FP_ASSIST.SIMD_OUTPUT", 31*4dd25272SIan Rogers "PublicDescription": "Number of SIMD FP assists due to output values.", 32*4dd25272SIan Rogers "SampleAfterValue": "100003", 33*4dd25272SIan Rogers "UMask": "0x8" 34*4dd25272SIan Rogers }, 35*4dd25272SIan Rogers { 36*4dd25272SIan Rogers "BriefDescription": "Number of X87 assists due to input value.", 37*4dd25272SIan Rogers "EventCode": "0xCA", 38*4dd25272SIan Rogers "EventName": "FP_ASSIST.X87_INPUT", 39*4dd25272SIan Rogers "PublicDescription": "Number of X87 FP assists due to input values.", 40*4dd25272SIan Rogers "SampleAfterValue": "100003", 41*4dd25272SIan Rogers "UMask": "0x4" 42*4dd25272SIan Rogers }, 43*4dd25272SIan Rogers { 44*4dd25272SIan Rogers "BriefDescription": "Number of X87 assists due to output value.", 45*4dd25272SIan Rogers "EventCode": "0xCA", 46*4dd25272SIan Rogers "EventName": "FP_ASSIST.X87_OUTPUT", 47*4dd25272SIan Rogers "PublicDescription": "Number of X87 FP assists due to output values.", 48*4dd25272SIan Rogers "SampleAfterValue": "100003", 49*4dd25272SIan Rogers "UMask": "0x2" 50*4dd25272SIan Rogers }, 51*4dd25272SIan Rogers { 52*4dd25272SIan Rogers "BriefDescription": "Number of SIMD Move Elimination candidate uops that were eliminated.", 53*4dd25272SIan Rogers "EventCode": "0x58", 54*4dd25272SIan Rogers "EventName": "MOVE_ELIMINATION.SIMD_ELIMINATED", 55*4dd25272SIan Rogers "PublicDescription": "Number of SIMD move elimination candidate uops that were eliminated.", 56*4dd25272SIan Rogers "SampleAfterValue": "1000003", 57*4dd25272SIan Rogers "UMask": "0x2" 58*4dd25272SIan Rogers }, 59*4dd25272SIan Rogers { 60*4dd25272SIan Rogers "BriefDescription": "Number of SIMD Move Elimination candidate uops that were not eliminated.", 61*4dd25272SIan Rogers "EventCode": "0x58", 62*4dd25272SIan Rogers "EventName": "MOVE_ELIMINATION.SIMD_NOT_ELIMINATED", 63*4dd25272SIan Rogers "PublicDescription": "Number of SIMD move elimination candidate uops that were not eliminated.", 64*4dd25272SIan Rogers "SampleAfterValue": "1000003", 65*4dd25272SIan Rogers "UMask": "0x8" 66*4dd25272SIan Rogers }, 67*4dd25272SIan Rogers { 68*4dd25272SIan Rogers "BriefDescription": "Number of transitions from AVX-256 to legacy SSE when penalty applicable.", 69dcfbad10SAndi Kleen "Errata": "HSD56, HSM57", 70*4dd25272SIan Rogers "EventCode": "0xC1", 71dcfbad10SAndi Kleen "EventName": "OTHER_ASSISTS.AVX_TO_SSE", 72dcfbad10SAndi Kleen "SampleAfterValue": "100003", 73*4dd25272SIan Rogers "UMask": "0x8" 74dcfbad10SAndi Kleen }, 75dcfbad10SAndi Kleen { 76*4dd25272SIan Rogers "BriefDescription": "Number of transitions from SSE to AVX-256 when penalty applicable.", 77dcfbad10SAndi Kleen "Errata": "HSD56, HSM57", 78*4dd25272SIan Rogers "EventCode": "0xC1", 79dcfbad10SAndi Kleen "EventName": "OTHER_ASSISTS.SSE_TO_AVX", 80dcfbad10SAndi Kleen "SampleAfterValue": "100003", 81*4dd25272SIan Rogers "UMask": "0x10" 82dcfbad10SAndi Kleen } 83dcfbad10SAndi Kleen] 84