1*dbe9d887SIan Rogers[
2*dbe9d887SIan Rogers    {
3*dbe9d887SIan Rogers        "BriefDescription": "Counts the number of page walks completed due to load DTLB misses to a 1G page.",
4*dbe9d887SIan Rogers        "EventCode": "0x08",
5*dbe9d887SIan Rogers        "EventName": "DTLB_LOAD_MISSES.WALK_COMPLETED",
6*dbe9d887SIan Rogers        "SampleAfterValue": "1000003",
7*dbe9d887SIan Rogers        "UMask": "0xe"
8*dbe9d887SIan Rogers    },
9*dbe9d887SIan Rogers    {
10*dbe9d887SIan Rogers        "BriefDescription": "Counts the number of page walks completed due to store DTLB misses to a 1G page.",
11*dbe9d887SIan Rogers        "EventCode": "0x49",
12*dbe9d887SIan Rogers        "EventName": "DTLB_STORE_MISSES.WALK_COMPLETED",
13*dbe9d887SIan Rogers        "SampleAfterValue": "1000003",
14*dbe9d887SIan Rogers        "UMask": "0xe"
15*dbe9d887SIan Rogers    },
16*dbe9d887SIan Rogers    {
17*dbe9d887SIan Rogers        "BriefDescription": "Counts the number of page walks completed due to instruction fetch misses to any page size.",
18*dbe9d887SIan Rogers        "EventCode": "0x85",
19*dbe9d887SIan Rogers        "EventName": "ITLB_MISSES.WALK_COMPLETED",
20*dbe9d887SIan Rogers        "PublicDescription": "Counts the number of page walks completed due to instruction fetches whose address translations missed in all Translation Lookaside Buffer (TLB) levels and were mapped to any page size.  Includes page walks that page fault.",
21*dbe9d887SIan Rogers        "SampleAfterValue": "200003",
22*dbe9d887SIan Rogers        "UMask": "0xe"
23*dbe9d887SIan Rogers    }
24*dbe9d887SIan Rogers]
25