1[
2    {
3        "BriefDescription": "Core cycles where the core was running in a manner where Turbo may be clipped to the Non-AVX turbo schedule.",
4        "Counter": "0,1,2,3",
5        "CounterHTOff": "0,1,2,3,4,5,6,7",
6        "EventCode": "0x28",
7        "EventName": "CORE_POWER.LVL0_TURBO_LICENSE",
8        "PublicDescription": "Core cycles where the core was running with power-delivery for baseline license level 0.  This includes non-AVX codes, SSE, AVX 128-bit, and low-current AVX 256-bit codes.",
9        "SampleAfterValue": "200003",
10        "UMask": "0x7"
11    },
12    {
13        "BriefDescription": "Core cycles where the core was running in a manner where Turbo may be clipped to the AVX2 turbo schedule.",
14        "Counter": "0,1,2,3",
15        "CounterHTOff": "0,1,2,3,4,5,6,7",
16        "EventCode": "0x28",
17        "EventName": "CORE_POWER.LVL1_TURBO_LICENSE",
18        "PublicDescription": "Core cycles where the core was running with power-delivery for license level 1.  This includes high current AVX 256-bit instructions as well as low current AVX 512-bit instructions.",
19        "SampleAfterValue": "200003",
20        "UMask": "0x18"
21    },
22    {
23        "BriefDescription": "Core cycles where the core was running in a manner where Turbo may be clipped to the AVX512 turbo schedule.",
24        "Counter": "0,1,2,3",
25        "CounterHTOff": "0,1,2,3,4,5,6,7",
26        "EventCode": "0x28",
27        "EventName": "CORE_POWER.LVL2_TURBO_LICENSE",
28        "PublicDescription": "Core cycles where the core was running with power-delivery for license level 2 (introduced in Skylake Server michroarchtecture).  This includes high current AVX 512-bit instructions.",
29        "SampleAfterValue": "200003",
30        "UMask": "0x20"
31    },
32    {
33        "BriefDescription": "Core cycles the core was throttled due to a pending power level request.",
34        "Counter": "0,1,2,3",
35        "CounterHTOff": "0,1,2,3,4,5,6,7",
36        "EventCode": "0x28",
37        "EventName": "CORE_POWER.THROTTLE",
38        "PublicDescription": "Core cycles the out-of-order engine was throttled due to a pending power level request.",
39        "SampleAfterValue": "200003",
40        "UMask": "0x40"
41    },
42    {
43        "BriefDescription": "Number of hardware interrupts received by the processor.",
44        "Counter": "0,1,2,3",
45        "CounterHTOff": "0,1,2,3,4,5,6,7",
46        "EventCode": "0xCB",
47        "EventName": "HW_INTERRUPTS.RECEIVED",
48        "PublicDescription": "Counts the number of hardware interruptions received by the processor.",
49        "SampleAfterValue": "203",
50        "UMask": "0x1"
51    },
52    {
53        "BriefDescription": "Counts number of cache lines that are dropped and not written back to L3 as they are deemed to be less likely to be reused shortly",
54        "Counter": "0,1,2,3",
55        "CounterHTOff": "0,1,2,3,4,5,6,7",
56        "EventCode": "0xFE",
57        "EventName": "IDI_MISC.WB_DOWNGRADE",
58        "PublicDescription": "Counts number of cache lines that are dropped and not written back to L3 as they are deemed to be less likely to be reused shortly.",
59        "SampleAfterValue": "100003",
60        "UMask": "0x4"
61    },
62    {
63        "BriefDescription": "Counts number of cache lines that are allocated and written back to L3 with the intention that they are more likely to be reused shortly",
64        "Counter": "0,1,2,3",
65        "CounterHTOff": "0,1,2,3,4,5,6,7",
66        "EventCode": "0xFE",
67        "EventName": "IDI_MISC.WB_UPGRADE",
68        "PublicDescription": "Counts number of cache lines that are allocated and written back to L3 with the intention that they are more likely to be reused shortly.",
69        "SampleAfterValue": "100003",
70        "UMask": "0x2"
71    },
72    {
73        "BriefDescription": "OCR.ALL_DATA_RD.ANY_RESPONSE have any response type.",
74        "Counter": "0,1,2,3",
75        "CounterHTOff": "0,1,2,3",
76        "EventCode": "0xB7, 0xBB",
77        "EventName": "OCR.ALL_DATA_RD.ANY_RESPONSE",
78        "MSRIndex": "0x1a6,0x1a7",
79        "MSRValue": "0x10491",
80        "Offcore": "1",
81        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
82        "SampleAfterValue": "100003",
83        "UMask": "0x1"
84    },
85    {
86        "BriefDescription": "OCR.ALL_DATA_RD.PMM_HIT_LOCAL_PMM.ANY_SNOOP OCR.ALL_DATA_RD.PMM_HIT_LOCAL_PMM.ANY_SNOOP",
87        "Counter": "0,1,2,3",
88        "CounterHTOff": "0,1,2,3",
89        "EventCode": "0xB7, 0xBB",
90        "EventName": "OCR.ALL_DATA_RD.PMM_HIT_LOCAL_PMM.ANY_SNOOP",
91        "MSRIndex": "0x1a6,0x1a7",
92        "MSRValue": "0x3F80400491",
93        "Offcore": "1",
94        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
95        "SampleAfterValue": "100003",
96        "UMask": "0x1"
97    },
98    {
99        "BriefDescription": "OCR.ALL_DATA_RD.PMM_HIT_LOCAL_PMM.SNOOP_NONE OCR.ALL_DATA_RD.PMM_HIT_LOCAL_PMM.SNOOP_NONE",
100        "Counter": "0,1,2,3",
101        "CounterHTOff": "0,1,2,3",
102        "EventCode": "0xB7, 0xBB",
103        "EventName": "OCR.ALL_DATA_RD.PMM_HIT_LOCAL_PMM.SNOOP_NONE",
104        "MSRIndex": "0x1a6,0x1a7",
105        "MSRValue": "0x80400491",
106        "Offcore": "1",
107        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
108        "SampleAfterValue": "100003",
109        "UMask": "0x1"
110    },
111    {
112        "BriefDescription": "OCR.ALL_DATA_RD.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED OCR.ALL_DATA_RD.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED",
113        "Counter": "0,1,2,3",
114        "CounterHTOff": "0,1,2,3",
115        "EventCode": "0xB7, 0xBB",
116        "EventName": "OCR.ALL_DATA_RD.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED",
117        "MSRIndex": "0x1a6,0x1a7",
118        "MSRValue": "0x100400491",
119        "Offcore": "1",
120        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
121        "SampleAfterValue": "100003",
122        "UMask": "0x1"
123    },
124    {
125        "BriefDescription": "OCR.ALL_DATA_RD.SUPPLIER_NONE.ANY_SNOOP  OCR.ALL_DATA_RD.SUPPLIER_NONE.ANY_SNOOP",
126        "Counter": "0,1,2,3",
127        "CounterHTOff": "0,1,2,3",
128        "EventCode": "0xB7, 0xBB",
129        "EventName": "OCR.ALL_DATA_RD.SUPPLIER_NONE.ANY_SNOOP",
130        "MSRIndex": "0x1a6,0x1a7",
131        "MSRValue": "0x3F80020491",
132        "Offcore": "1",
133        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
134        "SampleAfterValue": "100003",
135        "UMask": "0x1"
136    },
137    {
138        "BriefDescription": "OCR.ALL_DATA_RD.SUPPLIER_NONE.HITM_OTHER_CORE  OCR.ALL_DATA_RD.SUPPLIER_NONE.HITM_OTHER_CORE",
139        "Counter": "0,1,2,3",
140        "CounterHTOff": "0,1,2,3",
141        "EventCode": "0xB7, 0xBB",
142        "EventName": "OCR.ALL_DATA_RD.SUPPLIER_NONE.HITM_OTHER_CORE",
143        "MSRIndex": "0x1a6,0x1a7",
144        "MSRValue": "0x1000020491",
145        "Offcore": "1",
146        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
147        "SampleAfterValue": "100003",
148        "UMask": "0x1"
149    },
150    {
151        "BriefDescription": "OCR.ALL_DATA_RD.SUPPLIER_NONE.HIT_OTHER_CORE_FWD  OCR.ALL_DATA_RD.SUPPLIER_NONE.HIT_OTHER_CORE_FWD",
152        "Counter": "0,1,2,3",
153        "CounterHTOff": "0,1,2,3",
154        "EventCode": "0xB7, 0xBB",
155        "EventName": "OCR.ALL_DATA_RD.SUPPLIER_NONE.HIT_OTHER_CORE_FWD",
156        "MSRIndex": "0x1a6,0x1a7",
157        "MSRValue": "0x800020491",
158        "Offcore": "1",
159        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
160        "SampleAfterValue": "100003",
161        "UMask": "0x1"
162    },
163    {
164        "BriefDescription": "OCR.ALL_DATA_RD.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD  OCR.ALL_DATA_RD.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD",
165        "Counter": "0,1,2,3",
166        "CounterHTOff": "0,1,2,3",
167        "EventCode": "0xB7, 0xBB",
168        "EventName": "OCR.ALL_DATA_RD.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD",
169        "MSRIndex": "0x1a6,0x1a7",
170        "MSRValue": "0x400020491",
171        "Offcore": "1",
172        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
173        "SampleAfterValue": "100003",
174        "UMask": "0x1"
175    },
176    {
177        "BriefDescription": "OCR.ALL_DATA_RD.SUPPLIER_NONE.NO_SNOOP_NEEDED  OCR.ALL_DATA_RD.SUPPLIER_NONE.NO_SNOOP_NEEDED",
178        "Counter": "0,1,2,3",
179        "CounterHTOff": "0,1,2,3",
180        "EventCode": "0xB7, 0xBB",
181        "EventName": "OCR.ALL_DATA_RD.SUPPLIER_NONE.NO_SNOOP_NEEDED",
182        "MSRIndex": "0x1a6,0x1a7",
183        "MSRValue": "0x100020491",
184        "Offcore": "1",
185        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
186        "SampleAfterValue": "100003",
187        "UMask": "0x1"
188    },
189    {
190        "BriefDescription": "OCR.ALL_DATA_RD.SUPPLIER_NONE.SNOOP_MISS",
191        "Counter": "0,1,2,3",
192        "CounterHTOff": "0,1,2,3",
193        "EventCode": "0xB7, 0xBB",
194        "EventName": "OCR.ALL_DATA_RD.SUPPLIER_NONE.SNOOP_MISS",
195        "MSRIndex": "0x1a6,0x1a7",
196        "MSRValue": "0x200020491",
197        "Offcore": "1",
198        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
199        "SampleAfterValue": "100003",
200        "UMask": "0x1"
201    },
202    {
203        "BriefDescription": "OCR.ALL_DATA_RD.SUPPLIER_NONE.SNOOP_NONE",
204        "Counter": "0,1,2,3",
205        "CounterHTOff": "0,1,2,3",
206        "EventCode": "0xB7, 0xBB",
207        "EventName": "OCR.ALL_DATA_RD.SUPPLIER_NONE.SNOOP_NONE",
208        "MSRIndex": "0x1a6,0x1a7",
209        "MSRValue": "0x80020491",
210        "Offcore": "1",
211        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
212        "SampleAfterValue": "100003",
213        "UMask": "0x1"
214    },
215    {
216        "BriefDescription": "OCR.ALL_PF_DATA_RD.ANY_RESPONSE have any response type.",
217        "Counter": "0,1,2,3",
218        "CounterHTOff": "0,1,2,3",
219        "EventCode": "0xB7, 0xBB",
220        "EventName": "OCR.ALL_PF_DATA_RD.ANY_RESPONSE",
221        "MSRIndex": "0x1a6,0x1a7",
222        "MSRValue": "0x10490",
223        "Offcore": "1",
224        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
225        "SampleAfterValue": "100003",
226        "UMask": "0x1"
227    },
228    {
229        "BriefDescription": "OCR.ALL_PF_DATA_RD.PMM_HIT_LOCAL_PMM.ANY_SNOOP OCR.ALL_PF_DATA_RD.PMM_HIT_LOCAL_PMM.ANY_SNOOP",
230        "Counter": "0,1,2,3",
231        "CounterHTOff": "0,1,2,3",
232        "EventCode": "0xB7, 0xBB",
233        "EventName": "OCR.ALL_PF_DATA_RD.PMM_HIT_LOCAL_PMM.ANY_SNOOP",
234        "MSRIndex": "0x1a6,0x1a7",
235        "MSRValue": "0x3F80400490",
236        "Offcore": "1",
237        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
238        "SampleAfterValue": "100003",
239        "UMask": "0x1"
240    },
241    {
242        "BriefDescription": "OCR.ALL_PF_DATA_RD.PMM_HIT_LOCAL_PMM.SNOOP_NONE OCR.ALL_PF_DATA_RD.PMM_HIT_LOCAL_PMM.SNOOP_NONE",
243        "Counter": "0,1,2,3",
244        "CounterHTOff": "0,1,2,3",
245        "EventCode": "0xB7, 0xBB",
246        "EventName": "OCR.ALL_PF_DATA_RD.PMM_HIT_LOCAL_PMM.SNOOP_NONE",
247        "MSRIndex": "0x1a6,0x1a7",
248        "MSRValue": "0x80400490",
249        "Offcore": "1",
250        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
251        "SampleAfterValue": "100003",
252        "UMask": "0x1"
253    },
254    {
255        "BriefDescription": "OCR.ALL_PF_DATA_RD.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED OCR.ALL_PF_DATA_RD.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED",
256        "Counter": "0,1,2,3",
257        "CounterHTOff": "0,1,2,3",
258        "EventCode": "0xB7, 0xBB",
259        "EventName": "OCR.ALL_PF_DATA_RD.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED",
260        "MSRIndex": "0x1a6,0x1a7",
261        "MSRValue": "0x100400490",
262        "Offcore": "1",
263        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
264        "SampleAfterValue": "100003",
265        "UMask": "0x1"
266    },
267    {
268        "BriefDescription": "OCR.ALL_PF_DATA_RD.SUPPLIER_NONE.ANY_SNOOP  OCR.ALL_PF_DATA_RD.SUPPLIER_NONE.ANY_SNOOP",
269        "Counter": "0,1,2,3",
270        "CounterHTOff": "0,1,2,3",
271        "EventCode": "0xB7, 0xBB",
272        "EventName": "OCR.ALL_PF_DATA_RD.SUPPLIER_NONE.ANY_SNOOP",
273        "MSRIndex": "0x1a6,0x1a7",
274        "MSRValue": "0x3F80020490",
275        "Offcore": "1",
276        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
277        "SampleAfterValue": "100003",
278        "UMask": "0x1"
279    },
280    {
281        "BriefDescription": "OCR.ALL_PF_DATA_RD.SUPPLIER_NONE.HITM_OTHER_CORE  OCR.ALL_PF_DATA_RD.SUPPLIER_NONE.HITM_OTHER_CORE",
282        "Counter": "0,1,2,3",
283        "CounterHTOff": "0,1,2,3",
284        "EventCode": "0xB7, 0xBB",
285        "EventName": "OCR.ALL_PF_DATA_RD.SUPPLIER_NONE.HITM_OTHER_CORE",
286        "MSRIndex": "0x1a6,0x1a7",
287        "MSRValue": "0x1000020490",
288        "Offcore": "1",
289        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
290        "SampleAfterValue": "100003",
291        "UMask": "0x1"
292    },
293    {
294        "BriefDescription": "OCR.ALL_PF_DATA_RD.SUPPLIER_NONE.HIT_OTHER_CORE_FWD  OCR.ALL_PF_DATA_RD.SUPPLIER_NONE.HIT_OTHER_CORE_FWD",
295        "Counter": "0,1,2,3",
296        "CounterHTOff": "0,1,2,3",
297        "EventCode": "0xB7, 0xBB",
298        "EventName": "OCR.ALL_PF_DATA_RD.SUPPLIER_NONE.HIT_OTHER_CORE_FWD",
299        "MSRIndex": "0x1a6,0x1a7",
300        "MSRValue": "0x800020490",
301        "Offcore": "1",
302        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
303        "SampleAfterValue": "100003",
304        "UMask": "0x1"
305    },
306    {
307        "BriefDescription": "OCR.ALL_PF_DATA_RD.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD  OCR.ALL_PF_DATA_RD.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD",
308        "Counter": "0,1,2,3",
309        "CounterHTOff": "0,1,2,3",
310        "EventCode": "0xB7, 0xBB",
311        "EventName": "OCR.ALL_PF_DATA_RD.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD",
312        "MSRIndex": "0x1a6,0x1a7",
313        "MSRValue": "0x400020490",
314        "Offcore": "1",
315        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
316        "SampleAfterValue": "100003",
317        "UMask": "0x1"
318    },
319    {
320        "BriefDescription": "OCR.ALL_PF_DATA_RD.SUPPLIER_NONE.NO_SNOOP_NEEDED  OCR.ALL_PF_DATA_RD.SUPPLIER_NONE.NO_SNOOP_NEEDED",
321        "Counter": "0,1,2,3",
322        "CounterHTOff": "0,1,2,3",
323        "EventCode": "0xB7, 0xBB",
324        "EventName": "OCR.ALL_PF_DATA_RD.SUPPLIER_NONE.NO_SNOOP_NEEDED",
325        "MSRIndex": "0x1a6,0x1a7",
326        "MSRValue": "0x100020490",
327        "Offcore": "1",
328        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
329        "SampleAfterValue": "100003",
330        "UMask": "0x1"
331    },
332    {
333        "BriefDescription": "OCR.ALL_PF_DATA_RD.SUPPLIER_NONE.SNOOP_MISS",
334        "Counter": "0,1,2,3",
335        "CounterHTOff": "0,1,2,3",
336        "EventCode": "0xB7, 0xBB",
337        "EventName": "OCR.ALL_PF_DATA_RD.SUPPLIER_NONE.SNOOP_MISS",
338        "MSRIndex": "0x1a6,0x1a7",
339        "MSRValue": "0x200020490",
340        "Offcore": "1",
341        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
342        "SampleAfterValue": "100003",
343        "UMask": "0x1"
344    },
345    {
346        "BriefDescription": "OCR.ALL_PF_DATA_RD.SUPPLIER_NONE.SNOOP_NONE",
347        "Counter": "0,1,2,3",
348        "CounterHTOff": "0,1,2,3",
349        "EventCode": "0xB7, 0xBB",
350        "EventName": "OCR.ALL_PF_DATA_RD.SUPPLIER_NONE.SNOOP_NONE",
351        "MSRIndex": "0x1a6,0x1a7",
352        "MSRValue": "0x80020490",
353        "Offcore": "1",
354        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
355        "SampleAfterValue": "100003",
356        "UMask": "0x1"
357    },
358    {
359        "BriefDescription": "OCR.ALL_PF_RFO.ANY_RESPONSE have any response type.",
360        "Counter": "0,1,2,3",
361        "CounterHTOff": "0,1,2,3",
362        "EventCode": "0xB7, 0xBB",
363        "EventName": "OCR.ALL_PF_RFO.ANY_RESPONSE",
364        "MSRIndex": "0x1a6,0x1a7",
365        "MSRValue": "0x10120",
366        "Offcore": "1",
367        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
368        "SampleAfterValue": "100003",
369        "UMask": "0x1"
370    },
371    {
372        "BriefDescription": "OCR.ALL_PF_RFO.PMM_HIT_LOCAL_PMM.ANY_SNOOP OCR.ALL_PF_RFO.PMM_HIT_LOCAL_PMM.ANY_SNOOP",
373        "Counter": "0,1,2,3",
374        "CounterHTOff": "0,1,2,3",
375        "EventCode": "0xB7, 0xBB",
376        "EventName": "OCR.ALL_PF_RFO.PMM_HIT_LOCAL_PMM.ANY_SNOOP",
377        "MSRIndex": "0x1a6,0x1a7",
378        "MSRValue": "0x3F80400120",
379        "Offcore": "1",
380        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
381        "SampleAfterValue": "100003",
382        "UMask": "0x1"
383    },
384    {
385        "BriefDescription": "OCR.ALL_PF_RFO.PMM_HIT_LOCAL_PMM.SNOOP_NONE OCR.ALL_PF_RFO.PMM_HIT_LOCAL_PMM.SNOOP_NONE",
386        "Counter": "0,1,2,3",
387        "CounterHTOff": "0,1,2,3",
388        "EventCode": "0xB7, 0xBB",
389        "EventName": "OCR.ALL_PF_RFO.PMM_HIT_LOCAL_PMM.SNOOP_NONE",
390        "MSRIndex": "0x1a6,0x1a7",
391        "MSRValue": "0x80400120",
392        "Offcore": "1",
393        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
394        "SampleAfterValue": "100003",
395        "UMask": "0x1"
396    },
397    {
398        "BriefDescription": "OCR.ALL_PF_RFO.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED OCR.ALL_PF_RFO.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED",
399        "Counter": "0,1,2,3",
400        "CounterHTOff": "0,1,2,3",
401        "EventCode": "0xB7, 0xBB",
402        "EventName": "OCR.ALL_PF_RFO.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED",
403        "MSRIndex": "0x1a6,0x1a7",
404        "MSRValue": "0x100400120",
405        "Offcore": "1",
406        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
407        "SampleAfterValue": "100003",
408        "UMask": "0x1"
409    },
410    {
411        "BriefDescription": "OCR.ALL_PF_RFO.SUPPLIER_NONE.ANY_SNOOP  OCR.ALL_PF_RFO.SUPPLIER_NONE.ANY_SNOOP",
412        "Counter": "0,1,2,3",
413        "CounterHTOff": "0,1,2,3",
414        "EventCode": "0xB7, 0xBB",
415        "EventName": "OCR.ALL_PF_RFO.SUPPLIER_NONE.ANY_SNOOP",
416        "MSRIndex": "0x1a6,0x1a7",
417        "MSRValue": "0x3F80020120",
418        "Offcore": "1",
419        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
420        "SampleAfterValue": "100003",
421        "UMask": "0x1"
422    },
423    {
424        "BriefDescription": "OCR.ALL_PF_RFO.SUPPLIER_NONE.HITM_OTHER_CORE  OCR.ALL_PF_RFO.SUPPLIER_NONE.HITM_OTHER_CORE",
425        "Counter": "0,1,2,3",
426        "CounterHTOff": "0,1,2,3",
427        "EventCode": "0xB7, 0xBB",
428        "EventName": "OCR.ALL_PF_RFO.SUPPLIER_NONE.HITM_OTHER_CORE",
429        "MSRIndex": "0x1a6,0x1a7",
430        "MSRValue": "0x1000020120",
431        "Offcore": "1",
432        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
433        "SampleAfterValue": "100003",
434        "UMask": "0x1"
435    },
436    {
437        "BriefDescription": "OCR.ALL_PF_RFO.SUPPLIER_NONE.HIT_OTHER_CORE_FWD  OCR.ALL_PF_RFO.SUPPLIER_NONE.HIT_OTHER_CORE_FWD",
438        "Counter": "0,1,2,3",
439        "CounterHTOff": "0,1,2,3",
440        "EventCode": "0xB7, 0xBB",
441        "EventName": "OCR.ALL_PF_RFO.SUPPLIER_NONE.HIT_OTHER_CORE_FWD",
442        "MSRIndex": "0x1a6,0x1a7",
443        "MSRValue": "0x800020120",
444        "Offcore": "1",
445        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
446        "SampleAfterValue": "100003",
447        "UMask": "0x1"
448    },
449    {
450        "BriefDescription": "OCR.ALL_PF_RFO.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD  OCR.ALL_PF_RFO.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD",
451        "Counter": "0,1,2,3",
452        "CounterHTOff": "0,1,2,3",
453        "EventCode": "0xB7, 0xBB",
454        "EventName": "OCR.ALL_PF_RFO.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD",
455        "MSRIndex": "0x1a6,0x1a7",
456        "MSRValue": "0x400020120",
457        "Offcore": "1",
458        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
459        "SampleAfterValue": "100003",
460        "UMask": "0x1"
461    },
462    {
463        "BriefDescription": "OCR.ALL_PF_RFO.SUPPLIER_NONE.NO_SNOOP_NEEDED  OCR.ALL_PF_RFO.SUPPLIER_NONE.NO_SNOOP_NEEDED",
464        "Counter": "0,1,2,3",
465        "CounterHTOff": "0,1,2,3",
466        "EventCode": "0xB7, 0xBB",
467        "EventName": "OCR.ALL_PF_RFO.SUPPLIER_NONE.NO_SNOOP_NEEDED",
468        "MSRIndex": "0x1a6,0x1a7",
469        "MSRValue": "0x100020120",
470        "Offcore": "1",
471        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
472        "SampleAfterValue": "100003",
473        "UMask": "0x1"
474    },
475    {
476        "BriefDescription": "OCR.ALL_PF_RFO.SUPPLIER_NONE.SNOOP_MISS",
477        "Counter": "0,1,2,3",
478        "CounterHTOff": "0,1,2,3",
479        "EventCode": "0xB7, 0xBB",
480        "EventName": "OCR.ALL_PF_RFO.SUPPLIER_NONE.SNOOP_MISS",
481        "MSRIndex": "0x1a6,0x1a7",
482        "MSRValue": "0x200020120",
483        "Offcore": "1",
484        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
485        "SampleAfterValue": "100003",
486        "UMask": "0x1"
487    },
488    {
489        "BriefDescription": "OCR.ALL_PF_RFO.SUPPLIER_NONE.SNOOP_NONE",
490        "Counter": "0,1,2,3",
491        "CounterHTOff": "0,1,2,3",
492        "EventCode": "0xB7, 0xBB",
493        "EventName": "OCR.ALL_PF_RFO.SUPPLIER_NONE.SNOOP_NONE",
494        "MSRIndex": "0x1a6,0x1a7",
495        "MSRValue": "0x80020120",
496        "Offcore": "1",
497        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
498        "SampleAfterValue": "100003",
499        "UMask": "0x1"
500    },
501    {
502        "BriefDescription": "OCR.ALL_READS.ANY_RESPONSE have any response type.",
503        "Counter": "0,1,2,3",
504        "CounterHTOff": "0,1,2,3",
505        "EventCode": "0xB7, 0xBB",
506        "EventName": "OCR.ALL_READS.ANY_RESPONSE",
507        "MSRIndex": "0x1a6,0x1a7",
508        "MSRValue": "0x107F7",
509        "Offcore": "1",
510        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
511        "SampleAfterValue": "100003",
512        "UMask": "0x1"
513    },
514    {
515        "BriefDescription": "OCR.ALL_READS.PMM_HIT_LOCAL_PMM.ANY_SNOOP OCR.ALL_READS.PMM_HIT_LOCAL_PMM.ANY_SNOOP",
516        "Counter": "0,1,2,3",
517        "CounterHTOff": "0,1,2,3",
518        "EventCode": "0xB7, 0xBB",
519        "EventName": "OCR.ALL_READS.PMM_HIT_LOCAL_PMM.ANY_SNOOP",
520        "MSRIndex": "0x1a6,0x1a7",
521        "MSRValue": "0x3F804007F7",
522        "Offcore": "1",
523        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
524        "SampleAfterValue": "100003",
525        "UMask": "0x1"
526    },
527    {
528        "BriefDescription": "OCR.ALL_READS.PMM_HIT_LOCAL_PMM.SNOOP_NONE OCR.ALL_READS.PMM_HIT_LOCAL_PMM.SNOOP_NONE",
529        "Counter": "0,1,2,3",
530        "CounterHTOff": "0,1,2,3",
531        "EventCode": "0xB7, 0xBB",
532        "EventName": "OCR.ALL_READS.PMM_HIT_LOCAL_PMM.SNOOP_NONE",
533        "MSRIndex": "0x1a6,0x1a7",
534        "MSRValue": "0x804007F7",
535        "Offcore": "1",
536        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
537        "SampleAfterValue": "100003",
538        "UMask": "0x1"
539    },
540    {
541        "BriefDescription": "OCR.ALL_READS.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED OCR.ALL_READS.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED",
542        "Counter": "0,1,2,3",
543        "CounterHTOff": "0,1,2,3",
544        "EventCode": "0xB7, 0xBB",
545        "EventName": "OCR.ALL_READS.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED",
546        "MSRIndex": "0x1a6,0x1a7",
547        "MSRValue": "0x1004007F7",
548        "Offcore": "1",
549        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
550        "SampleAfterValue": "100003",
551        "UMask": "0x1"
552    },
553    {
554        "BriefDescription": "OCR.ALL_READS.SUPPLIER_NONE.ANY_SNOOP  OCR.ALL_READS.SUPPLIER_NONE.ANY_SNOOP",
555        "Counter": "0,1,2,3",
556        "CounterHTOff": "0,1,2,3",
557        "EventCode": "0xB7, 0xBB",
558        "EventName": "OCR.ALL_READS.SUPPLIER_NONE.ANY_SNOOP",
559        "MSRIndex": "0x1a6,0x1a7",
560        "MSRValue": "0x3F800207F7",
561        "Offcore": "1",
562        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
563        "SampleAfterValue": "100003",
564        "UMask": "0x1"
565    },
566    {
567        "BriefDescription": "OCR.ALL_READS.SUPPLIER_NONE.HITM_OTHER_CORE  OCR.ALL_READS.SUPPLIER_NONE.HITM_OTHER_CORE",
568        "Counter": "0,1,2,3",
569        "CounterHTOff": "0,1,2,3",
570        "EventCode": "0xB7, 0xBB",
571        "EventName": "OCR.ALL_READS.SUPPLIER_NONE.HITM_OTHER_CORE",
572        "MSRIndex": "0x1a6,0x1a7",
573        "MSRValue": "0x10000207F7",
574        "Offcore": "1",
575        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
576        "SampleAfterValue": "100003",
577        "UMask": "0x1"
578    },
579    {
580        "BriefDescription": "OCR.ALL_READS.SUPPLIER_NONE.HIT_OTHER_CORE_FWD  OCR.ALL_READS.SUPPLIER_NONE.HIT_OTHER_CORE_FWD",
581        "Counter": "0,1,2,3",
582        "CounterHTOff": "0,1,2,3",
583        "EventCode": "0xB7, 0xBB",
584        "EventName": "OCR.ALL_READS.SUPPLIER_NONE.HIT_OTHER_CORE_FWD",
585        "MSRIndex": "0x1a6,0x1a7",
586        "MSRValue": "0x8000207F7",
587        "Offcore": "1",
588        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
589        "SampleAfterValue": "100003",
590        "UMask": "0x1"
591    },
592    {
593        "BriefDescription": "OCR.ALL_READS.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD  OCR.ALL_READS.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD",
594        "Counter": "0,1,2,3",
595        "CounterHTOff": "0,1,2,3",
596        "EventCode": "0xB7, 0xBB",
597        "EventName": "OCR.ALL_READS.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD",
598        "MSRIndex": "0x1a6,0x1a7",
599        "MSRValue": "0x4000207F7",
600        "Offcore": "1",
601        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
602        "SampleAfterValue": "100003",
603        "UMask": "0x1"
604    },
605    {
606        "BriefDescription": "OCR.ALL_READS.SUPPLIER_NONE.NO_SNOOP_NEEDED  OCR.ALL_READS.SUPPLIER_NONE.NO_SNOOP_NEEDED",
607        "Counter": "0,1,2,3",
608        "CounterHTOff": "0,1,2,3",
609        "EventCode": "0xB7, 0xBB",
610        "EventName": "OCR.ALL_READS.SUPPLIER_NONE.NO_SNOOP_NEEDED",
611        "MSRIndex": "0x1a6,0x1a7",
612        "MSRValue": "0x1000207F7",
613        "Offcore": "1",
614        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
615        "SampleAfterValue": "100003",
616        "UMask": "0x1"
617    },
618    {
619        "BriefDescription": "OCR.ALL_READS.SUPPLIER_NONE.SNOOP_MISS",
620        "Counter": "0,1,2,3",
621        "CounterHTOff": "0,1,2,3",
622        "EventCode": "0xB7, 0xBB",
623        "EventName": "OCR.ALL_READS.SUPPLIER_NONE.SNOOP_MISS",
624        "MSRIndex": "0x1a6,0x1a7",
625        "MSRValue": "0x2000207F7",
626        "Offcore": "1",
627        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
628        "SampleAfterValue": "100003",
629        "UMask": "0x1"
630    },
631    {
632        "BriefDescription": "OCR.ALL_READS.SUPPLIER_NONE.SNOOP_NONE",
633        "Counter": "0,1,2,3",
634        "CounterHTOff": "0,1,2,3",
635        "EventCode": "0xB7, 0xBB",
636        "EventName": "OCR.ALL_READS.SUPPLIER_NONE.SNOOP_NONE",
637        "MSRIndex": "0x1a6,0x1a7",
638        "MSRValue": "0x800207F7",
639        "Offcore": "1",
640        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
641        "SampleAfterValue": "100003",
642        "UMask": "0x1"
643    },
644    {
645        "BriefDescription": "OCR.ALL_RFO.ANY_RESPONSE have any response type.",
646        "Counter": "0,1,2,3",
647        "CounterHTOff": "0,1,2,3",
648        "EventCode": "0xB7, 0xBB",
649        "EventName": "OCR.ALL_RFO.ANY_RESPONSE",
650        "MSRIndex": "0x1a6,0x1a7",
651        "MSRValue": "0x10122",
652        "Offcore": "1",
653        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
654        "SampleAfterValue": "100003",
655        "UMask": "0x1"
656    },
657    {
658        "BriefDescription": "OCR.ALL_RFO.PMM_HIT_LOCAL_PMM.ANY_SNOOP OCR.ALL_RFO.PMM_HIT_LOCAL_PMM.ANY_SNOOP",
659        "Counter": "0,1,2,3",
660        "CounterHTOff": "0,1,2,3",
661        "EventCode": "0xB7, 0xBB",
662        "EventName": "OCR.ALL_RFO.PMM_HIT_LOCAL_PMM.ANY_SNOOP",
663        "MSRIndex": "0x1a6,0x1a7",
664        "MSRValue": "0x3F80400122",
665        "Offcore": "1",
666        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
667        "SampleAfterValue": "100003",
668        "UMask": "0x1"
669    },
670    {
671        "BriefDescription": "OCR.ALL_RFO.PMM_HIT_LOCAL_PMM.SNOOP_NONE OCR.ALL_RFO.PMM_HIT_LOCAL_PMM.SNOOP_NONE",
672        "Counter": "0,1,2,3",
673        "CounterHTOff": "0,1,2,3",
674        "EventCode": "0xB7, 0xBB",
675        "EventName": "OCR.ALL_RFO.PMM_HIT_LOCAL_PMM.SNOOP_NONE",
676        "MSRIndex": "0x1a6,0x1a7",
677        "MSRValue": "0x80400122",
678        "Offcore": "1",
679        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
680        "SampleAfterValue": "100003",
681        "UMask": "0x1"
682    },
683    {
684        "BriefDescription": "OCR.ALL_RFO.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED OCR.ALL_RFO.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED",
685        "Counter": "0,1,2,3",
686        "CounterHTOff": "0,1,2,3",
687        "EventCode": "0xB7, 0xBB",
688        "EventName": "OCR.ALL_RFO.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED",
689        "MSRIndex": "0x1a6,0x1a7",
690        "MSRValue": "0x100400122",
691        "Offcore": "1",
692        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
693        "SampleAfterValue": "100003",
694        "UMask": "0x1"
695    },
696    {
697        "BriefDescription": "OCR.ALL_RFO.SUPPLIER_NONE.ANY_SNOOP  OCR.ALL_RFO.SUPPLIER_NONE.ANY_SNOOP",
698        "Counter": "0,1,2,3",
699        "CounterHTOff": "0,1,2,3",
700        "EventCode": "0xB7, 0xBB",
701        "EventName": "OCR.ALL_RFO.SUPPLIER_NONE.ANY_SNOOP",
702        "MSRIndex": "0x1a6,0x1a7",
703        "MSRValue": "0x3F80020122",
704        "Offcore": "1",
705        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
706        "SampleAfterValue": "100003",
707        "UMask": "0x1"
708    },
709    {
710        "BriefDescription": "OCR.ALL_RFO.SUPPLIER_NONE.HITM_OTHER_CORE  OCR.ALL_RFO.SUPPLIER_NONE.HITM_OTHER_CORE",
711        "Counter": "0,1,2,3",
712        "CounterHTOff": "0,1,2,3",
713        "EventCode": "0xB7, 0xBB",
714        "EventName": "OCR.ALL_RFO.SUPPLIER_NONE.HITM_OTHER_CORE",
715        "MSRIndex": "0x1a6,0x1a7",
716        "MSRValue": "0x1000020122",
717        "Offcore": "1",
718        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
719        "SampleAfterValue": "100003",
720        "UMask": "0x1"
721    },
722    {
723        "BriefDescription": "OCR.ALL_RFO.SUPPLIER_NONE.HIT_OTHER_CORE_FWD  OCR.ALL_RFO.SUPPLIER_NONE.HIT_OTHER_CORE_FWD",
724        "Counter": "0,1,2,3",
725        "CounterHTOff": "0,1,2,3",
726        "EventCode": "0xB7, 0xBB",
727        "EventName": "OCR.ALL_RFO.SUPPLIER_NONE.HIT_OTHER_CORE_FWD",
728        "MSRIndex": "0x1a6,0x1a7",
729        "MSRValue": "0x800020122",
730        "Offcore": "1",
731        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
732        "SampleAfterValue": "100003",
733        "UMask": "0x1"
734    },
735    {
736        "BriefDescription": "OCR.ALL_RFO.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD  OCR.ALL_RFO.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD",
737        "Counter": "0,1,2,3",
738        "CounterHTOff": "0,1,2,3",
739        "EventCode": "0xB7, 0xBB",
740        "EventName": "OCR.ALL_RFO.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD",
741        "MSRIndex": "0x1a6,0x1a7",
742        "MSRValue": "0x400020122",
743        "Offcore": "1",
744        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
745        "SampleAfterValue": "100003",
746        "UMask": "0x1"
747    },
748    {
749        "BriefDescription": "OCR.ALL_RFO.SUPPLIER_NONE.NO_SNOOP_NEEDED  OCR.ALL_RFO.SUPPLIER_NONE.NO_SNOOP_NEEDED",
750        "Counter": "0,1,2,3",
751        "CounterHTOff": "0,1,2,3",
752        "EventCode": "0xB7, 0xBB",
753        "EventName": "OCR.ALL_RFO.SUPPLIER_NONE.NO_SNOOP_NEEDED",
754        "MSRIndex": "0x1a6,0x1a7",
755        "MSRValue": "0x100020122",
756        "Offcore": "1",
757        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
758        "SampleAfterValue": "100003",
759        "UMask": "0x1"
760    },
761    {
762        "BriefDescription": "OCR.ALL_RFO.SUPPLIER_NONE.SNOOP_MISS",
763        "Counter": "0,1,2,3",
764        "CounterHTOff": "0,1,2,3",
765        "EventCode": "0xB7, 0xBB",
766        "EventName": "OCR.ALL_RFO.SUPPLIER_NONE.SNOOP_MISS",
767        "MSRIndex": "0x1a6,0x1a7",
768        "MSRValue": "0x200020122",
769        "Offcore": "1",
770        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
771        "SampleAfterValue": "100003",
772        "UMask": "0x1"
773    },
774    {
775        "BriefDescription": "OCR.ALL_RFO.SUPPLIER_NONE.SNOOP_NONE",
776        "Counter": "0,1,2,3",
777        "CounterHTOff": "0,1,2,3",
778        "EventCode": "0xB7, 0xBB",
779        "EventName": "OCR.ALL_RFO.SUPPLIER_NONE.SNOOP_NONE",
780        "MSRIndex": "0x1a6,0x1a7",
781        "MSRValue": "0x80020122",
782        "Offcore": "1",
783        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
784        "SampleAfterValue": "100003",
785        "UMask": "0x1"
786    },
787    {
788        "BriefDescription": "Counts all demand code reads have any response type.",
789        "Counter": "0,1,2,3",
790        "CounterHTOff": "0,1,2,3",
791        "EventCode": "0xB7, 0xBB",
792        "EventName": "OCR.DEMAND_CODE_RD.ANY_RESPONSE",
793        "MSRIndex": "0x1a6,0x1a7",
794        "MSRValue": "0x10004",
795        "Offcore": "1",
796        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
797        "SampleAfterValue": "100003",
798        "UMask": "0x1"
799    },
800    {
801        "BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.PMM_HIT_LOCAL_PMM.ANY_SNOOP",
802        "Counter": "0,1,2,3",
803        "CounterHTOff": "0,1,2,3",
804        "EventCode": "0xB7, 0xBB",
805        "EventName": "OCR.DEMAND_CODE_RD.PMM_HIT_LOCAL_PMM.ANY_SNOOP",
806        "MSRIndex": "0x1a6,0x1a7",
807        "MSRValue": "0x3F80400004",
808        "Offcore": "1",
809        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
810        "SampleAfterValue": "100003",
811        "UMask": "0x1"
812    },
813    {
814        "BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.PMM_HIT_LOCAL_PMM.SNOOP_NONE",
815        "Counter": "0,1,2,3",
816        "CounterHTOff": "0,1,2,3",
817        "EventCode": "0xB7, 0xBB",
818        "EventName": "OCR.DEMAND_CODE_RD.PMM_HIT_LOCAL_PMM.SNOOP_NONE",
819        "MSRIndex": "0x1a6,0x1a7",
820        "MSRValue": "0x80400004",
821        "Offcore": "1",
822        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
823        "SampleAfterValue": "100003",
824        "UMask": "0x1"
825    },
826    {
827        "BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED",
828        "Counter": "0,1,2,3",
829        "CounterHTOff": "0,1,2,3",
830        "EventCode": "0xB7, 0xBB",
831        "EventName": "OCR.DEMAND_CODE_RD.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED",
832        "MSRIndex": "0x1a6,0x1a7",
833        "MSRValue": "0x100400004",
834        "Offcore": "1",
835        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
836        "SampleAfterValue": "100003",
837        "UMask": "0x1"
838    },
839    {
840        "BriefDescription": "Counts all demand code reads  OCR.DEMAND_CODE_RD.SUPPLIER_NONE.ANY_SNOOP",
841        "Counter": "0,1,2,3",
842        "CounterHTOff": "0,1,2,3",
843        "EventCode": "0xB7, 0xBB",
844        "EventName": "OCR.DEMAND_CODE_RD.SUPPLIER_NONE.ANY_SNOOP",
845        "MSRIndex": "0x1a6,0x1a7",
846        "MSRValue": "0x3F80020004",
847        "Offcore": "1",
848        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
849        "SampleAfterValue": "100003",
850        "UMask": "0x1"
851    },
852    {
853        "BriefDescription": "Counts all demand code reads  OCR.DEMAND_CODE_RD.SUPPLIER_NONE.HITM_OTHER_CORE",
854        "Counter": "0,1,2,3",
855        "CounterHTOff": "0,1,2,3",
856        "EventCode": "0xB7, 0xBB",
857        "EventName": "OCR.DEMAND_CODE_RD.SUPPLIER_NONE.HITM_OTHER_CORE",
858        "MSRIndex": "0x1a6,0x1a7",
859        "MSRValue": "0x1000020004",
860        "Offcore": "1",
861        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
862        "SampleAfterValue": "100003",
863        "UMask": "0x1"
864    },
865    {
866        "BriefDescription": "Counts all demand code reads  OCR.DEMAND_CODE_RD.SUPPLIER_NONE.HIT_OTHER_CORE_FWD",
867        "Counter": "0,1,2,3",
868        "CounterHTOff": "0,1,2,3",
869        "EventCode": "0xB7, 0xBB",
870        "EventName": "OCR.DEMAND_CODE_RD.SUPPLIER_NONE.HIT_OTHER_CORE_FWD",
871        "MSRIndex": "0x1a6,0x1a7",
872        "MSRValue": "0x800020004",
873        "Offcore": "1",
874        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
875        "SampleAfterValue": "100003",
876        "UMask": "0x1"
877    },
878    {
879        "BriefDescription": "Counts all demand code reads  OCR.DEMAND_CODE_RD.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD",
880        "Counter": "0,1,2,3",
881        "CounterHTOff": "0,1,2,3",
882        "EventCode": "0xB7, 0xBB",
883        "EventName": "OCR.DEMAND_CODE_RD.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD",
884        "MSRIndex": "0x1a6,0x1a7",
885        "MSRValue": "0x400020004",
886        "Offcore": "1",
887        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
888        "SampleAfterValue": "100003",
889        "UMask": "0x1"
890    },
891    {
892        "BriefDescription": "Counts all demand code reads  OCR.DEMAND_CODE_RD.SUPPLIER_NONE.NO_SNOOP_NEEDED",
893        "Counter": "0,1,2,3",
894        "CounterHTOff": "0,1,2,3",
895        "EventCode": "0xB7, 0xBB",
896        "EventName": "OCR.DEMAND_CODE_RD.SUPPLIER_NONE.NO_SNOOP_NEEDED",
897        "MSRIndex": "0x1a6,0x1a7",
898        "MSRValue": "0x100020004",
899        "Offcore": "1",
900        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
901        "SampleAfterValue": "100003",
902        "UMask": "0x1"
903    },
904    {
905        "BriefDescription": "Counts all demand code reads",
906        "Counter": "0,1,2,3",
907        "CounterHTOff": "0,1,2,3",
908        "EventCode": "0xB7, 0xBB",
909        "EventName": "OCR.DEMAND_CODE_RD.SUPPLIER_NONE.SNOOP_MISS",
910        "MSRIndex": "0x1a6,0x1a7",
911        "MSRValue": "0x200020004",
912        "Offcore": "1",
913        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
914        "SampleAfterValue": "100003",
915        "UMask": "0x1"
916    },
917    {
918        "BriefDescription": "Counts all demand code reads",
919        "Counter": "0,1,2,3",
920        "CounterHTOff": "0,1,2,3",
921        "EventCode": "0xB7, 0xBB",
922        "EventName": "OCR.DEMAND_CODE_RD.SUPPLIER_NONE.SNOOP_NONE",
923        "MSRIndex": "0x1a6,0x1a7",
924        "MSRValue": "0x80020004",
925        "Offcore": "1",
926        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
927        "SampleAfterValue": "100003",
928        "UMask": "0x1"
929    },
930    {
931        "BriefDescription": "Counts demand data reads have any response type.",
932        "Counter": "0,1,2,3",
933        "CounterHTOff": "0,1,2,3",
934        "EventCode": "0xB7, 0xBB",
935        "EventName": "OCR.DEMAND_DATA_RD.ANY_RESPONSE",
936        "MSRIndex": "0x1a6,0x1a7",
937        "MSRValue": "0x10001",
938        "Offcore": "1",
939        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
940        "SampleAfterValue": "100003",
941        "UMask": "0x1"
942    },
943    {
944        "BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.PMM_HIT_LOCAL_PMM.ANY_SNOOP",
945        "Counter": "0,1,2,3",
946        "CounterHTOff": "0,1,2,3",
947        "EventCode": "0xB7, 0xBB",
948        "EventName": "OCR.DEMAND_DATA_RD.PMM_HIT_LOCAL_PMM.ANY_SNOOP",
949        "MSRIndex": "0x1a6,0x1a7",
950        "MSRValue": "0x3F80400001",
951        "Offcore": "1",
952        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
953        "SampleAfterValue": "100003",
954        "UMask": "0x1"
955    },
956    {
957        "BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.PMM_HIT_LOCAL_PMM.SNOOP_NONE",
958        "Counter": "0,1,2,3",
959        "CounterHTOff": "0,1,2,3",
960        "EventCode": "0xB7, 0xBB",
961        "EventName": "OCR.DEMAND_DATA_RD.PMM_HIT_LOCAL_PMM.SNOOP_NONE",
962        "MSRIndex": "0x1a6,0x1a7",
963        "MSRValue": "0x80400001",
964        "Offcore": "1",
965        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
966        "SampleAfterValue": "100003",
967        "UMask": "0x1"
968    },
969    {
970        "BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED",
971        "Counter": "0,1,2,3",
972        "CounterHTOff": "0,1,2,3",
973        "EventCode": "0xB7, 0xBB",
974        "EventName": "OCR.DEMAND_DATA_RD.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED",
975        "MSRIndex": "0x1a6,0x1a7",
976        "MSRValue": "0x100400001",
977        "Offcore": "1",
978        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
979        "SampleAfterValue": "100003",
980        "UMask": "0x1"
981    },
982    {
983        "BriefDescription": "Counts demand data reads  OCR.DEMAND_DATA_RD.SUPPLIER_NONE.ANY_SNOOP",
984        "Counter": "0,1,2,3",
985        "CounterHTOff": "0,1,2,3",
986        "EventCode": "0xB7, 0xBB",
987        "EventName": "OCR.DEMAND_DATA_RD.SUPPLIER_NONE.ANY_SNOOP",
988        "MSRIndex": "0x1a6,0x1a7",
989        "MSRValue": "0x3F80020001",
990        "Offcore": "1",
991        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
992        "SampleAfterValue": "100003",
993        "UMask": "0x1"
994    },
995    {
996        "BriefDescription": "Counts demand data reads  OCR.DEMAND_DATA_RD.SUPPLIER_NONE.HITM_OTHER_CORE",
997        "Counter": "0,1,2,3",
998        "CounterHTOff": "0,1,2,3",
999        "EventCode": "0xB7, 0xBB",
1000        "EventName": "OCR.DEMAND_DATA_RD.SUPPLIER_NONE.HITM_OTHER_CORE",
1001        "MSRIndex": "0x1a6,0x1a7",
1002        "MSRValue": "0x1000020001",
1003        "Offcore": "1",
1004        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
1005        "SampleAfterValue": "100003",
1006        "UMask": "0x1"
1007    },
1008    {
1009        "BriefDescription": "Counts demand data reads  OCR.DEMAND_DATA_RD.SUPPLIER_NONE.HIT_OTHER_CORE_FWD",
1010        "Counter": "0,1,2,3",
1011        "CounterHTOff": "0,1,2,3",
1012        "EventCode": "0xB7, 0xBB",
1013        "EventName": "OCR.DEMAND_DATA_RD.SUPPLIER_NONE.HIT_OTHER_CORE_FWD",
1014        "MSRIndex": "0x1a6,0x1a7",
1015        "MSRValue": "0x800020001",
1016        "Offcore": "1",
1017        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
1018        "SampleAfterValue": "100003",
1019        "UMask": "0x1"
1020    },
1021    {
1022        "BriefDescription": "Counts demand data reads  OCR.DEMAND_DATA_RD.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD",
1023        "Counter": "0,1,2,3",
1024        "CounterHTOff": "0,1,2,3",
1025        "EventCode": "0xB7, 0xBB",
1026        "EventName": "OCR.DEMAND_DATA_RD.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD",
1027        "MSRIndex": "0x1a6,0x1a7",
1028        "MSRValue": "0x400020001",
1029        "Offcore": "1",
1030        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
1031        "SampleAfterValue": "100003",
1032        "UMask": "0x1"
1033    },
1034    {
1035        "BriefDescription": "Counts demand data reads  OCR.DEMAND_DATA_RD.SUPPLIER_NONE.NO_SNOOP_NEEDED",
1036        "Counter": "0,1,2,3",
1037        "CounterHTOff": "0,1,2,3",
1038        "EventCode": "0xB7, 0xBB",
1039        "EventName": "OCR.DEMAND_DATA_RD.SUPPLIER_NONE.NO_SNOOP_NEEDED",
1040        "MSRIndex": "0x1a6,0x1a7",
1041        "MSRValue": "0x100020001",
1042        "Offcore": "1",
1043        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
1044        "SampleAfterValue": "100003",
1045        "UMask": "0x1"
1046    },
1047    {
1048        "BriefDescription": "Counts demand data reads",
1049        "Counter": "0,1,2,3",
1050        "CounterHTOff": "0,1,2,3",
1051        "EventCode": "0xB7, 0xBB",
1052        "EventName": "OCR.DEMAND_DATA_RD.SUPPLIER_NONE.SNOOP_MISS",
1053        "MSRIndex": "0x1a6,0x1a7",
1054        "MSRValue": "0x200020001",
1055        "Offcore": "1",
1056        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
1057        "SampleAfterValue": "100003",
1058        "UMask": "0x1"
1059    },
1060    {
1061        "BriefDescription": "Counts demand data reads",
1062        "Counter": "0,1,2,3",
1063        "CounterHTOff": "0,1,2,3",
1064        "EventCode": "0xB7, 0xBB",
1065        "EventName": "OCR.DEMAND_DATA_RD.SUPPLIER_NONE.SNOOP_NONE",
1066        "MSRIndex": "0x1a6,0x1a7",
1067        "MSRValue": "0x80020001",
1068        "Offcore": "1",
1069        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
1070        "SampleAfterValue": "100003",
1071        "UMask": "0x1"
1072    },
1073    {
1074        "BriefDescription": "Counts all demand data writes (RFOs) have any response type.",
1075        "Counter": "0,1,2,3",
1076        "CounterHTOff": "0,1,2,3",
1077        "EventCode": "0xB7, 0xBB",
1078        "EventName": "OCR.DEMAND_RFO.ANY_RESPONSE",
1079        "MSRIndex": "0x1a6,0x1a7",
1080        "MSRValue": "0x10002",
1081        "Offcore": "1",
1082        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
1083        "SampleAfterValue": "100003",
1084        "UMask": "0x1"
1085    },
1086    {
1087        "BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.PMM_HIT_LOCAL_PMM.ANY_SNOOP",
1088        "Counter": "0,1,2,3",
1089        "CounterHTOff": "0,1,2,3",
1090        "EventCode": "0xB7, 0xBB",
1091        "EventName": "OCR.DEMAND_RFO.PMM_HIT_LOCAL_PMM.ANY_SNOOP",
1092        "MSRIndex": "0x1a6,0x1a7",
1093        "MSRValue": "0x3F80400002",
1094        "Offcore": "1",
1095        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
1096        "SampleAfterValue": "100003",
1097        "UMask": "0x1"
1098    },
1099    {
1100        "BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.PMM_HIT_LOCAL_PMM.SNOOP_NONE",
1101        "Counter": "0,1,2,3",
1102        "CounterHTOff": "0,1,2,3",
1103        "EventCode": "0xB7, 0xBB",
1104        "EventName": "OCR.DEMAND_RFO.PMM_HIT_LOCAL_PMM.SNOOP_NONE",
1105        "MSRIndex": "0x1a6,0x1a7",
1106        "MSRValue": "0x80400002",
1107        "Offcore": "1",
1108        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
1109        "SampleAfterValue": "100003",
1110        "UMask": "0x1"
1111    },
1112    {
1113        "BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED",
1114        "Counter": "0,1,2,3",
1115        "CounterHTOff": "0,1,2,3",
1116        "EventCode": "0xB7, 0xBB",
1117        "EventName": "OCR.DEMAND_RFO.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED",
1118        "MSRIndex": "0x1a6,0x1a7",
1119        "MSRValue": "0x100400002",
1120        "Offcore": "1",
1121        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
1122        "SampleAfterValue": "100003",
1123        "UMask": "0x1"
1124    },
1125    {
1126        "BriefDescription": "Counts all demand data writes (RFOs)  OCR.DEMAND_RFO.SUPPLIER_NONE.ANY_SNOOP",
1127        "Counter": "0,1,2,3",
1128        "CounterHTOff": "0,1,2,3",
1129        "EventCode": "0xB7, 0xBB",
1130        "EventName": "OCR.DEMAND_RFO.SUPPLIER_NONE.ANY_SNOOP",
1131        "MSRIndex": "0x1a6,0x1a7",
1132        "MSRValue": "0x3F80020002",
1133        "Offcore": "1",
1134        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
1135        "SampleAfterValue": "100003",
1136        "UMask": "0x1"
1137    },
1138    {
1139        "BriefDescription": "Counts all demand data writes (RFOs)  OCR.DEMAND_RFO.SUPPLIER_NONE.HITM_OTHER_CORE",
1140        "Counter": "0,1,2,3",
1141        "CounterHTOff": "0,1,2,3",
1142        "EventCode": "0xB7, 0xBB",
1143        "EventName": "OCR.DEMAND_RFO.SUPPLIER_NONE.HITM_OTHER_CORE",
1144        "MSRIndex": "0x1a6,0x1a7",
1145        "MSRValue": "0x1000020002",
1146        "Offcore": "1",
1147        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
1148        "SampleAfterValue": "100003",
1149        "UMask": "0x1"
1150    },
1151    {
1152        "BriefDescription": "Counts all demand data writes (RFOs)  OCR.DEMAND_RFO.SUPPLIER_NONE.HIT_OTHER_CORE_FWD",
1153        "Counter": "0,1,2,3",
1154        "CounterHTOff": "0,1,2,3",
1155        "EventCode": "0xB7, 0xBB",
1156        "EventName": "OCR.DEMAND_RFO.SUPPLIER_NONE.HIT_OTHER_CORE_FWD",
1157        "MSRIndex": "0x1a6,0x1a7",
1158        "MSRValue": "0x800020002",
1159        "Offcore": "1",
1160        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
1161        "SampleAfterValue": "100003",
1162        "UMask": "0x1"
1163    },
1164    {
1165        "BriefDescription": "Counts all demand data writes (RFOs)  OCR.DEMAND_RFO.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD",
1166        "Counter": "0,1,2,3",
1167        "CounterHTOff": "0,1,2,3",
1168        "EventCode": "0xB7, 0xBB",
1169        "EventName": "OCR.DEMAND_RFO.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD",
1170        "MSRIndex": "0x1a6,0x1a7",
1171        "MSRValue": "0x400020002",
1172        "Offcore": "1",
1173        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
1174        "SampleAfterValue": "100003",
1175        "UMask": "0x1"
1176    },
1177    {
1178        "BriefDescription": "Counts all demand data writes (RFOs)  OCR.DEMAND_RFO.SUPPLIER_NONE.NO_SNOOP_NEEDED",
1179        "Counter": "0,1,2,3",
1180        "CounterHTOff": "0,1,2,3",
1181        "EventCode": "0xB7, 0xBB",
1182        "EventName": "OCR.DEMAND_RFO.SUPPLIER_NONE.NO_SNOOP_NEEDED",
1183        "MSRIndex": "0x1a6,0x1a7",
1184        "MSRValue": "0x100020002",
1185        "Offcore": "1",
1186        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
1187        "SampleAfterValue": "100003",
1188        "UMask": "0x1"
1189    },
1190    {
1191        "BriefDescription": "Counts all demand data writes (RFOs)",
1192        "Counter": "0,1,2,3",
1193        "CounterHTOff": "0,1,2,3",
1194        "EventCode": "0xB7, 0xBB",
1195        "EventName": "OCR.DEMAND_RFO.SUPPLIER_NONE.SNOOP_MISS",
1196        "MSRIndex": "0x1a6,0x1a7",
1197        "MSRValue": "0x200020002",
1198        "Offcore": "1",
1199        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
1200        "SampleAfterValue": "100003",
1201        "UMask": "0x1"
1202    },
1203    {
1204        "BriefDescription": "Counts all demand data writes (RFOs)",
1205        "Counter": "0,1,2,3",
1206        "CounterHTOff": "0,1,2,3",
1207        "EventCode": "0xB7, 0xBB",
1208        "EventName": "OCR.DEMAND_RFO.SUPPLIER_NONE.SNOOP_NONE",
1209        "MSRIndex": "0x1a6,0x1a7",
1210        "MSRValue": "0x80020002",
1211        "Offcore": "1",
1212        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
1213        "SampleAfterValue": "100003",
1214        "UMask": "0x1"
1215    },
1216    {
1217        "BriefDescription": "Counts any other requests have any response type.",
1218        "Counter": "0,1,2,3",
1219        "CounterHTOff": "0,1,2,3",
1220        "EventCode": "0xB7, 0xBB",
1221        "EventName": "OCR.OTHER.ANY_RESPONSE",
1222        "MSRIndex": "0x1a6,0x1a7",
1223        "MSRValue": "0x18000",
1224        "Offcore": "1",
1225        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
1226        "SampleAfterValue": "100003",
1227        "UMask": "0x1"
1228    },
1229    {
1230        "BriefDescription": "Counts any other requests OCR.OTHER.PMM_HIT_LOCAL_PMM.ANY_SNOOP",
1231        "Counter": "0,1,2,3",
1232        "CounterHTOff": "0,1,2,3",
1233        "EventCode": "0xB7, 0xBB",
1234        "EventName": "OCR.OTHER.PMM_HIT_LOCAL_PMM.ANY_SNOOP",
1235        "MSRIndex": "0x1a6,0x1a7",
1236        "MSRValue": "0x3F80408000",
1237        "Offcore": "1",
1238        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
1239        "SampleAfterValue": "100003",
1240        "UMask": "0x1"
1241    },
1242    {
1243        "BriefDescription": "Counts any other requests OCR.OTHER.PMM_HIT_LOCAL_PMM.SNOOP_NONE",
1244        "Counter": "0,1,2,3",
1245        "CounterHTOff": "0,1,2,3",
1246        "EventCode": "0xB7, 0xBB",
1247        "EventName": "OCR.OTHER.PMM_HIT_LOCAL_PMM.SNOOP_NONE",
1248        "MSRIndex": "0x1a6,0x1a7",
1249        "MSRValue": "0x80408000",
1250        "Offcore": "1",
1251        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
1252        "SampleAfterValue": "100003",
1253        "UMask": "0x1"
1254    },
1255    {
1256        "BriefDescription": "Counts any other requests OCR.OTHER.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED",
1257        "Counter": "0,1,2,3",
1258        "CounterHTOff": "0,1,2,3",
1259        "EventCode": "0xB7, 0xBB",
1260        "EventName": "OCR.OTHER.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED",
1261        "MSRIndex": "0x1a6,0x1a7",
1262        "MSRValue": "0x100408000",
1263        "Offcore": "1",
1264        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
1265        "SampleAfterValue": "100003",
1266        "UMask": "0x1"
1267    },
1268    {
1269        "BriefDescription": "Counts any other requests  OCR.OTHER.SUPPLIER_NONE.ANY_SNOOP",
1270        "Counter": "0,1,2,3",
1271        "CounterHTOff": "0,1,2,3",
1272        "EventCode": "0xB7, 0xBB",
1273        "EventName": "OCR.OTHER.SUPPLIER_NONE.ANY_SNOOP",
1274        "MSRIndex": "0x1a6,0x1a7",
1275        "MSRValue": "0x3F80028000",
1276        "Offcore": "1",
1277        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
1278        "SampleAfterValue": "100003",
1279        "UMask": "0x1"
1280    },
1281    {
1282        "BriefDescription": "Counts any other requests  OCR.OTHER.SUPPLIER_NONE.HITM_OTHER_CORE",
1283        "Counter": "0,1,2,3",
1284        "CounterHTOff": "0,1,2,3",
1285        "EventCode": "0xB7, 0xBB",
1286        "EventName": "OCR.OTHER.SUPPLIER_NONE.HITM_OTHER_CORE",
1287        "MSRIndex": "0x1a6,0x1a7",
1288        "MSRValue": "0x1000028000",
1289        "Offcore": "1",
1290        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
1291        "SampleAfterValue": "100003",
1292        "UMask": "0x1"
1293    },
1294    {
1295        "BriefDescription": "Counts any other requests  OCR.OTHER.SUPPLIER_NONE.HIT_OTHER_CORE_FWD",
1296        "Counter": "0,1,2,3",
1297        "CounterHTOff": "0,1,2,3",
1298        "EventCode": "0xB7, 0xBB",
1299        "EventName": "OCR.OTHER.SUPPLIER_NONE.HIT_OTHER_CORE_FWD",
1300        "MSRIndex": "0x1a6,0x1a7",
1301        "MSRValue": "0x800028000",
1302        "Offcore": "1",
1303        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
1304        "SampleAfterValue": "100003",
1305        "UMask": "0x1"
1306    },
1307    {
1308        "BriefDescription": "Counts any other requests  OCR.OTHER.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD",
1309        "Counter": "0,1,2,3",
1310        "CounterHTOff": "0,1,2,3",
1311        "EventCode": "0xB7, 0xBB",
1312        "EventName": "OCR.OTHER.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD",
1313        "MSRIndex": "0x1a6,0x1a7",
1314        "MSRValue": "0x400028000",
1315        "Offcore": "1",
1316        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
1317        "SampleAfterValue": "100003",
1318        "UMask": "0x1"
1319    },
1320    {
1321        "BriefDescription": "Counts any other requests  OCR.OTHER.SUPPLIER_NONE.NO_SNOOP_NEEDED",
1322        "Counter": "0,1,2,3",
1323        "CounterHTOff": "0,1,2,3",
1324        "EventCode": "0xB7, 0xBB",
1325        "EventName": "OCR.OTHER.SUPPLIER_NONE.NO_SNOOP_NEEDED",
1326        "MSRIndex": "0x1a6,0x1a7",
1327        "MSRValue": "0x100028000",
1328        "Offcore": "1",
1329        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
1330        "SampleAfterValue": "100003",
1331        "UMask": "0x1"
1332    },
1333    {
1334        "BriefDescription": "Counts any other requests",
1335        "Counter": "0,1,2,3",
1336        "CounterHTOff": "0,1,2,3",
1337        "EventCode": "0xB7, 0xBB",
1338        "EventName": "OCR.OTHER.SUPPLIER_NONE.SNOOP_MISS",
1339        "MSRIndex": "0x1a6,0x1a7",
1340        "MSRValue": "0x200028000",
1341        "Offcore": "1",
1342        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
1343        "SampleAfterValue": "100003",
1344        "UMask": "0x1"
1345    },
1346    {
1347        "BriefDescription": "Counts any other requests",
1348        "Counter": "0,1,2,3",
1349        "CounterHTOff": "0,1,2,3",
1350        "EventCode": "0xB7, 0xBB",
1351        "EventName": "OCR.OTHER.SUPPLIER_NONE.SNOOP_NONE",
1352        "MSRIndex": "0x1a6,0x1a7",
1353        "MSRValue": "0x80028000",
1354        "Offcore": "1",
1355        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
1356        "SampleAfterValue": "100003",
1357        "UMask": "0x1"
1358    },
1359    {
1360        "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests have any response type.",
1361        "Counter": "0,1,2,3",
1362        "CounterHTOff": "0,1,2,3",
1363        "EventCode": "0xB7, 0xBB",
1364        "EventName": "OCR.PF_L1D_AND_SW.ANY_RESPONSE",
1365        "MSRIndex": "0x1a6,0x1a7",
1366        "MSRValue": "0x10400",
1367        "Offcore": "1",
1368        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
1369        "SampleAfterValue": "100003",
1370        "UMask": "0x1"
1371    },
1372    {
1373        "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.PMM_HIT_LOCAL_PMM.ANY_SNOOP",
1374        "Counter": "0,1,2,3",
1375        "CounterHTOff": "0,1,2,3",
1376        "EventCode": "0xB7, 0xBB",
1377        "EventName": "OCR.PF_L1D_AND_SW.PMM_HIT_LOCAL_PMM.ANY_SNOOP",
1378        "MSRIndex": "0x1a6,0x1a7",
1379        "MSRValue": "0x3F80400400",
1380        "Offcore": "1",
1381        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
1382        "SampleAfterValue": "100003",
1383        "UMask": "0x1"
1384    },
1385    {
1386        "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.PMM_HIT_LOCAL_PMM.SNOOP_NONE",
1387        "Counter": "0,1,2,3",
1388        "CounterHTOff": "0,1,2,3",
1389        "EventCode": "0xB7, 0xBB",
1390        "EventName": "OCR.PF_L1D_AND_SW.PMM_HIT_LOCAL_PMM.SNOOP_NONE",
1391        "MSRIndex": "0x1a6,0x1a7",
1392        "MSRValue": "0x80400400",
1393        "Offcore": "1",
1394        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
1395        "SampleAfterValue": "100003",
1396        "UMask": "0x1"
1397    },
1398    {
1399        "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED",
1400        "Counter": "0,1,2,3",
1401        "CounterHTOff": "0,1,2,3",
1402        "EventCode": "0xB7, 0xBB",
1403        "EventName": "OCR.PF_L1D_AND_SW.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED",
1404        "MSRIndex": "0x1a6,0x1a7",
1405        "MSRValue": "0x100400400",
1406        "Offcore": "1",
1407        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
1408        "SampleAfterValue": "100003",
1409        "UMask": "0x1"
1410    },
1411    {
1412        "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests  OCR.PF_L1D_AND_SW.SUPPLIER_NONE.ANY_SNOOP",
1413        "Counter": "0,1,2,3",
1414        "CounterHTOff": "0,1,2,3",
1415        "EventCode": "0xB7, 0xBB",
1416        "EventName": "OCR.PF_L1D_AND_SW.SUPPLIER_NONE.ANY_SNOOP",
1417        "MSRIndex": "0x1a6,0x1a7",
1418        "MSRValue": "0x3F80020400",
1419        "Offcore": "1",
1420        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
1421        "SampleAfterValue": "100003",
1422        "UMask": "0x1"
1423    },
1424    {
1425        "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests  OCR.PF_L1D_AND_SW.SUPPLIER_NONE.HITM_OTHER_CORE",
1426        "Counter": "0,1,2,3",
1427        "CounterHTOff": "0,1,2,3",
1428        "EventCode": "0xB7, 0xBB",
1429        "EventName": "OCR.PF_L1D_AND_SW.SUPPLIER_NONE.HITM_OTHER_CORE",
1430        "MSRIndex": "0x1a6,0x1a7",
1431        "MSRValue": "0x1000020400",
1432        "Offcore": "1",
1433        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
1434        "SampleAfterValue": "100003",
1435        "UMask": "0x1"
1436    },
1437    {
1438        "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests  OCR.PF_L1D_AND_SW.SUPPLIER_NONE.HIT_OTHER_CORE_FWD",
1439        "Counter": "0,1,2,3",
1440        "CounterHTOff": "0,1,2,3",
1441        "EventCode": "0xB7, 0xBB",
1442        "EventName": "OCR.PF_L1D_AND_SW.SUPPLIER_NONE.HIT_OTHER_CORE_FWD",
1443        "MSRIndex": "0x1a6,0x1a7",
1444        "MSRValue": "0x800020400",
1445        "Offcore": "1",
1446        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
1447        "SampleAfterValue": "100003",
1448        "UMask": "0x1"
1449    },
1450    {
1451        "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests  OCR.PF_L1D_AND_SW.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD",
1452        "Counter": "0,1,2,3",
1453        "CounterHTOff": "0,1,2,3",
1454        "EventCode": "0xB7, 0xBB",
1455        "EventName": "OCR.PF_L1D_AND_SW.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD",
1456        "MSRIndex": "0x1a6,0x1a7",
1457        "MSRValue": "0x400020400",
1458        "Offcore": "1",
1459        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
1460        "SampleAfterValue": "100003",
1461        "UMask": "0x1"
1462    },
1463    {
1464        "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests  OCR.PF_L1D_AND_SW.SUPPLIER_NONE.NO_SNOOP_NEEDED",
1465        "Counter": "0,1,2,3",
1466        "CounterHTOff": "0,1,2,3",
1467        "EventCode": "0xB7, 0xBB",
1468        "EventName": "OCR.PF_L1D_AND_SW.SUPPLIER_NONE.NO_SNOOP_NEEDED",
1469        "MSRIndex": "0x1a6,0x1a7",
1470        "MSRValue": "0x100020400",
1471        "Offcore": "1",
1472        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
1473        "SampleAfterValue": "100003",
1474        "UMask": "0x1"
1475    },
1476    {
1477        "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests",
1478        "Counter": "0,1,2,3",
1479        "CounterHTOff": "0,1,2,3",
1480        "EventCode": "0xB7, 0xBB",
1481        "EventName": "OCR.PF_L1D_AND_SW.SUPPLIER_NONE.SNOOP_MISS",
1482        "MSRIndex": "0x1a6,0x1a7",
1483        "MSRValue": "0x200020400",
1484        "Offcore": "1",
1485        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
1486        "SampleAfterValue": "100003",
1487        "UMask": "0x1"
1488    },
1489    {
1490        "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests",
1491        "Counter": "0,1,2,3",
1492        "CounterHTOff": "0,1,2,3",
1493        "EventCode": "0xB7, 0xBB",
1494        "EventName": "OCR.PF_L1D_AND_SW.SUPPLIER_NONE.SNOOP_NONE",
1495        "MSRIndex": "0x1a6,0x1a7",
1496        "MSRValue": "0x80020400",
1497        "Offcore": "1",
1498        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
1499        "SampleAfterValue": "100003",
1500        "UMask": "0x1"
1501    },
1502    {
1503        "BriefDescription": "Counts prefetch (that bring data to L2) data reads have any response type.",
1504        "Counter": "0,1,2,3",
1505        "CounterHTOff": "0,1,2,3",
1506        "EventCode": "0xB7, 0xBB",
1507        "EventName": "OCR.PF_L2_DATA_RD.ANY_RESPONSE",
1508        "MSRIndex": "0x1a6,0x1a7",
1509        "MSRValue": "0x10010",
1510        "Offcore": "1",
1511        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
1512        "SampleAfterValue": "100003",
1513        "UMask": "0x1"
1514    },
1515    {
1516        "BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.PMM_HIT_LOCAL_PMM.ANY_SNOOP",
1517        "Counter": "0,1,2,3",
1518        "CounterHTOff": "0,1,2,3",
1519        "EventCode": "0xB7, 0xBB",
1520        "EventName": "OCR.PF_L2_DATA_RD.PMM_HIT_LOCAL_PMM.ANY_SNOOP",
1521        "MSRIndex": "0x1a6,0x1a7",
1522        "MSRValue": "0x3F80400010",
1523        "Offcore": "1",
1524        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
1525        "SampleAfterValue": "100003",
1526        "UMask": "0x1"
1527    },
1528    {
1529        "BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.PMM_HIT_LOCAL_PMM.SNOOP_NONE",
1530        "Counter": "0,1,2,3",
1531        "CounterHTOff": "0,1,2,3",
1532        "EventCode": "0xB7, 0xBB",
1533        "EventName": "OCR.PF_L2_DATA_RD.PMM_HIT_LOCAL_PMM.SNOOP_NONE",
1534        "MSRIndex": "0x1a6,0x1a7",
1535        "MSRValue": "0x80400010",
1536        "Offcore": "1",
1537        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
1538        "SampleAfterValue": "100003",
1539        "UMask": "0x1"
1540    },
1541    {
1542        "BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED",
1543        "Counter": "0,1,2,3",
1544        "CounterHTOff": "0,1,2,3",
1545        "EventCode": "0xB7, 0xBB",
1546        "EventName": "OCR.PF_L2_DATA_RD.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED",
1547        "MSRIndex": "0x1a6,0x1a7",
1548        "MSRValue": "0x100400010",
1549        "Offcore": "1",
1550        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
1551        "SampleAfterValue": "100003",
1552        "UMask": "0x1"
1553    },
1554    {
1555        "BriefDescription": "Counts prefetch (that bring data to L2) data reads  OCR.PF_L2_DATA_RD.SUPPLIER_NONE.ANY_SNOOP",
1556        "Counter": "0,1,2,3",
1557        "CounterHTOff": "0,1,2,3",
1558        "EventCode": "0xB7, 0xBB",
1559        "EventName": "OCR.PF_L2_DATA_RD.SUPPLIER_NONE.ANY_SNOOP",
1560        "MSRIndex": "0x1a6,0x1a7",
1561        "MSRValue": "0x3F80020010",
1562        "Offcore": "1",
1563        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
1564        "SampleAfterValue": "100003",
1565        "UMask": "0x1"
1566    },
1567    {
1568        "BriefDescription": "Counts prefetch (that bring data to L2) data reads  OCR.PF_L2_DATA_RD.SUPPLIER_NONE.HITM_OTHER_CORE",
1569        "Counter": "0,1,2,3",
1570        "CounterHTOff": "0,1,2,3",
1571        "EventCode": "0xB7, 0xBB",
1572        "EventName": "OCR.PF_L2_DATA_RD.SUPPLIER_NONE.HITM_OTHER_CORE",
1573        "MSRIndex": "0x1a6,0x1a7",
1574        "MSRValue": "0x1000020010",
1575        "Offcore": "1",
1576        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
1577        "SampleAfterValue": "100003",
1578        "UMask": "0x1"
1579    },
1580    {
1581        "BriefDescription": "Counts prefetch (that bring data to L2) data reads  OCR.PF_L2_DATA_RD.SUPPLIER_NONE.HIT_OTHER_CORE_FWD",
1582        "Counter": "0,1,2,3",
1583        "CounterHTOff": "0,1,2,3",
1584        "EventCode": "0xB7, 0xBB",
1585        "EventName": "OCR.PF_L2_DATA_RD.SUPPLIER_NONE.HIT_OTHER_CORE_FWD",
1586        "MSRIndex": "0x1a6,0x1a7",
1587        "MSRValue": "0x800020010",
1588        "Offcore": "1",
1589        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
1590        "SampleAfterValue": "100003",
1591        "UMask": "0x1"
1592    },
1593    {
1594        "BriefDescription": "Counts prefetch (that bring data to L2) data reads  OCR.PF_L2_DATA_RD.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD",
1595        "Counter": "0,1,2,3",
1596        "CounterHTOff": "0,1,2,3",
1597        "EventCode": "0xB7, 0xBB",
1598        "EventName": "OCR.PF_L2_DATA_RD.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD",
1599        "MSRIndex": "0x1a6,0x1a7",
1600        "MSRValue": "0x400020010",
1601        "Offcore": "1",
1602        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
1603        "SampleAfterValue": "100003",
1604        "UMask": "0x1"
1605    },
1606    {
1607        "BriefDescription": "Counts prefetch (that bring data to L2) data reads  OCR.PF_L2_DATA_RD.SUPPLIER_NONE.NO_SNOOP_NEEDED",
1608        "Counter": "0,1,2,3",
1609        "CounterHTOff": "0,1,2,3",
1610        "EventCode": "0xB7, 0xBB",
1611        "EventName": "OCR.PF_L2_DATA_RD.SUPPLIER_NONE.NO_SNOOP_NEEDED",
1612        "MSRIndex": "0x1a6,0x1a7",
1613        "MSRValue": "0x100020010",
1614        "Offcore": "1",
1615        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
1616        "SampleAfterValue": "100003",
1617        "UMask": "0x1"
1618    },
1619    {
1620        "BriefDescription": "Counts prefetch (that bring data to L2) data reads",
1621        "Counter": "0,1,2,3",
1622        "CounterHTOff": "0,1,2,3",
1623        "EventCode": "0xB7, 0xBB",
1624        "EventName": "OCR.PF_L2_DATA_RD.SUPPLIER_NONE.SNOOP_MISS",
1625        "MSRIndex": "0x1a6,0x1a7",
1626        "MSRValue": "0x200020010",
1627        "Offcore": "1",
1628        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
1629        "SampleAfterValue": "100003",
1630        "UMask": "0x1"
1631    },
1632    {
1633        "BriefDescription": "Counts prefetch (that bring data to L2) data reads",
1634        "Counter": "0,1,2,3",
1635        "CounterHTOff": "0,1,2,3",
1636        "EventCode": "0xB7, 0xBB",
1637        "EventName": "OCR.PF_L2_DATA_RD.SUPPLIER_NONE.SNOOP_NONE",
1638        "MSRIndex": "0x1a6,0x1a7",
1639        "MSRValue": "0x80020010",
1640        "Offcore": "1",
1641        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
1642        "SampleAfterValue": "100003",
1643        "UMask": "0x1"
1644    },
1645    {
1646        "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs have any response type.",
1647        "Counter": "0,1,2,3",
1648        "CounterHTOff": "0,1,2,3",
1649        "EventCode": "0xB7, 0xBB",
1650        "EventName": "OCR.PF_L2_RFO.ANY_RESPONSE",
1651        "MSRIndex": "0x1a6,0x1a7",
1652        "MSRValue": "0x10020",
1653        "Offcore": "1",
1654        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
1655        "SampleAfterValue": "100003",
1656        "UMask": "0x1"
1657    },
1658    {
1659        "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.PMM_HIT_LOCAL_PMM.ANY_SNOOP",
1660        "Counter": "0,1,2,3",
1661        "CounterHTOff": "0,1,2,3",
1662        "EventCode": "0xB7, 0xBB",
1663        "EventName": "OCR.PF_L2_RFO.PMM_HIT_LOCAL_PMM.ANY_SNOOP",
1664        "MSRIndex": "0x1a6,0x1a7",
1665        "MSRValue": "0x3F80400020",
1666        "Offcore": "1",
1667        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
1668        "SampleAfterValue": "100003",
1669        "UMask": "0x1"
1670    },
1671    {
1672        "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.PMM_HIT_LOCAL_PMM.SNOOP_NONE",
1673        "Counter": "0,1,2,3",
1674        "CounterHTOff": "0,1,2,3",
1675        "EventCode": "0xB7, 0xBB",
1676        "EventName": "OCR.PF_L2_RFO.PMM_HIT_LOCAL_PMM.SNOOP_NONE",
1677        "MSRIndex": "0x1a6,0x1a7",
1678        "MSRValue": "0x80400020",
1679        "Offcore": "1",
1680        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
1681        "SampleAfterValue": "100003",
1682        "UMask": "0x1"
1683    },
1684    {
1685        "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED",
1686        "Counter": "0,1,2,3",
1687        "CounterHTOff": "0,1,2,3",
1688        "EventCode": "0xB7, 0xBB",
1689        "EventName": "OCR.PF_L2_RFO.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED",
1690        "MSRIndex": "0x1a6,0x1a7",
1691        "MSRValue": "0x100400020",
1692        "Offcore": "1",
1693        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
1694        "SampleAfterValue": "100003",
1695        "UMask": "0x1"
1696    },
1697    {
1698        "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs  OCR.PF_L2_RFO.SUPPLIER_NONE.ANY_SNOOP",
1699        "Counter": "0,1,2,3",
1700        "CounterHTOff": "0,1,2,3",
1701        "EventCode": "0xB7, 0xBB",
1702        "EventName": "OCR.PF_L2_RFO.SUPPLIER_NONE.ANY_SNOOP",
1703        "MSRIndex": "0x1a6,0x1a7",
1704        "MSRValue": "0x3F80020020",
1705        "Offcore": "1",
1706        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
1707        "SampleAfterValue": "100003",
1708        "UMask": "0x1"
1709    },
1710    {
1711        "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs  OCR.PF_L2_RFO.SUPPLIER_NONE.HITM_OTHER_CORE",
1712        "Counter": "0,1,2,3",
1713        "CounterHTOff": "0,1,2,3",
1714        "EventCode": "0xB7, 0xBB",
1715        "EventName": "OCR.PF_L2_RFO.SUPPLIER_NONE.HITM_OTHER_CORE",
1716        "MSRIndex": "0x1a6,0x1a7",
1717        "MSRValue": "0x1000020020",
1718        "Offcore": "1",
1719        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
1720        "SampleAfterValue": "100003",
1721        "UMask": "0x1"
1722    },
1723    {
1724        "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs  OCR.PF_L2_RFO.SUPPLIER_NONE.HIT_OTHER_CORE_FWD",
1725        "Counter": "0,1,2,3",
1726        "CounterHTOff": "0,1,2,3",
1727        "EventCode": "0xB7, 0xBB",
1728        "EventName": "OCR.PF_L2_RFO.SUPPLIER_NONE.HIT_OTHER_CORE_FWD",
1729        "MSRIndex": "0x1a6,0x1a7",
1730        "MSRValue": "0x800020020",
1731        "Offcore": "1",
1732        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
1733        "SampleAfterValue": "100003",
1734        "UMask": "0x1"
1735    },
1736    {
1737        "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs  OCR.PF_L2_RFO.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD",
1738        "Counter": "0,1,2,3",
1739        "CounterHTOff": "0,1,2,3",
1740        "EventCode": "0xB7, 0xBB",
1741        "EventName": "OCR.PF_L2_RFO.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD",
1742        "MSRIndex": "0x1a6,0x1a7",
1743        "MSRValue": "0x400020020",
1744        "Offcore": "1",
1745        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
1746        "SampleAfterValue": "100003",
1747        "UMask": "0x1"
1748    },
1749    {
1750        "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs  OCR.PF_L2_RFO.SUPPLIER_NONE.NO_SNOOP_NEEDED",
1751        "Counter": "0,1,2,3",
1752        "CounterHTOff": "0,1,2,3",
1753        "EventCode": "0xB7, 0xBB",
1754        "EventName": "OCR.PF_L2_RFO.SUPPLIER_NONE.NO_SNOOP_NEEDED",
1755        "MSRIndex": "0x1a6,0x1a7",
1756        "MSRValue": "0x100020020",
1757        "Offcore": "1",
1758        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
1759        "SampleAfterValue": "100003",
1760        "UMask": "0x1"
1761    },
1762    {
1763        "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs",
1764        "Counter": "0,1,2,3",
1765        "CounterHTOff": "0,1,2,3",
1766        "EventCode": "0xB7, 0xBB",
1767        "EventName": "OCR.PF_L2_RFO.SUPPLIER_NONE.SNOOP_MISS",
1768        "MSRIndex": "0x1a6,0x1a7",
1769        "MSRValue": "0x200020020",
1770        "Offcore": "1",
1771        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
1772        "SampleAfterValue": "100003",
1773        "UMask": "0x1"
1774    },
1775    {
1776        "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs",
1777        "Counter": "0,1,2,3",
1778        "CounterHTOff": "0,1,2,3",
1779        "EventCode": "0xB7, 0xBB",
1780        "EventName": "OCR.PF_L2_RFO.SUPPLIER_NONE.SNOOP_NONE",
1781        "MSRIndex": "0x1a6,0x1a7",
1782        "MSRValue": "0x80020020",
1783        "Offcore": "1",
1784        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
1785        "SampleAfterValue": "100003",
1786        "UMask": "0x1"
1787    },
1788    {
1789        "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads have any response type.",
1790        "Counter": "0,1,2,3",
1791        "CounterHTOff": "0,1,2,3",
1792        "EventCode": "0xB7, 0xBB",
1793        "EventName": "OCR.PF_L3_DATA_RD.ANY_RESPONSE",
1794        "MSRIndex": "0x1a6,0x1a7",
1795        "MSRValue": "0x10080",
1796        "Offcore": "1",
1797        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
1798        "SampleAfterValue": "100003",
1799        "UMask": "0x1"
1800    },
1801    {
1802        "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.PMM_HIT_LOCAL_PMM.ANY_SNOOP",
1803        "Counter": "0,1,2,3",
1804        "CounterHTOff": "0,1,2,3",
1805        "EventCode": "0xB7, 0xBB",
1806        "EventName": "OCR.PF_L3_DATA_RD.PMM_HIT_LOCAL_PMM.ANY_SNOOP",
1807        "MSRIndex": "0x1a6,0x1a7",
1808        "MSRValue": "0x3F80400080",
1809        "Offcore": "1",
1810        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
1811        "SampleAfterValue": "100003",
1812        "UMask": "0x1"
1813    },
1814    {
1815        "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.PMM_HIT_LOCAL_PMM.SNOOP_NONE",
1816        "Counter": "0,1,2,3",
1817        "CounterHTOff": "0,1,2,3",
1818        "EventCode": "0xB7, 0xBB",
1819        "EventName": "OCR.PF_L3_DATA_RD.PMM_HIT_LOCAL_PMM.SNOOP_NONE",
1820        "MSRIndex": "0x1a6,0x1a7",
1821        "MSRValue": "0x80400080",
1822        "Offcore": "1",
1823        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
1824        "SampleAfterValue": "100003",
1825        "UMask": "0x1"
1826    },
1827    {
1828        "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED",
1829        "Counter": "0,1,2,3",
1830        "CounterHTOff": "0,1,2,3",
1831        "EventCode": "0xB7, 0xBB",
1832        "EventName": "OCR.PF_L3_DATA_RD.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED",
1833        "MSRIndex": "0x1a6,0x1a7",
1834        "MSRValue": "0x100400080",
1835        "Offcore": "1",
1836        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
1837        "SampleAfterValue": "100003",
1838        "UMask": "0x1"
1839    },
1840    {
1841        "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads  OCR.PF_L3_DATA_RD.SUPPLIER_NONE.ANY_SNOOP",
1842        "Counter": "0,1,2,3",
1843        "CounterHTOff": "0,1,2,3",
1844        "EventCode": "0xB7, 0xBB",
1845        "EventName": "OCR.PF_L3_DATA_RD.SUPPLIER_NONE.ANY_SNOOP",
1846        "MSRIndex": "0x1a6,0x1a7",
1847        "MSRValue": "0x3F80020080",
1848        "Offcore": "1",
1849        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
1850        "SampleAfterValue": "100003",
1851        "UMask": "0x1"
1852    },
1853    {
1854        "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads  OCR.PF_L3_DATA_RD.SUPPLIER_NONE.HITM_OTHER_CORE",
1855        "Counter": "0,1,2,3",
1856        "CounterHTOff": "0,1,2,3",
1857        "EventCode": "0xB7, 0xBB",
1858        "EventName": "OCR.PF_L3_DATA_RD.SUPPLIER_NONE.HITM_OTHER_CORE",
1859        "MSRIndex": "0x1a6,0x1a7",
1860        "MSRValue": "0x1000020080",
1861        "Offcore": "1",
1862        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
1863        "SampleAfterValue": "100003",
1864        "UMask": "0x1"
1865    },
1866    {
1867        "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads  OCR.PF_L3_DATA_RD.SUPPLIER_NONE.HIT_OTHER_CORE_FWD",
1868        "Counter": "0,1,2,3",
1869        "CounterHTOff": "0,1,2,3",
1870        "EventCode": "0xB7, 0xBB",
1871        "EventName": "OCR.PF_L3_DATA_RD.SUPPLIER_NONE.HIT_OTHER_CORE_FWD",
1872        "MSRIndex": "0x1a6,0x1a7",
1873        "MSRValue": "0x800020080",
1874        "Offcore": "1",
1875        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
1876        "SampleAfterValue": "100003",
1877        "UMask": "0x1"
1878    },
1879    {
1880        "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads  OCR.PF_L3_DATA_RD.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD",
1881        "Counter": "0,1,2,3",
1882        "CounterHTOff": "0,1,2,3",
1883        "EventCode": "0xB7, 0xBB",
1884        "EventName": "OCR.PF_L3_DATA_RD.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD",
1885        "MSRIndex": "0x1a6,0x1a7",
1886        "MSRValue": "0x400020080",
1887        "Offcore": "1",
1888        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
1889        "SampleAfterValue": "100003",
1890        "UMask": "0x1"
1891    },
1892    {
1893        "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads  OCR.PF_L3_DATA_RD.SUPPLIER_NONE.NO_SNOOP_NEEDED",
1894        "Counter": "0,1,2,3",
1895        "CounterHTOff": "0,1,2,3",
1896        "EventCode": "0xB7, 0xBB",
1897        "EventName": "OCR.PF_L3_DATA_RD.SUPPLIER_NONE.NO_SNOOP_NEEDED",
1898        "MSRIndex": "0x1a6,0x1a7",
1899        "MSRValue": "0x100020080",
1900        "Offcore": "1",
1901        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
1902        "SampleAfterValue": "100003",
1903        "UMask": "0x1"
1904    },
1905    {
1906        "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads",
1907        "Counter": "0,1,2,3",
1908        "CounterHTOff": "0,1,2,3",
1909        "EventCode": "0xB7, 0xBB",
1910        "EventName": "OCR.PF_L3_DATA_RD.SUPPLIER_NONE.SNOOP_MISS",
1911        "MSRIndex": "0x1a6,0x1a7",
1912        "MSRValue": "0x200020080",
1913        "Offcore": "1",
1914        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
1915        "SampleAfterValue": "100003",
1916        "UMask": "0x1"
1917    },
1918    {
1919        "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads",
1920        "Counter": "0,1,2,3",
1921        "CounterHTOff": "0,1,2,3",
1922        "EventCode": "0xB7, 0xBB",
1923        "EventName": "OCR.PF_L3_DATA_RD.SUPPLIER_NONE.SNOOP_NONE",
1924        "MSRIndex": "0x1a6,0x1a7",
1925        "MSRValue": "0x80020080",
1926        "Offcore": "1",
1927        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
1928        "SampleAfterValue": "100003",
1929        "UMask": "0x1"
1930    },
1931    {
1932        "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs have any response type.",
1933        "Counter": "0,1,2,3",
1934        "CounterHTOff": "0,1,2,3",
1935        "EventCode": "0xB7, 0xBB",
1936        "EventName": "OCR.PF_L3_RFO.ANY_RESPONSE",
1937        "MSRIndex": "0x1a6,0x1a7",
1938        "MSRValue": "0x10100",
1939        "Offcore": "1",
1940        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
1941        "SampleAfterValue": "100003",
1942        "UMask": "0x1"
1943    },
1944    {
1945        "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.PMM_HIT_LOCAL_PMM.ANY_SNOOP",
1946        "Counter": "0,1,2,3",
1947        "CounterHTOff": "0,1,2,3",
1948        "EventCode": "0xB7, 0xBB",
1949        "EventName": "OCR.PF_L3_RFO.PMM_HIT_LOCAL_PMM.ANY_SNOOP",
1950        "MSRIndex": "0x1a6,0x1a7",
1951        "MSRValue": "0x3F80400100",
1952        "Offcore": "1",
1953        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
1954        "SampleAfterValue": "100003",
1955        "UMask": "0x1"
1956    },
1957    {
1958        "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.PMM_HIT_LOCAL_PMM.SNOOP_NONE",
1959        "Counter": "0,1,2,3",
1960        "CounterHTOff": "0,1,2,3",
1961        "EventCode": "0xB7, 0xBB",
1962        "EventName": "OCR.PF_L3_RFO.PMM_HIT_LOCAL_PMM.SNOOP_NONE",
1963        "MSRIndex": "0x1a6,0x1a7",
1964        "MSRValue": "0x80400100",
1965        "Offcore": "1",
1966        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
1967        "SampleAfterValue": "100003",
1968        "UMask": "0x1"
1969    },
1970    {
1971        "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED",
1972        "Counter": "0,1,2,3",
1973        "CounterHTOff": "0,1,2,3",
1974        "EventCode": "0xB7, 0xBB",
1975        "EventName": "OCR.PF_L3_RFO.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED",
1976        "MSRIndex": "0x1a6,0x1a7",
1977        "MSRValue": "0x100400100",
1978        "Offcore": "1",
1979        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
1980        "SampleAfterValue": "100003",
1981        "UMask": "0x1"
1982    },
1983    {
1984        "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs  OCR.PF_L3_RFO.SUPPLIER_NONE.ANY_SNOOP",
1985        "Counter": "0,1,2,3",
1986        "CounterHTOff": "0,1,2,3",
1987        "EventCode": "0xB7, 0xBB",
1988        "EventName": "OCR.PF_L3_RFO.SUPPLIER_NONE.ANY_SNOOP",
1989        "MSRIndex": "0x1a6,0x1a7",
1990        "MSRValue": "0x3F80020100",
1991        "Offcore": "1",
1992        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
1993        "SampleAfterValue": "100003",
1994        "UMask": "0x1"
1995    },
1996    {
1997        "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs  OCR.PF_L3_RFO.SUPPLIER_NONE.HITM_OTHER_CORE",
1998        "Counter": "0,1,2,3",
1999        "CounterHTOff": "0,1,2,3",
2000        "EventCode": "0xB7, 0xBB",
2001        "EventName": "OCR.PF_L3_RFO.SUPPLIER_NONE.HITM_OTHER_CORE",
2002        "MSRIndex": "0x1a6,0x1a7",
2003        "MSRValue": "0x1000020100",
2004        "Offcore": "1",
2005        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
2006        "SampleAfterValue": "100003",
2007        "UMask": "0x1"
2008    },
2009    {
2010        "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs  OCR.PF_L3_RFO.SUPPLIER_NONE.HIT_OTHER_CORE_FWD",
2011        "Counter": "0,1,2,3",
2012        "CounterHTOff": "0,1,2,3",
2013        "EventCode": "0xB7, 0xBB",
2014        "EventName": "OCR.PF_L3_RFO.SUPPLIER_NONE.HIT_OTHER_CORE_FWD",
2015        "MSRIndex": "0x1a6,0x1a7",
2016        "MSRValue": "0x800020100",
2017        "Offcore": "1",
2018        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
2019        "SampleAfterValue": "100003",
2020        "UMask": "0x1"
2021    },
2022    {
2023        "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs  OCR.PF_L3_RFO.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD",
2024        "Counter": "0,1,2,3",
2025        "CounterHTOff": "0,1,2,3",
2026        "EventCode": "0xB7, 0xBB",
2027        "EventName": "OCR.PF_L3_RFO.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD",
2028        "MSRIndex": "0x1a6,0x1a7",
2029        "MSRValue": "0x400020100",
2030        "Offcore": "1",
2031        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
2032        "SampleAfterValue": "100003",
2033        "UMask": "0x1"
2034    },
2035    {
2036        "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs  OCR.PF_L3_RFO.SUPPLIER_NONE.NO_SNOOP_NEEDED",
2037        "Counter": "0,1,2,3",
2038        "CounterHTOff": "0,1,2,3",
2039        "EventCode": "0xB7, 0xBB",
2040        "EventName": "OCR.PF_L3_RFO.SUPPLIER_NONE.NO_SNOOP_NEEDED",
2041        "MSRIndex": "0x1a6,0x1a7",
2042        "MSRValue": "0x100020100",
2043        "Offcore": "1",
2044        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
2045        "SampleAfterValue": "100003",
2046        "UMask": "0x1"
2047    },
2048    {
2049        "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs",
2050        "Counter": "0,1,2,3",
2051        "CounterHTOff": "0,1,2,3",
2052        "EventCode": "0xB7, 0xBB",
2053        "EventName": "OCR.PF_L3_RFO.SUPPLIER_NONE.SNOOP_MISS",
2054        "MSRIndex": "0x1a6,0x1a7",
2055        "MSRValue": "0x200020100",
2056        "Offcore": "1",
2057        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
2058        "SampleAfterValue": "100003",
2059        "UMask": "0x1"
2060    },
2061    {
2062        "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs",
2063        "Counter": "0,1,2,3",
2064        "CounterHTOff": "0,1,2,3",
2065        "EventCode": "0xB7, 0xBB",
2066        "EventName": "OCR.PF_L3_RFO.SUPPLIER_NONE.SNOOP_NONE",
2067        "MSRIndex": "0x1a6,0x1a7",
2068        "MSRValue": "0x80020100",
2069        "Offcore": "1",
2070        "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
2071        "SampleAfterValue": "100003",
2072        "UMask": "0x1"
2073    }
2074]