1[ 2 { 3 "BriefDescription": "OCR.ALL_READS.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD OCR.ALL_READS.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 4 "Counter": "0,1,2,3", 5 "CounterHTOff": "0,1,2,3", 6 "EventCode": "0xB7, 0xBB", 7 "EventName": "OCR.ALL_READS.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 8 "MSRIndex": "0x1a6,0x1a7", 9 "MSRValue": "0x06040007F7", 10 "Offcore": "1", 11 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 12 "SampleAfterValue": "100003", 13 "UMask": "0x1" 14 }, 15 { 16 "BriefDescription": "OCR.ALL_DATA_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD OCR.ALL_DATA_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 17 "Counter": "0,1,2,3", 18 "CounterHTOff": "0,1,2,3", 19 "EventCode": "0xB7, 0xBB", 20 "EventName": "OCR.ALL_DATA_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 21 "MSRIndex": "0x1a6,0x1a7", 22 "MSRValue": "0x063B800491", 23 "Offcore": "1", 24 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 25 "SampleAfterValue": "100003", 26 "UMask": "0x1" 27 }, 28 { 29 "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 30 "Counter": "0,1,2,3", 31 "CounterHTOff": "0,1,2,3", 32 "EventCode": "0xB7, 0xBB", 33 "EventName": "OCR.PF_L3_RFO.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 34 "MSRIndex": "0x1a6,0x1a7", 35 "MSRValue": "0x0104000100", 36 "Offcore": "1", 37 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 38 "SampleAfterValue": "100003", 39 "UMask": "0x1" 40 }, 41 { 42 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS.SNOOP_MISS", 43 "Counter": "0,1,2,3", 44 "CounterHTOff": "0,1,2,3", 45 "Deprecated": "1", 46 "EventCode": "0xB7, 0xBB", 47 "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS.SNOOP_MISS", 48 "MSRIndex": "0x1a6,0x1a7", 49 "MSRValue": "0x023C000490", 50 "Offcore": "1", 51 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 52 "SampleAfterValue": "100003", 53 "UMask": "0x1" 54 }, 55 { 56 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 57 "Counter": "0,1,2,3", 58 "CounterHTOff": "0,1,2,3", 59 "Deprecated": "1", 60 "EventCode": "0xB7, 0xBB", 61 "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 62 "MSRIndex": "0x1a6,0x1a7", 63 "MSRValue": "0x0210000020", 64 "Offcore": "1", 65 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 66 "SampleAfterValue": "100003", 67 "UMask": "0x1" 68 }, 69 { 70 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS.NO_SNOOP_NEEDED", 71 "Counter": "0,1,2,3", 72 "CounterHTOff": "0,1,2,3", 73 "Deprecated": "1", 74 "EventCode": "0xB7, 0xBB", 75 "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS.NO_SNOOP_NEEDED", 76 "MSRIndex": "0x1a6,0x1a7", 77 "MSRValue": "0x013C000100", 78 "Offcore": "1", 79 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 80 "SampleAfterValue": "100003", 81 "UMask": "0x1" 82 }, 83 { 84 "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 85 "Counter": "0,1,2,3", 86 "CounterHTOff": "0,1,2,3", 87 "EventCode": "0xB7, 0xBB", 88 "EventName": "OCR.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 89 "MSRIndex": "0x1a6,0x1a7", 90 "MSRValue": "0x3F90000400", 91 "Offcore": "1", 92 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 93 "SampleAfterValue": "100003", 94 "UMask": "0x1" 95 }, 96 { 97 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 98 "Counter": "0,1,2,3", 99 "CounterHTOff": "0,1,2,3", 100 "Deprecated": "1", 101 "EventCode": "0xB7, 0xBB", 102 "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 103 "MSRIndex": "0x1a6,0x1a7", 104 "MSRValue": "0x0404000490", 105 "Offcore": "1", 106 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 107 "SampleAfterValue": "100003", 108 "UMask": "0x1" 109 }, 110 { 111 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 112 "Counter": "0,1,2,3", 113 "CounterHTOff": "0,1,2,3", 114 "Deprecated": "1", 115 "EventCode": "0xB7, 0xBB", 116 "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 117 "MSRIndex": "0x1a6,0x1a7", 118 "MSRValue": "0x0604000010", 119 "Offcore": "1", 120 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 121 "SampleAfterValue": "100003", 122 "UMask": "0x1" 123 }, 124 { 125 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS.REMOTE_HITM", 126 "Counter": "0,1,2,3", 127 "CounterHTOff": "0,1,2,3", 128 "Deprecated": "1", 129 "EventCode": "0xB7, 0xBB", 130 "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS.REMOTE_HITM", 131 "MSRIndex": "0x1a6,0x1a7", 132 "MSRValue": "0x103FC00490", 133 "Offcore": "1", 134 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 135 "SampleAfterValue": "100003", 136 "UMask": "0x1" 137 }, 138 { 139 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 140 "Counter": "0,1,2,3", 141 "CounterHTOff": "0,1,2,3", 142 "Deprecated": "1", 143 "EventCode": "0xB7, 0xBB", 144 "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 145 "MSRIndex": "0x1a6,0x1a7", 146 "MSRValue": "0x0090000120", 147 "Offcore": "1", 148 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 149 "SampleAfterValue": "100003", 150 "UMask": "0x1" 151 }, 152 { 153 "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs", 154 "Counter": "0,1,2,3", 155 "CounterHTOff": "0,1,2,3", 156 "EventCode": "0xB7, 0xBB", 157 "EventName": "OCR.PF_L3_RFO.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 158 "MSRIndex": "0x1a6,0x1a7", 159 "MSRValue": "0x0084000100", 160 "Offcore": "1", 161 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 162 "SampleAfterValue": "100003", 163 "UMask": "0x1" 164 }, 165 { 166 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS.HITM_OTHER_CORE", 167 "Counter": "0,1,2,3", 168 "CounterHTOff": "0,1,2,3", 169 "Deprecated": "1", 170 "EventCode": "0xB7, 0xBB", 171 "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS.HITM_OTHER_CORE", 172 "MSRIndex": "0x1a6,0x1a7", 173 "MSRValue": "0x103C000100", 174 "Offcore": "1", 175 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 176 "SampleAfterValue": "100003", 177 "UMask": "0x1" 178 }, 179 { 180 "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 181 "Counter": "0,1,2,3", 182 "CounterHTOff": "0,1,2,3", 183 "EventCode": "0xB7, 0xBB", 184 "EventName": "OCR.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 185 "MSRIndex": "0x1a6,0x1a7", 186 "MSRValue": "0x3F90000100", 187 "Offcore": "1", 188 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 189 "SampleAfterValue": "100003", 190 "UMask": "0x1" 191 }, 192 { 193 "BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 194 "Counter": "0,1,2,3", 195 "CounterHTOff": "0,1,2,3", 196 "Deprecated": "1", 197 "EventCode": "0xB7, 0xBB", 198 "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 199 "MSRIndex": "0x1a6,0x1a7", 200 "MSRValue": "0x0804008000", 201 "Offcore": "1", 202 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 203 "SampleAfterValue": "100003", 204 "UMask": "0x1" 205 }, 206 { 207 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 208 "Counter": "0,1,2,3", 209 "CounterHTOff": "0,1,2,3", 210 "Deprecated": "1", 211 "EventCode": "0xB7, 0xBB", 212 "EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 213 "MSRIndex": "0x1a6,0x1a7", 214 "MSRValue": "0x06040007F7", 215 "Offcore": "1", 216 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 217 "SampleAfterValue": "100003", 218 "UMask": "0x1" 219 }, 220 { 221 "BriefDescription": "OCR.ALL_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD OCR.ALL_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD OCR.ALL_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD", 222 "Counter": "0,1,2,3", 223 "CounterHTOff": "0,1,2,3", 224 "EventCode": "0xB7, 0xBB", 225 "EventName": "OCR.ALL_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD", 226 "MSRIndex": "0x1a6,0x1a7", 227 "MSRValue": "0x043C000491", 228 "Offcore": "1", 229 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 230 "SampleAfterValue": "100003", 231 "UMask": "0x1" 232 }, 233 { 234 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD", 235 "Counter": "0,1,2,3", 236 "CounterHTOff": "0,1,2,3", 237 "Deprecated": "1", 238 "EventCode": "0xB7, 0xBB", 239 "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD", 240 "MSRIndex": "0x1a6,0x1a7", 241 "MSRValue": "0x043C000010", 242 "Offcore": "1", 243 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 244 "SampleAfterValue": "100003", 245 "UMask": "0x1" 246 }, 247 { 248 "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 249 "Counter": "0,1,2,3", 250 "CounterHTOff": "0,1,2,3", 251 "EventCode": "0xB7, 0xBB", 252 "EventName": "OCR.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 253 "MSRIndex": "0x1a6,0x1a7", 254 "MSRValue": "0x0404000080", 255 "Offcore": "1", 256 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 257 "SampleAfterValue": "100003", 258 "UMask": "0x1" 259 }, 260 { 261 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 262 "Counter": "0,1,2,3", 263 "CounterHTOff": "0,1,2,3", 264 "Deprecated": "1", 265 "EventCode": "0xB7, 0xBB", 266 "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 267 "MSRIndex": "0x1a6,0x1a7", 268 "MSRValue": "0x0804000010", 269 "Offcore": "1", 270 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 271 "SampleAfterValue": "100003", 272 "UMask": "0x1" 273 }, 274 { 275 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 276 "Counter": "0,1,2,3", 277 "CounterHTOff": "0,1,2,3", 278 "Deprecated": "1", 279 "EventCode": "0xB7, 0xBB", 280 "EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 281 "MSRIndex": "0x1a6,0x1a7", 282 "MSRValue": "0x01040007F7", 283 "Offcore": "1", 284 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 285 "SampleAfterValue": "100003", 286 "UMask": "0x1" 287 }, 288 { 289 "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 290 "Counter": "0,1,2,3", 291 "CounterHTOff": "0,1,2,3", 292 "EventCode": "0xB7, 0xBB", 293 "EventName": "OCR.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 294 "MSRIndex": "0x1a6,0x1a7", 295 "MSRValue": "0x0104000400", 296 "Offcore": "1", 297 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 298 "SampleAfterValue": "100003", 299 "UMask": "0x1" 300 }, 301 { 302 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS.HITM_OTHER_CORE", 303 "Counter": "0,1,2,3", 304 "CounterHTOff": "0,1,2,3", 305 "Deprecated": "1", 306 "EventCode": "0xB7, 0xBB", 307 "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS.HITM_OTHER_CORE", 308 "MSRIndex": "0x1a6,0x1a7", 309 "MSRValue": "0x103C000004", 310 "Offcore": "1", 311 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 312 "SampleAfterValue": "100003", 313 "UMask": "0x1" 314 }, 315 { 316 "BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 317 "Counter": "0,1,2,3", 318 "CounterHTOff": "0,1,2,3", 319 "EventCode": "0xB7, 0xBB", 320 "EventName": "OCR.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 321 "MSRIndex": "0x1a6,0x1a7", 322 "MSRValue": "0x0110000010", 323 "Offcore": "1", 324 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 325 "SampleAfterValue": "100003", 326 "UMask": "0x1" 327 }, 328 { 329 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 330 "Counter": "0,1,2,3", 331 "CounterHTOff": "0,1,2,3", 332 "Deprecated": "1", 333 "EventCode": "0xB7, 0xBB", 334 "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 335 "MSRIndex": "0x1a6,0x1a7", 336 "MSRValue": "0x3F84000491", 337 "Offcore": "1", 338 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 339 "SampleAfterValue": "100003", 340 "UMask": "0x1" 341 }, 342 { 343 "BriefDescription": "Number of times an RTM execution aborted due to various memory events (e.g. read/write capacity and conflicts)", 344 "Counter": "0,1,2,3", 345 "CounterHTOff": "0,1,2,3,4,5,6,7", 346 "EventCode": "0xC9", 347 "EventName": "RTM_RETIRED.ABORTED_MEM", 348 "PublicDescription": "Number of times an RTM execution aborted due to various memory events (e.g. read/write capacity and conflicts).", 349 "SampleAfterValue": "2000003", 350 "UMask": "0x8" 351 }, 352 { 353 "BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 354 "Counter": "0,1,2,3", 355 "CounterHTOff": "0,1,2,3", 356 "EventCode": "0xB7, 0xBB", 357 "EventName": "OCR.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 358 "MSRIndex": "0x1a6,0x1a7", 359 "MSRValue": "0x3F84000010", 360 "Offcore": "1", 361 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 362 "SampleAfterValue": "100003", 363 "UMask": "0x1" 364 }, 365 { 366 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 367 "Counter": "0,1,2,3", 368 "CounterHTOff": "0,1,2,3", 369 "Deprecated": "1", 370 "EventCode": "0xB7, 0xBB", 371 "EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 372 "MSRIndex": "0x1a6,0x1a7", 373 "MSRValue": "0x10040007F7", 374 "Offcore": "1", 375 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 376 "SampleAfterValue": "100003", 377 "UMask": "0x1" 378 }, 379 { 380 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS.NO_SNOOP_NEEDED", 381 "Counter": "0,1,2,3", 382 "CounterHTOff": "0,1,2,3", 383 "Deprecated": "1", 384 "EventCode": "0xB7, 0xBB", 385 "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS.NO_SNOOP_NEEDED", 386 "MSRIndex": "0x1a6,0x1a7", 387 "MSRValue": "0x013C000002", 388 "Offcore": "1", 389 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 390 "SampleAfterValue": "100003", 391 "UMask": "0x1" 392 }, 393 { 394 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 395 "Counter": "0,1,2,3", 396 "CounterHTOff": "0,1,2,3", 397 "Deprecated": "1", 398 "EventCode": "0xB7, 0xBB", 399 "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 400 "MSRIndex": "0x1a6,0x1a7", 401 "MSRValue": "0x0090000004", 402 "Offcore": "1", 403 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 404 "SampleAfterValue": "100003", 405 "UMask": "0x1" 406 }, 407 { 408 "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_MISS.ANY_SNOOP OCR.PF_L1D_AND_SW.L3_MISS.ANY_SNOOP", 409 "Counter": "0,1,2,3", 410 "CounterHTOff": "0,1,2,3", 411 "EventCode": "0xB7, 0xBB", 412 "EventName": "OCR.PF_L1D_AND_SW.L3_MISS.ANY_SNOOP", 413 "MSRIndex": "0x1a6,0x1a7", 414 "MSRValue": "0x3FBC000400", 415 "Offcore": "1", 416 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 417 "SampleAfterValue": "100003", 418 "UMask": "0x1" 419 }, 420 { 421 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS.SNOOP_NONE", 422 "Counter": "0,1,2,3", 423 "CounterHTOff": "0,1,2,3", 424 "Deprecated": "1", 425 "EventCode": "0xB7, 0xBB", 426 "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS.SNOOP_NONE", 427 "MSRIndex": "0x1a6,0x1a7", 428 "MSRValue": "0x00BC000120", 429 "Offcore": "1", 430 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 431 "SampleAfterValue": "100003", 432 "UMask": "0x1" 433 }, 434 { 435 "BriefDescription": "OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 436 "Counter": "0,1,2,3", 437 "CounterHTOff": "0,1,2,3", 438 "EventCode": "0xB7, 0xBB", 439 "EventName": "OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 440 "MSRIndex": "0x1a6,0x1a7", 441 "MSRValue": "0x08100007F7", 442 "Offcore": "1", 443 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 444 "SampleAfterValue": "100003", 445 "UMask": "0x1" 446 }, 447 { 448 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 449 "Counter": "0,1,2,3", 450 "CounterHTOff": "0,1,2,3", 451 "Deprecated": "1", 452 "EventCode": "0xB7, 0xBB", 453 "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 454 "MSRIndex": "0x1a6,0x1a7", 455 "MSRValue": "0x3F84000100", 456 "Offcore": "1", 457 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 458 "SampleAfterValue": "100003", 459 "UMask": "0x1" 460 }, 461 { 462 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS.ANY_SNOOP", 463 "Counter": "0,1,2,3", 464 "CounterHTOff": "0,1,2,3", 465 "Deprecated": "1", 466 "EventCode": "0xB7, 0xBB", 467 "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS.ANY_SNOOP", 468 "MSRIndex": "0x1a6,0x1a7", 469 "MSRValue": "0x3FBC000120", 470 "Offcore": "1", 471 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 472 "SampleAfterValue": "100003", 473 "UMask": "0x1" 474 }, 475 { 476 "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 477 "Counter": "0,1,2,3", 478 "CounterHTOff": "0,1,2,3", 479 "EventCode": "0xB7, 0xBB", 480 "EventName": "OCR.PF_L2_RFO.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 481 "MSRIndex": "0x1a6,0x1a7", 482 "MSRValue": "0x0104000020", 483 "Offcore": "1", 484 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 485 "SampleAfterValue": "100003", 486 "UMask": "0x1" 487 }, 488 { 489 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 490 "Counter": "0,1,2,3", 491 "CounterHTOff": "0,1,2,3", 492 "Deprecated": "1", 493 "EventCode": "0xB7, 0xBB", 494 "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 495 "MSRIndex": "0x1a6,0x1a7", 496 "MSRValue": "0x0404000020", 497 "Offcore": "1", 498 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 499 "SampleAfterValue": "100003", 500 "UMask": "0x1" 501 }, 502 { 503 "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests", 504 "Counter": "0,1,2,3", 505 "CounterHTOff": "0,1,2,3", 506 "EventCode": "0xB7, 0xBB", 507 "EventName": "OCR.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 508 "MSRIndex": "0x1a6,0x1a7", 509 "MSRValue": "0x0204000400", 510 "Offcore": "1", 511 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 512 "SampleAfterValue": "100003", 513 "UMask": "0x1" 514 }, 515 { 516 "BriefDescription": "OCR.ALL_PF_RFO.L3_MISS.ANY_SNOOP OCR.ALL_PF_RFO.L3_MISS.ANY_SNOOP OCR.ALL_PF_RFO.L3_MISS.ANY_SNOOP", 517 "Counter": "0,1,2,3", 518 "CounterHTOff": "0,1,2,3", 519 "EventCode": "0xB7, 0xBB", 520 "EventName": "OCR.ALL_PF_RFO.L3_MISS.ANY_SNOOP", 521 "MSRIndex": "0x1a6,0x1a7", 522 "MSRValue": "0x3FBC000120", 523 "Offcore": "1", 524 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 525 "SampleAfterValue": "100003", 526 "UMask": "0x1" 527 }, 528 { 529 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 530 "Counter": "0,1,2,3", 531 "CounterHTOff": "0,1,2,3", 532 "Deprecated": "1", 533 "EventCode": "0xB7, 0xBB", 534 "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 535 "MSRIndex": "0x1a6,0x1a7", 536 "MSRValue": "0x0404000002", 537 "Offcore": "1", 538 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 539 "SampleAfterValue": "100003", 540 "UMask": "0x1" 541 }, 542 { 543 "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_MISS.HIT_OTHER_CORE_FWD OCR.PF_L2_RFO.L3_MISS.HIT_OTHER_CORE_FWD", 544 "Counter": "0,1,2,3", 545 "CounterHTOff": "0,1,2,3", 546 "EventCode": "0xB7, 0xBB", 547 "EventName": "OCR.PF_L2_RFO.L3_MISS.HIT_OTHER_CORE_FWD", 548 "MSRIndex": "0x1a6,0x1a7", 549 "MSRValue": "0x083C000020", 550 "Offcore": "1", 551 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 552 "SampleAfterValue": "100003", 553 "UMask": "0x1" 554 }, 555 { 556 "BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 557 "Counter": "0,1,2,3", 558 "CounterHTOff": "0,1,2,3", 559 "Deprecated": "1", 560 "EventCode": "0xB7, 0xBB", 561 "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 562 "MSRIndex": "0x1a6,0x1a7", 563 "MSRValue": "0x0410008000", 564 "Offcore": "1", 565 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 566 "SampleAfterValue": "100003", 567 "UMask": "0x1" 568 }, 569 { 570 "BriefDescription": "Counts all demand data writes (RFOs)", 571 "Counter": "0,1,2,3", 572 "CounterHTOff": "0,1,2,3", 573 "EventCode": "0xB7, 0xBB", 574 "EventName": "OCR.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 575 "MSRIndex": "0x1a6,0x1a7", 576 "MSRValue": "0x0210000002", 577 "Offcore": "1", 578 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 579 "SampleAfterValue": "100003", 580 "UMask": "0x1" 581 }, 582 { 583 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 584 "Counter": "0,1,2,3", 585 "CounterHTOff": "0,1,2,3", 586 "Deprecated": "1", 587 "EventCode": "0xB7, 0xBB", 588 "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 589 "MSRIndex": "0x1a6,0x1a7", 590 "MSRValue": "0x063B800002", 591 "Offcore": "1", 592 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 593 "SampleAfterValue": "100003", 594 "UMask": "0x1" 595 }, 596 { 597 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 598 "Counter": "0,1,2,3", 599 "CounterHTOff": "0,1,2,3", 600 "Deprecated": "1", 601 "EventCode": "0xB7, 0xBB", 602 "EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 603 "MSRIndex": "0x1a6,0x1a7", 604 "MSRValue": "0x3F840007F7", 605 "Offcore": "1", 606 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 607 "SampleAfterValue": "100003", 608 "UMask": "0x1" 609 }, 610 { 611 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 612 "Counter": "0,1,2,3", 613 "CounterHTOff": "0,1,2,3", 614 "Deprecated": "1", 615 "EventCode": "0xB7, 0xBB", 616 "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 617 "MSRIndex": "0x1a6,0x1a7", 618 "MSRValue": "0x0210000491", 619 "Offcore": "1", 620 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 621 "SampleAfterValue": "100003", 622 "UMask": "0x1" 623 }, 624 { 625 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 626 "Counter": "0,1,2,3", 627 "CounterHTOff": "0,1,2,3", 628 "Deprecated": "1", 629 "EventCode": "0xB7, 0xBB", 630 "EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 631 "MSRIndex": "0x1a6,0x1a7", 632 "MSRValue": "0x0210000400", 633 "Offcore": "1", 634 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 635 "SampleAfterValue": "100003", 636 "UMask": "0x1" 637 }, 638 { 639 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS.SNOOP_MISS", 640 "Counter": "0,1,2,3", 641 "CounterHTOff": "0,1,2,3", 642 "Deprecated": "1", 643 "EventCode": "0xB7, 0xBB", 644 "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS.SNOOP_MISS", 645 "MSRIndex": "0x1a6,0x1a7", 646 "MSRValue": "0x023C000004", 647 "Offcore": "1", 648 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 649 "SampleAfterValue": "100003", 650 "UMask": "0x1" 651 }, 652 { 653 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 654 "Counter": "0,1,2,3", 655 "CounterHTOff": "0,1,2,3", 656 "Deprecated": "1", 657 "EventCode": "0xB7, 0xBB", 658 "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 659 "MSRIndex": "0x1a6,0x1a7", 660 "MSRValue": "0x0104000100", 661 "Offcore": "1", 662 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 663 "SampleAfterValue": "100003", 664 "UMask": "0x1" 665 }, 666 { 667 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 668 "Counter": "0,1,2,3", 669 "CounterHTOff": "0,1,2,3", 670 "Deprecated": "1", 671 "EventCode": "0xB7, 0xBB", 672 "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 673 "MSRIndex": "0x1a6,0x1a7", 674 "MSRValue": "0x1004000490", 675 "Offcore": "1", 676 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 677 "SampleAfterValue": "100003", 678 "UMask": "0x1" 679 }, 680 { 681 "BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 682 "Counter": "0,1,2,3", 683 "CounterHTOff": "0,1,2,3", 684 "EventCode": "0xB7, 0xBB", 685 "EventName": "OCR.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 686 "MSRIndex": "0x1a6,0x1a7", 687 "MSRValue": "0x1010000004", 688 "Offcore": "1", 689 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 690 "SampleAfterValue": "100003", 691 "UMask": "0x1" 692 }, 693 { 694 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS.SNOOP_MISS", 695 "Counter": "0,1,2,3", 696 "CounterHTOff": "0,1,2,3", 697 "Deprecated": "1", 698 "EventCode": "0xB7, 0xBB", 699 "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS.SNOOP_MISS", 700 "MSRIndex": "0x1a6,0x1a7", 701 "MSRValue": "0x023C000010", 702 "Offcore": "1", 703 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 704 "SampleAfterValue": "100003", 705 "UMask": "0x1" 706 }, 707 { 708 "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 709 "Counter": "0,1,2,3", 710 "CounterHTOff": "0,1,2,3", 711 "EventCode": "0xB7, 0xBB", 712 "EventName": "OCR.PF_L3_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 713 "MSRIndex": "0x1a6,0x1a7", 714 "MSRValue": "0x3F84000100", 715 "Offcore": "1", 716 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 717 "SampleAfterValue": "100003", 718 "UMask": "0x1" 719 }, 720 { 721 "BriefDescription": "Number of times a HLE transactional region aborted due to a non XRELEASE prefixed instruction writing to an elided lock in the elision buffer", 722 "Counter": "0,1,2,3", 723 "CounterHTOff": "0,1,2,3,4,5,6,7", 724 "EventCode": "0x54", 725 "EventName": "TX_MEM.ABORT_HLE_STORE_TO_ELIDED_LOCK", 726 "PublicDescription": "Number of times a TSX Abort was triggered due to a non-release/commit store to lock.", 727 "SampleAfterValue": "2000003", 728 "UMask": "0x4" 729 }, 730 { 731 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 732 "Counter": "0,1,2,3", 733 "CounterHTOff": "0,1,2,3", 734 "Deprecated": "1", 735 "EventCode": "0xB7, 0xBB", 736 "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 737 "MSRIndex": "0x1a6,0x1a7", 738 "MSRValue": "0x0604000004", 739 "Offcore": "1", 740 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 741 "SampleAfterValue": "100003", 742 "UMask": "0x1" 743 }, 744 { 745 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS.SNOOP_MISS", 746 "Counter": "0,1,2,3", 747 "CounterHTOff": "0,1,2,3", 748 "Deprecated": "1", 749 "EventCode": "0xB7, 0xBB", 750 "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS.SNOOP_MISS", 751 "MSRIndex": "0x1a6,0x1a7", 752 "MSRValue": "0x023C000020", 753 "Offcore": "1", 754 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 755 "SampleAfterValue": "100003", 756 "UMask": "0x1" 757 }, 758 { 759 "BriefDescription": "Number of times a transactional abort was signaled due to a data conflict on a transactionally accessed address", 760 "Counter": "0,1,2,3", 761 "CounterHTOff": "0,1,2,3,4,5,6,7", 762 "EventCode": "0x54", 763 "EventName": "TX_MEM.ABORT_CONFLICT", 764 "PublicDescription": "Number of times a TSX line had a cache conflict.", 765 "SampleAfterValue": "2000003", 766 "UMask": "0x1" 767 }, 768 { 769 "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests", 770 "Counter": "0,1,2,3", 771 "CounterHTOff": "0,1,2,3", 772 "EventCode": "0xB7, 0xBB", 773 "EventName": "OCR.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 774 "MSRIndex": "0x1a6,0x1a7", 775 "MSRValue": "0x0210000400", 776 "Offcore": "1", 777 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 778 "SampleAfterValue": "100003", 779 "UMask": "0x1" 780 }, 781 { 782 "BriefDescription": "OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 783 "Counter": "0,1,2,3", 784 "CounterHTOff": "0,1,2,3", 785 "EventCode": "0xB7, 0xBB", 786 "EventName": "OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 787 "MSRIndex": "0x1a6,0x1a7", 788 "MSRValue": "0x0804000120", 789 "Offcore": "1", 790 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 791 "SampleAfterValue": "100003", 792 "UMask": "0x1" 793 }, 794 { 795 "BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 796 "Counter": "0,1,2,3", 797 "CounterHTOff": "0,1,2,3", 798 "EventCode": "0xB7, 0xBB", 799 "EventName": "OCR.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 800 "MSRIndex": "0x1a6,0x1a7", 801 "MSRValue": "0x0410000002", 802 "Offcore": "1", 803 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 804 "SampleAfterValue": "100003", 805 "UMask": "0x1" 806 }, 807 { 808 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 809 "Counter": "0,1,2,3", 810 "CounterHTOff": "0,1,2,3", 811 "Deprecated": "1", 812 "EventCode": "0xB7, 0xBB", 813 "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 814 "MSRIndex": "0x1a6,0x1a7", 815 "MSRValue": "0x0104000004", 816 "Offcore": "1", 817 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 818 "SampleAfterValue": "100003", 819 "UMask": "0x1" 820 }, 821 { 822 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 823 "Counter": "0,1,2,3", 824 "CounterHTOff": "0,1,2,3", 825 "Deprecated": "1", 826 "EventCode": "0xB7, 0xBB", 827 "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 828 "MSRIndex": "0x1a6,0x1a7", 829 "MSRValue": "0x063B800100", 830 "Offcore": "1", 831 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 832 "SampleAfterValue": "100003", 833 "UMask": "0x1" 834 }, 835 { 836 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 837 "Counter": "0,1,2,3", 838 "CounterHTOff": "0,1,2,3", 839 "Deprecated": "1", 840 "EventCode": "0xB7, 0xBB", 841 "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 842 "MSRIndex": "0x1a6,0x1a7", 843 "MSRValue": "0x0804000120", 844 "Offcore": "1", 845 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 846 "SampleAfterValue": "100003", 847 "UMask": "0x1" 848 }, 849 { 850 "BriefDescription": "OCR.ALL_RFO.L3_MISS.HIT_OTHER_CORE_FWD OCR.ALL_RFO.L3_MISS.HIT_OTHER_CORE_FWD OCR.ALL_RFO.L3_MISS.HIT_OTHER_CORE_FWD", 851 "Counter": "0,1,2,3", 852 "CounterHTOff": "0,1,2,3", 853 "EventCode": "0xB7, 0xBB", 854 "EventName": "OCR.ALL_RFO.L3_MISS.HIT_OTHER_CORE_FWD", 855 "MSRIndex": "0x1a6,0x1a7", 856 "MSRValue": "0x083C000122", 857 "Offcore": "1", 858 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 859 "SampleAfterValue": "100003", 860 "UMask": "0x1" 861 }, 862 { 863 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 864 "Counter": "0,1,2,3", 865 "CounterHTOff": "0,1,2,3", 866 "Deprecated": "1", 867 "EventCode": "0xB7, 0xBB", 868 "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 869 "MSRIndex": "0x1a6,0x1a7", 870 "MSRValue": "0x0810000122", 871 "Offcore": "1", 872 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 873 "SampleAfterValue": "100003", 874 "UMask": "0x1" 875 }, 876 { 877 "BriefDescription": "Counts any other requests OCR.OTHER.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 878 "Counter": "0,1,2,3", 879 "CounterHTOff": "0,1,2,3", 880 "EventCode": "0xB7, 0xBB", 881 "EventName": "OCR.OTHER.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 882 "MSRIndex": "0x1a6,0x1a7", 883 "MSRValue": "0x0104008000", 884 "Offcore": "1", 885 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 886 "SampleAfterValue": "100003", 887 "UMask": "0x1" 888 }, 889 { 890 "BriefDescription": "Counts the number of times an HLE XACQUIRE instruction was executed inside an RTM transactional region", 891 "Counter": "0,1,2,3", 892 "CounterHTOff": "0,1,2,3,4,5,6,7", 893 "EventCode": "0x5d", 894 "EventName": "TX_EXEC.MISC5", 895 "PublicDescription": "Counts the number of times an HLE XACQUIRE instruction was executed inside an RTM transactional region.", 896 "SampleAfterValue": "2000003", 897 "UMask": "0x10" 898 }, 899 { 900 "BriefDescription": "Counts the number of times a XBEGIN instruction was executed inside an HLE transactional region.", 901 "Counter": "0,1,2,3", 902 "CounterHTOff": "0,1,2,3,4,5,6,7", 903 "EventCode": "0x5d", 904 "EventName": "TX_EXEC.MISC4", 905 "PublicDescription": "RTM region detected inside HLE.", 906 "SampleAfterValue": "2000003", 907 "UMask": "0x8" 908 }, 909 { 910 "BriefDescription": "Counts the number of times an instruction execution caused the transactional nest count supported to be exceeded", 911 "Counter": "0,1,2,3", 912 "CounterHTOff": "0,1,2,3,4,5,6,7", 913 "EventCode": "0x5d", 914 "EventName": "TX_EXEC.MISC3", 915 "PublicDescription": "Unfriendly TSX abort triggered by a nest count that is too deep.", 916 "SampleAfterValue": "2000003", 917 "UMask": "0x4" 918 }, 919 { 920 "BriefDescription": "Counts the number of times a class of instructions (e.g., vzeroupper) that may cause a transactional abort was executed inside a transactional region", 921 "Counter": "0,1,2,3", 922 "CounterHTOff": "0,1,2,3,4,5,6,7", 923 "EventCode": "0x5d", 924 "EventName": "TX_EXEC.MISC2", 925 "PublicDescription": "Unfriendly TSX abort triggered by a vzeroupper instruction.", 926 "SampleAfterValue": "2000003", 927 "UMask": "0x2" 928 }, 929 { 930 "BriefDescription": "Counts the number of times a class of instructions that may cause a transactional abort was executed. Since this is the count of execution, it may not always cause a transactional abort.", 931 "Counter": "0,1,2,3", 932 "CounterHTOff": "0,1,2,3,4,5,6,7", 933 "EventCode": "0x5d", 934 "EventName": "TX_EXEC.MISC1", 935 "SampleAfterValue": "2000003", 936 "UMask": "0x1" 937 }, 938 { 939 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 940 "Counter": "0,1,2,3", 941 "CounterHTOff": "0,1,2,3", 942 "Deprecated": "1", 943 "EventCode": "0xB7, 0xBB", 944 "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 945 "MSRIndex": "0x1a6,0x1a7", 946 "MSRValue": "0x0104000122", 947 "Offcore": "1", 948 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 949 "SampleAfterValue": "100003", 950 "UMask": "0x1" 951 }, 952 { 953 "BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 954 "Counter": "0,1,2,3", 955 "CounterHTOff": "0,1,2,3", 956 "EventCode": "0xB7, 0xBB", 957 "EventName": "OCR.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 958 "MSRIndex": "0x1a6,0x1a7", 959 "MSRValue": "0x1010000002", 960 "Offcore": "1", 961 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 962 "SampleAfterValue": "100003", 963 "UMask": "0x1" 964 }, 965 { 966 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS.REMOTE_HIT_FORWARD", 967 "Counter": "0,1,2,3", 968 "CounterHTOff": "0,1,2,3", 969 "Deprecated": "1", 970 "EventCode": "0xB7, 0xBB", 971 "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS.REMOTE_HIT_FORWARD", 972 "MSRIndex": "0x1a6,0x1a7", 973 "MSRValue": "0x083FC00490", 974 "Offcore": "1", 975 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 976 "SampleAfterValue": "100003", 977 "UMask": "0x1" 978 }, 979 { 980 "BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 981 "Counter": "0,1,2,3", 982 "CounterHTOff": "0,1,2,3", 983 "EventCode": "0xB7, 0xBB", 984 "EventName": "OCR.PF_L2_DATA_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 985 "MSRIndex": "0x1a6,0x1a7", 986 "MSRValue": "0x063B800010", 987 "Offcore": "1", 988 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 989 "SampleAfterValue": "100003", 990 "UMask": "0x1" 991 }, 992 { 993 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 994 "Counter": "0,1,2,3", 995 "CounterHTOff": "0,1,2,3", 996 "Deprecated": "1", 997 "EventCode": "0xB7, 0xBB", 998 "EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 999 "MSRIndex": "0x1a6,0x1a7", 1000 "MSRValue": "0x0090000400", 1001 "Offcore": "1", 1002 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1003 "SampleAfterValue": "100003", 1004 "UMask": "0x1" 1005 }, 1006 { 1007 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS.HIT_OTHER_CORE_NO_FWD", 1008 "Counter": "0,1,2,3", 1009 "CounterHTOff": "0,1,2,3", 1010 "Deprecated": "1", 1011 "EventCode": "0xB7, 0xBB", 1012 "EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS.HIT_OTHER_CORE_NO_FWD", 1013 "MSRIndex": "0x1a6,0x1a7", 1014 "MSRValue": "0x043C000400", 1015 "Offcore": "1", 1016 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1017 "SampleAfterValue": "100003", 1018 "UMask": "0x1" 1019 }, 1020 { 1021 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 1022 "Counter": "0,1,2,3", 1023 "CounterHTOff": "0,1,2,3", 1024 "Deprecated": "1", 1025 "EventCode": "0xB7, 0xBB", 1026 "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 1027 "MSRIndex": "0x1a6,0x1a7", 1028 "MSRValue": "0x0204000001", 1029 "Offcore": "1", 1030 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1031 "SampleAfterValue": "100003", 1032 "UMask": "0x1" 1033 }, 1034 { 1035 "BriefDescription": "Counts prefetch (that bring data to L2) data reads", 1036 "Counter": "0,1,2,3", 1037 "CounterHTOff": "0,1,2,3", 1038 "EventCode": "0xB7, 0xBB", 1039 "EventName": "OCR.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 1040 "MSRIndex": "0x1a6,0x1a7", 1041 "MSRValue": "0x0084000010", 1042 "Offcore": "1", 1043 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1044 "SampleAfterValue": "100003", 1045 "UMask": "0x1" 1046 }, 1047 { 1048 "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_MISS.REMOTE_HIT_FORWARD OCR.ALL_PF_DATA_RD.L3_MISS.REMOTE_HIT_FORWARD", 1049 "Counter": "0,1,2,3", 1050 "CounterHTOff": "0,1,2,3", 1051 "EventCode": "0xB7, 0xBB", 1052 "EventName": "OCR.ALL_PF_DATA_RD.L3_MISS.REMOTE_HIT_FORWARD", 1053 "MSRIndex": "0x1a6,0x1a7", 1054 "MSRValue": "0x083FC00490", 1055 "Offcore": "1", 1056 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1057 "SampleAfterValue": "100003", 1058 "UMask": "0x1" 1059 }, 1060 { 1061 "BriefDescription": "OCR.ALL_RFO.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD OCR.ALL_RFO.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 1062 "Counter": "0,1,2,3", 1063 "CounterHTOff": "0,1,2,3", 1064 "EventCode": "0xB7, 0xBB", 1065 "EventName": "OCR.ALL_RFO.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 1066 "MSRIndex": "0x1a6,0x1a7", 1067 "MSRValue": "0x063B800122", 1068 "Offcore": "1", 1069 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1070 "SampleAfterValue": "100003", 1071 "UMask": "0x1" 1072 }, 1073 { 1074 "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 1075 "Counter": "0,1,2,3", 1076 "CounterHTOff": "0,1,2,3", 1077 "EventCode": "0xB7, 0xBB", 1078 "EventName": "OCR.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 1079 "MSRIndex": "0x1a6,0x1a7", 1080 "MSRValue": "0x0404000400", 1081 "Offcore": "1", 1082 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1083 "SampleAfterValue": "100003", 1084 "UMask": "0x1" 1085 }, 1086 { 1087 "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD OCR.PF_L2_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD", 1088 "Counter": "0,1,2,3", 1089 "CounterHTOff": "0,1,2,3", 1090 "EventCode": "0xB7, 0xBB", 1091 "EventName": "OCR.PF_L2_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD", 1092 "MSRIndex": "0x1a6,0x1a7", 1093 "MSRValue": "0x043C000020", 1094 "Offcore": "1", 1095 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1096 "SampleAfterValue": "100003", 1097 "UMask": "0x1" 1098 }, 1099 { 1100 "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_MISS.SNOOP_MISS", 1101 "Counter": "0,1,2,3", 1102 "CounterHTOff": "0,1,2,3", 1103 "EventCode": "0xB7, 0xBB", 1104 "EventName": "OCR.PF_L1D_AND_SW.L3_MISS.SNOOP_MISS", 1105 "MSRIndex": "0x1a6,0x1a7", 1106 "MSRValue": "0x023C000400", 1107 "Offcore": "1", 1108 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1109 "SampleAfterValue": "100003", 1110 "UMask": "0x1" 1111 }, 1112 { 1113 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 1114 "Counter": "0,1,2,3", 1115 "CounterHTOff": "0,1,2,3", 1116 "Deprecated": "1", 1117 "EventCode": "0xB7, 0xBB", 1118 "EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 1119 "MSRIndex": "0x1a6,0x1a7", 1120 "MSRValue": "0x063B8007F7", 1121 "Offcore": "1", 1122 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1123 "SampleAfterValue": "100003", 1124 "UMask": "0x1" 1125 }, 1126 { 1127 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS.NO_SNOOP_NEEDED", 1128 "Counter": "0,1,2,3", 1129 "CounterHTOff": "0,1,2,3", 1130 "Deprecated": "1", 1131 "EventCode": "0xB7, 0xBB", 1132 "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS.NO_SNOOP_NEEDED", 1133 "MSRIndex": "0x1a6,0x1a7", 1134 "MSRValue": "0x013C000491", 1135 "Offcore": "1", 1136 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1137 "SampleAfterValue": "100003", 1138 "UMask": "0x1" 1139 }, 1140 { 1141 "BriefDescription": "Counts demand data reads", 1142 "Counter": "0,1,2,3", 1143 "CounterHTOff": "0,1,2,3", 1144 "EventCode": "0xB7, 0xBB", 1145 "EventName": "OCR.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 1146 "MSRIndex": "0x1a6,0x1a7", 1147 "MSRValue": "0x0084000001", 1148 "Offcore": "1", 1149 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1150 "SampleAfterValue": "100003", 1151 "UMask": "0x1" 1152 }, 1153 { 1154 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 1155 "Counter": "0,1,2,3", 1156 "CounterHTOff": "0,1,2,3", 1157 "Deprecated": "1", 1158 "EventCode": "0xB7, 0xBB", 1159 "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 1160 "MSRIndex": "0x1a6,0x1a7", 1161 "MSRValue": "0x1010000002", 1162 "Offcore": "1", 1163 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1164 "SampleAfterValue": "100003", 1165 "UMask": "0x1" 1166 }, 1167 { 1168 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 1169 "Counter": "0,1,2,3", 1170 "CounterHTOff": "0,1,2,3", 1171 "Deprecated": "1", 1172 "EventCode": "0xB7, 0xBB", 1173 "EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 1174 "MSRIndex": "0x1a6,0x1a7", 1175 "MSRValue": "0x00840007F7", 1176 "Offcore": "1", 1177 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1178 "SampleAfterValue": "100003", 1179 "UMask": "0x1" 1180 }, 1181 { 1182 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 1183 "Counter": "0,1,2,3", 1184 "CounterHTOff": "0,1,2,3", 1185 "Deprecated": "1", 1186 "EventCode": "0xB7, 0xBB", 1187 "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 1188 "MSRIndex": "0x1a6,0x1a7", 1189 "MSRValue": "0x0090000490", 1190 "Offcore": "1", 1191 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1192 "SampleAfterValue": "100003", 1193 "UMask": "0x1" 1194 }, 1195 { 1196 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 1197 "Counter": "0,1,2,3", 1198 "CounterHTOff": "0,1,2,3", 1199 "Deprecated": "1", 1200 "EventCode": "0xB7, 0xBB", 1201 "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 1202 "MSRIndex": "0x1a6,0x1a7", 1203 "MSRValue": "0x0110000100", 1204 "Offcore": "1", 1205 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1206 "SampleAfterValue": "100003", 1207 "UMask": "0x1" 1208 }, 1209 { 1210 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 1211 "Counter": "0,1,2,3", 1212 "CounterHTOff": "0,1,2,3", 1213 "Deprecated": "1", 1214 "EventCode": "0xB7, 0xBB", 1215 "EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 1216 "MSRIndex": "0x1a6,0x1a7", 1217 "MSRValue": "0x10100007F7", 1218 "Offcore": "1", 1219 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1220 "SampleAfterValue": "100003", 1221 "UMask": "0x1" 1222 }, 1223 { 1224 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS.NO_SNOOP_NEEDED", 1225 "Counter": "0,1,2,3", 1226 "CounterHTOff": "0,1,2,3", 1227 "Deprecated": "1", 1228 "EventCode": "0xB7, 0xBB", 1229 "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS.NO_SNOOP_NEEDED", 1230 "MSRIndex": "0x1a6,0x1a7", 1231 "MSRValue": "0x013C000004", 1232 "Offcore": "1", 1233 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1234 "SampleAfterValue": "100003", 1235 "UMask": "0x1" 1236 }, 1237 { 1238 "BriefDescription": "Number of times an RTM execution aborted due to uncommon conditions.", 1239 "Counter": "0,1,2,3", 1240 "CounterHTOff": "0,1,2,3,4,5,6,7", 1241 "EventCode": "0xC9", 1242 "EventName": "RTM_RETIRED.ABORTED_TIMER", 1243 "SampleAfterValue": "2000003", 1244 "UMask": "0x10" 1245 }, 1246 { 1247 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 1248 "Counter": "0,1,2,3", 1249 "CounterHTOff": "0,1,2,3", 1250 "Deprecated": "1", 1251 "EventCode": "0xB7, 0xBB", 1252 "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 1253 "MSRIndex": "0x1a6,0x1a7", 1254 "MSRValue": "0x0604000002", 1255 "Offcore": "1", 1256 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1257 "SampleAfterValue": "100003", 1258 "UMask": "0x1" 1259 }, 1260 { 1261 "BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_MISS.REMOTE_HIT_FORWARD", 1262 "Counter": "0,1,2,3", 1263 "CounterHTOff": "0,1,2,3", 1264 "EventCode": "0xB7, 0xBB", 1265 "EventName": "OCR.DEMAND_CODE_RD.L3_MISS.REMOTE_HIT_FORWARD", 1266 "MSRIndex": "0x1a6,0x1a7", 1267 "MSRValue": "0x083FC00004", 1268 "Offcore": "1", 1269 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1270 "SampleAfterValue": "100003", 1271 "UMask": "0x1" 1272 }, 1273 { 1274 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS.HIT_OTHER_CORE_FWD", 1275 "Counter": "0,1,2,3", 1276 "CounterHTOff": "0,1,2,3", 1277 "Deprecated": "1", 1278 "EventCode": "0xB7, 0xBB", 1279 "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS.HIT_OTHER_CORE_FWD", 1280 "MSRIndex": "0x1a6,0x1a7", 1281 "MSRValue": "0x083C000002", 1282 "Offcore": "1", 1283 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1284 "SampleAfterValue": "100003", 1285 "UMask": "0x1" 1286 }, 1287 { 1288 "BriefDescription": "OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 1289 "Counter": "0,1,2,3", 1290 "CounterHTOff": "0,1,2,3", 1291 "EventCode": "0xB7, 0xBB", 1292 "EventName": "OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 1293 "MSRIndex": "0x1a6,0x1a7", 1294 "MSRValue": "0x3F900007F7", 1295 "Offcore": "1", 1296 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1297 "SampleAfterValue": "100003", 1298 "UMask": "0x1" 1299 }, 1300 { 1301 "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 1302 "Counter": "0,1,2,3", 1303 "CounterHTOff": "0,1,2,3", 1304 "EventCode": "0xB7, 0xBB", 1305 "EventName": "OCR.PF_L3_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 1306 "MSRIndex": "0x1a6,0x1a7", 1307 "MSRValue": "0x0804000100", 1308 "Offcore": "1", 1309 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1310 "SampleAfterValue": "100003", 1311 "UMask": "0x1" 1312 }, 1313 { 1314 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 1315 "Counter": "0,1,2,3", 1316 "CounterHTOff": "0,1,2,3", 1317 "Deprecated": "1", 1318 "EventCode": "0xB7, 0xBB", 1319 "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 1320 "MSRIndex": "0x1a6,0x1a7", 1321 "MSRValue": "0x0104000010", 1322 "Offcore": "1", 1323 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1324 "SampleAfterValue": "100003", 1325 "UMask": "0x1" 1326 }, 1327 { 1328 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 1329 "Counter": "0,1,2,3", 1330 "CounterHTOff": "0,1,2,3", 1331 "Deprecated": "1", 1332 "EventCode": "0xB7, 0xBB", 1333 "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 1334 "MSRIndex": "0x1a6,0x1a7", 1335 "MSRValue": "0x3F84000001", 1336 "Offcore": "1", 1337 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1338 "SampleAfterValue": "100003", 1339 "UMask": "0x1" 1340 }, 1341 { 1342 "BriefDescription": "OCR.ALL_READS.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD OCR.ALL_READS.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 1343 "Counter": "0,1,2,3", 1344 "CounterHTOff": "0,1,2,3", 1345 "EventCode": "0xB7, 0xBB", 1346 "EventName": "OCR.ALL_READS.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 1347 "MSRIndex": "0x1a6,0x1a7", 1348 "MSRValue": "0x04040007F7", 1349 "Offcore": "1", 1350 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1351 "SampleAfterValue": "100003", 1352 "UMask": "0x1" 1353 }, 1354 { 1355 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 1356 "Counter": "0,1,2,3", 1357 "CounterHTOff": "0,1,2,3", 1358 "Deprecated": "1", 1359 "EventCode": "0xB7, 0xBB", 1360 "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 1361 "MSRIndex": "0x1a6,0x1a7", 1362 "MSRValue": "0x0410000010", 1363 "Offcore": "1", 1364 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1365 "SampleAfterValue": "100003", 1366 "UMask": "0x1" 1367 }, 1368 { 1369 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 1370 "Counter": "0,1,2,3", 1371 "CounterHTOff": "0,1,2,3", 1372 "Deprecated": "1", 1373 "EventCode": "0xB7, 0xBB", 1374 "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 1375 "MSRIndex": "0x1a6,0x1a7", 1376 "MSRValue": "0x0204000004", 1377 "Offcore": "1", 1378 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1379 "SampleAfterValue": "100003", 1380 "UMask": "0x1" 1381 }, 1382 { 1383 "BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD OCR.PF_L2_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD", 1384 "Counter": "0,1,2,3", 1385 "CounterHTOff": "0,1,2,3", 1386 "EventCode": "0xB7, 0xBB", 1387 "EventName": "OCR.PF_L2_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD", 1388 "MSRIndex": "0x1a6,0x1a7", 1389 "MSRValue": "0x083C000010", 1390 "Offcore": "1", 1391 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1392 "SampleAfterValue": "100003", 1393 "UMask": "0x1" 1394 }, 1395 { 1396 "BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_MISS.SNOOP_MISS", 1397 "Counter": "0,1,2,3", 1398 "CounterHTOff": "0,1,2,3", 1399 "EventCode": "0xB7, 0xBB", 1400 "EventName": "OCR.DEMAND_RFO.L3_MISS.SNOOP_MISS", 1401 "MSRIndex": "0x1a6,0x1a7", 1402 "MSRValue": "0x023C000002", 1403 "Offcore": "1", 1404 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1405 "SampleAfterValue": "100003", 1406 "UMask": "0x1" 1407 }, 1408 { 1409 "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 1410 "Counter": "0,1,2,3", 1411 "CounterHTOff": "0,1,2,3", 1412 "EventCode": "0xB7, 0xBB", 1413 "EventName": "OCR.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 1414 "MSRIndex": "0x1a6,0x1a7", 1415 "MSRValue": "0x0104000080", 1416 "Offcore": "1", 1417 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1418 "SampleAfterValue": "100003", 1419 "UMask": "0x1" 1420 }, 1421 { 1422 "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_MISS.REMOTE_HITM OCR.ALL_PF_DATA_RD.L3_MISS.REMOTE_HITM", 1423 "Counter": "0,1,2,3", 1424 "CounterHTOff": "0,1,2,3", 1425 "EventCode": "0xB7, 0xBB", 1426 "EventName": "OCR.ALL_PF_DATA_RD.L3_MISS.REMOTE_HITM", 1427 "MSRIndex": "0x1a6,0x1a7", 1428 "MSRValue": "0x103FC00490", 1429 "Offcore": "1", 1430 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1431 "SampleAfterValue": "100003", 1432 "UMask": "0x1" 1433 }, 1434 { 1435 "BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 1436 "Counter": "0,1,2,3", 1437 "CounterHTOff": "0,1,2,3", 1438 "EventCode": "0xB7, 0xBB", 1439 "EventName": "OCR.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 1440 "MSRIndex": "0x1a6,0x1a7", 1441 "MSRValue": "0x0810000004", 1442 "Offcore": "1", 1443 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1444 "SampleAfterValue": "100003", 1445 "UMask": "0x1" 1446 }, 1447 { 1448 "BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_MISS.SNOOP_MISS", 1449 "Counter": "0,1,2,3", 1450 "CounterHTOff": "0,1,2,3", 1451 "EventCode": "0xB7, 0xBB", 1452 "EventName": "OCR.DEMAND_CODE_RD.L3_MISS.SNOOP_MISS", 1453 "MSRIndex": "0x1a6,0x1a7", 1454 "MSRValue": "0x023C000004", 1455 "Offcore": "1", 1456 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1457 "SampleAfterValue": "100003", 1458 "UMask": "0x1" 1459 }, 1460 { 1461 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS.SNOOP_MISS", 1462 "Counter": "0,1,2,3", 1463 "CounterHTOff": "0,1,2,3", 1464 "Deprecated": "1", 1465 "EventCode": "0xB7, 0xBB", 1466 "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS.SNOOP_MISS", 1467 "MSRIndex": "0x1a6,0x1a7", 1468 "MSRValue": "0x023C000080", 1469 "Offcore": "1", 1470 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1471 "SampleAfterValue": "100003", 1472 "UMask": "0x1" 1473 }, 1474 { 1475 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 1476 "Counter": "0,1,2,3", 1477 "CounterHTOff": "0,1,2,3", 1478 "Deprecated": "1", 1479 "EventCode": "0xB7, 0xBB", 1480 "EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 1481 "MSRIndex": "0x1a6,0x1a7", 1482 "MSRValue": "0x0604000400", 1483 "Offcore": "1", 1484 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1485 "SampleAfterValue": "100003", 1486 "UMask": "0x1" 1487 }, 1488 { 1489 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 1490 "Counter": "0,1,2,3", 1491 "CounterHTOff": "0,1,2,3", 1492 "Deprecated": "1", 1493 "EventCode": "0xB7, 0xBB", 1494 "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 1495 "MSRIndex": "0x1a6,0x1a7", 1496 "MSRValue": "0x0404000080", 1497 "Offcore": "1", 1498 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1499 "SampleAfterValue": "100003", 1500 "UMask": "0x1" 1501 }, 1502 { 1503 "BriefDescription": "Counts prefetch (that bring data to L2) data reads", 1504 "Counter": "0,1,2,3", 1505 "CounterHTOff": "0,1,2,3", 1506 "EventCode": "0xB7, 0xBB", 1507 "EventName": "OCR.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 1508 "MSRIndex": "0x1a6,0x1a7", 1509 "MSRValue": "0x0210000010", 1510 "Offcore": "1", 1511 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1512 "SampleAfterValue": "100003", 1513 "UMask": "0x1" 1514 }, 1515 { 1516 "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_MISS.NO_SNOOP_NEEDED OCR.PF_L1D_AND_SW.L3_MISS.NO_SNOOP_NEEDED", 1517 "Counter": "0,1,2,3", 1518 "CounterHTOff": "0,1,2,3", 1519 "EventCode": "0xB7, 0xBB", 1520 "EventName": "OCR.PF_L1D_AND_SW.L3_MISS.NO_SNOOP_NEEDED", 1521 "MSRIndex": "0x1a6,0x1a7", 1522 "MSRValue": "0x013C000400", 1523 "Offcore": "1", 1524 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1525 "SampleAfterValue": "100003", 1526 "UMask": "0x1" 1527 }, 1528 { 1529 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS.SNOOP_NONE", 1530 "Counter": "0,1,2,3", 1531 "CounterHTOff": "0,1,2,3", 1532 "Deprecated": "1", 1533 "EventCode": "0xB7, 0xBB", 1534 "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS.SNOOP_NONE", 1535 "MSRIndex": "0x1a6,0x1a7", 1536 "MSRValue": "0x00BC000004", 1537 "Offcore": "1", 1538 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1539 "SampleAfterValue": "100003", 1540 "UMask": "0x1" 1541 }, 1542 { 1543 "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_MISS.REMOTE_HIT_FORWARD", 1544 "Counter": "0,1,2,3", 1545 "CounterHTOff": "0,1,2,3", 1546 "EventCode": "0xB7, 0xBB", 1547 "EventName": "OCR.PF_L1D_AND_SW.L3_MISS.REMOTE_HIT_FORWARD", 1548 "MSRIndex": "0x1a6,0x1a7", 1549 "MSRValue": "0x083FC00400", 1550 "Offcore": "1", 1551 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1552 "SampleAfterValue": "100003", 1553 "UMask": "0x1" 1554 }, 1555 { 1556 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 1557 "Counter": "0,1,2,3", 1558 "CounterHTOff": "0,1,2,3", 1559 "Deprecated": "1", 1560 "EventCode": "0xB7, 0xBB", 1561 "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 1562 "MSRIndex": "0x1a6,0x1a7", 1563 "MSRValue": "0x0204000100", 1564 "Offcore": "1", 1565 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1566 "SampleAfterValue": "100003", 1567 "UMask": "0x1" 1568 }, 1569 { 1570 "BriefDescription": "Number of times an HLE execution successfully committed", 1571 "Counter": "0,1,2,3", 1572 "CounterHTOff": "0,1,2,3,4,5,6,7", 1573 "EventCode": "0xC8", 1574 "EventName": "HLE_RETIRED.COMMIT", 1575 "PublicDescription": "Number of times HLE commit succeeded.", 1576 "SampleAfterValue": "2000003", 1577 "UMask": "0x2" 1578 }, 1579 { 1580 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 1581 "Counter": "0,1,2,3", 1582 "CounterHTOff": "0,1,2,3", 1583 "Deprecated": "1", 1584 "EventCode": "0xB7, 0xBB", 1585 "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 1586 "MSRIndex": "0x1a6,0x1a7", 1587 "MSRValue": "0x0404000122", 1588 "Offcore": "1", 1589 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1590 "SampleAfterValue": "100003", 1591 "UMask": "0x1" 1592 }, 1593 { 1594 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 1595 "Counter": "0,1,2,3", 1596 "CounterHTOff": "0,1,2,3", 1597 "Deprecated": "1", 1598 "EventCode": "0xB7, 0xBB", 1599 "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 1600 "MSRIndex": "0x1a6,0x1a7", 1601 "MSRValue": "0x3F84000002", 1602 "Offcore": "1", 1603 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1604 "SampleAfterValue": "100003", 1605 "UMask": "0x1" 1606 }, 1607 { 1608 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 1609 "Counter": "0,1,2,3", 1610 "CounterHTOff": "0,1,2,3", 1611 "Deprecated": "1", 1612 "EventCode": "0xB7, 0xBB", 1613 "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 1614 "MSRIndex": "0x1a6,0x1a7", 1615 "MSRValue": "0x0410000002", 1616 "Offcore": "1", 1617 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1618 "SampleAfterValue": "100003", 1619 "UMask": "0x1" 1620 }, 1621 { 1622 "BriefDescription": "OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 1623 "Counter": "0,1,2,3", 1624 "CounterHTOff": "0,1,2,3", 1625 "EventCode": "0xB7, 0xBB", 1626 "EventName": "OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 1627 "MSRIndex": "0x1a6,0x1a7", 1628 "MSRValue": "0x0810000491", 1629 "Offcore": "1", 1630 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1631 "SampleAfterValue": "100003", 1632 "UMask": "0x1" 1633 }, 1634 { 1635 "BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 1636 "Counter": "0,1,2,3", 1637 "CounterHTOff": "0,1,2,3", 1638 "EventCode": "0xB7, 0xBB", 1639 "EventName": "OCR.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 1640 "MSRIndex": "0x1a6,0x1a7", 1641 "MSRValue": "0x1010000010", 1642 "Offcore": "1", 1643 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1644 "SampleAfterValue": "100003", 1645 "UMask": "0x1" 1646 }, 1647 { 1648 "BriefDescription": "OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 1649 "Counter": "0,1,2,3", 1650 "CounterHTOff": "0,1,2,3", 1651 "EventCode": "0xB7, 0xBB", 1652 "EventName": "OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 1653 "MSRIndex": "0x1a6,0x1a7", 1654 "MSRValue": "0x0204000491", 1655 "Offcore": "1", 1656 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1657 "SampleAfterValue": "100003", 1658 "UMask": "0x1" 1659 }, 1660 { 1661 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 1662 "Counter": "0,1,2,3", 1663 "CounterHTOff": "0,1,2,3", 1664 "Deprecated": "1", 1665 "EventCode": "0xB7, 0xBB", 1666 "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 1667 "MSRIndex": "0x1a6,0x1a7", 1668 "MSRValue": "0x0210000001", 1669 "Offcore": "1", 1670 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1671 "SampleAfterValue": "100003", 1672 "UMask": "0x1" 1673 }, 1674 { 1675 "BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_MISS.HITM_OTHER_CORE OCR.PF_L2_DATA_RD.L3_MISS.HITM_OTHER_CORE", 1676 "Counter": "0,1,2,3", 1677 "CounterHTOff": "0,1,2,3", 1678 "EventCode": "0xB7, 0xBB", 1679 "EventName": "OCR.PF_L2_DATA_RD.L3_MISS.HITM_OTHER_CORE", 1680 "MSRIndex": "0x1a6,0x1a7", 1681 "MSRValue": "0x103C000010", 1682 "Offcore": "1", 1683 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1684 "SampleAfterValue": "100003", 1685 "UMask": "0x1" 1686 }, 1687 { 1688 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS.REMOTE_HITM", 1689 "Counter": "0,1,2,3", 1690 "CounterHTOff": "0,1,2,3", 1691 "Deprecated": "1", 1692 "EventCode": "0xB7, 0xBB", 1693 "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS.REMOTE_HITM", 1694 "MSRIndex": "0x1a6,0x1a7", 1695 "MSRValue": "0x103FC00100", 1696 "Offcore": "1", 1697 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1698 "SampleAfterValue": "100003", 1699 "UMask": "0x1" 1700 }, 1701 { 1702 "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_MISS.HITM_OTHER_CORE OCR.ALL_PF_DATA_RD.L3_MISS.HITM_OTHER_CORE OCR.ALL_PF_DATA_RD.L3_MISS.HITM_OTHER_CORE", 1703 "Counter": "0,1,2,3", 1704 "CounterHTOff": "0,1,2,3", 1705 "EventCode": "0xB7, 0xBB", 1706 "EventName": "OCR.ALL_PF_DATA_RD.L3_MISS.HITM_OTHER_CORE", 1707 "MSRIndex": "0x1a6,0x1a7", 1708 "MSRValue": "0x103C000490", 1709 "Offcore": "1", 1710 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1711 "SampleAfterValue": "100003", 1712 "UMask": "0x1" 1713 }, 1714 { 1715 "BriefDescription": "OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 1716 "Counter": "0,1,2,3", 1717 "CounterHTOff": "0,1,2,3", 1718 "EventCode": "0xB7, 0xBB", 1719 "EventName": "OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 1720 "MSRIndex": "0x1a6,0x1a7", 1721 "MSRValue": "0x0204000122", 1722 "Offcore": "1", 1723 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1724 "SampleAfterValue": "100003", 1725 "UMask": "0x1" 1726 }, 1727 { 1728 "BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_MISS.NO_SNOOP_NEEDED OCR.DEMAND_RFO.L3_MISS.NO_SNOOP_NEEDED", 1729 "Counter": "0,1,2,3", 1730 "CounterHTOff": "0,1,2,3", 1731 "EventCode": "0xB7, 0xBB", 1732 "EventName": "OCR.DEMAND_RFO.L3_MISS.NO_SNOOP_NEEDED", 1733 "MSRIndex": "0x1a6,0x1a7", 1734 "MSRValue": "0x013C000002", 1735 "Offcore": "1", 1736 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1737 "SampleAfterValue": "100003", 1738 "UMask": "0x1" 1739 }, 1740 { 1741 "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_MISS.SNOOP_NONE", 1742 "Counter": "0,1,2,3", 1743 "CounterHTOff": "0,1,2,3", 1744 "EventCode": "0xB7, 0xBB", 1745 "EventName": "OCR.PF_L3_DATA_RD.L3_MISS.SNOOP_NONE", 1746 "MSRIndex": "0x1a6,0x1a7", 1747 "MSRValue": "0x00BC000080", 1748 "Offcore": "1", 1749 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1750 "SampleAfterValue": "100003", 1751 "UMask": "0x1" 1752 }, 1753 { 1754 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS.SNOOP_NONE", 1755 "Counter": "0,1,2,3", 1756 "CounterHTOff": "0,1,2,3", 1757 "Deprecated": "1", 1758 "EventCode": "0xB7, 0xBB", 1759 "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS.SNOOP_NONE", 1760 "MSRIndex": "0x1a6,0x1a7", 1761 "MSRValue": "0x00BC000100", 1762 "Offcore": "1", 1763 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1764 "SampleAfterValue": "100003", 1765 "UMask": "0x1" 1766 }, 1767 { 1768 "BriefDescription": "OCR.ALL_READS.L3_MISS.SNOOP_MISS OCR.ALL_READS.L3_MISS.SNOOP_MISS", 1769 "Counter": "0,1,2,3", 1770 "CounterHTOff": "0,1,2,3", 1771 "EventCode": "0xB7, 0xBB", 1772 "EventName": "OCR.ALL_READS.L3_MISS.SNOOP_MISS", 1773 "MSRIndex": "0x1a6,0x1a7", 1774 "MSRValue": "0x023C0007F7", 1775 "Offcore": "1", 1776 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1777 "SampleAfterValue": "100003", 1778 "UMask": "0x1" 1779 }, 1780 { 1781 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 1782 "Counter": "0,1,2,3", 1783 "CounterHTOff": "0,1,2,3", 1784 "Deprecated": "1", 1785 "EventCode": "0xB7, 0xBB", 1786 "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 1787 "MSRIndex": "0x1a6,0x1a7", 1788 "MSRValue": "0x0404000004", 1789 "Offcore": "1", 1790 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1791 "SampleAfterValue": "100003", 1792 "UMask": "0x1" 1793 }, 1794 { 1795 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS.REMOTE_HITM", 1796 "Counter": "0,1,2,3", 1797 "CounterHTOff": "0,1,2,3", 1798 "Deprecated": "1", 1799 "EventCode": "0xB7, 0xBB", 1800 "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS.REMOTE_HITM", 1801 "MSRIndex": "0x1a6,0x1a7", 1802 "MSRValue": "0x103FC00122", 1803 "Offcore": "1", 1804 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1805 "SampleAfterValue": "100003", 1806 "UMask": "0x1" 1807 }, 1808 { 1809 "BriefDescription": "OCR.ALL_READS.L3_MISS.HIT_OTHER_CORE_NO_FWD OCR.ALL_READS.L3_MISS.HIT_OTHER_CORE_NO_FWD OCR.ALL_READS.L3_MISS.HIT_OTHER_CORE_NO_FWD", 1810 "Counter": "0,1,2,3", 1811 "CounterHTOff": "0,1,2,3", 1812 "EventCode": "0xB7, 0xBB", 1813 "EventName": "OCR.ALL_READS.L3_MISS.HIT_OTHER_CORE_NO_FWD", 1814 "MSRIndex": "0x1a6,0x1a7", 1815 "MSRValue": "0x043C0007F7", 1816 "Offcore": "1", 1817 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1818 "SampleAfterValue": "100003", 1819 "UMask": "0x1" 1820 }, 1821 { 1822 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 1823 "Counter": "0,1,2,3", 1824 "CounterHTOff": "0,1,2,3", 1825 "Deprecated": "1", 1826 "EventCode": "0xB7, 0xBB", 1827 "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 1828 "MSRIndex": "0x1a6,0x1a7", 1829 "MSRValue": "0x0084000120", 1830 "Offcore": "1", 1831 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1832 "SampleAfterValue": "100003", 1833 "UMask": "0x1" 1834 }, 1835 { 1836 "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_MISS.REMOTE_HIT_FORWARD", 1837 "Counter": "0,1,2,3", 1838 "CounterHTOff": "0,1,2,3", 1839 "EventCode": "0xB7, 0xBB", 1840 "EventName": "OCR.PF_L2_RFO.L3_MISS.REMOTE_HIT_FORWARD", 1841 "MSRIndex": "0x1a6,0x1a7", 1842 "MSRValue": "0x083FC00020", 1843 "Offcore": "1", 1844 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1845 "SampleAfterValue": "100003", 1846 "UMask": "0x1" 1847 }, 1848 { 1849 "BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 1850 "Counter": "0,1,2,3", 1851 "CounterHTOff": "0,1,2,3", 1852 "Deprecated": "1", 1853 "EventCode": "0xB7, 0xBB", 1854 "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 1855 "MSRIndex": "0x1a6,0x1a7", 1856 "MSRValue": "0x3F84008000", 1857 "Offcore": "1", 1858 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1859 "SampleAfterValue": "100003", 1860 "UMask": "0x1" 1861 }, 1862 { 1863 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 1864 "Counter": "0,1,2,3", 1865 "CounterHTOff": "0,1,2,3", 1866 "Deprecated": "1", 1867 "EventCode": "0xB7, 0xBB", 1868 "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 1869 "MSRIndex": "0x1a6,0x1a7", 1870 "MSRValue": "0x0090000002", 1871 "Offcore": "1", 1872 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1873 "SampleAfterValue": "100003", 1874 "UMask": "0x1" 1875 }, 1876 { 1877 "BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 1878 "Counter": "0,1,2,3", 1879 "CounterHTOff": "0,1,2,3", 1880 "EventCode": "0xB7, 0xBB", 1881 "EventName": "OCR.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 1882 "MSRIndex": "0x1a6,0x1a7", 1883 "MSRValue": "0x0804000004", 1884 "Offcore": "1", 1885 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1886 "SampleAfterValue": "100003", 1887 "UMask": "0x1" 1888 }, 1889 { 1890 "BriefDescription": "OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 1891 "Counter": "0,1,2,3", 1892 "CounterHTOff": "0,1,2,3", 1893 "EventCode": "0xB7, 0xBB", 1894 "EventName": "OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 1895 "MSRIndex": "0x1a6,0x1a7", 1896 "MSRValue": "0x0410000120", 1897 "Offcore": "1", 1898 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1899 "SampleAfterValue": "100003", 1900 "UMask": "0x1" 1901 }, 1902 { 1903 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 1904 "Counter": "0,1,2,3", 1905 "CounterHTOff": "0,1,2,3", 1906 "Deprecated": "1", 1907 "EventCode": "0xB7, 0xBB", 1908 "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 1909 "MSRIndex": "0x1a6,0x1a7", 1910 "MSRValue": "0x0604000122", 1911 "Offcore": "1", 1912 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1913 "SampleAfterValue": "100003", 1914 "UMask": "0x1" 1915 }, 1916 { 1917 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 1918 "Counter": "0,1,2,3", 1919 "CounterHTOff": "0,1,2,3", 1920 "Deprecated": "1", 1921 "EventCode": "0xB7, 0xBB", 1922 "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 1923 "MSRIndex": "0x1a6,0x1a7", 1924 "MSRValue": "0x1004000080", 1925 "Offcore": "1", 1926 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1927 "SampleAfterValue": "100003", 1928 "UMask": "0x1" 1929 }, 1930 { 1931 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 1932 "Counter": "0,1,2,3", 1933 "CounterHTOff": "0,1,2,3", 1934 "Deprecated": "1", 1935 "EventCode": "0xB7, 0xBB", 1936 "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 1937 "MSRIndex": "0x1a6,0x1a7", 1938 "MSRValue": "0x1010000004", 1939 "Offcore": "1", 1940 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1941 "SampleAfterValue": "100003", 1942 "UMask": "0x1" 1943 }, 1944 { 1945 "BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 1946 "Counter": "0,1,2,3", 1947 "CounterHTOff": "0,1,2,3", 1948 "EventCode": "0xB7, 0xBB", 1949 "EventName": "OCR.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 1950 "MSRIndex": "0x1a6,0x1a7", 1951 "MSRValue": "0x0410000010", 1952 "Offcore": "1", 1953 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1954 "SampleAfterValue": "100003", 1955 "UMask": "0x1" 1956 }, 1957 { 1958 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 1959 "Counter": "0,1,2,3", 1960 "CounterHTOff": "0,1,2,3", 1961 "Deprecated": "1", 1962 "EventCode": "0xB7, 0xBB", 1963 "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 1964 "MSRIndex": "0x1a6,0x1a7", 1965 "MSRValue": "0x063B800490", 1966 "Offcore": "1", 1967 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1968 "SampleAfterValue": "100003", 1969 "UMask": "0x1" 1970 }, 1971 { 1972 "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 1973 "Counter": "0,1,2,3", 1974 "CounterHTOff": "0,1,2,3", 1975 "EventCode": "0xB7, 0xBB", 1976 "EventName": "OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 1977 "MSRIndex": "0x1a6,0x1a7", 1978 "MSRValue": "0x0110000490", 1979 "Offcore": "1", 1980 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1981 "SampleAfterValue": "100003", 1982 "UMask": "0x1" 1983 }, 1984 { 1985 "BriefDescription": "Counts any other requests OCR.OTHER.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 1986 "Counter": "0,1,2,3", 1987 "CounterHTOff": "0,1,2,3", 1988 "EventCode": "0xB7, 0xBB", 1989 "EventName": "OCR.OTHER.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 1990 "MSRIndex": "0x1a6,0x1a7", 1991 "MSRValue": "0x0110008000", 1992 "Offcore": "1", 1993 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1994 "SampleAfterValue": "100003", 1995 "UMask": "0x1" 1996 }, 1997 { 1998 "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 1999 "Counter": "0,1,2,3", 2000 "CounterHTOff": "0,1,2,3", 2001 "EventCode": "0xB7, 0xBB", 2002 "EventName": "OCR.PF_L3_RFO.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 2003 "MSRIndex": "0x1a6,0x1a7", 2004 "MSRValue": "0x063B800100", 2005 "Offcore": "1", 2006 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2007 "SampleAfterValue": "100003", 2008 "UMask": "0x1" 2009 }, 2010 { 2011 "BriefDescription": "Counts any other requests OCR.OTHER.L3_MISS.SNOOP_NONE", 2012 "Counter": "0,1,2,3", 2013 "CounterHTOff": "0,1,2,3", 2014 "EventCode": "0xB7, 0xBB", 2015 "EventName": "OCR.OTHER.L3_MISS.SNOOP_NONE", 2016 "MSRIndex": "0x1a6,0x1a7", 2017 "MSRValue": "0x00BC008000", 2018 "Offcore": "1", 2019 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2020 "SampleAfterValue": "100003", 2021 "UMask": "0x1" 2022 }, 2023 { 2024 "BriefDescription": "OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 2025 "Counter": "0,1,2,3", 2026 "CounterHTOff": "0,1,2,3", 2027 "EventCode": "0xB7, 0xBB", 2028 "EventName": "OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 2029 "MSRIndex": "0x1a6,0x1a7", 2030 "MSRValue": "0x1004000122", 2031 "Offcore": "1", 2032 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2033 "SampleAfterValue": "100003", 2034 "UMask": "0x1" 2035 }, 2036 { 2037 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS.REMOTE_HIT_FORWARD", 2038 "Counter": "0,1,2,3", 2039 "CounterHTOff": "0,1,2,3", 2040 "Deprecated": "1", 2041 "EventCode": "0xB7, 0xBB", 2042 "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS.REMOTE_HIT_FORWARD", 2043 "MSRIndex": "0x1a6,0x1a7", 2044 "MSRValue": "0x083FC00080", 2045 "Offcore": "1", 2046 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2047 "SampleAfterValue": "100003", 2048 "UMask": "0x1" 2049 }, 2050 { 2051 "BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_MISS.REMOTE_HITM", 2052 "Counter": "0,1,2,3", 2053 "CounterHTOff": "0,1,2,3", 2054 "EventCode": "0xB7, 0xBB", 2055 "EventName": "OCR.DEMAND_RFO.L3_MISS.REMOTE_HITM", 2056 "MSRIndex": "0x1a6,0x1a7", 2057 "MSRValue": "0x103FC00002", 2058 "Offcore": "1", 2059 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2060 "SampleAfterValue": "100003", 2061 "UMask": "0x1" 2062 }, 2063 { 2064 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 2065 "Counter": "0,1,2,3", 2066 "CounterHTOff": "0,1,2,3", 2067 "Deprecated": "1", 2068 "EventCode": "0xB7, 0xBB", 2069 "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 2070 "MSRIndex": "0x1a6,0x1a7", 2071 "MSRValue": "0x0604000020", 2072 "Offcore": "1", 2073 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2074 "SampleAfterValue": "100003", 2075 "UMask": "0x1" 2076 }, 2077 { 2078 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 2079 "Counter": "0,1,2,3", 2080 "CounterHTOff": "0,1,2,3", 2081 "Deprecated": "1", 2082 "EventCode": "0xB7, 0xBB", 2083 "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 2084 "MSRIndex": "0x1a6,0x1a7", 2085 "MSRValue": "0x1004000120", 2086 "Offcore": "1", 2087 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2088 "SampleAfterValue": "100003", 2089 "UMask": "0x1" 2090 }, 2091 { 2092 "BriefDescription": "OCR.ALL_READS.L3_MISS_LOCAL_DRAM.ANY_SNOOP OCR.ALL_READS.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 2093 "Counter": "0,1,2,3", 2094 "CounterHTOff": "0,1,2,3", 2095 "EventCode": "0xB7, 0xBB", 2096 "EventName": "OCR.ALL_READS.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 2097 "MSRIndex": "0x1a6,0x1a7", 2098 "MSRValue": "0x3F840007F7", 2099 "Offcore": "1", 2100 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2101 "SampleAfterValue": "100003", 2102 "UMask": "0x1" 2103 }, 2104 { 2105 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 2106 "Counter": "0,1,2,3", 2107 "CounterHTOff": "0,1,2,3", 2108 "Deprecated": "1", 2109 "EventCode": "0xB7, 0xBB", 2110 "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 2111 "MSRIndex": "0x1a6,0x1a7", 2112 "MSRValue": "0x3F90000004", 2113 "Offcore": "1", 2114 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2115 "SampleAfterValue": "100003", 2116 "UMask": "0x1" 2117 }, 2118 { 2119 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS.SNOOP_MISS", 2120 "Counter": "0,1,2,3", 2121 "CounterHTOff": "0,1,2,3", 2122 "Deprecated": "1", 2123 "EventCode": "0xB7, 0xBB", 2124 "EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS.SNOOP_MISS", 2125 "MSRIndex": "0x1a6,0x1a7", 2126 "MSRValue": "0x023C0007F7", 2127 "Offcore": "1", 2128 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2129 "SampleAfterValue": "100003", 2130 "UMask": "0x1" 2131 }, 2132 { 2133 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 2134 "Counter": "0,1,2,3", 2135 "CounterHTOff": "0,1,2,3", 2136 "Deprecated": "1", 2137 "EventCode": "0xB7, 0xBB", 2138 "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 2139 "MSRIndex": "0x1a6,0x1a7", 2140 "MSRValue": "0x0110000122", 2141 "Offcore": "1", 2142 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2143 "SampleAfterValue": "100003", 2144 "UMask": "0x1" 2145 }, 2146 { 2147 "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_MISS.ANY_SNOOP OCR.ALL_PF_DATA_RD.L3_MISS.ANY_SNOOP OCR.ALL_PF_DATA_RD.L3_MISS.ANY_SNOOP", 2148 "Counter": "0,1,2,3", 2149 "CounterHTOff": "0,1,2,3", 2150 "EventCode": "0xB7, 0xBB", 2151 "EventName": "OCR.ALL_PF_DATA_RD.L3_MISS.ANY_SNOOP", 2152 "MSRIndex": "0x1a6,0x1a7", 2153 "MSRValue": "0x3FBC000490", 2154 "Offcore": "1", 2155 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2156 "SampleAfterValue": "100003", 2157 "UMask": "0x1" 2158 }, 2159 { 2160 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS.ANY_SNOOP", 2161 "Counter": "0,1,2,3", 2162 "CounterHTOff": "0,1,2,3", 2163 "Deprecated": "1", 2164 "EventCode": "0xB7, 0xBB", 2165 "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS.ANY_SNOOP", 2166 "MSRIndex": "0x1a6,0x1a7", 2167 "MSRValue": "0x3FBC000001", 2168 "Offcore": "1", 2169 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2170 "SampleAfterValue": "100003", 2171 "UMask": "0x1" 2172 }, 2173 { 2174 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS.REMOTE_HIT_FORWARD", 2175 "Counter": "0,1,2,3", 2176 "CounterHTOff": "0,1,2,3", 2177 "Deprecated": "1", 2178 "EventCode": "0xB7, 0xBB", 2179 "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS.REMOTE_HIT_FORWARD", 2180 "MSRIndex": "0x1a6,0x1a7", 2181 "MSRValue": "0x083FC00491", 2182 "Offcore": "1", 2183 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2184 "SampleAfterValue": "100003", 2185 "UMask": "0x1" 2186 }, 2187 { 2188 "BriefDescription": "OCR.ALL_READS.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE OCR.ALL_READS.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 2189 "Counter": "0,1,2,3", 2190 "CounterHTOff": "0,1,2,3", 2191 "EventCode": "0xB7, 0xBB", 2192 "EventName": "OCR.ALL_READS.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 2193 "MSRIndex": "0x1a6,0x1a7", 2194 "MSRValue": "0x10040007F7", 2195 "Offcore": "1", 2196 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2197 "SampleAfterValue": "100003", 2198 "UMask": "0x1" 2199 }, 2200 { 2201 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS.NO_SNOOP_NEEDED", 2202 "Counter": "0,1,2,3", 2203 "CounterHTOff": "0,1,2,3", 2204 "Deprecated": "1", 2205 "EventCode": "0xB7, 0xBB", 2206 "EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS.NO_SNOOP_NEEDED", 2207 "MSRIndex": "0x1a6,0x1a7", 2208 "MSRValue": "0x013C0007F7", 2209 "Offcore": "1", 2210 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2211 "SampleAfterValue": "100003", 2212 "UMask": "0x1" 2213 }, 2214 { 2215 "BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 2216 "Counter": "0,1,2,3", 2217 "CounterHTOff": "0,1,2,3", 2218 "EventCode": "0xB7, 0xBB", 2219 "EventName": "OCR.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 2220 "MSRIndex": "0x1a6,0x1a7", 2221 "MSRValue": "0x3F90000002", 2222 "Offcore": "1", 2223 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2224 "SampleAfterValue": "100003", 2225 "UMask": "0x1" 2226 }, 2227 { 2228 "BriefDescription": "Counts any other requests OCR.OTHER.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 2229 "Counter": "0,1,2,3", 2230 "CounterHTOff": "0,1,2,3", 2231 "EventCode": "0xB7, 0xBB", 2232 "EventName": "OCR.OTHER.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 2233 "MSRIndex": "0x1a6,0x1a7", 2234 "MSRValue": "0x1004008000", 2235 "Offcore": "1", 2236 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2237 "SampleAfterValue": "100003", 2238 "UMask": "0x1" 2239 }, 2240 { 2241 "BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 128 cycles.", 2242 "Counter": "0,1,2,3", 2243 "CounterHTOff": "0,1,2,3", 2244 "Data_LA": "1", 2245 "EventCode": "0xcd", 2246 "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_128", 2247 "MSRIndex": "0x3F6", 2248 "MSRValue": "0x80", 2249 "PEBS": "2", 2250 "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 128 cycles. Reported latency may be longer than just the memory latency.", 2251 "SampleAfterValue": "1009", 2252 "TakenAlone": "1", 2253 "UMask": "0x1" 2254 }, 2255 { 2256 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS.HIT_OTHER_CORE_FWD", 2257 "Counter": "0,1,2,3", 2258 "CounterHTOff": "0,1,2,3", 2259 "Deprecated": "1", 2260 "EventCode": "0xB7, 0xBB", 2261 "EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS.HIT_OTHER_CORE_FWD", 2262 "MSRIndex": "0x1a6,0x1a7", 2263 "MSRValue": "0x083C0007F7", 2264 "Offcore": "1", 2265 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2266 "SampleAfterValue": "100003", 2267 "UMask": "0x1" 2268 }, 2269 { 2270 "BriefDescription": "Number of times HLE lock could not be elided due to ElisionBufferAvailable being zero.", 2271 "Counter": "0,1,2,3", 2272 "CounterHTOff": "0,1,2,3,4,5,6,7", 2273 "EventCode": "0x54", 2274 "EventName": "TX_MEM.HLE_ELISION_BUFFER_FULL", 2275 "PublicDescription": "Number of times we could not allocate Lock Buffer.", 2276 "SampleAfterValue": "2000003", 2277 "UMask": "0x40" 2278 }, 2279 { 2280 "BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 2281 "Counter": "0,1,2,3", 2282 "CounterHTOff": "0,1,2,3", 2283 "Deprecated": "1", 2284 "EventCode": "0xB7, 0xBB", 2285 "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 2286 "MSRIndex": "0x1a6,0x1a7", 2287 "MSRValue": "0x0204008000", 2288 "Offcore": "1", 2289 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2290 "SampleAfterValue": "100003", 2291 "UMask": "0x1" 2292 }, 2293 { 2294 "BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_MISS.SNOOP_MISS", 2295 "Counter": "0,1,2,3", 2296 "CounterHTOff": "0,1,2,3", 2297 "EventCode": "0xB7, 0xBB", 2298 "EventName": "OCR.PF_L2_DATA_RD.L3_MISS.SNOOP_MISS", 2299 "MSRIndex": "0x1a6,0x1a7", 2300 "MSRValue": "0x023C000010", 2301 "Offcore": "1", 2302 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2303 "SampleAfterValue": "100003", 2304 "UMask": "0x1" 2305 }, 2306 { 2307 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD", 2308 "Counter": "0,1,2,3", 2309 "CounterHTOff": "0,1,2,3", 2310 "Deprecated": "1", 2311 "EventCode": "0xB7, 0xBB", 2312 "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD", 2313 "MSRIndex": "0x1a6,0x1a7", 2314 "MSRValue": "0x043C000491", 2315 "Offcore": "1", 2316 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2317 "SampleAfterValue": "100003", 2318 "UMask": "0x1" 2319 }, 2320 { 2321 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 2322 "Counter": "0,1,2,3", 2323 "CounterHTOff": "0,1,2,3", 2324 "Deprecated": "1", 2325 "EventCode": "0xB7, 0xBB", 2326 "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 2327 "MSRIndex": "0x1a6,0x1a7", 2328 "MSRValue": "0x1010000020", 2329 "Offcore": "1", 2330 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2331 "SampleAfterValue": "100003", 2332 "UMask": "0x1" 2333 }, 2334 { 2335 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS.HITM_OTHER_CORE", 2336 "Counter": "0,1,2,3", 2337 "CounterHTOff": "0,1,2,3", 2338 "Deprecated": "1", 2339 "EventCode": "0xB7, 0xBB", 2340 "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS.HITM_OTHER_CORE", 2341 "MSRIndex": "0x1a6,0x1a7", 2342 "MSRValue": "0x103C000122", 2343 "Offcore": "1", 2344 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2345 "SampleAfterValue": "100003", 2346 "UMask": "0x1" 2347 }, 2348 { 2349 "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 2350 "Counter": "0,1,2,3", 2351 "CounterHTOff": "0,1,2,3", 2352 "EventCode": "0xB7, 0xBB", 2353 "EventName": "OCR.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 2354 "MSRIndex": "0x1a6,0x1a7", 2355 "MSRValue": "0x0410000400", 2356 "Offcore": "1", 2357 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2358 "SampleAfterValue": "100003", 2359 "UMask": "0x1" 2360 }, 2361 { 2362 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 2363 "Counter": "0,1,2,3", 2364 "CounterHTOff": "0,1,2,3", 2365 "Deprecated": "1", 2366 "EventCode": "0xB7, 0xBB", 2367 "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 2368 "MSRIndex": "0x1a6,0x1a7", 2369 "MSRValue": "0x0084000122", 2370 "Offcore": "1", 2371 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2372 "SampleAfterValue": "100003", 2373 "UMask": "0x1" 2374 }, 2375 { 2376 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD", 2377 "Counter": "0,1,2,3", 2378 "CounterHTOff": "0,1,2,3", 2379 "Deprecated": "1", 2380 "EventCode": "0xB7, 0xBB", 2381 "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD", 2382 "MSRIndex": "0x1a6,0x1a7", 2383 "MSRValue": "0x083C000491", 2384 "Offcore": "1", 2385 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2386 "SampleAfterValue": "100003", 2387 "UMask": "0x1" 2388 }, 2389 { 2390 "BriefDescription": "OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 2391 "Counter": "0,1,2,3", 2392 "CounterHTOff": "0,1,2,3", 2393 "EventCode": "0xB7, 0xBB", 2394 "EventName": "OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 2395 "MSRIndex": "0x1a6,0x1a7", 2396 "MSRValue": "0x3F84000120", 2397 "Offcore": "1", 2398 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2399 "SampleAfterValue": "100003", 2400 "UMask": "0x1" 2401 }, 2402 { 2403 "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_MISS.NO_SNOOP_NEEDED OCR.ALL_PF_DATA_RD.L3_MISS.NO_SNOOP_NEEDED OCR.ALL_PF_DATA_RD.L3_MISS.NO_SNOOP_NEEDED", 2404 "Counter": "0,1,2,3", 2405 "CounterHTOff": "0,1,2,3", 2406 "EventCode": "0xB7, 0xBB", 2407 "EventName": "OCR.ALL_PF_DATA_RD.L3_MISS.NO_SNOOP_NEEDED", 2408 "MSRIndex": "0x1a6,0x1a7", 2409 "MSRValue": "0x013C000490", 2410 "Offcore": "1", 2411 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2412 "SampleAfterValue": "100003", 2413 "UMask": "0x1" 2414 }, 2415 { 2416 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS.ANY_SNOOP", 2417 "Counter": "0,1,2,3", 2418 "CounterHTOff": "0,1,2,3", 2419 "Deprecated": "1", 2420 "EventCode": "0xB7, 0xBB", 2421 "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS.ANY_SNOOP", 2422 "MSRIndex": "0x1a6,0x1a7", 2423 "MSRValue": "0x3FBC000490", 2424 "Offcore": "1", 2425 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2426 "SampleAfterValue": "100003", 2427 "UMask": "0x1" 2428 }, 2429 { 2430 "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 2431 "Counter": "0,1,2,3", 2432 "CounterHTOff": "0,1,2,3", 2433 "EventCode": "0xB7, 0xBB", 2434 "EventName": "OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 2435 "MSRIndex": "0x1a6,0x1a7", 2436 "MSRValue": "0x0804000490", 2437 "Offcore": "1", 2438 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2439 "SampleAfterValue": "100003", 2440 "UMask": "0x1" 2441 }, 2442 { 2443 "BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_MISS.HIT_OTHER_CORE_FWD OCR.DEMAND_RFO.L3_MISS.HIT_OTHER_CORE_FWD", 2444 "Counter": "0,1,2,3", 2445 "CounterHTOff": "0,1,2,3", 2446 "EventCode": "0xB7, 0xBB", 2447 "EventName": "OCR.DEMAND_RFO.L3_MISS.HIT_OTHER_CORE_FWD", 2448 "MSRIndex": "0x1a6,0x1a7", 2449 "MSRValue": "0x083C000002", 2450 "Offcore": "1", 2451 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2452 "SampleAfterValue": "100003", 2453 "UMask": "0x1" 2454 }, 2455 { 2456 "BriefDescription": "OCR.ALL_DATA_RD.L3_MISS.ANY_SNOOP OCR.ALL_DATA_RD.L3_MISS.ANY_SNOOP OCR.ALL_DATA_RD.L3_MISS.ANY_SNOOP", 2457 "Counter": "0,1,2,3", 2458 "CounterHTOff": "0,1,2,3", 2459 "EventCode": "0xB7, 0xBB", 2460 "EventName": "OCR.ALL_DATA_RD.L3_MISS.ANY_SNOOP", 2461 "MSRIndex": "0x1a6,0x1a7", 2462 "MSRValue": "0x3FBC000491", 2463 "Offcore": "1", 2464 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2465 "SampleAfterValue": "100003", 2466 "UMask": "0x1" 2467 }, 2468 { 2469 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS.HITM_OTHER_CORE", 2470 "Counter": "0,1,2,3", 2471 "CounterHTOff": "0,1,2,3", 2472 "Deprecated": "1", 2473 "EventCode": "0xB7, 0xBB", 2474 "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS.HITM_OTHER_CORE", 2475 "MSRIndex": "0x1a6,0x1a7", 2476 "MSRValue": "0x103C000080", 2477 "Offcore": "1", 2478 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2479 "SampleAfterValue": "100003", 2480 "UMask": "0x1" 2481 }, 2482 { 2483 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS.SNOOP_MISS", 2484 "Counter": "0,1,2,3", 2485 "CounterHTOff": "0,1,2,3", 2486 "Deprecated": "1", 2487 "EventCode": "0xB7, 0xBB", 2488 "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS.SNOOP_MISS", 2489 "MSRIndex": "0x1a6,0x1a7", 2490 "MSRValue": "0x023C000491", 2491 "Offcore": "1", 2492 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2493 "SampleAfterValue": "100003", 2494 "UMask": "0x1" 2495 }, 2496 { 2497 "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 2498 "Counter": "0,1,2,3", 2499 "CounterHTOff": "0,1,2,3", 2500 "EventCode": "0xB7, 0xBB", 2501 "EventName": "OCR.PF_L3_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 2502 "MSRIndex": "0x1a6,0x1a7", 2503 "MSRValue": "0x0404000100", 2504 "Offcore": "1", 2505 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2506 "SampleAfterValue": "100003", 2507 "UMask": "0x1" 2508 }, 2509 { 2510 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 2511 "Counter": "0,1,2,3", 2512 "CounterHTOff": "0,1,2,3", 2513 "Deprecated": "1", 2514 "EventCode": "0xB7, 0xBB", 2515 "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 2516 "MSRIndex": "0x1a6,0x1a7", 2517 "MSRValue": "0x3F90000120", 2518 "Offcore": "1", 2519 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2520 "SampleAfterValue": "100003", 2521 "UMask": "0x1" 2522 }, 2523 { 2524 "BriefDescription": "OCR.ALL_PF_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD OCR.ALL_PF_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD OCR.ALL_PF_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD", 2525 "Counter": "0,1,2,3", 2526 "CounterHTOff": "0,1,2,3", 2527 "EventCode": "0xB7, 0xBB", 2528 "EventName": "OCR.ALL_PF_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD", 2529 "MSRIndex": "0x1a6,0x1a7", 2530 "MSRValue": "0x043C000120", 2531 "Offcore": "1", 2532 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2533 "SampleAfterValue": "100003", 2534 "UMask": "0x1" 2535 }, 2536 { 2537 "BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS.ANY_SNOOP", 2538 "Counter": "0,1,2,3", 2539 "CounterHTOff": "0,1,2,3", 2540 "Deprecated": "1", 2541 "EventCode": "0xB7, 0xBB", 2542 "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS.ANY_SNOOP", 2543 "MSRIndex": "0x1a6,0x1a7", 2544 "MSRValue": "0x3FBC008000", 2545 "Offcore": "1", 2546 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2547 "SampleAfterValue": "100003", 2548 "UMask": "0x1" 2549 }, 2550 { 2551 "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_MISS.SNOOP_MISS", 2552 "Counter": "0,1,2,3", 2553 "CounterHTOff": "0,1,2,3", 2554 "EventCode": "0xB7, 0xBB", 2555 "EventName": "OCR.PF_L3_RFO.L3_MISS.SNOOP_MISS", 2556 "MSRIndex": "0x1a6,0x1a7", 2557 "MSRValue": "0x023C000100", 2558 "Offcore": "1", 2559 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2560 "SampleAfterValue": "100003", 2561 "UMask": "0x1" 2562 }, 2563 { 2564 "BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 2565 "Counter": "0,1,2,3", 2566 "CounterHTOff": "0,1,2,3", 2567 "EventCode": "0xB7, 0xBB", 2568 "EventName": "OCR.DEMAND_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 2569 "MSRIndex": "0x1a6,0x1a7", 2570 "MSRValue": "0x0604000002", 2571 "Offcore": "1", 2572 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2573 "SampleAfterValue": "100003", 2574 "UMask": "0x1" 2575 }, 2576 { 2577 "BriefDescription": "Counts any other requests", 2578 "Counter": "0,1,2,3", 2579 "CounterHTOff": "0,1,2,3", 2580 "EventCode": "0xB7, 0xBB", 2581 "EventName": "OCR.OTHER.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 2582 "MSRIndex": "0x1a6,0x1a7", 2583 "MSRValue": "0x0090008000", 2584 "Offcore": "1", 2585 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2586 "SampleAfterValue": "100003", 2587 "UMask": "0x1" 2588 }, 2589 { 2590 "BriefDescription": "OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 2591 "Counter": "0,1,2,3", 2592 "CounterHTOff": "0,1,2,3", 2593 "EventCode": "0xB7, 0xBB", 2594 "EventName": "OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 2595 "MSRIndex": "0x1a6,0x1a7", 2596 "MSRValue": "0x0104000122", 2597 "Offcore": "1", 2598 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2599 "SampleAfterValue": "100003", 2600 "UMask": "0x1" 2601 }, 2602 { 2603 "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_MISS.SNOOP_MISS OCR.ALL_PF_DATA_RD.L3_MISS.SNOOP_MISS", 2604 "Counter": "0,1,2,3", 2605 "CounterHTOff": "0,1,2,3", 2606 "EventCode": "0xB7, 0xBB", 2607 "EventName": "OCR.ALL_PF_DATA_RD.L3_MISS.SNOOP_MISS", 2608 "MSRIndex": "0x1a6,0x1a7", 2609 "MSRValue": "0x023C000490", 2610 "Offcore": "1", 2611 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2612 "SampleAfterValue": "100003", 2613 "UMask": "0x1" 2614 }, 2615 { 2616 "BriefDescription": "OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 2617 "Counter": "0,1,2,3", 2618 "CounterHTOff": "0,1,2,3", 2619 "EventCode": "0xB7, 0xBB", 2620 "EventName": "OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 2621 "MSRIndex": "0x1a6,0x1a7", 2622 "MSRValue": "0x3F90000122", 2623 "Offcore": "1", 2624 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2625 "SampleAfterValue": "100003", 2626 "UMask": "0x1" 2627 }, 2628 { 2629 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 2630 "Counter": "0,1,2,3", 2631 "CounterHTOff": "0,1,2,3", 2632 "Deprecated": "1", 2633 "EventCode": "0xB7, 0xBB", 2634 "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 2635 "MSRIndex": "0x1a6,0x1a7", 2636 "MSRValue": "0x1010000080", 2637 "Offcore": "1", 2638 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2639 "SampleAfterValue": "100003", 2640 "UMask": "0x1" 2641 }, 2642 { 2643 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD", 2644 "Counter": "0,1,2,3", 2645 "CounterHTOff": "0,1,2,3", 2646 "Deprecated": "1", 2647 "EventCode": "0xB7, 0xBB", 2648 "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD", 2649 "MSRIndex": "0x1a6,0x1a7", 2650 "MSRValue": "0x043C000490", 2651 "Offcore": "1", 2652 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2653 "SampleAfterValue": "100003", 2654 "UMask": "0x1" 2655 }, 2656 { 2657 "BriefDescription": "OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 2658 "Counter": "0,1,2,3", 2659 "CounterHTOff": "0,1,2,3", 2660 "EventCode": "0xB7, 0xBB", 2661 "EventName": "OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 2662 "MSRIndex": "0x1a6,0x1a7", 2663 "MSRValue": "0x0810000120", 2664 "Offcore": "1", 2665 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2666 "SampleAfterValue": "100003", 2667 "UMask": "0x1" 2668 }, 2669 { 2670 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 2671 "Counter": "0,1,2,3", 2672 "CounterHTOff": "0,1,2,3", 2673 "Deprecated": "1", 2674 "EventCode": "0xB7, 0xBB", 2675 "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 2676 "MSRIndex": "0x1a6,0x1a7", 2677 "MSRValue": "0x0604000490", 2678 "Offcore": "1", 2679 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2680 "SampleAfterValue": "100003", 2681 "UMask": "0x1" 2682 }, 2683 { 2684 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 2685 "Counter": "0,1,2,3", 2686 "CounterHTOff": "0,1,2,3", 2687 "Deprecated": "1", 2688 "EventCode": "0xB7, 0xBB", 2689 "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 2690 "MSRIndex": "0x1a6,0x1a7", 2691 "MSRValue": "0x0090000001", 2692 "Offcore": "1", 2693 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2694 "SampleAfterValue": "100003", 2695 "UMask": "0x1" 2696 }, 2697 { 2698 "BriefDescription": "OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 2699 "Counter": "0,1,2,3", 2700 "CounterHTOff": "0,1,2,3", 2701 "EventCode": "0xB7, 0xBB", 2702 "EventName": "OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 2703 "MSRIndex": "0x1a6,0x1a7", 2704 "MSRValue": "0x0204000120", 2705 "Offcore": "1", 2706 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2707 "SampleAfterValue": "100003", 2708 "UMask": "0x1" 2709 }, 2710 { 2711 "BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_MISS.ANY_SNOOP OCR.DEMAND_DATA_RD.L3_MISS.ANY_SNOOP", 2712 "Counter": "0,1,2,3", 2713 "CounterHTOff": "0,1,2,3", 2714 "EventCode": "0xB7, 0xBB", 2715 "EventName": "OCR.DEMAND_DATA_RD.L3_MISS.ANY_SNOOP", 2716 "MSRIndex": "0x1a6,0x1a7", 2717 "MSRValue": "0x3FBC000001", 2718 "Offcore": "1", 2719 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2720 "SampleAfterValue": "100003", 2721 "UMask": "0x1" 2722 }, 2723 { 2724 "BriefDescription": "Number of times an RTM execution aborted due to incompatible memory type", 2725 "Counter": "0,1,2,3", 2726 "CounterHTOff": "0,1,2,3,4,5,6,7", 2727 "EventCode": "0xC9", 2728 "EventName": "RTM_RETIRED.ABORTED_MEMTYPE", 2729 "PublicDescription": "Number of times an RTM execution aborted due to incompatible memory type.", 2730 "SampleAfterValue": "2000003", 2731 "UMask": "0x40" 2732 }, 2733 { 2734 "BriefDescription": "OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 2735 "Counter": "0,1,2,3", 2736 "CounterHTOff": "0,1,2,3", 2737 "EventCode": "0xB7, 0xBB", 2738 "EventName": "OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 2739 "MSRIndex": "0x1a6,0x1a7", 2740 "MSRValue": "0x1010000120", 2741 "Offcore": "1", 2742 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2743 "SampleAfterValue": "100003", 2744 "UMask": "0x1" 2745 }, 2746 { 2747 "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 2748 "Counter": "0,1,2,3", 2749 "CounterHTOff": "0,1,2,3", 2750 "EventCode": "0xB7, 0xBB", 2751 "EventName": "OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 2752 "MSRIndex": "0x1a6,0x1a7", 2753 "MSRValue": "0x3F84000490", 2754 "Offcore": "1", 2755 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2756 "SampleAfterValue": "100003", 2757 "UMask": "0x1" 2758 }, 2759 { 2760 "BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_MISS.REMOTE_HIT_FORWARD", 2761 "Counter": "0,1,2,3", 2762 "CounterHTOff": "0,1,2,3", 2763 "EventCode": "0xB7, 0xBB", 2764 "EventName": "OCR.PF_L2_DATA_RD.L3_MISS.REMOTE_HIT_FORWARD", 2765 "MSRIndex": "0x1a6,0x1a7", 2766 "MSRValue": "0x083FC00010", 2767 "Offcore": "1", 2768 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2769 "SampleAfterValue": "100003", 2770 "UMask": "0x1" 2771 }, 2772 { 2773 "BriefDescription": "OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 2774 "Counter": "0,1,2,3", 2775 "CounterHTOff": "0,1,2,3", 2776 "EventCode": "0xB7, 0xBB", 2777 "EventName": "OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 2778 "MSRIndex": "0x1a6,0x1a7", 2779 "MSRValue": "0x0084000122", 2780 "Offcore": "1", 2781 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2782 "SampleAfterValue": "100003", 2783 "UMask": "0x1" 2784 }, 2785 { 2786 "BriefDescription": "OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 2787 "Counter": "0,1,2,3", 2788 "CounterHTOff": "0,1,2,3", 2789 "EventCode": "0xB7, 0xBB", 2790 "EventName": "OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 2791 "MSRIndex": "0x1a6,0x1a7", 2792 "MSRValue": "0x00900007F7", 2793 "Offcore": "1", 2794 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2795 "SampleAfterValue": "100003", 2796 "UMask": "0x1" 2797 }, 2798 { 2799 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS.HITM_OTHER_CORE", 2800 "Counter": "0,1,2,3", 2801 "CounterHTOff": "0,1,2,3", 2802 "Deprecated": "1", 2803 "EventCode": "0xB7, 0xBB", 2804 "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS.HITM_OTHER_CORE", 2805 "MSRIndex": "0x1a6,0x1a7", 2806 "MSRValue": "0x103C000010", 2807 "Offcore": "1", 2808 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2809 "SampleAfterValue": "100003", 2810 "UMask": "0x1" 2811 }, 2812 { 2813 "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 2814 "Counter": "0,1,2,3", 2815 "CounterHTOff": "0,1,2,3", 2816 "EventCode": "0xB7, 0xBB", 2817 "EventName": "OCR.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 2818 "MSRIndex": "0x1a6,0x1a7", 2819 "MSRValue": "0x3F84000400", 2820 "Offcore": "1", 2821 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2822 "SampleAfterValue": "100003", 2823 "UMask": "0x1" 2824 }, 2825 { 2826 "BriefDescription": "OCR.ALL_READS.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 2827 "Counter": "0,1,2,3", 2828 "CounterHTOff": "0,1,2,3", 2829 "EventCode": "0xB7, 0xBB", 2830 "EventName": "OCR.ALL_READS.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 2831 "MSRIndex": "0x1a6,0x1a7", 2832 "MSRValue": "0x02040007F7", 2833 "Offcore": "1", 2834 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2835 "SampleAfterValue": "100003", 2836 "UMask": "0x1" 2837 }, 2838 { 2839 "BriefDescription": "OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 2840 "Counter": "0,1,2,3", 2841 "CounterHTOff": "0,1,2,3", 2842 "EventCode": "0xB7, 0xBB", 2843 "EventName": "OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 2844 "MSRIndex": "0x1a6,0x1a7", 2845 "MSRValue": "0x0410000122", 2846 "Offcore": "1", 2847 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2848 "SampleAfterValue": "100003", 2849 "UMask": "0x1" 2850 }, 2851 { 2852 "BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 2853 "Counter": "0,1,2,3", 2854 "CounterHTOff": "0,1,2,3", 2855 "EventCode": "0xB7, 0xBB", 2856 "EventName": "OCR.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 2857 "MSRIndex": "0x1a6,0x1a7", 2858 "MSRValue": "0x1004000001", 2859 "Offcore": "1", 2860 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2861 "SampleAfterValue": "100003", 2862 "UMask": "0x1" 2863 }, 2864 { 2865 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 2866 "Counter": "0,1,2,3", 2867 "CounterHTOff": "0,1,2,3", 2868 "Deprecated": "1", 2869 "EventCode": "0xB7, 0xBB", 2870 "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 2871 "MSRIndex": "0x1a6,0x1a7", 2872 "MSRValue": "0x3F90000080", 2873 "Offcore": "1", 2874 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2875 "SampleAfterValue": "100003", 2876 "UMask": "0x1" 2877 }, 2878 { 2879 "BriefDescription": "OCR.ALL_RFO.L3_MISS.REMOTE_HIT_FORWARD OCR.ALL_RFO.L3_MISS.REMOTE_HIT_FORWARD", 2880 "Counter": "0,1,2,3", 2881 "CounterHTOff": "0,1,2,3", 2882 "EventCode": "0xB7, 0xBB", 2883 "EventName": "OCR.ALL_RFO.L3_MISS.REMOTE_HIT_FORWARD", 2884 "MSRIndex": "0x1a6,0x1a7", 2885 "MSRValue": "0x083FC00122", 2886 "Offcore": "1", 2887 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2888 "SampleAfterValue": "100003", 2889 "UMask": "0x1" 2890 }, 2891 { 2892 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 2893 "Counter": "0,1,2,3", 2894 "CounterHTOff": "0,1,2,3", 2895 "Deprecated": "1", 2896 "EventCode": "0xB7, 0xBB", 2897 "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 2898 "MSRIndex": "0x1a6,0x1a7", 2899 "MSRValue": "0x0810000010", 2900 "Offcore": "1", 2901 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2902 "SampleAfterValue": "100003", 2903 "UMask": "0x1" 2904 }, 2905 { 2906 "BriefDescription": "OCR.ALL_READS.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD OCR.ALL_READS.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 2907 "Counter": "0,1,2,3", 2908 "CounterHTOff": "0,1,2,3", 2909 "EventCode": "0xB7, 0xBB", 2910 "EventName": "OCR.ALL_READS.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 2911 "MSRIndex": "0x1a6,0x1a7", 2912 "MSRValue": "0x063B8007F7", 2913 "Offcore": "1", 2914 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2915 "SampleAfterValue": "100003", 2916 "UMask": "0x1" 2917 }, 2918 { 2919 "BriefDescription": "OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 2920 "Counter": "0,1,2,3", 2921 "CounterHTOff": "0,1,2,3", 2922 "EventCode": "0xB7, 0xBB", 2923 "EventName": "OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 2924 "MSRIndex": "0x1a6,0x1a7", 2925 "MSRValue": "0x0810000122", 2926 "Offcore": "1", 2927 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2928 "SampleAfterValue": "100003", 2929 "UMask": "0x1" 2930 }, 2931 { 2932 "BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_MISS.NO_SNOOP_NEEDED OCR.PF_L2_DATA_RD.L3_MISS.NO_SNOOP_NEEDED", 2933 "Counter": "0,1,2,3", 2934 "CounterHTOff": "0,1,2,3", 2935 "EventCode": "0xB7, 0xBB", 2936 "EventName": "OCR.PF_L2_DATA_RD.L3_MISS.NO_SNOOP_NEEDED", 2937 "MSRIndex": "0x1a6,0x1a7", 2938 "MSRValue": "0x013C000010", 2939 "Offcore": "1", 2940 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2941 "SampleAfterValue": "100003", 2942 "UMask": "0x1" 2943 }, 2944 { 2945 "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 2946 "Counter": "0,1,2,3", 2947 "CounterHTOff": "0,1,2,3", 2948 "EventCode": "0xB7, 0xBB", 2949 "EventName": "OCR.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 2950 "MSRIndex": "0x1a6,0x1a7", 2951 "MSRValue": "0x0410000020", 2952 "Offcore": "1", 2953 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2954 "SampleAfterValue": "100003", 2955 "UMask": "0x1" 2956 }, 2957 { 2958 "BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 2959 "Counter": "0,1,2,3", 2960 "CounterHTOff": "0,1,2,3", 2961 "EventCode": "0xB7, 0xBB", 2962 "EventName": "OCR.DEMAND_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 2963 "MSRIndex": "0x1a6,0x1a7", 2964 "MSRValue": "0x0804000002", 2965 "Offcore": "1", 2966 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2967 "SampleAfterValue": "100003", 2968 "UMask": "0x1" 2969 }, 2970 { 2971 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 2972 "Counter": "0,1,2,3", 2973 "CounterHTOff": "0,1,2,3", 2974 "Deprecated": "1", 2975 "EventCode": "0xB7, 0xBB", 2976 "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 2977 "MSRIndex": "0x1a6,0x1a7", 2978 "MSRValue": "0x1004000004", 2979 "Offcore": "1", 2980 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2981 "SampleAfterValue": "100003", 2982 "UMask": "0x1" 2983 }, 2984 { 2985 "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 2986 "Counter": "0,1,2,3", 2987 "CounterHTOff": "0,1,2,3", 2988 "EventCode": "0xB7, 0xBB", 2989 "EventName": "OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 2990 "MSRIndex": "0x1a6,0x1a7", 2991 "MSRValue": "0x0104000490", 2992 "Offcore": "1", 2993 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2994 "SampleAfterValue": "100003", 2995 "UMask": "0x1" 2996 }, 2997 { 2998 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 2999 "Counter": "0,1,2,3", 3000 "CounterHTOff": "0,1,2,3", 3001 "Deprecated": "1", 3002 "EventCode": "0xB7, 0xBB", 3003 "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 3004 "MSRIndex": "0x1a6,0x1a7", 3005 "MSRValue": "0x063B800080", 3006 "Offcore": "1", 3007 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3008 "SampleAfterValue": "100003", 3009 "UMask": "0x1" 3010 }, 3011 { 3012 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS.ANY_SNOOP", 3013 "Counter": "0,1,2,3", 3014 "CounterHTOff": "0,1,2,3", 3015 "Deprecated": "1", 3016 "EventCode": "0xB7, 0xBB", 3017 "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS.ANY_SNOOP", 3018 "MSRIndex": "0x1a6,0x1a7", 3019 "MSRValue": "0x3FBC000122", 3020 "Offcore": "1", 3021 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3022 "SampleAfterValue": "100003", 3023 "UMask": "0x1" 3024 }, 3025 { 3026 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 3027 "Counter": "0,1,2,3", 3028 "CounterHTOff": "0,1,2,3", 3029 "Deprecated": "1", 3030 "EventCode": "0xB7, 0xBB", 3031 "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 3032 "MSRIndex": "0x1a6,0x1a7", 3033 "MSRValue": "0x0604000100", 3034 "Offcore": "1", 3035 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3036 "SampleAfterValue": "100003", 3037 "UMask": "0x1" 3038 }, 3039 { 3040 "BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 3041 "Counter": "0,1,2,3", 3042 "CounterHTOff": "0,1,2,3", 3043 "Deprecated": "1", 3044 "EventCode": "0xB7, 0xBB", 3045 "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 3046 "MSRIndex": "0x1a6,0x1a7", 3047 "MSRValue": "0x0404008000", 3048 "Offcore": "1", 3049 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3050 "SampleAfterValue": "100003", 3051 "UMask": "0x1" 3052 }, 3053 { 3054 "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 3055 "Counter": "0,1,2,3", 3056 "CounterHTOff": "0,1,2,3", 3057 "EventCode": "0xB7, 0xBB", 3058 "EventName": "OCR.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 3059 "MSRIndex": "0x1a6,0x1a7", 3060 "MSRValue": "0x0810000100", 3061 "Offcore": "1", 3062 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3063 "SampleAfterValue": "100003", 3064 "UMask": "0x1" 3065 }, 3066 { 3067 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS.NO_SNOOP_NEEDED", 3068 "Counter": "0,1,2,3", 3069 "CounterHTOff": "0,1,2,3", 3070 "Deprecated": "1", 3071 "EventCode": "0xB7, 0xBB", 3072 "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS.NO_SNOOP_NEEDED", 3073 "MSRIndex": "0x1a6,0x1a7", 3074 "MSRValue": "0x013C000490", 3075 "Offcore": "1", 3076 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3077 "SampleAfterValue": "100003", 3078 "UMask": "0x1" 3079 }, 3080 { 3081 "BriefDescription": "Counts demand data reads", 3082 "Counter": "0,1,2,3", 3083 "CounterHTOff": "0,1,2,3", 3084 "EventCode": "0xB7, 0xBB", 3085 "EventName": "OCR.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 3086 "MSRIndex": "0x1a6,0x1a7", 3087 "MSRValue": "0x0204000001", 3088 "Offcore": "1", 3089 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3090 "SampleAfterValue": "100003", 3091 "UMask": "0x1" 3092 }, 3093 { 3094 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS.ANY_SNOOP", 3095 "Counter": "0,1,2,3", 3096 "CounterHTOff": "0,1,2,3", 3097 "Deprecated": "1", 3098 "EventCode": "0xB7, 0xBB", 3099 "EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS.ANY_SNOOP", 3100 "MSRIndex": "0x1a6,0x1a7", 3101 "MSRValue": "0x3FBC000400", 3102 "Offcore": "1", 3103 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3104 "SampleAfterValue": "100003", 3105 "UMask": "0x1" 3106 }, 3107 { 3108 "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_MISS.HITM_OTHER_CORE OCR.PF_L3_RFO.L3_MISS.HITM_OTHER_CORE", 3109 "Counter": "0,1,2,3", 3110 "CounterHTOff": "0,1,2,3", 3111 "EventCode": "0xB7, 0xBB", 3112 "EventName": "OCR.PF_L3_RFO.L3_MISS.HITM_OTHER_CORE", 3113 "MSRIndex": "0x1a6,0x1a7", 3114 "MSRValue": "0x103C000100", 3115 "Offcore": "1", 3116 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3117 "SampleAfterValue": "100003", 3118 "UMask": "0x1" 3119 }, 3120 { 3121 "BriefDescription": "Counts any other requests OCR.OTHER.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 3122 "Counter": "0,1,2,3", 3123 "CounterHTOff": "0,1,2,3", 3124 "EventCode": "0xB7, 0xBB", 3125 "EventName": "OCR.OTHER.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 3126 "MSRIndex": "0x1a6,0x1a7", 3127 "MSRValue": "0x063B808000", 3128 "Offcore": "1", 3129 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3130 "SampleAfterValue": "100003", 3131 "UMask": "0x1" 3132 }, 3133 { 3134 "BriefDescription": "Number of times an HLE transactional execution aborted due to NoAllocatedElisionBuffer being non-zero.", 3135 "Counter": "0,1,2,3", 3136 "CounterHTOff": "0,1,2,3,4,5,6,7", 3137 "EventCode": "0x54", 3138 "EventName": "TX_MEM.ABORT_HLE_ELISION_BUFFER_NOT_EMPTY", 3139 "PublicDescription": "Number of times a TSX Abort was triggered due to commit but Lock Buffer not empty.", 3140 "SampleAfterValue": "2000003", 3141 "UMask": "0x8" 3142 }, 3143 { 3144 "BriefDescription": "Counts any other requests", 3145 "Counter": "0,1,2,3", 3146 "CounterHTOff": "0,1,2,3", 3147 "EventCode": "0xB7, 0xBB", 3148 "EventName": "OCR.OTHER.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 3149 "MSRIndex": "0x1a6,0x1a7", 3150 "MSRValue": "0x0084008000", 3151 "Offcore": "1", 3152 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3153 "SampleAfterValue": "100003", 3154 "UMask": "0x1" 3155 }, 3156 { 3157 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 3158 "Counter": "0,1,2,3", 3159 "CounterHTOff": "0,1,2,3", 3160 "Deprecated": "1", 3161 "EventCode": "0xB7, 0xBB", 3162 "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 3163 "MSRIndex": "0x1a6,0x1a7", 3164 "MSRValue": "0x1004000001", 3165 "Offcore": "1", 3166 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3167 "SampleAfterValue": "100003", 3168 "UMask": "0x1" 3169 }, 3170 { 3171 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 3172 "Counter": "0,1,2,3", 3173 "CounterHTOff": "0,1,2,3", 3174 "Deprecated": "1", 3175 "EventCode": "0xB7, 0xBB", 3176 "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 3177 "MSRIndex": "0x1a6,0x1a7", 3178 "MSRValue": "0x1004000100", 3179 "Offcore": "1", 3180 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3181 "SampleAfterValue": "100003", 3182 "UMask": "0x1" 3183 }, 3184 { 3185 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS.HITM_OTHER_CORE", 3186 "Counter": "0,1,2,3", 3187 "CounterHTOff": "0,1,2,3", 3188 "Deprecated": "1", 3189 "EventCode": "0xB7, 0xBB", 3190 "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS.HITM_OTHER_CORE", 3191 "MSRIndex": "0x1a6,0x1a7", 3192 "MSRValue": "0x103C000002", 3193 "Offcore": "1", 3194 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3195 "SampleAfterValue": "100003", 3196 "UMask": "0x1" 3197 }, 3198 { 3199 "BriefDescription": "OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 3200 "Counter": "0,1,2,3", 3201 "CounterHTOff": "0,1,2,3", 3202 "EventCode": "0xB7, 0xBB", 3203 "EventName": "OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 3204 "MSRIndex": "0x1a6,0x1a7", 3205 "MSRValue": "0x0604000491", 3206 "Offcore": "1", 3207 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3208 "SampleAfterValue": "100003", 3209 "UMask": "0x1" 3210 }, 3211 { 3212 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 3213 "Counter": "0,1,2,3", 3214 "CounterHTOff": "0,1,2,3", 3215 "Deprecated": "1", 3216 "EventCode": "0xB7, 0xBB", 3217 "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 3218 "MSRIndex": "0x1a6,0x1a7", 3219 "MSRValue": "0x0210000120", 3220 "Offcore": "1", 3221 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3222 "SampleAfterValue": "100003", 3223 "UMask": "0x1" 3224 }, 3225 { 3226 "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD OCR.ALL_PF_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD OCR.ALL_PF_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD", 3227 "Counter": "0,1,2,3", 3228 "CounterHTOff": "0,1,2,3", 3229 "EventCode": "0xB7, 0xBB", 3230 "EventName": "OCR.ALL_PF_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD", 3231 "MSRIndex": "0x1a6,0x1a7", 3232 "MSRValue": "0x083C000490", 3233 "Offcore": "1", 3234 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3235 "SampleAfterValue": "100003", 3236 "UMask": "0x1" 3237 }, 3238 { 3239 "BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 3240 "Counter": "0,1,2,3", 3241 "CounterHTOff": "0,1,2,3", 3242 "EventCode": "0xB7, 0xBB", 3243 "EventName": "OCR.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 3244 "MSRIndex": "0x1a6,0x1a7", 3245 "MSRValue": "0x3F90000001", 3246 "Offcore": "1", 3247 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3248 "SampleAfterValue": "100003", 3249 "UMask": "0x1" 3250 }, 3251 { 3252 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD", 3253 "Counter": "0,1,2,3", 3254 "CounterHTOff": "0,1,2,3", 3255 "Deprecated": "1", 3256 "EventCode": "0xB7, 0xBB", 3257 "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD", 3258 "MSRIndex": "0x1a6,0x1a7", 3259 "MSRValue": "0x043C000004", 3260 "Offcore": "1", 3261 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3262 "SampleAfterValue": "100003", 3263 "UMask": "0x1" 3264 }, 3265 { 3266 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 3267 "Counter": "0,1,2,3", 3268 "CounterHTOff": "0,1,2,3", 3269 "Deprecated": "1", 3270 "EventCode": "0xB7, 0xBB", 3271 "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 3272 "MSRIndex": "0x1a6,0x1a7", 3273 "MSRValue": "0x1004000491", 3274 "Offcore": "1", 3275 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3276 "SampleAfterValue": "100003", 3277 "UMask": "0x1" 3278 }, 3279 { 3280 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 3281 "Counter": "0,1,2,3", 3282 "CounterHTOff": "0,1,2,3", 3283 "Deprecated": "1", 3284 "EventCode": "0xB7, 0xBB", 3285 "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 3286 "MSRIndex": "0x1a6,0x1a7", 3287 "MSRValue": "0x0084000490", 3288 "Offcore": "1", 3289 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3290 "SampleAfterValue": "100003", 3291 "UMask": "0x1" 3292 }, 3293 { 3294 "BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 3295 "Counter": "0,1,2,3", 3296 "CounterHTOff": "0,1,2,3", 3297 "EventCode": "0xB7, 0xBB", 3298 "EventName": "OCR.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 3299 "MSRIndex": "0x1a6,0x1a7", 3300 "MSRValue": "0x3F90000010", 3301 "Offcore": "1", 3302 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3303 "SampleAfterValue": "100003", 3304 "UMask": "0x1" 3305 }, 3306 { 3307 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS.REMOTE_HIT_FORWARD", 3308 "Counter": "0,1,2,3", 3309 "CounterHTOff": "0,1,2,3", 3310 "Deprecated": "1", 3311 "EventCode": "0xB7, 0xBB", 3312 "EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS.REMOTE_HIT_FORWARD", 3313 "MSRIndex": "0x1a6,0x1a7", 3314 "MSRValue": "0x083FC007F7", 3315 "Offcore": "1", 3316 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3317 "SampleAfterValue": "100003", 3318 "UMask": "0x1" 3319 }, 3320 { 3321 "BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 3322 "Counter": "0,1,2,3", 3323 "CounterHTOff": "0,1,2,3", 3324 "Deprecated": "1", 3325 "EventCode": "0xB7, 0xBB", 3326 "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 3327 "MSRIndex": "0x1a6,0x1a7", 3328 "MSRValue": "0x0604008000", 3329 "Offcore": "1", 3330 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3331 "SampleAfterValue": "100003", 3332 "UMask": "0x1" 3333 }, 3334 { 3335 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 3336 "Counter": "0,1,2,3", 3337 "CounterHTOff": "0,1,2,3", 3338 "Deprecated": "1", 3339 "EventCode": "0xB7, 0xBB", 3340 "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 3341 "MSRIndex": "0x1a6,0x1a7", 3342 "MSRValue": "0x0084000010", 3343 "Offcore": "1", 3344 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3345 "SampleAfterValue": "100003", 3346 "UMask": "0x1" 3347 }, 3348 { 3349 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 3350 "Counter": "0,1,2,3", 3351 "CounterHTOff": "0,1,2,3", 3352 "Deprecated": "1", 3353 "EventCode": "0xB7, 0xBB", 3354 "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 3355 "MSRIndex": "0x1a6,0x1a7", 3356 "MSRValue": "0x0204000002", 3357 "Offcore": "1", 3358 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3359 "SampleAfterValue": "100003", 3360 "UMask": "0x1" 3361 }, 3362 { 3363 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS.REMOTE_HITM", 3364 "Counter": "0,1,2,3", 3365 "CounterHTOff": "0,1,2,3", 3366 "Deprecated": "1", 3367 "EventCode": "0xB7, 0xBB", 3368 "EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS.REMOTE_HITM", 3369 "MSRIndex": "0x1a6,0x1a7", 3370 "MSRValue": "0x103FC007F7", 3371 "Offcore": "1", 3372 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3373 "SampleAfterValue": "100003", 3374 "UMask": "0x1" 3375 }, 3376 { 3377 "BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_MISS.SNOOP_NONE", 3378 "Counter": "0,1,2,3", 3379 "CounterHTOff": "0,1,2,3", 3380 "EventCode": "0xB7, 0xBB", 3381 "EventName": "OCR.DEMAND_DATA_RD.L3_MISS.SNOOP_NONE", 3382 "MSRIndex": "0x1a6,0x1a7", 3383 "MSRValue": "0x00BC000001", 3384 "Offcore": "1", 3385 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3386 "SampleAfterValue": "100003", 3387 "UMask": "0x1" 3388 }, 3389 { 3390 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS.SNOOP_MISS", 3391 "Counter": "0,1,2,3", 3392 "CounterHTOff": "0,1,2,3", 3393 "Deprecated": "1", 3394 "EventCode": "0xB7, 0xBB", 3395 "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS.SNOOP_MISS", 3396 "MSRIndex": "0x1a6,0x1a7", 3397 "MSRValue": "0x023C000122", 3398 "Offcore": "1", 3399 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3400 "SampleAfterValue": "100003", 3401 "UMask": "0x1" 3402 }, 3403 { 3404 "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads", 3405 "Counter": "0,1,2,3", 3406 "CounterHTOff": "0,1,2,3", 3407 "EventCode": "0xB7, 0xBB", 3408 "EventName": "OCR.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 3409 "MSRIndex": "0x1a6,0x1a7", 3410 "MSRValue": "0x0210000080", 3411 "Offcore": "1", 3412 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3413 "SampleAfterValue": "100003", 3414 "UMask": "0x1" 3415 }, 3416 { 3417 "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 3418 "Counter": "0,1,2,3", 3419 "CounterHTOff": "0,1,2,3", 3420 "EventCode": "0xB7, 0xBB", 3421 "EventName": "OCR.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 3422 "MSRIndex": "0x1a6,0x1a7", 3423 "MSRValue": "0x0410000100", 3424 "Offcore": "1", 3425 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3426 "SampleAfterValue": "100003", 3427 "UMask": "0x1" 3428 }, 3429 { 3430 "BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 3431 "Counter": "0,1,2,3", 3432 "CounterHTOff": "0,1,2,3", 3433 "EventCode": "0xB7, 0xBB", 3434 "EventName": "OCR.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 3435 "MSRIndex": "0x1a6,0x1a7", 3436 "MSRValue": "0x0404000004", 3437 "Offcore": "1", 3438 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3439 "SampleAfterValue": "100003", 3440 "UMask": "0x1" 3441 }, 3442 { 3443 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 3444 "Counter": "0,1,2,3", 3445 "CounterHTOff": "0,1,2,3", 3446 "Deprecated": "1", 3447 "EventCode": "0xB7, 0xBB", 3448 "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 3449 "MSRIndex": "0x1a6,0x1a7", 3450 "MSRValue": "0x0084000491", 3451 "Offcore": "1", 3452 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3453 "SampleAfterValue": "100003", 3454 "UMask": "0x1" 3455 }, 3456 { 3457 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS.SNOOP_NONE", 3458 "Counter": "0,1,2,3", 3459 "CounterHTOff": "0,1,2,3", 3460 "Deprecated": "1", 3461 "EventCode": "0xB7, 0xBB", 3462 "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS.SNOOP_NONE", 3463 "MSRIndex": "0x1a6,0x1a7", 3464 "MSRValue": "0x00BC000002", 3465 "Offcore": "1", 3466 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3467 "SampleAfterValue": "100003", 3468 "UMask": "0x1" 3469 }, 3470 { 3471 "BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 3472 "Counter": "0,1,2,3", 3473 "CounterHTOff": "0,1,2,3", 3474 "Deprecated": "1", 3475 "EventCode": "0xB7, 0xBB", 3476 "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 3477 "MSRIndex": "0x1a6,0x1a7", 3478 "MSRValue": "0x063B808000", 3479 "Offcore": "1", 3480 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3481 "SampleAfterValue": "100003", 3482 "UMask": "0x1" 3483 }, 3484 { 3485 "BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD OCR.DEMAND_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD", 3486 "Counter": "0,1,2,3", 3487 "CounterHTOff": "0,1,2,3", 3488 "EventCode": "0xB7, 0xBB", 3489 "EventName": "OCR.DEMAND_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD", 3490 "MSRIndex": "0x1a6,0x1a7", 3491 "MSRValue": "0x043C000002", 3492 "Offcore": "1", 3493 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3494 "SampleAfterValue": "100003", 3495 "UMask": "0x1" 3496 }, 3497 { 3498 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 3499 "Counter": "0,1,2,3", 3500 "CounterHTOff": "0,1,2,3", 3501 "Deprecated": "1", 3502 "EventCode": "0xB7, 0xBB", 3503 "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 3504 "MSRIndex": "0x1a6,0x1a7", 3505 "MSRValue": "0x0804000002", 3506 "Offcore": "1", 3507 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3508 "SampleAfterValue": "100003", 3509 "UMask": "0x1" 3510 }, 3511 { 3512 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 3513 "Counter": "0,1,2,3", 3514 "CounterHTOff": "0,1,2,3", 3515 "Deprecated": "1", 3516 "EventCode": "0xB7, 0xBB", 3517 "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 3518 "MSRIndex": "0x1a6,0x1a7", 3519 "MSRValue": "0x3F84000010", 3520 "Offcore": "1", 3521 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3522 "SampleAfterValue": "100003", 3523 "UMask": "0x1" 3524 }, 3525 { 3526 "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 3527 "Counter": "0,1,2,3", 3528 "CounterHTOff": "0,1,2,3", 3529 "EventCode": "0xB7, 0xBB", 3530 "EventName": "OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 3531 "MSRIndex": "0x1a6,0x1a7", 3532 "MSRValue": "0x1004000490", 3533 "Offcore": "1", 3534 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3535 "SampleAfterValue": "100003", 3536 "UMask": "0x1" 3537 }, 3538 { 3539 "BriefDescription": "Counts any other requests OCR.OTHER.L3_MISS.REMOTE_HIT_FORWARD", 3540 "Counter": "0,1,2,3", 3541 "CounterHTOff": "0,1,2,3", 3542 "EventCode": "0xB7, 0xBB", 3543 "EventName": "OCR.OTHER.L3_MISS.REMOTE_HIT_FORWARD", 3544 "MSRIndex": "0x1a6,0x1a7", 3545 "MSRValue": "0x083FC08000", 3546 "Offcore": "1", 3547 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3548 "SampleAfterValue": "100003", 3549 "UMask": "0x1" 3550 }, 3551 { 3552 "BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 3553 "Counter": "0,1,2,3", 3554 "CounterHTOff": "0,1,2,3", 3555 "EventCode": "0xB7, 0xBB", 3556 "EventName": "OCR.DEMAND_RFO.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 3557 "MSRIndex": "0x1a6,0x1a7", 3558 "MSRValue": "0x063B800002", 3559 "Offcore": "1", 3560 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3561 "SampleAfterValue": "100003", 3562 "UMask": "0x1" 3563 }, 3564 { 3565 "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 3566 "Counter": "0,1,2,3", 3567 "CounterHTOff": "0,1,2,3", 3568 "EventCode": "0xB7, 0xBB", 3569 "EventName": "OCR.PF_L2_RFO.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 3570 "MSRIndex": "0x1a6,0x1a7", 3571 "MSRValue": "0x1004000020", 3572 "Offcore": "1", 3573 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3574 "SampleAfterValue": "100003", 3575 "UMask": "0x1" 3576 }, 3577 { 3578 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 3579 "Counter": "0,1,2,3", 3580 "CounterHTOff": "0,1,2,3", 3581 "Deprecated": "1", 3582 "EventCode": "0xB7, 0xBB", 3583 "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 3584 "MSRIndex": "0x1a6,0x1a7", 3585 "MSRValue": "0x0084000001", 3586 "Offcore": "1", 3587 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3588 "SampleAfterValue": "100003", 3589 "UMask": "0x1" 3590 }, 3591 { 3592 "BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 3593 "Counter": "0,1,2,3", 3594 "CounterHTOff": "0,1,2,3", 3595 "EventCode": "0xB7, 0xBB", 3596 "EventName": "OCR.DEMAND_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 3597 "MSRIndex": "0x1a6,0x1a7", 3598 "MSRValue": "0x0404000002", 3599 "Offcore": "1", 3600 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3601 "SampleAfterValue": "100003", 3602 "UMask": "0x1" 3603 }, 3604 { 3605 "BriefDescription": "OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 3606 "Counter": "0,1,2,3", 3607 "CounterHTOff": "0,1,2,3", 3608 "EventCode": "0xB7, 0xBB", 3609 "EventName": "OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 3610 "MSRIndex": "0x1a6,0x1a7", 3611 "MSRValue": "0x3F90000120", 3612 "Offcore": "1", 3613 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3614 "SampleAfterValue": "100003", 3615 "UMask": "0x1" 3616 }, 3617 { 3618 "BriefDescription": "OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 3619 "Counter": "0,1,2,3", 3620 "CounterHTOff": "0,1,2,3", 3621 "EventCode": "0xB7, 0xBB", 3622 "EventName": "OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 3623 "MSRIndex": "0x1a6,0x1a7", 3624 "MSRValue": "0x10100007F7", 3625 "Offcore": "1", 3626 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3627 "SampleAfterValue": "100003", 3628 "UMask": "0x1" 3629 }, 3630 { 3631 "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests", 3632 "Counter": "0,1,2,3", 3633 "CounterHTOff": "0,1,2,3", 3634 "EventCode": "0xB7, 0xBB", 3635 "EventName": "OCR.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 3636 "MSRIndex": "0x1a6,0x1a7", 3637 "MSRValue": "0x0084000400", 3638 "Offcore": "1", 3639 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3640 "SampleAfterValue": "100003", 3641 "UMask": "0x1" 3642 }, 3643 { 3644 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 3645 "Counter": "0,1,2,3", 3646 "CounterHTOff": "0,1,2,3", 3647 "Deprecated": "1", 3648 "EventCode": "0xB7, 0xBB", 3649 "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 3650 "MSRIndex": "0x1a6,0x1a7", 3651 "MSRValue": "0x3F90000100", 3652 "Offcore": "1", 3653 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3654 "SampleAfterValue": "100003", 3655 "UMask": "0x1" 3656 }, 3657 { 3658 "BriefDescription": "Counts all demand data writes (RFOs)", 3659 "Counter": "0,1,2,3", 3660 "CounterHTOff": "0,1,2,3", 3661 "EventCode": "0xB7, 0xBB", 3662 "EventName": "OCR.DEMAND_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 3663 "MSRIndex": "0x1a6,0x1a7", 3664 "MSRValue": "0x0204000002", 3665 "Offcore": "1", 3666 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3667 "SampleAfterValue": "100003", 3668 "UMask": "0x1" 3669 }, 3670 { 3671 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS.ANY_SNOOP", 3672 "Counter": "0,1,2,3", 3673 "CounterHTOff": "0,1,2,3", 3674 "Deprecated": "1", 3675 "EventCode": "0xB7, 0xBB", 3676 "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS.ANY_SNOOP", 3677 "MSRIndex": "0x1a6,0x1a7", 3678 "MSRValue": "0x3FBC000002", 3679 "Offcore": "1", 3680 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3681 "SampleAfterValue": "100003", 3682 "UMask": "0x1" 3683 }, 3684 { 3685 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS.REMOTE_HITM", 3686 "Counter": "0,1,2,3", 3687 "CounterHTOff": "0,1,2,3", 3688 "Deprecated": "1", 3689 "EventCode": "0xB7, 0xBB", 3690 "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS.REMOTE_HITM", 3691 "MSRIndex": "0x1a6,0x1a7", 3692 "MSRValue": "0x103FC00080", 3693 "Offcore": "1", 3694 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3695 "SampleAfterValue": "100003", 3696 "UMask": "0x1" 3697 }, 3698 { 3699 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 3700 "Counter": "0,1,2,3", 3701 "CounterHTOff": "0,1,2,3", 3702 "Deprecated": "1", 3703 "EventCode": "0xB7, 0xBB", 3704 "EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 3705 "MSRIndex": "0x1a6,0x1a7", 3706 "MSRValue": "0x08040007F7", 3707 "Offcore": "1", 3708 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3709 "SampleAfterValue": "100003", 3710 "UMask": "0x1" 3711 }, 3712 { 3713 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 3714 "Counter": "0,1,2,3", 3715 "CounterHTOff": "0,1,2,3", 3716 "Deprecated": "1", 3717 "EventCode": "0xB7, 0xBB", 3718 "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 3719 "MSRIndex": "0x1a6,0x1a7", 3720 "MSRValue": "0x0090000100", 3721 "Offcore": "1", 3722 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3723 "SampleAfterValue": "100003", 3724 "UMask": "0x1" 3725 }, 3726 { 3727 "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests", 3728 "Counter": "0,1,2,3", 3729 "CounterHTOff": "0,1,2,3", 3730 "EventCode": "0xB7, 0xBB", 3731 "EventName": "OCR.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 3732 "MSRIndex": "0x1a6,0x1a7", 3733 "MSRValue": "0x0090000400", 3734 "Offcore": "1", 3735 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3736 "SampleAfterValue": "100003", 3737 "UMask": "0x1" 3738 }, 3739 { 3740 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 3741 "Counter": "0,1,2,3", 3742 "CounterHTOff": "0,1,2,3", 3743 "Deprecated": "1", 3744 "EventCode": "0xB7, 0xBB", 3745 "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 3746 "MSRIndex": "0x1a6,0x1a7", 3747 "MSRValue": "0x0090000020", 3748 "Offcore": "1", 3749 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3750 "SampleAfterValue": "100003", 3751 "UMask": "0x1" 3752 }, 3753 { 3754 "BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 3755 "Counter": "0,1,2,3", 3756 "CounterHTOff": "0,1,2,3", 3757 "Deprecated": "1", 3758 "EventCode": "0xB7, 0xBB", 3759 "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 3760 "MSRIndex": "0x1a6,0x1a7", 3761 "MSRValue": "0x3F90008000", 3762 "Offcore": "1", 3763 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3764 "SampleAfterValue": "100003", 3765 "UMask": "0x1" 3766 }, 3767 { 3768 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS.REMOTE_HITM", 3769 "Counter": "0,1,2,3", 3770 "CounterHTOff": "0,1,2,3", 3771 "Deprecated": "1", 3772 "EventCode": "0xB7, 0xBB", 3773 "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS.REMOTE_HITM", 3774 "MSRIndex": "0x1a6,0x1a7", 3775 "MSRValue": "0x103FC00491", 3776 "Offcore": "1", 3777 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3778 "SampleAfterValue": "100003", 3779 "UMask": "0x1" 3780 }, 3781 { 3782 "BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 3783 "Counter": "0,1,2,3", 3784 "CounterHTOff": "0,1,2,3", 3785 "EventCode": "0xB7, 0xBB", 3786 "EventName": "OCR.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 3787 "MSRIndex": "0x1a6,0x1a7", 3788 "MSRValue": "0x3F84000004", 3789 "Offcore": "1", 3790 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3791 "SampleAfterValue": "100003", 3792 "UMask": "0x1" 3793 }, 3794 { 3795 "BriefDescription": "Counts any other requests OCR.OTHER.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 3796 "Counter": "0,1,2,3", 3797 "CounterHTOff": "0,1,2,3", 3798 "EventCode": "0xB7, 0xBB", 3799 "EventName": "OCR.OTHER.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 3800 "MSRIndex": "0x1a6,0x1a7", 3801 "MSRValue": "0x0410008000", 3802 "Offcore": "1", 3803 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3804 "SampleAfterValue": "100003", 3805 "UMask": "0x1" 3806 }, 3807 { 3808 "BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 3809 "Counter": "0,1,2,3", 3810 "CounterHTOff": "0,1,2,3", 3811 "EventCode": "0xB7, 0xBB", 3812 "EventName": "OCR.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 3813 "MSRIndex": "0x1a6,0x1a7", 3814 "MSRValue": "0x1004000004", 3815 "Offcore": "1", 3816 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3817 "SampleAfterValue": "100003", 3818 "UMask": "0x1" 3819 }, 3820 { 3821 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD", 3822 "Counter": "0,1,2,3", 3823 "CounterHTOff": "0,1,2,3", 3824 "Deprecated": "1", 3825 "EventCode": "0xB7, 0xBB", 3826 "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD", 3827 "MSRIndex": "0x1a6,0x1a7", 3828 "MSRValue": "0x043C000120", 3829 "Offcore": "1", 3830 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3831 "SampleAfterValue": "100003", 3832 "UMask": "0x1" 3833 }, 3834 { 3835 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS.HITM_OTHER_CORE", 3836 "Counter": "0,1,2,3", 3837 "CounterHTOff": "0,1,2,3", 3838 "Deprecated": "1", 3839 "EventCode": "0xB7, 0xBB", 3840 "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS.HITM_OTHER_CORE", 3841 "MSRIndex": "0x1a6,0x1a7", 3842 "MSRValue": "0x103C000001", 3843 "Offcore": "1", 3844 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3845 "SampleAfterValue": "100003", 3846 "UMask": "0x1" 3847 }, 3848 { 3849 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 3850 "Counter": "0,1,2,3", 3851 "CounterHTOff": "0,1,2,3", 3852 "Deprecated": "1", 3853 "EventCode": "0xB7, 0xBB", 3854 "EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 3855 "MSRIndex": "0x1a6,0x1a7", 3856 "MSRValue": "0x01100007F7", 3857 "Offcore": "1", 3858 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3859 "SampleAfterValue": "100003", 3860 "UMask": "0x1" 3861 }, 3862 { 3863 "BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 3864 "Counter": "0,1,2,3", 3865 "CounterHTOff": "0,1,2,3", 3866 "EventCode": "0xB7, 0xBB", 3867 "EventName": "OCR.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 3868 "MSRIndex": "0x1a6,0x1a7", 3869 "MSRValue": "0x3F84000001", 3870 "Offcore": "1", 3871 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3872 "SampleAfterValue": "100003", 3873 "UMask": "0x1" 3874 }, 3875 { 3876 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 3877 "Counter": "0,1,2,3", 3878 "CounterHTOff": "0,1,2,3", 3879 "Deprecated": "1", 3880 "EventCode": "0xB7, 0xBB", 3881 "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 3882 "MSRIndex": "0x1a6,0x1a7", 3883 "MSRValue": "0x1004000010", 3884 "Offcore": "1", 3885 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3886 "SampleAfterValue": "100003", 3887 "UMask": "0x1" 3888 }, 3889 { 3890 "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 3891 "Counter": "0,1,2,3", 3892 "CounterHTOff": "0,1,2,3", 3893 "EventCode": "0xB7, 0xBB", 3894 "EventName": "OCR.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 3895 "MSRIndex": "0x1a6,0x1a7", 3896 "MSRValue": "0x3F90000080", 3897 "Offcore": "1", 3898 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3899 "SampleAfterValue": "100003", 3900 "UMask": "0x1" 3901 }, 3902 { 3903 "BriefDescription": "Counts any other requests OCR.OTHER.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 3904 "Counter": "0,1,2,3", 3905 "CounterHTOff": "0,1,2,3", 3906 "EventCode": "0xB7, 0xBB", 3907 "EventName": "OCR.OTHER.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 3908 "MSRIndex": "0x1a6,0x1a7", 3909 "MSRValue": "0x0804008000", 3910 "Offcore": "1", 3911 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3912 "SampleAfterValue": "100003", 3913 "UMask": "0x1" 3914 }, 3915 { 3916 "BriefDescription": "Counts demand data reads", 3917 "Counter": "0,1,2,3", 3918 "CounterHTOff": "0,1,2,3", 3919 "EventCode": "0xB7, 0xBB", 3920 "EventName": "OCR.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 3921 "MSRIndex": "0x1a6,0x1a7", 3922 "MSRValue": "0x0210000001", 3923 "Offcore": "1", 3924 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3925 "SampleAfterValue": "100003", 3926 "UMask": "0x1" 3927 }, 3928 { 3929 "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_MISS.NO_SNOOP_NEEDED OCR.PF_L2_RFO.L3_MISS.NO_SNOOP_NEEDED", 3930 "Counter": "0,1,2,3", 3931 "CounterHTOff": "0,1,2,3", 3932 "EventCode": "0xB7, 0xBB", 3933 "EventName": "OCR.PF_L2_RFO.L3_MISS.NO_SNOOP_NEEDED", 3934 "MSRIndex": "0x1a6,0x1a7", 3935 "MSRValue": "0x013C000020", 3936 "Offcore": "1", 3937 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3938 "SampleAfterValue": "100003", 3939 "UMask": "0x1" 3940 }, 3941 { 3942 "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 3943 "Counter": "0,1,2,3", 3944 "CounterHTOff": "0,1,2,3", 3945 "EventCode": "0xB7, 0xBB", 3946 "EventName": "OCR.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 3947 "MSRIndex": "0x1a6,0x1a7", 3948 "MSRValue": "0x0110000080", 3949 "Offcore": "1", 3950 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3951 "SampleAfterValue": "100003", 3952 "UMask": "0x1" 3953 }, 3954 { 3955 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 3956 "Counter": "0,1,2,3", 3957 "CounterHTOff": "0,1,2,3", 3958 "Deprecated": "1", 3959 "EventCode": "0xB7, 0xBB", 3960 "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 3961 "MSRIndex": "0x1a6,0x1a7", 3962 "MSRValue": "0x0804000490", 3963 "Offcore": "1", 3964 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3965 "SampleAfterValue": "100003", 3966 "UMask": "0x1" 3967 }, 3968 { 3969 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS.HIT_OTHER_CORE_FWD", 3970 "Counter": "0,1,2,3", 3971 "CounterHTOff": "0,1,2,3", 3972 "Deprecated": "1", 3973 "EventCode": "0xB7, 0xBB", 3974 "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS.HIT_OTHER_CORE_FWD", 3975 "MSRIndex": "0x1a6,0x1a7", 3976 "MSRValue": "0x083C000020", 3977 "Offcore": "1", 3978 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3979 "SampleAfterValue": "100003", 3980 "UMask": "0x1" 3981 }, 3982 { 3983 "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_MISS.NO_SNOOP_NEEDED OCR.PF_L3_RFO.L3_MISS.NO_SNOOP_NEEDED", 3984 "Counter": "0,1,2,3", 3985 "CounterHTOff": "0,1,2,3", 3986 "EventCode": "0xB7, 0xBB", 3987 "EventName": "OCR.PF_L3_RFO.L3_MISS.NO_SNOOP_NEEDED", 3988 "MSRIndex": "0x1a6,0x1a7", 3989 "MSRValue": "0x013C000100", 3990 "Offcore": "1", 3991 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3992 "SampleAfterValue": "100003", 3993 "UMask": "0x1" 3994 }, 3995 { 3996 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS.SNOOP_NONE", 3997 "Counter": "0,1,2,3", 3998 "CounterHTOff": "0,1,2,3", 3999 "Deprecated": "1", 4000 "EventCode": "0xB7, 0xBB", 4001 "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS.SNOOP_NONE", 4002 "MSRIndex": "0x1a6,0x1a7", 4003 "MSRValue": "0x00BC000001", 4004 "Offcore": "1", 4005 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4006 "SampleAfterValue": "100003", 4007 "UMask": "0x1" 4008 }, 4009 { 4010 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 4011 "Counter": "0,1,2,3", 4012 "CounterHTOff": "0,1,2,3", 4013 "Deprecated": "1", 4014 "EventCode": "0xB7, 0xBB", 4015 "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 4016 "MSRIndex": "0x1a6,0x1a7", 4017 "MSRValue": "0x1010000100", 4018 "Offcore": "1", 4019 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4020 "SampleAfterValue": "100003", 4021 "UMask": "0x1" 4022 }, 4023 { 4024 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS.ANY_SNOOP", 4025 "Counter": "0,1,2,3", 4026 "CounterHTOff": "0,1,2,3", 4027 "Deprecated": "1", 4028 "EventCode": "0xB7, 0xBB", 4029 "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS.ANY_SNOOP", 4030 "MSRIndex": "0x1a6,0x1a7", 4031 "MSRValue": "0x3FBC000100", 4032 "Offcore": "1", 4033 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4034 "SampleAfterValue": "100003", 4035 "UMask": "0x1" 4036 }, 4037 { 4038 "BriefDescription": "Number of times an RTM execution aborted due to HLE-unfriendly instructions", 4039 "Counter": "0,1,2,3", 4040 "CounterHTOff": "0,1,2,3,4,5,6,7", 4041 "EventCode": "0xC9", 4042 "EventName": "RTM_RETIRED.ABORTED_UNFRIENDLY", 4043 "PublicDescription": "Number of times an RTM execution aborted due to HLE-unfriendly instructions.", 4044 "SampleAfterValue": "2000003", 4045 "UMask": "0x20" 4046 }, 4047 { 4048 "BriefDescription": "OCR.ALL_PF_RFO.L3_MISS.SNOOP_MISS OCR.ALL_PF_RFO.L3_MISS.SNOOP_MISS", 4049 "Counter": "0,1,2,3", 4050 "CounterHTOff": "0,1,2,3", 4051 "EventCode": "0xB7, 0xBB", 4052 "EventName": "OCR.ALL_PF_RFO.L3_MISS.SNOOP_MISS", 4053 "MSRIndex": "0x1a6,0x1a7", 4054 "MSRValue": "0x023C000120", 4055 "Offcore": "1", 4056 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4057 "SampleAfterValue": "100003", 4058 "UMask": "0x1" 4059 }, 4060 { 4061 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 4062 "Counter": "0,1,2,3", 4063 "CounterHTOff": "0,1,2,3", 4064 "Deprecated": "1", 4065 "EventCode": "0xB7, 0xBB", 4066 "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 4067 "MSRIndex": "0x1a6,0x1a7", 4068 "MSRValue": "0x3F90000020", 4069 "Offcore": "1", 4070 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4071 "SampleAfterValue": "100003", 4072 "UMask": "0x1" 4073 }, 4074 { 4075 "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_MISS.HITM_OTHER_CORE OCR.PF_L3_DATA_RD.L3_MISS.HITM_OTHER_CORE", 4076 "Counter": "0,1,2,3", 4077 "CounterHTOff": "0,1,2,3", 4078 "EventCode": "0xB7, 0xBB", 4079 "EventName": "OCR.PF_L3_DATA_RD.L3_MISS.HITM_OTHER_CORE", 4080 "MSRIndex": "0x1a6,0x1a7", 4081 "MSRValue": "0x103C000080", 4082 "Offcore": "1", 4083 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4084 "SampleAfterValue": "100003", 4085 "UMask": "0x1" 4086 }, 4087 { 4088 "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads", 4089 "Counter": "0,1,2,3", 4090 "CounterHTOff": "0,1,2,3", 4091 "EventCode": "0xB7, 0xBB", 4092 "EventName": "OCR.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 4093 "MSRIndex": "0x1a6,0x1a7", 4094 "MSRValue": "0x0090000080", 4095 "Offcore": "1", 4096 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4097 "SampleAfterValue": "100003", 4098 "UMask": "0x1" 4099 }, 4100 { 4101 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 4102 "Counter": "0,1,2,3", 4103 "CounterHTOff": "0,1,2,3", 4104 "Deprecated": "1", 4105 "EventCode": "0xB7, 0xBB", 4106 "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 4107 "MSRIndex": "0x1a6,0x1a7", 4108 "MSRValue": "0x0210000002", 4109 "Offcore": "1", 4110 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4111 "SampleAfterValue": "100003", 4112 "UMask": "0x1" 4113 }, 4114 { 4115 "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 4116 "Counter": "0,1,2,3", 4117 "CounterHTOff": "0,1,2,3", 4118 "EventCode": "0xB7, 0xBB", 4119 "EventName": "OCR.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 4120 "MSRIndex": "0x1a6,0x1a7", 4121 "MSRValue": "0x3F84000080", 4122 "Offcore": "1", 4123 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4124 "SampleAfterValue": "100003", 4125 "UMask": "0x1" 4126 }, 4127 { 4128 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 4129 "Counter": "0,1,2,3", 4130 "CounterHTOff": "0,1,2,3", 4131 "Deprecated": "1", 4132 "EventCode": "0xB7, 0xBB", 4133 "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 4134 "MSRIndex": "0x1a6,0x1a7", 4135 "MSRValue": "0x0210000490", 4136 "Offcore": "1", 4137 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4138 "SampleAfterValue": "100003", 4139 "UMask": "0x1" 4140 }, 4141 { 4142 "BriefDescription": "OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 4143 "Counter": "0,1,2,3", 4144 "CounterHTOff": "0,1,2,3", 4145 "EventCode": "0xB7, 0xBB", 4146 "EventName": "OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 4147 "MSRIndex": "0x1a6,0x1a7", 4148 "MSRValue": "0x0104000120", 4149 "Offcore": "1", 4150 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4151 "SampleAfterValue": "100003", 4152 "UMask": "0x1" 4153 }, 4154 { 4155 "BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_MISS.ANY_SNOOP OCR.DEMAND_CODE_RD.L3_MISS.ANY_SNOOP", 4156 "Counter": "0,1,2,3", 4157 "CounterHTOff": "0,1,2,3", 4158 "EventCode": "0xB7, 0xBB", 4159 "EventName": "OCR.DEMAND_CODE_RD.L3_MISS.ANY_SNOOP", 4160 "MSRIndex": "0x1a6,0x1a7", 4161 "MSRValue": "0x3FBC000004", 4162 "Offcore": "1", 4163 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4164 "SampleAfterValue": "100003", 4165 "UMask": "0x1" 4166 }, 4167 { 4168 "BriefDescription": "OCR.ALL_READS.L3_MISS.ANY_SNOOP OCR.ALL_READS.L3_MISS.ANY_SNOOP OCR.ALL_READS.L3_MISS.ANY_SNOOP", 4169 "Counter": "0,1,2,3", 4170 "CounterHTOff": "0,1,2,3", 4171 "EventCode": "0xB7, 0xBB", 4172 "EventName": "OCR.ALL_READS.L3_MISS.ANY_SNOOP", 4173 "MSRIndex": "0x1a6,0x1a7", 4174 "MSRValue": "0x3FBC0007F7", 4175 "Offcore": "1", 4176 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4177 "SampleAfterValue": "100003", 4178 "UMask": "0x1" 4179 }, 4180 { 4181 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD", 4182 "Counter": "0,1,2,3", 4183 "CounterHTOff": "0,1,2,3", 4184 "Deprecated": "1", 4185 "EventCode": "0xB7, 0xBB", 4186 "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD", 4187 "MSRIndex": "0x1a6,0x1a7", 4188 "MSRValue": "0x083C000490", 4189 "Offcore": "1", 4190 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4191 "SampleAfterValue": "100003", 4192 "UMask": "0x1" 4193 }, 4194 { 4195 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS.REMOTE_HIT_FORWARD", 4196 "Counter": "0,1,2,3", 4197 "CounterHTOff": "0,1,2,3", 4198 "Deprecated": "1", 4199 "EventCode": "0xB7, 0xBB", 4200 "EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS.REMOTE_HIT_FORWARD", 4201 "MSRIndex": "0x1a6,0x1a7", 4202 "MSRValue": "0x083FC00400", 4203 "Offcore": "1", 4204 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4205 "SampleAfterValue": "100003", 4206 "UMask": "0x1" 4207 }, 4208 { 4209 "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_MISS.SNOOP_NONE", 4210 "Counter": "0,1,2,3", 4211 "CounterHTOff": "0,1,2,3", 4212 "EventCode": "0xB7, 0xBB", 4213 "EventName": "OCR.PF_L2_RFO.L3_MISS.SNOOP_NONE", 4214 "MSRIndex": "0x1a6,0x1a7", 4215 "MSRValue": "0x00BC000020", 4216 "Offcore": "1", 4217 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4218 "SampleAfterValue": "100003", 4219 "UMask": "0x1" 4220 }, 4221 { 4222 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 4223 "Counter": "0,1,2,3", 4224 "CounterHTOff": "0,1,2,3", 4225 "Deprecated": "1", 4226 "EventCode": "0xB7, 0xBB", 4227 "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 4228 "MSRIndex": "0x1a6,0x1a7", 4229 "MSRValue": "0x3F90000002", 4230 "Offcore": "1", 4231 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4232 "SampleAfterValue": "100003", 4233 "UMask": "0x1" 4234 }, 4235 { 4236 "BriefDescription": "Number of times an RTM execution aborted due to any reasons (multiple categories may count as one).", 4237 "Counter": "0,1,2,3", 4238 "CounterHTOff": "0,1,2,3,4,5,6,7", 4239 "EventCode": "0xC9", 4240 "EventName": "RTM_RETIRED.ABORTED", 4241 "PEBS": "1", 4242 "PublicDescription": "Number of times RTM abort was triggered.", 4243 "SampleAfterValue": "2000003", 4244 "UMask": "0x4" 4245 }, 4246 { 4247 "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 4248 "Counter": "0,1,2,3", 4249 "CounterHTOff": "0,1,2,3", 4250 "EventCode": "0xB7, 0xBB", 4251 "EventName": "OCR.PF_L2_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 4252 "MSRIndex": "0x1a6,0x1a7", 4253 "MSRValue": "0x0604000020", 4254 "Offcore": "1", 4255 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4256 "SampleAfterValue": "100003", 4257 "UMask": "0x1" 4258 }, 4259 { 4260 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 4261 "Counter": "0,1,2,3", 4262 "CounterHTOff": "0,1,2,3", 4263 "Deprecated": "1", 4264 "EventCode": "0xB7, 0xBB", 4265 "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 4266 "MSRIndex": "0x1a6,0x1a7", 4267 "MSRValue": "0x0104000490", 4268 "Offcore": "1", 4269 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4270 "SampleAfterValue": "100003", 4271 "UMask": "0x1" 4272 }, 4273 { 4274 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD", 4275 "Counter": "0,1,2,3", 4276 "CounterHTOff": "0,1,2,3", 4277 "Deprecated": "1", 4278 "EventCode": "0xB7, 0xBB", 4279 "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD", 4280 "MSRIndex": "0x1a6,0x1a7", 4281 "MSRValue": "0x043C000020", 4282 "Offcore": "1", 4283 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4284 "SampleAfterValue": "100003", 4285 "UMask": "0x1" 4286 }, 4287 { 4288 "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 4289 "Counter": "0,1,2,3", 4290 "CounterHTOff": "0,1,2,3", 4291 "EventCode": "0xB7, 0xBB", 4292 "EventName": "OCR.PF_L2_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 4293 "MSRIndex": "0x1a6,0x1a7", 4294 "MSRValue": "0x0404000020", 4295 "Offcore": "1", 4296 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4297 "SampleAfterValue": "100003", 4298 "UMask": "0x1" 4299 }, 4300 { 4301 "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 4302 "Counter": "0,1,2,3", 4303 "CounterHTOff": "0,1,2,3", 4304 "EventCode": "0xB7, 0xBB", 4305 "EventName": "OCR.PF_L3_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 4306 "MSRIndex": "0x1a6,0x1a7", 4307 "MSRValue": "0x0604000100", 4308 "Offcore": "1", 4309 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4310 "SampleAfterValue": "100003", 4311 "UMask": "0x1" 4312 }, 4313 { 4314 "BriefDescription": "Counts any other requests OCR.OTHER.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 4315 "Counter": "0,1,2,3", 4316 "CounterHTOff": "0,1,2,3", 4317 "EventCode": "0xB7, 0xBB", 4318 "EventName": "OCR.OTHER.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 4319 "MSRIndex": "0x1a6,0x1a7", 4320 "MSRValue": "0x1010008000", 4321 "Offcore": "1", 4322 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4323 "SampleAfterValue": "100003", 4324 "UMask": "0x1" 4325 }, 4326 { 4327 "BriefDescription": "OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 4328 "Counter": "0,1,2,3", 4329 "CounterHTOff": "0,1,2,3", 4330 "EventCode": "0xB7, 0xBB", 4331 "EventName": "OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 4332 "MSRIndex": "0x1a6,0x1a7", 4333 "MSRValue": "0x0084000491", 4334 "Offcore": "1", 4335 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4336 "SampleAfterValue": "100003", 4337 "UMask": "0x1" 4338 }, 4339 { 4340 "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 4341 "Counter": "0,1,2,3", 4342 "CounterHTOff": "0,1,2,3", 4343 "EventCode": "0xB7, 0xBB", 4344 "EventName": "OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 4345 "MSRIndex": "0x1a6,0x1a7", 4346 "MSRValue": "0x063B800490", 4347 "Offcore": "1", 4348 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4349 "SampleAfterValue": "100003", 4350 "UMask": "0x1" 4351 }, 4352 { 4353 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 4354 "Counter": "0,1,2,3", 4355 "CounterHTOff": "0,1,2,3", 4356 "Deprecated": "1", 4357 "EventCode": "0xB7, 0xBB", 4358 "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 4359 "MSRIndex": "0x1a6,0x1a7", 4360 "MSRValue": "0x0804000100", 4361 "Offcore": "1", 4362 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4363 "SampleAfterValue": "100003", 4364 "UMask": "0x1" 4365 }, 4366 { 4367 "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_MISS.ANY_SNOOP OCR.PF_L3_DATA_RD.L3_MISS.ANY_SNOOP", 4368 "Counter": "0,1,2,3", 4369 "CounterHTOff": "0,1,2,3", 4370 "EventCode": "0xB7, 0xBB", 4371 "EventName": "OCR.PF_L3_DATA_RD.L3_MISS.ANY_SNOOP", 4372 "MSRIndex": "0x1a6,0x1a7", 4373 "MSRValue": "0x3FBC000080", 4374 "Offcore": "1", 4375 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4376 "SampleAfterValue": "100003", 4377 "UMask": "0x1" 4378 }, 4379 { 4380 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 4381 "Counter": "0,1,2,3", 4382 "CounterHTOff": "0,1,2,3", 4383 "Deprecated": "1", 4384 "EventCode": "0xB7, 0xBB", 4385 "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 4386 "MSRIndex": "0x1a6,0x1a7", 4387 "MSRValue": "0x0410000020", 4388 "Offcore": "1", 4389 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4390 "SampleAfterValue": "100003", 4391 "UMask": "0x1" 4392 }, 4393 { 4394 "BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 4395 "Counter": "0,1,2,3", 4396 "CounterHTOff": "0,1,2,3", 4397 "EventCode": "0xB7, 0xBB", 4398 "EventName": "OCR.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 4399 "MSRIndex": "0x1a6,0x1a7", 4400 "MSRValue": "0x0604000001", 4401 "Offcore": "1", 4402 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4403 "SampleAfterValue": "100003", 4404 "UMask": "0x1" 4405 }, 4406 { 4407 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 4408 "Counter": "0,1,2,3", 4409 "CounterHTOff": "0,1,2,3", 4410 "Deprecated": "1", 4411 "EventCode": "0xB7, 0xBB", 4412 "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 4413 "MSRIndex": "0x1a6,0x1a7", 4414 "MSRValue": "0x0410000490", 4415 "Offcore": "1", 4416 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4417 "SampleAfterValue": "100003", 4418 "UMask": "0x1" 4419 }, 4420 { 4421 "BriefDescription": "Cycles with at least 1 Demand Data Read requests who miss L3 cache in the superQ.", 4422 "Counter": "0,1,2,3", 4423 "CounterHTOff": "0,1,2,3,4,5,6,7", 4424 "CounterMask": "1", 4425 "EventCode": "0x60", 4426 "EventName": "OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_L3_MISS_DEMAND_DATA_RD", 4427 "SampleAfterValue": "2000003", 4428 "UMask": "0x10" 4429 }, 4430 { 4431 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD", 4432 "Counter": "0,1,2,3", 4433 "CounterHTOff": "0,1,2,3", 4434 "Deprecated": "1", 4435 "EventCode": "0xB7, 0xBB", 4436 "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD", 4437 "MSRIndex": "0x1a6,0x1a7", 4438 "MSRValue": "0x083C000010", 4439 "Offcore": "1", 4440 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4441 "SampleAfterValue": "100003", 4442 "UMask": "0x1" 4443 }, 4444 { 4445 "BriefDescription": "Counts the number of machine clears due to memory order conflicts.", 4446 "Counter": "0,1,2,3", 4447 "CounterHTOff": "0,1,2,3,4,5,6,7", 4448 "Errata": "SKL089", 4449 "EventCode": "0xC3", 4450 "EventName": "MACHINE_CLEARS.MEMORY_ORDERING", 4451 "PublicDescription": "Counts the number of memory ordering Machine Clears detected. Memory Ordering Machine Clears can result from one of the following:a. memory disambiguation,b. external snoop, orc. cross SMT-HW-thread snoop (stores) hitting load buffer.", 4452 "SampleAfterValue": "100003", 4453 "UMask": "0x2" 4454 }, 4455 { 4456 "BriefDescription": "Number of times an HLE transactional execution aborted due to XRELEASE lock not satisfying the address and value requirements in the elision buffer", 4457 "Counter": "0,1,2,3", 4458 "CounterHTOff": "0,1,2,3,4,5,6,7", 4459 "EventCode": "0x54", 4460 "EventName": "TX_MEM.ABORT_HLE_ELISION_BUFFER_MISMATCH", 4461 "PublicDescription": "Number of times a TSX Abort was triggered due to release/commit but data and address mismatch.", 4462 "SampleAfterValue": "2000003", 4463 "UMask": "0x10" 4464 }, 4465 { 4466 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 4467 "Counter": "0,1,2,3", 4468 "CounterHTOff": "0,1,2,3", 4469 "Deprecated": "1", 4470 "EventCode": "0xB7, 0xBB", 4471 "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 4472 "MSRIndex": "0x1a6,0x1a7", 4473 "MSRValue": "0x0110000010", 4474 "Offcore": "1", 4475 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4476 "SampleAfterValue": "100003", 4477 "UMask": "0x1" 4478 }, 4479 { 4480 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 4481 "Counter": "0,1,2,3", 4482 "CounterHTOff": "0,1,2,3", 4483 "Deprecated": "1", 4484 "EventCode": "0xB7, 0xBB", 4485 "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 4486 "MSRIndex": "0x1a6,0x1a7", 4487 "MSRValue": "0x0204000020", 4488 "Offcore": "1", 4489 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4490 "SampleAfterValue": "100003", 4491 "UMask": "0x1" 4492 }, 4493 { 4494 "BriefDescription": "Counts all demand data writes (RFOs)", 4495 "Counter": "0,1,2,3", 4496 "CounterHTOff": "0,1,2,3", 4497 "EventCode": "0xB7, 0xBB", 4498 "EventName": "OCR.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 4499 "MSRIndex": "0x1a6,0x1a7", 4500 "MSRValue": "0x0090000002", 4501 "Offcore": "1", 4502 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4503 "SampleAfterValue": "100003", 4504 "UMask": "0x1" 4505 }, 4506 { 4507 "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 4508 "Counter": "0,1,2,3", 4509 "CounterHTOff": "0,1,2,3", 4510 "EventCode": "0xB7, 0xBB", 4511 "EventName": "OCR.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 4512 "MSRIndex": "0x1a6,0x1a7", 4513 "MSRValue": "0x1004000080", 4514 "Offcore": "1", 4515 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4516 "SampleAfterValue": "100003", 4517 "UMask": "0x1" 4518 }, 4519 { 4520 "BriefDescription": "Counts prefetch (that bring data to L2) data reads", 4521 "Counter": "0,1,2,3", 4522 "CounterHTOff": "0,1,2,3", 4523 "EventCode": "0xB7, 0xBB", 4524 "EventName": "OCR.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 4525 "MSRIndex": "0x1a6,0x1a7", 4526 "MSRValue": "0x0090000010", 4527 "Offcore": "1", 4528 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4529 "SampleAfterValue": "100003", 4530 "UMask": "0x1" 4531 }, 4532 { 4533 "BriefDescription": "OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 4534 "Counter": "0,1,2,3", 4535 "CounterHTOff": "0,1,2,3", 4536 "EventCode": "0xB7, 0xBB", 4537 "EventName": "OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 4538 "MSRIndex": "0x1a6,0x1a7", 4539 "MSRValue": "0x1010000122", 4540 "Offcore": "1", 4541 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4542 "SampleAfterValue": "100003", 4543 "UMask": "0x1" 4544 }, 4545 { 4546 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS.HIT_OTHER_CORE_FWD", 4547 "Counter": "0,1,2,3", 4548 "CounterHTOff": "0,1,2,3", 4549 "Deprecated": "1", 4550 "EventCode": "0xB7, 0xBB", 4551 "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS.HIT_OTHER_CORE_FWD", 4552 "MSRIndex": "0x1a6,0x1a7", 4553 "MSRValue": "0x083C000122", 4554 "Offcore": "1", 4555 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4556 "SampleAfterValue": "100003", 4557 "UMask": "0x1" 4558 }, 4559 { 4560 "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 4561 "Counter": "0,1,2,3", 4562 "CounterHTOff": "0,1,2,3", 4563 "EventCode": "0xB7, 0xBB", 4564 "EventName": "OCR.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 4565 "MSRIndex": "0x1a6,0x1a7", 4566 "MSRValue": "0x0810000080", 4567 "Offcore": "1", 4568 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4569 "SampleAfterValue": "100003", 4570 "UMask": "0x1" 4571 }, 4572 { 4573 "BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD OCR.DEMAND_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD", 4574 "Counter": "0,1,2,3", 4575 "CounterHTOff": "0,1,2,3", 4576 "EventCode": "0xB7, 0xBB", 4577 "EventName": "OCR.DEMAND_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD", 4578 "MSRIndex": "0x1a6,0x1a7", 4579 "MSRValue": "0x083C000001", 4580 "Offcore": "1", 4581 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4582 "SampleAfterValue": "100003", 4583 "UMask": "0x1" 4584 }, 4585 { 4586 "BriefDescription": "Counts any other requests OCR.OTHER.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 4587 "Counter": "0,1,2,3", 4588 "CounterHTOff": "0,1,2,3", 4589 "EventCode": "0xB7, 0xBB", 4590 "EventName": "OCR.OTHER.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 4591 "MSRIndex": "0x1a6,0x1a7", 4592 "MSRValue": "0x0810008000", 4593 "Offcore": "1", 4594 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4595 "SampleAfterValue": "100003", 4596 "UMask": "0x1" 4597 }, 4598 { 4599 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS.REMOTE_HIT_FORWARD", 4600 "Counter": "0,1,2,3", 4601 "CounterHTOff": "0,1,2,3", 4602 "Deprecated": "1", 4603 "EventCode": "0xB7, 0xBB", 4604 "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS.REMOTE_HIT_FORWARD", 4605 "MSRIndex": "0x1a6,0x1a7", 4606 "MSRValue": "0x083FC00122", 4607 "Offcore": "1", 4608 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4609 "SampleAfterValue": "100003", 4610 "UMask": "0x1" 4611 }, 4612 { 4613 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 4614 "Counter": "0,1,2,3", 4615 "CounterHTOff": "0,1,2,3", 4616 "Deprecated": "1", 4617 "EventCode": "0xB7, 0xBB", 4618 "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 4619 "MSRIndex": "0x1a6,0x1a7", 4620 "MSRValue": "0x0090000080", 4621 "Offcore": "1", 4622 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4623 "SampleAfterValue": "100003", 4624 "UMask": "0x1" 4625 }, 4626 { 4627 "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_MISS.HITM_OTHER_CORE OCR.PF_L2_RFO.L3_MISS.HITM_OTHER_CORE", 4628 "Counter": "0,1,2,3", 4629 "CounterHTOff": "0,1,2,3", 4630 "EventCode": "0xB7, 0xBB", 4631 "EventName": "OCR.PF_L2_RFO.L3_MISS.HITM_OTHER_CORE", 4632 "MSRIndex": "0x1a6,0x1a7", 4633 "MSRValue": "0x103C000020", 4634 "Offcore": "1", 4635 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4636 "SampleAfterValue": "100003", 4637 "UMask": "0x1" 4638 }, 4639 { 4640 "BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 4641 "Counter": "0,1,2,3", 4642 "CounterHTOff": "0,1,2,3", 4643 "EventCode": "0xB7, 0xBB", 4644 "EventName": "OCR.DEMAND_RFO.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 4645 "MSRIndex": "0x1a6,0x1a7", 4646 "MSRValue": "0x0104000002", 4647 "Offcore": "1", 4648 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4649 "SampleAfterValue": "100003", 4650 "UMask": "0x1" 4651 }, 4652 { 4653 "BriefDescription": "OCR.ALL_READS.L3_MISS.NO_SNOOP_NEEDED OCR.ALL_READS.L3_MISS.NO_SNOOP_NEEDED OCR.ALL_READS.L3_MISS.NO_SNOOP_NEEDED", 4654 "Counter": "0,1,2,3", 4655 "CounterHTOff": "0,1,2,3", 4656 "EventCode": "0xB7, 0xBB", 4657 "EventName": "OCR.ALL_READS.L3_MISS.NO_SNOOP_NEEDED", 4658 "MSRIndex": "0x1a6,0x1a7", 4659 "MSRValue": "0x013C0007F7", 4660 "Offcore": "1", 4661 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4662 "SampleAfterValue": "100003", 4663 "UMask": "0x1" 4664 }, 4665 { 4666 "BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 4667 "Counter": "0,1,2,3", 4668 "CounterHTOff": "0,1,2,3", 4669 "EventCode": "0xB7, 0xBB", 4670 "EventName": "OCR.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 4671 "MSRIndex": "0x1a6,0x1a7", 4672 "MSRValue": "0x0410000001", 4673 "Offcore": "1", 4674 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4675 "SampleAfterValue": "100003", 4676 "UMask": "0x1" 4677 }, 4678 { 4679 "BriefDescription": "Number of times an RTM execution aborted due to none of the previous 4 categories (e.g. interrupt)", 4680 "Counter": "0,1,2,3", 4681 "CounterHTOff": "0,1,2,3,4,5,6,7", 4682 "EventCode": "0xC9", 4683 "EventName": "RTM_RETIRED.ABORTED_EVENTS", 4684 "PublicDescription": "Number of times an RTM execution aborted due to none of the previous 4 categories (e.g. interrupt).", 4685 "SampleAfterValue": "2000003", 4686 "UMask": "0x80" 4687 }, 4688 { 4689 "BriefDescription": "OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 4690 "Counter": "0,1,2,3", 4691 "CounterHTOff": "0,1,2,3", 4692 "EventCode": "0xB7, 0xBB", 4693 "EventName": "OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 4694 "MSRIndex": "0x1a6,0x1a7", 4695 "MSRValue": "0x04100007F7", 4696 "Offcore": "1", 4697 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4698 "SampleAfterValue": "100003", 4699 "UMask": "0x1" 4700 }, 4701 { 4702 "BriefDescription": "OCR.ALL_PF_RFO.L3_MISS.SNOOP_NONE OCR.ALL_PF_RFO.L3_MISS.SNOOP_NONE", 4703 "Counter": "0,1,2,3", 4704 "CounterHTOff": "0,1,2,3", 4705 "EventCode": "0xB7, 0xBB", 4706 "EventName": "OCR.ALL_PF_RFO.L3_MISS.SNOOP_NONE", 4707 "MSRIndex": "0x1a6,0x1a7", 4708 "MSRValue": "0x00BC000120", 4709 "Offcore": "1", 4710 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4711 "SampleAfterValue": "100003", 4712 "UMask": "0x1" 4713 }, 4714 { 4715 "BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD OCR.DEMAND_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD", 4716 "Counter": "0,1,2,3", 4717 "CounterHTOff": "0,1,2,3", 4718 "EventCode": "0xB7, 0xBB", 4719 "EventName": "OCR.DEMAND_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD", 4720 "MSRIndex": "0x1a6,0x1a7", 4721 "MSRValue": "0x043C000001", 4722 "Offcore": "1", 4723 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4724 "SampleAfterValue": "100003", 4725 "UMask": "0x1" 4726 }, 4727 { 4728 "BriefDescription": "OCR.ALL_RFO.L3_MISS.SNOOP_MISS OCR.ALL_RFO.L3_MISS.SNOOP_MISS", 4729 "Counter": "0,1,2,3", 4730 "CounterHTOff": "0,1,2,3", 4731 "EventCode": "0xB7, 0xBB", 4732 "EventName": "OCR.ALL_RFO.L3_MISS.SNOOP_MISS", 4733 "MSRIndex": "0x1a6,0x1a7", 4734 "MSRValue": "0x023C000122", 4735 "Offcore": "1", 4736 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4737 "SampleAfterValue": "100003", 4738 "UMask": "0x1" 4739 }, 4740 { 4741 "BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 4742 "Counter": "0,1,2,3", 4743 "CounterHTOff": "0,1,2,3", 4744 "Deprecated": "1", 4745 "EventCode": "0xB7, 0xBB", 4746 "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 4747 "MSRIndex": "0x1a6,0x1a7", 4748 "MSRValue": "0x0110008000", 4749 "Offcore": "1", 4750 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4751 "SampleAfterValue": "100003", 4752 "UMask": "0x1" 4753 }, 4754 { 4755 "BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 4756 "Counter": "0,1,2,3", 4757 "CounterHTOff": "0,1,2,3", 4758 "Deprecated": "1", 4759 "EventCode": "0xB7, 0xBB", 4760 "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 4761 "MSRIndex": "0x1a6,0x1a7", 4762 "MSRValue": "0x1010008000", 4763 "Offcore": "1", 4764 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4765 "SampleAfterValue": "100003", 4766 "UMask": "0x1" 4767 }, 4768 { 4769 "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 4770 "Counter": "0,1,2,3", 4771 "CounterHTOff": "0,1,2,3", 4772 "EventCode": "0xB7, 0xBB", 4773 "EventName": "OCR.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 4774 "MSRIndex": "0x1a6,0x1a7", 4775 "MSRValue": "0x0110000400", 4776 "Offcore": "1", 4777 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4778 "SampleAfterValue": "100003", 4779 "UMask": "0x1" 4780 }, 4781 { 4782 "BriefDescription": "Execution stalls while L3 cache miss demand load is outstanding.", 4783 "Counter": "0,1,2,3", 4784 "CounterHTOff": "0,1,2,3,4,5,6,7", 4785 "CounterMask": "6", 4786 "EventCode": "0xA3", 4787 "EventName": "CYCLE_ACTIVITY.STALLS_L3_MISS", 4788 "SampleAfterValue": "2000003", 4789 "UMask": "0x6" 4790 }, 4791 { 4792 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 4793 "Counter": "0,1,2,3", 4794 "CounterHTOff": "0,1,2,3", 4795 "Deprecated": "1", 4796 "EventCode": "0xB7, 0xBB", 4797 "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 4798 "MSRIndex": "0x1a6,0x1a7", 4799 "MSRValue": "0x0204000122", 4800 "Offcore": "1", 4801 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4802 "SampleAfterValue": "100003", 4803 "UMask": "0x1" 4804 }, 4805 { 4806 "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_MISS.SNOOP_NONE", 4807 "Counter": "0,1,2,3", 4808 "CounterHTOff": "0,1,2,3", 4809 "EventCode": "0xB7, 0xBB", 4810 "EventName": "OCR.PF_L1D_AND_SW.L3_MISS.SNOOP_NONE", 4811 "MSRIndex": "0x1a6,0x1a7", 4812 "MSRValue": "0x00BC000400", 4813 "Offcore": "1", 4814 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4815 "SampleAfterValue": "100003", 4816 "UMask": "0x1" 4817 }, 4818 { 4819 "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs", 4820 "Counter": "0,1,2,3", 4821 "CounterHTOff": "0,1,2,3", 4822 "EventCode": "0xB7, 0xBB", 4823 "EventName": "OCR.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 4824 "MSRIndex": "0x1a6,0x1a7", 4825 "MSRValue": "0x0090000100", 4826 "Offcore": "1", 4827 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4828 "SampleAfterValue": "100003", 4829 "UMask": "0x1" 4830 }, 4831 { 4832 "BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_MISS.HITM_OTHER_CORE OCR.DEMAND_DATA_RD.L3_MISS.HITM_OTHER_CORE", 4833 "Counter": "0,1,2,3", 4834 "CounterHTOff": "0,1,2,3", 4835 "EventCode": "0xB7, 0xBB", 4836 "EventName": "OCR.DEMAND_DATA_RD.L3_MISS.HITM_OTHER_CORE", 4837 "MSRIndex": "0x1a6,0x1a7", 4838 "MSRValue": "0x103C000001", 4839 "Offcore": "1", 4840 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4841 "SampleAfterValue": "100003", 4842 "UMask": "0x1" 4843 }, 4844 { 4845 "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_MISS.REMOTE_HITM", 4846 "Counter": "0,1,2,3", 4847 "CounterHTOff": "0,1,2,3", 4848 "EventCode": "0xB7, 0xBB", 4849 "EventName": "OCR.PF_L1D_AND_SW.L3_MISS.REMOTE_HITM", 4850 "MSRIndex": "0x1a6,0x1a7", 4851 "MSRValue": "0x103FC00400", 4852 "Offcore": "1", 4853 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4854 "SampleAfterValue": "100003", 4855 "UMask": "0x1" 4856 }, 4857 { 4858 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 4859 "Counter": "0,1,2,3", 4860 "CounterHTOff": "0,1,2,3", 4861 "Deprecated": "1", 4862 "EventCode": "0xB7, 0xBB", 4863 "EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 4864 "MSRIndex": "0x1a6,0x1a7", 4865 "MSRValue": "0x0204000400", 4866 "Offcore": "1", 4867 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4868 "SampleAfterValue": "100003", 4869 "UMask": "0x1" 4870 }, 4871 { 4872 "BriefDescription": "Counts any other requests", 4873 "Counter": "0,1,2,3", 4874 "CounterHTOff": "0,1,2,3", 4875 "EventCode": "0xB7, 0xBB", 4876 "EventName": "OCR.OTHER.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 4877 "MSRIndex": "0x1a6,0x1a7", 4878 "MSRValue": "0x0204008000", 4879 "Offcore": "1", 4880 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4881 "SampleAfterValue": "100003", 4882 "UMask": "0x1" 4883 }, 4884 { 4885 "BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 4886 "Counter": "0,1,2,3", 4887 "CounterHTOff": "0,1,2,3", 4888 "Deprecated": "1", 4889 "EventCode": "0xB7, 0xBB", 4890 "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 4891 "MSRIndex": "0x1a6,0x1a7", 4892 "MSRValue": "0x0090008000", 4893 "Offcore": "1", 4894 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4895 "SampleAfterValue": "100003", 4896 "UMask": "0x1" 4897 }, 4898 { 4899 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 4900 "Counter": "0,1,2,3", 4901 "CounterHTOff": "0,1,2,3", 4902 "Deprecated": "1", 4903 "EventCode": "0xB7, 0xBB", 4904 "EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 4905 "MSRIndex": "0x1a6,0x1a7", 4906 "MSRValue": "0x08100007F7", 4907 "Offcore": "1", 4908 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4909 "SampleAfterValue": "100003", 4910 "UMask": "0x1" 4911 }, 4912 { 4913 "BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 4914 "Counter": "0,1,2,3", 4915 "CounterHTOff": "0,1,2,3", 4916 "EventCode": "0xB7, 0xBB", 4917 "EventName": "OCR.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 4918 "MSRIndex": "0x1a6,0x1a7", 4919 "MSRValue": "0x0604000004", 4920 "Offcore": "1", 4921 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4922 "SampleAfterValue": "100003", 4923 "UMask": "0x1" 4924 }, 4925 { 4926 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 4927 "Counter": "0,1,2,3", 4928 "CounterHTOff": "0,1,2,3", 4929 "Deprecated": "1", 4930 "EventCode": "0xB7, 0xBB", 4931 "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 4932 "MSRIndex": "0x1a6,0x1a7", 4933 "MSRValue": "0x0604000491", 4934 "Offcore": "1", 4935 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4936 "SampleAfterValue": "100003", 4937 "UMask": "0x1" 4938 }, 4939 { 4940 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS.REMOTE_HIT_FORWARD", 4941 "Counter": "0,1,2,3", 4942 "CounterHTOff": "0,1,2,3", 4943 "Deprecated": "1", 4944 "EventCode": "0xB7, 0xBB", 4945 "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS.REMOTE_HIT_FORWARD", 4946 "MSRIndex": "0x1a6,0x1a7", 4947 "MSRValue": "0x083FC00002", 4948 "Offcore": "1", 4949 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4950 "SampleAfterValue": "100003", 4951 "UMask": "0x1" 4952 }, 4953 { 4954 "BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_MISS.SNOOP_NONE", 4955 "Counter": "0,1,2,3", 4956 "CounterHTOff": "0,1,2,3", 4957 "EventCode": "0xB7, 0xBB", 4958 "EventName": "OCR.DEMAND_CODE_RD.L3_MISS.SNOOP_NONE", 4959 "MSRIndex": "0x1a6,0x1a7", 4960 "MSRValue": "0x00BC000004", 4961 "Offcore": "1", 4962 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4963 "SampleAfterValue": "100003", 4964 "UMask": "0x1" 4965 }, 4966 { 4967 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 4968 "Counter": "0,1,2,3", 4969 "CounterHTOff": "0,1,2,3", 4970 "Deprecated": "1", 4971 "EventCode": "0xB7, 0xBB", 4972 "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 4973 "MSRIndex": "0x1a6,0x1a7", 4974 "MSRValue": "0x063B800122", 4975 "Offcore": "1", 4976 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4977 "SampleAfterValue": "100003", 4978 "UMask": "0x1" 4979 }, 4980 { 4981 "BriefDescription": "OCR.ALL_READS.L3_MISS.REMOTE_HIT_FORWARD OCR.ALL_READS.L3_MISS.REMOTE_HIT_FORWARD", 4982 "Counter": "0,1,2,3", 4983 "CounterHTOff": "0,1,2,3", 4984 "EventCode": "0xB7, 0xBB", 4985 "EventName": "OCR.ALL_READS.L3_MISS.REMOTE_HIT_FORWARD", 4986 "MSRIndex": "0x1a6,0x1a7", 4987 "MSRValue": "0x083FC007F7", 4988 "Offcore": "1", 4989 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4990 "SampleAfterValue": "100003", 4991 "UMask": "0x1" 4992 }, 4993 { 4994 "BriefDescription": "OCR.ALL_RFO.L3_MISS.NO_SNOOP_NEEDED OCR.ALL_RFO.L3_MISS.NO_SNOOP_NEEDED OCR.ALL_RFO.L3_MISS.NO_SNOOP_NEEDED", 4995 "Counter": "0,1,2,3", 4996 "CounterHTOff": "0,1,2,3", 4997 "EventCode": "0xB7, 0xBB", 4998 "EventName": "OCR.ALL_RFO.L3_MISS.NO_SNOOP_NEEDED", 4999 "MSRIndex": "0x1a6,0x1a7", 5000 "MSRValue": "0x013C000122", 5001 "Offcore": "1", 5002 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5003 "SampleAfterValue": "100003", 5004 "UMask": "0x1" 5005 }, 5006 { 5007 "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_MISS.HIT_OTHER_CORE_FWD OCR.PF_L3_RFO.L3_MISS.HIT_OTHER_CORE_FWD", 5008 "Counter": "0,1,2,3", 5009 "CounterHTOff": "0,1,2,3", 5010 "EventCode": "0xB7, 0xBB", 5011 "EventName": "OCR.PF_L3_RFO.L3_MISS.HIT_OTHER_CORE_FWD", 5012 "MSRIndex": "0x1a6,0x1a7", 5013 "MSRValue": "0x083C000100", 5014 "Offcore": "1", 5015 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5016 "SampleAfterValue": "100003", 5017 "UMask": "0x1" 5018 }, 5019 { 5020 "BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 5021 "Counter": "0,1,2,3", 5022 "CounterHTOff": "0,1,2,3", 5023 "EventCode": "0xB7, 0xBB", 5024 "EventName": "OCR.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 5025 "MSRIndex": "0x1a6,0x1a7", 5026 "MSRValue": "0x3F90000004", 5027 "Offcore": "1", 5028 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5029 "SampleAfterValue": "100003", 5030 "UMask": "0x1" 5031 }, 5032 { 5033 "BriefDescription": "OCR.ALL_PF_RFO.L3_MISS.NO_SNOOP_NEEDED OCR.ALL_PF_RFO.L3_MISS.NO_SNOOP_NEEDED OCR.ALL_PF_RFO.L3_MISS.NO_SNOOP_NEEDED", 5034 "Counter": "0,1,2,3", 5035 "CounterHTOff": "0,1,2,3", 5036 "EventCode": "0xB7, 0xBB", 5037 "EventName": "OCR.ALL_PF_RFO.L3_MISS.NO_SNOOP_NEEDED", 5038 "MSRIndex": "0x1a6,0x1a7", 5039 "MSRValue": "0x013C000120", 5040 "Offcore": "1", 5041 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5042 "SampleAfterValue": "100003", 5043 "UMask": "0x1" 5044 }, 5045 { 5046 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 5047 "Counter": "0,1,2,3", 5048 "CounterHTOff": "0,1,2,3", 5049 "Deprecated": "1", 5050 "EventCode": "0xB7, 0xBB", 5051 "EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 5052 "MSRIndex": "0x1a6,0x1a7", 5053 "MSRValue": "0x02100007F7", 5054 "Offcore": "1", 5055 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5056 "SampleAfterValue": "100003", 5057 "UMask": "0x1" 5058 }, 5059 { 5060 "BriefDescription": "OCR.ALL_READS.L3_MISS.REMOTE_HITM OCR.ALL_READS.L3_MISS.REMOTE_HITM", 5061 "Counter": "0,1,2,3", 5062 "CounterHTOff": "0,1,2,3", 5063 "EventCode": "0xB7, 0xBB", 5064 "EventName": "OCR.ALL_READS.L3_MISS.REMOTE_HITM", 5065 "MSRIndex": "0x1a6,0x1a7", 5066 "MSRValue": "0x103FC007F7", 5067 "Offcore": "1", 5068 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5069 "SampleAfterValue": "100003", 5070 "UMask": "0x1" 5071 }, 5072 { 5073 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 5074 "Counter": "0,1,2,3", 5075 "CounterHTOff": "0,1,2,3", 5076 "Deprecated": "1", 5077 "EventCode": "0xB7, 0xBB", 5078 "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 5079 "MSRIndex": "0x1a6,0x1a7", 5080 "MSRValue": "0x0110000490", 5081 "Offcore": "1", 5082 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5083 "SampleAfterValue": "100003", 5084 "UMask": "0x1" 5085 }, 5086 { 5087 "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_MISS.ANY_SNOOP OCR.PF_L3_RFO.L3_MISS.ANY_SNOOP", 5088 "Counter": "0,1,2,3", 5089 "CounterHTOff": "0,1,2,3", 5090 "EventCode": "0xB7, 0xBB", 5091 "EventName": "OCR.PF_L3_RFO.L3_MISS.ANY_SNOOP", 5092 "MSRIndex": "0x1a6,0x1a7", 5093 "MSRValue": "0x3FBC000100", 5094 "Offcore": "1", 5095 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5096 "SampleAfterValue": "100003", 5097 "UMask": "0x1" 5098 }, 5099 { 5100 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 5101 "Counter": "0,1,2,3", 5102 "CounterHTOff": "0,1,2,3", 5103 "Deprecated": "1", 5104 "EventCode": "0xB7, 0xBB", 5105 "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 5106 "MSRIndex": "0x1a6,0x1a7", 5107 "MSRValue": "0x0810000004", 5108 "Offcore": "1", 5109 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5110 "SampleAfterValue": "100003", 5111 "UMask": "0x1" 5112 }, 5113 { 5114 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 5115 "Counter": "0,1,2,3", 5116 "CounterHTOff": "0,1,2,3", 5117 "Deprecated": "1", 5118 "EventCode": "0xB7, 0xBB", 5119 "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 5120 "MSRIndex": "0x1a6,0x1a7", 5121 "MSRValue": "0x0204000490", 5122 "Offcore": "1", 5123 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5124 "SampleAfterValue": "100003", 5125 "UMask": "0x1" 5126 }, 5127 { 5128 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 5129 "Counter": "0,1,2,3", 5130 "CounterHTOff": "0,1,2,3", 5131 "Deprecated": "1", 5132 "EventCode": "0xB7, 0xBB", 5133 "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 5134 "MSRIndex": "0x1a6,0x1a7", 5135 "MSRValue": "0x3F90000491", 5136 "Offcore": "1", 5137 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5138 "SampleAfterValue": "100003", 5139 "UMask": "0x1" 5140 }, 5141 { 5142 "BriefDescription": "OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 5143 "Counter": "0,1,2,3", 5144 "CounterHTOff": "0,1,2,3", 5145 "EventCode": "0xB7, 0xBB", 5146 "EventName": "OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 5147 "MSRIndex": "0x1a6,0x1a7", 5148 "MSRValue": "0x0404000491", 5149 "Offcore": "1", 5150 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5151 "SampleAfterValue": "100003", 5152 "UMask": "0x1" 5153 }, 5154 { 5155 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS.REMOTE_HITM", 5156 "Counter": "0,1,2,3", 5157 "CounterHTOff": "0,1,2,3", 5158 "Deprecated": "1", 5159 "EventCode": "0xB7, 0xBB", 5160 "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS.REMOTE_HITM", 5161 "MSRIndex": "0x1a6,0x1a7", 5162 "MSRValue": "0x103FC00002", 5163 "Offcore": "1", 5164 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5165 "SampleAfterValue": "100003", 5166 "UMask": "0x1" 5167 }, 5168 { 5169 "BriefDescription": "Number of times an HLE execution aborted due to hardware timer expiration.", 5170 "Counter": "0,1,2,3", 5171 "CounterHTOff": "0,1,2,3,4,5,6,7", 5172 "EventCode": "0xC8", 5173 "EventName": "HLE_RETIRED.ABORTED_TIMER", 5174 "SampleAfterValue": "2000003", 5175 "UMask": "0x10" 5176 }, 5177 { 5178 "BriefDescription": "OCR.ALL_RFO.L3_MISS.REMOTE_HITM OCR.ALL_RFO.L3_MISS.REMOTE_HITM", 5179 "Counter": "0,1,2,3", 5180 "CounterHTOff": "0,1,2,3", 5181 "EventCode": "0xB7, 0xBB", 5182 "EventName": "OCR.ALL_RFO.L3_MISS.REMOTE_HITM", 5183 "MSRIndex": "0x1a6,0x1a7", 5184 "MSRValue": "0x103FC00122", 5185 "Offcore": "1", 5186 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5187 "SampleAfterValue": "100003", 5188 "UMask": "0x1" 5189 }, 5190 { 5191 "BriefDescription": "OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 5192 "Counter": "0,1,2,3", 5193 "CounterHTOff": "0,1,2,3", 5194 "EventCode": "0xB7, 0xBB", 5195 "EventName": "OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 5196 "MSRIndex": "0x1a6,0x1a7", 5197 "MSRValue": "0x0090000491", 5198 "Offcore": "1", 5199 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5200 "SampleAfterValue": "100003", 5201 "UMask": "0x1" 5202 }, 5203 { 5204 "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_MISS.REMOTE_HITM", 5205 "Counter": "0,1,2,3", 5206 "CounterHTOff": "0,1,2,3", 5207 "EventCode": "0xB7, 0xBB", 5208 "EventName": "OCR.PF_L3_DATA_RD.L3_MISS.REMOTE_HITM", 5209 "MSRIndex": "0x1a6,0x1a7", 5210 "MSRValue": "0x103FC00080", 5211 "Offcore": "1", 5212 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5213 "SampleAfterValue": "100003", 5214 "UMask": "0x1" 5215 }, 5216 { 5217 "BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 5218 "Counter": "0,1,2,3", 5219 "CounterHTOff": "0,1,2,3", 5220 "EventCode": "0xB7, 0xBB", 5221 "EventName": "OCR.DEMAND_CODE_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 5222 "MSRIndex": "0x1a6,0x1a7", 5223 "MSRValue": "0x063B800004", 5224 "Offcore": "1", 5225 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5226 "SampleAfterValue": "100003", 5227 "UMask": "0x1" 5228 }, 5229 { 5230 "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 5231 "Counter": "0,1,2,3", 5232 "CounterHTOff": "0,1,2,3", 5233 "EventCode": "0xB7, 0xBB", 5234 "EventName": "OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 5235 "MSRIndex": "0x1a6,0x1a7", 5236 "MSRValue": "0x0404000490", 5237 "Offcore": "1", 5238 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5239 "SampleAfterValue": "100003", 5240 "UMask": "0x1" 5241 }, 5242 { 5243 "BriefDescription": "Counts any other requests OCR.OTHER.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 5244 "Counter": "0,1,2,3", 5245 "CounterHTOff": "0,1,2,3", 5246 "EventCode": "0xB7, 0xBB", 5247 "EventName": "OCR.OTHER.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 5248 "MSRIndex": "0x1a6,0x1a7", 5249 "MSRValue": "0x3F90008000", 5250 "Offcore": "1", 5251 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5252 "SampleAfterValue": "100003", 5253 "UMask": "0x1" 5254 }, 5255 { 5256 "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 5257 "Counter": "0,1,2,3", 5258 "CounterHTOff": "0,1,2,3", 5259 "EventCode": "0xB7, 0xBB", 5260 "EventName": "OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 5261 "MSRIndex": "0x1a6,0x1a7", 5262 "MSRValue": "0x0410000490", 5263 "Offcore": "1", 5264 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5265 "SampleAfterValue": "100003", 5266 "UMask": "0x1" 5267 }, 5268 { 5269 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS.ANY_SNOOP", 5270 "Counter": "0,1,2,3", 5271 "CounterHTOff": "0,1,2,3", 5272 "Deprecated": "1", 5273 "EventCode": "0xB7, 0xBB", 5274 "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS.ANY_SNOOP", 5275 "MSRIndex": "0x1a6,0x1a7", 5276 "MSRValue": "0x3FBC000010", 5277 "Offcore": "1", 5278 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5279 "SampleAfterValue": "100003", 5280 "UMask": "0x1" 5281 }, 5282 { 5283 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 5284 "Counter": "0,1,2,3", 5285 "CounterHTOff": "0,1,2,3", 5286 "Deprecated": "1", 5287 "EventCode": "0xB7, 0xBB", 5288 "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 5289 "MSRIndex": "0x1a6,0x1a7", 5290 "MSRValue": "0x3F84000020", 5291 "Offcore": "1", 5292 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5293 "SampleAfterValue": "100003", 5294 "UMask": "0x1" 5295 }, 5296 { 5297 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 5298 "Counter": "0,1,2,3", 5299 "CounterHTOff": "0,1,2,3", 5300 "Deprecated": "1", 5301 "EventCode": "0xB7, 0xBB", 5302 "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 5303 "MSRIndex": "0x1a6,0x1a7", 5304 "MSRValue": "0x0604000001", 5305 "Offcore": "1", 5306 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5307 "SampleAfterValue": "100003", 5308 "UMask": "0x1" 5309 }, 5310 { 5311 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 5312 "Counter": "0,1,2,3", 5313 "CounterHTOff": "0,1,2,3", 5314 "Deprecated": "1", 5315 "EventCode": "0xB7, 0xBB", 5316 "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 5317 "MSRIndex": "0x1a6,0x1a7", 5318 "MSRValue": "0x0084000100", 5319 "Offcore": "1", 5320 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5321 "SampleAfterValue": "100003", 5322 "UMask": "0x1" 5323 }, 5324 { 5325 "BriefDescription": "Counts any other requests OCR.OTHER.L3_MISS.SNOOP_MISS", 5326 "Counter": "0,1,2,3", 5327 "CounterHTOff": "0,1,2,3", 5328 "EventCode": "0xB7, 0xBB", 5329 "EventName": "OCR.OTHER.L3_MISS.SNOOP_MISS", 5330 "MSRIndex": "0x1a6,0x1a7", 5331 "MSRValue": "0x023C008000", 5332 "Offcore": "1", 5333 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5334 "SampleAfterValue": "100003", 5335 "UMask": "0x1" 5336 }, 5337 { 5338 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 5339 "Counter": "0,1,2,3", 5340 "CounterHTOff": "0,1,2,3", 5341 "Deprecated": "1", 5342 "EventCode": "0xB7, 0xBB", 5343 "EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 5344 "MSRIndex": "0x1a6,0x1a7", 5345 "MSRValue": "0x0404000400", 5346 "Offcore": "1", 5347 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5348 "SampleAfterValue": "100003", 5349 "UMask": "0x1" 5350 }, 5351 { 5352 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 5353 "Counter": "0,1,2,3", 5354 "CounterHTOff": "0,1,2,3", 5355 "Deprecated": "1", 5356 "EventCode": "0xB7, 0xBB", 5357 "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 5358 "MSRIndex": "0x1a6,0x1a7", 5359 "MSRValue": "0x063B800491", 5360 "Offcore": "1", 5361 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5362 "SampleAfterValue": "100003", 5363 "UMask": "0x1" 5364 }, 5365 { 5366 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 5367 "Counter": "0,1,2,3", 5368 "CounterHTOff": "0,1,2,3", 5369 "Deprecated": "1", 5370 "EventCode": "0xB7, 0xBB", 5371 "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 5372 "MSRIndex": "0x1a6,0x1a7", 5373 "MSRValue": "0x0084000020", 5374 "Offcore": "1", 5375 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5376 "SampleAfterValue": "100003", 5377 "UMask": "0x1" 5378 }, 5379 { 5380 "BriefDescription": "Counts any other requests OCR.OTHER.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 5381 "Counter": "0,1,2,3", 5382 "CounterHTOff": "0,1,2,3", 5383 "EventCode": "0xB7, 0xBB", 5384 "EventName": "OCR.OTHER.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 5385 "MSRIndex": "0x1a6,0x1a7", 5386 "MSRValue": "0x0604008000", 5387 "Offcore": "1", 5388 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5389 "SampleAfterValue": "100003", 5390 "UMask": "0x1" 5391 }, 5392 { 5393 "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 5394 "Counter": "0,1,2,3", 5395 "CounterHTOff": "0,1,2,3", 5396 "EventCode": "0xB7, 0xBB", 5397 "EventName": "OCR.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 5398 "MSRIndex": "0x1a6,0x1a7", 5399 "MSRValue": "0x0110000100", 5400 "Offcore": "1", 5401 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5402 "SampleAfterValue": "100003", 5403 "UMask": "0x1" 5404 }, 5405 { 5406 "BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 32 cycles.", 5407 "Counter": "0,1,2,3", 5408 "CounterHTOff": "0,1,2,3", 5409 "Data_LA": "1", 5410 "EventCode": "0xcd", 5411 "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_32", 5412 "MSRIndex": "0x3F6", 5413 "MSRValue": "0x20", 5414 "PEBS": "2", 5415 "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 32 cycles. Reported latency may be longer than just the memory latency.", 5416 "SampleAfterValue": "100007", 5417 "TakenAlone": "1", 5418 "UMask": "0x1" 5419 }, 5420 { 5421 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD", 5422 "Counter": "0,1,2,3", 5423 "CounterHTOff": "0,1,2,3", 5424 "Deprecated": "1", 5425 "EventCode": "0xB7, 0xBB", 5426 "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD", 5427 "MSRIndex": "0x1a6,0x1a7", 5428 "MSRValue": "0x083C000080", 5429 "Offcore": "1", 5430 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5431 "SampleAfterValue": "100003", 5432 "UMask": "0x1" 5433 }, 5434 { 5435 "BriefDescription": "OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 5436 "Counter": "0,1,2,3", 5437 "CounterHTOff": "0,1,2,3", 5438 "EventCode": "0xB7, 0xBB", 5439 "EventName": "OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 5440 "MSRIndex": "0x1a6,0x1a7", 5441 "MSRValue": "0x0110000122", 5442 "Offcore": "1", 5443 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5444 "SampleAfterValue": "100003", 5445 "UMask": "0x1" 5446 }, 5447 { 5448 "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 5449 "Counter": "0,1,2,3", 5450 "CounterHTOff": "0,1,2,3", 5451 "EventCode": "0xB7, 0xBB", 5452 "EventName": "OCR.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 5453 "MSRIndex": "0x1a6,0x1a7", 5454 "MSRValue": "0x0810000020", 5455 "Offcore": "1", 5456 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5457 "SampleAfterValue": "100003", 5458 "UMask": "0x1" 5459 }, 5460 { 5461 "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_MISS.REMOTE_HIT_FORWARD", 5462 "Counter": "0,1,2,3", 5463 "CounterHTOff": "0,1,2,3", 5464 "EventCode": "0xB7, 0xBB", 5465 "EventName": "OCR.PF_L3_DATA_RD.L3_MISS.REMOTE_HIT_FORWARD", 5466 "MSRIndex": "0x1a6,0x1a7", 5467 "MSRValue": "0x083FC00080", 5468 "Offcore": "1", 5469 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5470 "SampleAfterValue": "100003", 5471 "UMask": "0x1" 5472 }, 5473 { 5474 "BriefDescription": "Counts all demand code reads", 5475 "Counter": "0,1,2,3", 5476 "CounterHTOff": "0,1,2,3", 5477 "EventCode": "0xB7, 0xBB", 5478 "EventName": "OCR.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 5479 "MSRIndex": "0x1a6,0x1a7", 5480 "MSRValue": "0x0210000004", 5481 "Offcore": "1", 5482 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5483 "SampleAfterValue": "100003", 5484 "UMask": "0x1" 5485 }, 5486 { 5487 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 5488 "Counter": "0,1,2,3", 5489 "CounterHTOff": "0,1,2,3", 5490 "Deprecated": "1", 5491 "EventCode": "0xB7, 0xBB", 5492 "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 5493 "MSRIndex": "0x1a6,0x1a7", 5494 "MSRValue": "0x0104000080", 5495 "Offcore": "1", 5496 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5497 "SampleAfterValue": "100003", 5498 "UMask": "0x1" 5499 }, 5500 { 5501 "BriefDescription": "OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 5502 "Counter": "0,1,2,3", 5503 "CounterHTOff": "0,1,2,3", 5504 "EventCode": "0xB7, 0xBB", 5505 "EventName": "OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 5506 "MSRIndex": "0x1a6,0x1a7", 5507 "MSRValue": "0x0210000122", 5508 "Offcore": "1", 5509 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5510 "SampleAfterValue": "100003", 5511 "UMask": "0x1" 5512 }, 5513 { 5514 "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_MISS.SNOOP_NONE", 5515 "Counter": "0,1,2,3", 5516 "CounterHTOff": "0,1,2,3", 5517 "EventCode": "0xB7, 0xBB", 5518 "EventName": "OCR.PF_L3_RFO.L3_MISS.SNOOP_NONE", 5519 "MSRIndex": "0x1a6,0x1a7", 5520 "MSRValue": "0x00BC000100", 5521 "Offcore": "1", 5522 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5523 "SampleAfterValue": "100003", 5524 "UMask": "0x1" 5525 }, 5526 { 5527 "BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 5528 "Counter": "0,1,2,3", 5529 "CounterHTOff": "0,1,2,3", 5530 "EventCode": "0xB7, 0xBB", 5531 "EventName": "OCR.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 5532 "MSRIndex": "0x1a6,0x1a7", 5533 "MSRValue": "0x0810000002", 5534 "Offcore": "1", 5535 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5536 "SampleAfterValue": "100003", 5537 "UMask": "0x1" 5538 }, 5539 { 5540 "BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_MISS.SNOOP_MISS", 5541 "Counter": "0,1,2,3", 5542 "CounterHTOff": "0,1,2,3", 5543 "EventCode": "0xB7, 0xBB", 5544 "EventName": "OCR.DEMAND_DATA_RD.L3_MISS.SNOOP_MISS", 5545 "MSRIndex": "0x1a6,0x1a7", 5546 "MSRValue": "0x023C000001", 5547 "Offcore": "1", 5548 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5549 "SampleAfterValue": "100003", 5550 "UMask": "0x1" 5551 }, 5552 { 5553 "BriefDescription": "Number of times an HLE execution aborted due to various memory events (e.g., read/write capacity and conflicts).", 5554 "Counter": "0,1,2,3", 5555 "CounterHTOff": "0,1,2,3,4,5,6,7", 5556 "EventCode": "0xC8", 5557 "EventName": "HLE_RETIRED.ABORTED_MEM", 5558 "SampleAfterValue": "2000003", 5559 "UMask": "0x8" 5560 }, 5561 { 5562 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 5563 "Counter": "0,1,2,3", 5564 "CounterHTOff": "0,1,2,3", 5565 "Deprecated": "1", 5566 "EventCode": "0xB7, 0xBB", 5567 "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 5568 "MSRIndex": "0x1a6,0x1a7", 5569 "MSRValue": "0x0410000080", 5570 "Offcore": "1", 5571 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5572 "SampleAfterValue": "100003", 5573 "UMask": "0x1" 5574 }, 5575 { 5576 "BriefDescription": "OCR.ALL_RFO.L3_MISS.SNOOP_NONE OCR.ALL_RFO.L3_MISS.SNOOP_NONE", 5577 "Counter": "0,1,2,3", 5578 "CounterHTOff": "0,1,2,3", 5579 "EventCode": "0xB7, 0xBB", 5580 "EventName": "OCR.ALL_RFO.L3_MISS.SNOOP_NONE", 5581 "MSRIndex": "0x1a6,0x1a7", 5582 "MSRValue": "0x00BC000122", 5583 "Offcore": "1", 5584 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5585 "SampleAfterValue": "100003", 5586 "UMask": "0x1" 5587 }, 5588 { 5589 "BriefDescription": "OCR.ALL_PF_RFO.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD OCR.ALL_PF_RFO.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 5590 "Counter": "0,1,2,3", 5591 "CounterHTOff": "0,1,2,3", 5592 "EventCode": "0xB7, 0xBB", 5593 "EventName": "OCR.ALL_PF_RFO.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 5594 "MSRIndex": "0x1a6,0x1a7", 5595 "MSRValue": "0x063B800120", 5596 "Offcore": "1", 5597 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5598 "SampleAfterValue": "100003", 5599 "UMask": "0x1" 5600 }, 5601 { 5602 "BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS.REMOTE_HITM", 5603 "Counter": "0,1,2,3", 5604 "CounterHTOff": "0,1,2,3", 5605 "Deprecated": "1", 5606 "EventCode": "0xB7, 0xBB", 5607 "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS.REMOTE_HITM", 5608 "MSRIndex": "0x1a6,0x1a7", 5609 "MSRValue": "0x103FC08000", 5610 "Offcore": "1", 5611 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5612 "SampleAfterValue": "100003", 5613 "UMask": "0x1" 5614 }, 5615 { 5616 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 5617 "Counter": "0,1,2,3", 5618 "CounterHTOff": "0,1,2,3", 5619 "Deprecated": "1", 5620 "EventCode": "0xB7, 0xBB", 5621 "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 5622 "MSRIndex": "0x1a6,0x1a7", 5623 "MSRValue": "0x3F90000490", 5624 "Offcore": "1", 5625 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5626 "SampleAfterValue": "100003", 5627 "UMask": "0x1" 5628 }, 5629 { 5630 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 5631 "Counter": "0,1,2,3", 5632 "CounterHTOff": "0,1,2,3", 5633 "Deprecated": "1", 5634 "EventCode": "0xB7, 0xBB", 5635 "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 5636 "MSRIndex": "0x1a6,0x1a7", 5637 "MSRValue": "0x0410000004", 5638 "Offcore": "1", 5639 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5640 "SampleAfterValue": "100003", 5641 "UMask": "0x1" 5642 }, 5643 { 5644 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS.SNOOP_MISS", 5645 "Counter": "0,1,2,3", 5646 "CounterHTOff": "0,1,2,3", 5647 "Deprecated": "1", 5648 "EventCode": "0xB7, 0xBB", 5649 "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS.SNOOP_MISS", 5650 "MSRIndex": "0x1a6,0x1a7", 5651 "MSRValue": "0x023C000002", 5652 "Offcore": "1", 5653 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5654 "SampleAfterValue": "100003", 5655 "UMask": "0x1" 5656 }, 5657 { 5658 "BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 5659 "Counter": "0,1,2,3", 5660 "CounterHTOff": "0,1,2,3", 5661 "EventCode": "0xB7, 0xBB", 5662 "EventName": "OCR.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 5663 "MSRIndex": "0x1a6,0x1a7", 5664 "MSRValue": "0x0804000010", 5665 "Offcore": "1", 5666 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5667 "SampleAfterValue": "100003", 5668 "UMask": "0x1" 5669 }, 5670 { 5671 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 5672 "Counter": "0,1,2,3", 5673 "CounterHTOff": "0,1,2,3", 5674 "Deprecated": "1", 5675 "EventCode": "0xB7, 0xBB", 5676 "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 5677 "MSRIndex": "0x1a6,0x1a7", 5678 "MSRValue": "0x0104000491", 5679 "Offcore": "1", 5680 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5681 "SampleAfterValue": "100003", 5682 "UMask": "0x1" 5683 }, 5684 { 5685 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 5686 "Counter": "0,1,2,3", 5687 "CounterHTOff": "0,1,2,3", 5688 "Deprecated": "1", 5689 "EventCode": "0xB7, 0xBB", 5690 "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 5691 "MSRIndex": "0x1a6,0x1a7", 5692 "MSRValue": "0x0090000010", 5693 "Offcore": "1", 5694 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5695 "SampleAfterValue": "100003", 5696 "UMask": "0x1" 5697 }, 5698 { 5699 "BriefDescription": "Counts any other requests OCR.OTHER.L3_MISS.HIT_OTHER_CORE_NO_FWD OCR.OTHER.L3_MISS.HIT_OTHER_CORE_NO_FWD", 5700 "Counter": "0,1,2,3", 5701 "CounterHTOff": "0,1,2,3", 5702 "EventCode": "0xB7, 0xBB", 5703 "EventName": "OCR.OTHER.L3_MISS.HIT_OTHER_CORE_NO_FWD", 5704 "MSRIndex": "0x1a6,0x1a7", 5705 "MSRValue": "0x043C008000", 5706 "Offcore": "1", 5707 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5708 "SampleAfterValue": "100003", 5709 "UMask": "0x1" 5710 }, 5711 { 5712 "BriefDescription": "Counts any other requests", 5713 "Counter": "0,1,2,3", 5714 "CounterHTOff": "0,1,2,3", 5715 "EventCode": "0xB7, 0xBB", 5716 "EventName": "OCR.OTHER.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 5717 "MSRIndex": "0x1a6,0x1a7", 5718 "MSRValue": "0x0210008000", 5719 "Offcore": "1", 5720 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5721 "SampleAfterValue": "100003", 5722 "UMask": "0x1" 5723 }, 5724 { 5725 "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads", 5726 "Counter": "0,1,2,3", 5727 "CounterHTOff": "0,1,2,3", 5728 "EventCode": "0xB7, 0xBB", 5729 "EventName": "OCR.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 5730 "MSRIndex": "0x1a6,0x1a7", 5731 "MSRValue": "0x0084000080", 5732 "Offcore": "1", 5733 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5734 "SampleAfterValue": "100003", 5735 "UMask": "0x1" 5736 }, 5737 { 5738 "BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_MISS.REMOTE_HIT_FORWARD", 5739 "Counter": "0,1,2,3", 5740 "CounterHTOff": "0,1,2,3", 5741 "EventCode": "0xB7, 0xBB", 5742 "EventName": "OCR.DEMAND_DATA_RD.L3_MISS.REMOTE_HIT_FORWARD", 5743 "MSRIndex": "0x1a6,0x1a7", 5744 "MSRValue": "0x083FC00001", 5745 "Offcore": "1", 5746 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5747 "SampleAfterValue": "100003", 5748 "UMask": "0x1" 5749 }, 5750 { 5751 "BriefDescription": "OCR.ALL_READS.L3_MISS.SNOOP_NONE OCR.ALL_READS.L3_MISS.SNOOP_NONE", 5752 "Counter": "0,1,2,3", 5753 "CounterHTOff": "0,1,2,3", 5754 "EventCode": "0xB7, 0xBB", 5755 "EventName": "OCR.ALL_READS.L3_MISS.SNOOP_NONE", 5756 "MSRIndex": "0x1a6,0x1a7", 5757 "MSRValue": "0x00BC0007F7", 5758 "Offcore": "1", 5759 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5760 "SampleAfterValue": "100003", 5761 "UMask": "0x1" 5762 }, 5763 { 5764 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 5765 "Counter": "0,1,2,3", 5766 "CounterHTOff": "0,1,2,3", 5767 "Deprecated": "1", 5768 "EventCode": "0xB7, 0xBB", 5769 "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 5770 "MSRIndex": "0x1a6,0x1a7", 5771 "MSRValue": "0x0110000491", 5772 "Offcore": "1", 5773 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5774 "SampleAfterValue": "100003", 5775 "UMask": "0x1" 5776 }, 5777 { 5778 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS.ANY_SNOOP", 5779 "Counter": "0,1,2,3", 5780 "CounterHTOff": "0,1,2,3", 5781 "Deprecated": "1", 5782 "EventCode": "0xB7, 0xBB", 5783 "EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS.ANY_SNOOP", 5784 "MSRIndex": "0x1a6,0x1a7", 5785 "MSRValue": "0x3FBC0007F7", 5786 "Offcore": "1", 5787 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5788 "SampleAfterValue": "100003", 5789 "UMask": "0x1" 5790 }, 5791 { 5792 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 5793 "Counter": "0,1,2,3", 5794 "CounterHTOff": "0,1,2,3", 5795 "Deprecated": "1", 5796 "EventCode": "0xB7, 0xBB", 5797 "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 5798 "MSRIndex": "0x1a6,0x1a7", 5799 "MSRValue": "0x0410000491", 5800 "Offcore": "1", 5801 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5802 "SampleAfterValue": "100003", 5803 "UMask": "0x1" 5804 }, 5805 { 5806 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS.REMOTE_HITM", 5807 "Counter": "0,1,2,3", 5808 "CounterHTOff": "0,1,2,3", 5809 "Deprecated": "1", 5810 "EventCode": "0xB7, 0xBB", 5811 "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS.REMOTE_HITM", 5812 "MSRIndex": "0x1a6,0x1a7", 5813 "MSRValue": "0x103FC00001", 5814 "Offcore": "1", 5815 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5816 "SampleAfterValue": "100003", 5817 "UMask": "0x1" 5818 }, 5819 { 5820 "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 5821 "Counter": "0,1,2,3", 5822 "CounterHTOff": "0,1,2,3", 5823 "EventCode": "0xB7, 0xBB", 5824 "EventName": "OCR.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 5825 "MSRIndex": "0x1a6,0x1a7", 5826 "MSRValue": "0x0110000020", 5827 "Offcore": "1", 5828 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5829 "SampleAfterValue": "100003", 5830 "UMask": "0x1" 5831 }, 5832 { 5833 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 5834 "Counter": "0,1,2,3", 5835 "CounterHTOff": "0,1,2,3", 5836 "Deprecated": "1", 5837 "EventCode": "0xB7, 0xBB", 5838 "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 5839 "MSRIndex": "0x1a6,0x1a7", 5840 "MSRValue": "0x0410000001", 5841 "Offcore": "1", 5842 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5843 "SampleAfterValue": "100003", 5844 "UMask": "0x1" 5845 }, 5846 { 5847 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 5848 "Counter": "0,1,2,3", 5849 "CounterHTOff": "0,1,2,3", 5850 "Deprecated": "1", 5851 "EventCode": "0xB7, 0xBB", 5852 "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 5853 "MSRIndex": "0x1a6,0x1a7", 5854 "MSRValue": "0x0404000491", 5855 "Offcore": "1", 5856 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5857 "SampleAfterValue": "100003", 5858 "UMask": "0x1" 5859 }, 5860 { 5861 "BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 5862 "Counter": "0,1,2,3", 5863 "CounterHTOff": "0,1,2,3", 5864 "EventCode": "0xB7, 0xBB", 5865 "EventName": "OCR.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 5866 "MSRIndex": "0x1a6,0x1a7", 5867 "MSRValue": "0x1004000010", 5868 "Offcore": "1", 5869 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5870 "SampleAfterValue": "100003", 5871 "UMask": "0x1" 5872 }, 5873 { 5874 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 5875 "Counter": "0,1,2,3", 5876 "CounterHTOff": "0,1,2,3", 5877 "Deprecated": "1", 5878 "EventCode": "0xB7, 0xBB", 5879 "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 5880 "MSRIndex": "0x1a6,0x1a7", 5881 "MSRValue": "0x0804000491", 5882 "Offcore": "1", 5883 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5884 "SampleAfterValue": "100003", 5885 "UMask": "0x1" 5886 }, 5887 { 5888 "BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 5889 "Counter": "0,1,2,3", 5890 "CounterHTOff": "0,1,2,3", 5891 "Deprecated": "1", 5892 "EventCode": "0xB7, 0xBB", 5893 "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 5894 "MSRIndex": "0x1a6,0x1a7", 5895 "MSRValue": "0x0084008000", 5896 "Offcore": "1", 5897 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5898 "SampleAfterValue": "100003", 5899 "UMask": "0x1" 5900 }, 5901 { 5902 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 5903 "Counter": "0,1,2,3", 5904 "CounterHTOff": "0,1,2,3", 5905 "Deprecated": "1", 5906 "EventCode": "0xB7, 0xBB", 5907 "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 5908 "MSRIndex": "0x1a6,0x1a7", 5909 "MSRValue": "0x0104000020", 5910 "Offcore": "1", 5911 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5912 "SampleAfterValue": "100003", 5913 "UMask": "0x1" 5914 }, 5915 { 5916 "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 5917 "Counter": "0,1,2,3", 5918 "CounterHTOff": "0,1,2,3", 5919 "EventCode": "0xB7, 0xBB", 5920 "EventName": "OCR.PF_L2_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 5921 "MSRIndex": "0x1a6,0x1a7", 5922 "MSRValue": "0x3F84000020", 5923 "Offcore": "1", 5924 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5925 "SampleAfterValue": "100003", 5926 "UMask": "0x1" 5927 }, 5928 { 5929 "BriefDescription": "OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 5930 "Counter": "0,1,2,3", 5931 "CounterHTOff": "0,1,2,3", 5932 "EventCode": "0xB7, 0xBB", 5933 "EventName": "OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 5934 "MSRIndex": "0x1a6,0x1a7", 5935 "MSRValue": "0x0604000120", 5936 "Offcore": "1", 5937 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5938 "SampleAfterValue": "100003", 5939 "UMask": "0x1" 5940 }, 5941 { 5942 "BriefDescription": "OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 5943 "Counter": "0,1,2,3", 5944 "CounterHTOff": "0,1,2,3", 5945 "EventCode": "0xB7, 0xBB", 5946 "EventName": "OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 5947 "MSRIndex": "0x1a6,0x1a7", 5948 "MSRValue": "0x0090000120", 5949 "Offcore": "1", 5950 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5951 "SampleAfterValue": "100003", 5952 "UMask": "0x1" 5953 }, 5954 { 5955 "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_MISS.REMOTE_HIT_FORWARD", 5956 "Counter": "0,1,2,3", 5957 "CounterHTOff": "0,1,2,3", 5958 "EventCode": "0xB7, 0xBB", 5959 "EventName": "OCR.PF_L3_RFO.L3_MISS.REMOTE_HIT_FORWARD", 5960 "MSRIndex": "0x1a6,0x1a7", 5961 "MSRValue": "0x083FC00100", 5962 "Offcore": "1", 5963 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5964 "SampleAfterValue": "100003", 5965 "UMask": "0x1" 5966 }, 5967 { 5968 "BriefDescription": "OCR.ALL_DATA_RD.L3_MISS.SNOOP_MISS OCR.ALL_DATA_RD.L3_MISS.SNOOP_MISS", 5969 "Counter": "0,1,2,3", 5970 "CounterHTOff": "0,1,2,3", 5971 "EventCode": "0xB7, 0xBB", 5972 "EventName": "OCR.ALL_DATA_RD.L3_MISS.SNOOP_MISS", 5973 "MSRIndex": "0x1a6,0x1a7", 5974 "MSRValue": "0x023C000491", 5975 "Offcore": "1", 5976 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5977 "SampleAfterValue": "100003", 5978 "UMask": "0x1" 5979 }, 5980 { 5981 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 5982 "Counter": "0,1,2,3", 5983 "CounterHTOff": "0,1,2,3", 5984 "Deprecated": "1", 5985 "EventCode": "0xB7, 0xBB", 5986 "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 5987 "MSRIndex": "0x1a6,0x1a7", 5988 "MSRValue": "0x063B800020", 5989 "Offcore": "1", 5990 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5991 "SampleAfterValue": "100003", 5992 "UMask": "0x1" 5993 }, 5994 { 5995 "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD OCR.ALL_PF_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD OCR.ALL_PF_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD", 5996 "Counter": "0,1,2,3", 5997 "CounterHTOff": "0,1,2,3", 5998 "EventCode": "0xB7, 0xBB", 5999 "EventName": "OCR.ALL_PF_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD", 6000 "MSRIndex": "0x1a6,0x1a7", 6001 "MSRValue": "0x043C000490", 6002 "Offcore": "1", 6003 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6004 "SampleAfterValue": "100003", 6005 "UMask": "0x1" 6006 }, 6007 { 6008 "BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 6009 "Counter": "0,1,2,3", 6010 "CounterHTOff": "0,1,2,3", 6011 "EventCode": "0xB7, 0xBB", 6012 "EventName": "OCR.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 6013 "MSRIndex": "0x1a6,0x1a7", 6014 "MSRValue": "0x0104000004", 6015 "Offcore": "1", 6016 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6017 "SampleAfterValue": "100003", 6018 "UMask": "0x1" 6019 }, 6020 { 6021 "BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 6022 "Counter": "0,1,2,3", 6023 "CounterHTOff": "0,1,2,3", 6024 "EventCode": "0xB7, 0xBB", 6025 "EventName": "OCR.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 6026 "MSRIndex": "0x1a6,0x1a7", 6027 "MSRValue": "0x0404000001", 6028 "Offcore": "1", 6029 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6030 "SampleAfterValue": "100003", 6031 "UMask": "0x1" 6032 }, 6033 { 6034 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS.ANY_SNOOP", 6035 "Counter": "0,1,2,3", 6036 "CounterHTOff": "0,1,2,3", 6037 "Deprecated": "1", 6038 "EventCode": "0xB7, 0xBB", 6039 "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS.ANY_SNOOP", 6040 "MSRIndex": "0x1a6,0x1a7", 6041 "MSRValue": "0x3FBC000080", 6042 "Offcore": "1", 6043 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6044 "SampleAfterValue": "100003", 6045 "UMask": "0x1" 6046 }, 6047 { 6048 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 6049 "Counter": "0,1,2,3", 6050 "CounterHTOff": "0,1,2,3", 6051 "Deprecated": "1", 6052 "EventCode": "0xB7, 0xBB", 6053 "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 6054 "MSRIndex": "0x1a6,0x1a7", 6055 "MSRValue": "0x1004000122", 6056 "Offcore": "1", 6057 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6058 "SampleAfterValue": "100003", 6059 "UMask": "0x1" 6060 }, 6061 { 6062 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 6063 "Counter": "0,1,2,3", 6064 "CounterHTOff": "0,1,2,3", 6065 "Deprecated": "1", 6066 "EventCode": "0xB7, 0xBB", 6067 "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 6068 "MSRIndex": "0x1a6,0x1a7", 6069 "MSRValue": "0x0804000020", 6070 "Offcore": "1", 6071 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6072 "SampleAfterValue": "100003", 6073 "UMask": "0x1" 6074 }, 6075 { 6076 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 6077 "Counter": "0,1,2,3", 6078 "CounterHTOff": "0,1,2,3", 6079 "Deprecated": "1", 6080 "EventCode": "0xB7, 0xBB", 6081 "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 6082 "MSRIndex": "0x1a6,0x1a7", 6083 "MSRValue": "0x1010000001", 6084 "Offcore": "1", 6085 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6086 "SampleAfterValue": "100003", 6087 "UMask": "0x1" 6088 }, 6089 { 6090 "BriefDescription": "OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 6091 "Counter": "0,1,2,3", 6092 "CounterHTOff": "0,1,2,3", 6093 "EventCode": "0xB7, 0xBB", 6094 "EventName": "OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 6095 "MSRIndex": "0x1a6,0x1a7", 6096 "MSRValue": "0x0404000122", 6097 "Offcore": "1", 6098 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6099 "SampleAfterValue": "100003", 6100 "UMask": "0x1" 6101 }, 6102 { 6103 "BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS.SNOOP_NONE", 6104 "Counter": "0,1,2,3", 6105 "CounterHTOff": "0,1,2,3", 6106 "Deprecated": "1", 6107 "EventCode": "0xB7, 0xBB", 6108 "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS.SNOOP_NONE", 6109 "MSRIndex": "0x1a6,0x1a7", 6110 "MSRValue": "0x00BC008000", 6111 "Offcore": "1", 6112 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6113 "SampleAfterValue": "100003", 6114 "UMask": "0x1" 6115 }, 6116 { 6117 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS.SNOOP_NONE", 6118 "Counter": "0,1,2,3", 6119 "CounterHTOff": "0,1,2,3", 6120 "Deprecated": "1", 6121 "EventCode": "0xB7, 0xBB", 6122 "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS.SNOOP_NONE", 6123 "MSRIndex": "0x1a6,0x1a7", 6124 "MSRValue": "0x00BC000491", 6125 "Offcore": "1", 6126 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6127 "SampleAfterValue": "100003", 6128 "UMask": "0x1" 6129 }, 6130 { 6131 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS.NO_SNOOP_NEEDED", 6132 "Counter": "0,1,2,3", 6133 "CounterHTOff": "0,1,2,3", 6134 "Deprecated": "1", 6135 "EventCode": "0xB7, 0xBB", 6136 "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS.NO_SNOOP_NEEDED", 6137 "MSRIndex": "0x1a6,0x1a7", 6138 "MSRValue": "0x013C000120", 6139 "Offcore": "1", 6140 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6141 "SampleAfterValue": "100003", 6142 "UMask": "0x1" 6143 }, 6144 { 6145 "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs", 6146 "Counter": "0,1,2,3", 6147 "CounterHTOff": "0,1,2,3", 6148 "EventCode": "0xB7, 0xBB", 6149 "EventName": "OCR.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 6150 "MSRIndex": "0x1a6,0x1a7", 6151 "MSRValue": "0x0210000020", 6152 "Offcore": "1", 6153 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6154 "SampleAfterValue": "100003", 6155 "UMask": "0x1" 6156 }, 6157 { 6158 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 6159 "Counter": "0,1,2,3", 6160 "CounterHTOff": "0,1,2,3", 6161 "Deprecated": "1", 6162 "EventCode": "0xB7, 0xBB", 6163 "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 6164 "MSRIndex": "0x1a6,0x1a7", 6165 "MSRValue": "0x0110000080", 6166 "Offcore": "1", 6167 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6168 "SampleAfterValue": "100003", 6169 "UMask": "0x1" 6170 }, 6171 { 6172 "BriefDescription": "OCR.ALL_PF_RFO.L3_MISS.HITM_OTHER_CORE OCR.ALL_PF_RFO.L3_MISS.HITM_OTHER_CORE OCR.ALL_PF_RFO.L3_MISS.HITM_OTHER_CORE", 6173 "Counter": "0,1,2,3", 6174 "CounterHTOff": "0,1,2,3", 6175 "EventCode": "0xB7, 0xBB", 6176 "EventName": "OCR.ALL_PF_RFO.L3_MISS.HITM_OTHER_CORE", 6177 "MSRIndex": "0x1a6,0x1a7", 6178 "MSRValue": "0x103C000120", 6179 "Offcore": "1", 6180 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6181 "SampleAfterValue": "100003", 6182 "UMask": "0x1" 6183 }, 6184 { 6185 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS.HITM_OTHER_CORE", 6186 "Counter": "0,1,2,3", 6187 "CounterHTOff": "0,1,2,3", 6188 "Deprecated": "1", 6189 "EventCode": "0xB7, 0xBB", 6190 "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS.HITM_OTHER_CORE", 6191 "MSRIndex": "0x1a6,0x1a7", 6192 "MSRValue": "0x103C000120", 6193 "Offcore": "1", 6194 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6195 "SampleAfterValue": "100003", 6196 "UMask": "0x1" 6197 }, 6198 { 6199 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS.SNOOP_NONE", 6200 "Counter": "0,1,2,3", 6201 "CounterHTOff": "0,1,2,3", 6202 "Deprecated": "1", 6203 "EventCode": "0xB7, 0xBB", 6204 "EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS.SNOOP_NONE", 6205 "MSRIndex": "0x1a6,0x1a7", 6206 "MSRValue": "0x00BC000400", 6207 "Offcore": "1", 6208 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6209 "SampleAfterValue": "100003", 6210 "UMask": "0x1" 6211 }, 6212 { 6213 "BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 6214 "Counter": "0,1,2,3", 6215 "CounterHTOff": "0,1,2,3", 6216 "EventCode": "0xB7, 0xBB", 6217 "EventName": "OCR.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 6218 "MSRIndex": "0x1a6,0x1a7", 6219 "MSRValue": "0x0110000001", 6220 "Offcore": "1", 6221 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6222 "SampleAfterValue": "100003", 6223 "UMask": "0x1" 6224 }, 6225 { 6226 "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_MISS.ANY_SNOOP OCR.PF_L2_RFO.L3_MISS.ANY_SNOOP", 6227 "Counter": "0,1,2,3", 6228 "CounterHTOff": "0,1,2,3", 6229 "EventCode": "0xB7, 0xBB", 6230 "EventName": "OCR.PF_L2_RFO.L3_MISS.ANY_SNOOP", 6231 "MSRIndex": "0x1a6,0x1a7", 6232 "MSRValue": "0x3FBC000020", 6233 "Offcore": "1", 6234 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6235 "SampleAfterValue": "100003", 6236 "UMask": "0x1" 6237 }, 6238 { 6239 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS.SNOOP_NONE", 6240 "Counter": "0,1,2,3", 6241 "CounterHTOff": "0,1,2,3", 6242 "Deprecated": "1", 6243 "EventCode": "0xB7, 0xBB", 6244 "EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS.SNOOP_NONE", 6245 "MSRIndex": "0x1a6,0x1a7", 6246 "MSRValue": "0x00BC0007F7", 6247 "Offcore": "1", 6248 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6249 "SampleAfterValue": "100003", 6250 "UMask": "0x1" 6251 }, 6252 { 6253 "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_MISS.SNOOP_MISS", 6254 "Counter": "0,1,2,3", 6255 "CounterHTOff": "0,1,2,3", 6256 "EventCode": "0xB7, 0xBB", 6257 "EventName": "OCR.PF_L2_RFO.L3_MISS.SNOOP_MISS", 6258 "MSRIndex": "0x1a6,0x1a7", 6259 "MSRValue": "0x023C000020", 6260 "Offcore": "1", 6261 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6262 "SampleAfterValue": "100003", 6263 "UMask": "0x1" 6264 }, 6265 { 6266 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 6267 "Counter": "0,1,2,3", 6268 "CounterHTOff": "0,1,2,3", 6269 "Deprecated": "1", 6270 "EventCode": "0xB7, 0xBB", 6271 "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 6272 "MSRIndex": "0x1a6,0x1a7", 6273 "MSRValue": "0x0104000001", 6274 "Offcore": "1", 6275 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6276 "SampleAfterValue": "100003", 6277 "UMask": "0x1" 6278 }, 6279 { 6280 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD", 6281 "Counter": "0,1,2,3", 6282 "CounterHTOff": "0,1,2,3", 6283 "Deprecated": "1", 6284 "EventCode": "0xB7, 0xBB", 6285 "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD", 6286 "MSRIndex": "0x1a6,0x1a7", 6287 "MSRValue": "0x043C000100", 6288 "Offcore": "1", 6289 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6290 "SampleAfterValue": "100003", 6291 "UMask": "0x1" 6292 }, 6293 { 6294 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS.SNOOP_MISS", 6295 "Counter": "0,1,2,3", 6296 "CounterHTOff": "0,1,2,3", 6297 "Deprecated": "1", 6298 "EventCode": "0xB7, 0xBB", 6299 "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS.SNOOP_MISS", 6300 "MSRIndex": "0x1a6,0x1a7", 6301 "MSRValue": "0x023C000001", 6302 "Offcore": "1", 6303 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6304 "SampleAfterValue": "100003", 6305 "UMask": "0x1" 6306 }, 6307 { 6308 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD", 6309 "Counter": "0,1,2,3", 6310 "CounterHTOff": "0,1,2,3", 6311 "Deprecated": "1", 6312 "EventCode": "0xB7, 0xBB", 6313 "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD", 6314 "MSRIndex": "0x1a6,0x1a7", 6315 "MSRValue": "0x043C000080", 6316 "Offcore": "1", 6317 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6318 "SampleAfterValue": "100003", 6319 "UMask": "0x1" 6320 }, 6321 { 6322 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS.HIT_OTHER_CORE_FWD", 6323 "Counter": "0,1,2,3", 6324 "CounterHTOff": "0,1,2,3", 6325 "Deprecated": "1", 6326 "EventCode": "0xB7, 0xBB", 6327 "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS.HIT_OTHER_CORE_FWD", 6328 "MSRIndex": "0x1a6,0x1a7", 6329 "MSRValue": "0x083C000004", 6330 "Offcore": "1", 6331 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6332 "SampleAfterValue": "100003", 6333 "UMask": "0x1" 6334 }, 6335 { 6336 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 6337 "Counter": "0,1,2,3", 6338 "CounterHTOff": "0,1,2,3", 6339 "Deprecated": "1", 6340 "EventCode": "0xB7, 0xBB", 6341 "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 6342 "MSRIndex": "0x1a6,0x1a7", 6343 "MSRValue": "0x0404000001", 6344 "Offcore": "1", 6345 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6346 "SampleAfterValue": "100003", 6347 "UMask": "0x1" 6348 }, 6349 { 6350 "BriefDescription": "OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 6351 "Counter": "0,1,2,3", 6352 "CounterHTOff": "0,1,2,3", 6353 "EventCode": "0xB7, 0xBB", 6354 "EventName": "OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 6355 "MSRIndex": "0x1a6,0x1a7", 6356 "MSRValue": "0x3F90000491", 6357 "Offcore": "1", 6358 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6359 "SampleAfterValue": "100003", 6360 "UMask": "0x1" 6361 }, 6362 { 6363 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD", 6364 "Counter": "0,1,2,3", 6365 "CounterHTOff": "0,1,2,3", 6366 "Deprecated": "1", 6367 "EventCode": "0xB7, 0xBB", 6368 "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD", 6369 "MSRIndex": "0x1a6,0x1a7", 6370 "MSRValue": "0x043C000122", 6371 "Offcore": "1", 6372 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6373 "SampleAfterValue": "100003", 6374 "UMask": "0x1" 6375 }, 6376 { 6377 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 6378 "Counter": "0,1,2,3", 6379 "CounterHTOff": "0,1,2,3", 6380 "Deprecated": "1", 6381 "EventCode": "0xB7, 0xBB", 6382 "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 6383 "MSRIndex": "0x1a6,0x1a7", 6384 "MSRValue": "0x0110000020", 6385 "Offcore": "1", 6386 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6387 "SampleAfterValue": "100003", 6388 "UMask": "0x1" 6389 }, 6390 { 6391 "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 6392 "Counter": "0,1,2,3", 6393 "CounterHTOff": "0,1,2,3", 6394 "EventCode": "0xB7, 0xBB", 6395 "EventName": "OCR.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 6396 "MSRIndex": "0x1a6,0x1a7", 6397 "MSRValue": "0x1004000400", 6398 "Offcore": "1", 6399 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6400 "SampleAfterValue": "100003", 6401 "UMask": "0x1" 6402 }, 6403 { 6404 "BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_MISS.SNOOP_NONE", 6405 "Counter": "0,1,2,3", 6406 "CounterHTOff": "0,1,2,3", 6407 "EventCode": "0xB7, 0xBB", 6408 "EventName": "OCR.DEMAND_RFO.L3_MISS.SNOOP_NONE", 6409 "MSRIndex": "0x1a6,0x1a7", 6410 "MSRValue": "0x00BC000002", 6411 "Offcore": "1", 6412 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6413 "SampleAfterValue": "100003", 6414 "UMask": "0x1" 6415 }, 6416 { 6417 "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 6418 "Counter": "0,1,2,3", 6419 "CounterHTOff": "0,1,2,3", 6420 "EventCode": "0xB7, 0xBB", 6421 "EventName": "OCR.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 6422 "MSRIndex": "0x1a6,0x1a7", 6423 "MSRValue": "0x1010000020", 6424 "Offcore": "1", 6425 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6426 "SampleAfterValue": "100003", 6427 "UMask": "0x1" 6428 }, 6429 { 6430 "BriefDescription": "OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 6431 "Counter": "0,1,2,3", 6432 "CounterHTOff": "0,1,2,3", 6433 "EventCode": "0xB7, 0xBB", 6434 "EventName": "OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 6435 "MSRIndex": "0x1a6,0x1a7", 6436 "MSRValue": "0x0110000120", 6437 "Offcore": "1", 6438 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6439 "SampleAfterValue": "100003", 6440 "UMask": "0x1" 6441 }, 6442 { 6443 "BriefDescription": "Counts any other requests OCR.OTHER.L3_MISS.HITM_OTHER_CORE OCR.OTHER.L3_MISS.HITM_OTHER_CORE", 6444 "Counter": "0,1,2,3", 6445 "CounterHTOff": "0,1,2,3", 6446 "EventCode": "0xB7, 0xBB", 6447 "EventName": "OCR.OTHER.L3_MISS.HITM_OTHER_CORE", 6448 "MSRIndex": "0x1a6,0x1a7", 6449 "MSRValue": "0x103C008000", 6450 "Offcore": "1", 6451 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6452 "SampleAfterValue": "100003", 6453 "UMask": "0x1" 6454 }, 6455 { 6456 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 6457 "Counter": "0,1,2,3", 6458 "CounterHTOff": "0,1,2,3", 6459 "Deprecated": "1", 6460 "EventCode": "0xB7, 0xBB", 6461 "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 6462 "MSRIndex": "0x1a6,0x1a7", 6463 "MSRValue": "0x0804000004", 6464 "Offcore": "1", 6465 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6466 "SampleAfterValue": "100003", 6467 "UMask": "0x1" 6468 }, 6469 { 6470 "BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 6471 "Counter": "0,1,2,3", 6472 "CounterHTOff": "0,1,2,3", 6473 "Deprecated": "1", 6474 "EventCode": "0xB7, 0xBB", 6475 "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 6476 "MSRIndex": "0x1a6,0x1a7", 6477 "MSRValue": "0x0104008000", 6478 "Offcore": "1", 6479 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6480 "SampleAfterValue": "100003", 6481 "UMask": "0x1" 6482 }, 6483 { 6484 "BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 256 cycles.", 6485 "Counter": "0,1,2,3", 6486 "CounterHTOff": "0,1,2,3", 6487 "Data_LA": "1", 6488 "EventCode": "0xcd", 6489 "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_256", 6490 "MSRIndex": "0x3F6", 6491 "MSRValue": "0x100", 6492 "PEBS": "2", 6493 "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 256 cycles. Reported latency may be longer than just the memory latency.", 6494 "SampleAfterValue": "503", 6495 "TakenAlone": "1", 6496 "UMask": "0x1" 6497 }, 6498 { 6499 "BriefDescription": "Counts all demand code reads", 6500 "Counter": "0,1,2,3", 6501 "CounterHTOff": "0,1,2,3", 6502 "EventCode": "0xB7, 0xBB", 6503 "EventName": "OCR.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 6504 "MSRIndex": "0x1a6,0x1a7", 6505 "MSRValue": "0x0204000004", 6506 "Offcore": "1", 6507 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6508 "SampleAfterValue": "100003", 6509 "UMask": "0x1" 6510 }, 6511 { 6512 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 6513 "Counter": "0,1,2,3", 6514 "CounterHTOff": "0,1,2,3", 6515 "Deprecated": "1", 6516 "EventCode": "0xB7, 0xBB", 6517 "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 6518 "MSRIndex": "0x1a6,0x1a7", 6519 "MSRValue": "0x0810000100", 6520 "Offcore": "1", 6521 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6522 "SampleAfterValue": "100003", 6523 "UMask": "0x1" 6524 }, 6525 { 6526 "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs", 6527 "Counter": "0,1,2,3", 6528 "CounterHTOff": "0,1,2,3", 6529 "EventCode": "0xB7, 0xBB", 6530 "EventName": "OCR.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 6531 "MSRIndex": "0x1a6,0x1a7", 6532 "MSRValue": "0x0210000100", 6533 "Offcore": "1", 6534 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6535 "SampleAfterValue": "100003", 6536 "UMask": "0x1" 6537 }, 6538 { 6539 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 6540 "Counter": "0,1,2,3", 6541 "CounterHTOff": "0,1,2,3", 6542 "Deprecated": "1", 6543 "EventCode": "0xB7, 0xBB", 6544 "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 6545 "MSRIndex": "0x1a6,0x1a7", 6546 "MSRValue": "0x0084000002", 6547 "Offcore": "1", 6548 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6549 "SampleAfterValue": "100003", 6550 "UMask": "0x1" 6551 }, 6552 { 6553 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 6554 "Counter": "0,1,2,3", 6555 "CounterHTOff": "0,1,2,3", 6556 "Deprecated": "1", 6557 "EventCode": "0xB7, 0xBB", 6558 "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 6559 "MSRIndex": "0x1a6,0x1a7", 6560 "MSRValue": "0x063B800004", 6561 "Offcore": "1", 6562 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6563 "SampleAfterValue": "100003", 6564 "UMask": "0x1" 6565 }, 6566 { 6567 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS.NO_SNOOP_NEEDED", 6568 "Counter": "0,1,2,3", 6569 "CounterHTOff": "0,1,2,3", 6570 "Deprecated": "1", 6571 "EventCode": "0xB7, 0xBB", 6572 "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS.NO_SNOOP_NEEDED", 6573 "MSRIndex": "0x1a6,0x1a7", 6574 "MSRValue": "0x013C000080", 6575 "Offcore": "1", 6576 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6577 "SampleAfterValue": "100003", 6578 "UMask": "0x1" 6579 }, 6580 { 6581 "BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 16 cycles.", 6582 "Counter": "0,1,2,3", 6583 "CounterHTOff": "0,1,2,3", 6584 "Data_LA": "1", 6585 "EventCode": "0xcd", 6586 "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_16", 6587 "MSRIndex": "0x3F6", 6588 "MSRValue": "0x10", 6589 "PEBS": "2", 6590 "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 16 cycles. Reported latency may be longer than just the memory latency.", 6591 "SampleAfterValue": "20011", 6592 "TakenAlone": "1", 6593 "UMask": "0x1" 6594 }, 6595 { 6596 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS.HIT_OTHER_CORE_FWD", 6597 "Counter": "0,1,2,3", 6598 "CounterHTOff": "0,1,2,3", 6599 "Deprecated": "1", 6600 "EventCode": "0xB7, 0xBB", 6601 "EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS.HIT_OTHER_CORE_FWD", 6602 "MSRIndex": "0x1a6,0x1a7", 6603 "MSRValue": "0x083C000400", 6604 "Offcore": "1", 6605 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6606 "SampleAfterValue": "100003", 6607 "UMask": "0x1" 6608 }, 6609 { 6610 "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs", 6611 "Counter": "0,1,2,3", 6612 "CounterHTOff": "0,1,2,3", 6613 "EventCode": "0xB7, 0xBB", 6614 "EventName": "OCR.PF_L2_RFO.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 6615 "MSRIndex": "0x1a6,0x1a7", 6616 "MSRValue": "0x0084000020", 6617 "Offcore": "1", 6618 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6619 "SampleAfterValue": "100003", 6620 "UMask": "0x1" 6621 }, 6622 { 6623 "BriefDescription": "Number of times an HLE transactional execution aborted due to an unsupported read alignment from the elision buffer.", 6624 "Counter": "0,1,2,3", 6625 "CounterHTOff": "0,1,2,3,4,5,6,7", 6626 "EventCode": "0x54", 6627 "EventName": "TX_MEM.ABORT_HLE_ELISION_BUFFER_UNSUPPORTED_ALIGNMENT", 6628 "PublicDescription": "Number of times a TSX Abort was triggered due to attempting an unsupported alignment from Lock Buffer.", 6629 "SampleAfterValue": "2000003", 6630 "UMask": "0x20" 6631 }, 6632 { 6633 "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_MISS.SNOOP_MISS", 6634 "Counter": "0,1,2,3", 6635 "CounterHTOff": "0,1,2,3", 6636 "EventCode": "0xB7, 0xBB", 6637 "EventName": "OCR.PF_L3_DATA_RD.L3_MISS.SNOOP_MISS", 6638 "MSRIndex": "0x1a6,0x1a7", 6639 "MSRValue": "0x023C000080", 6640 "Offcore": "1", 6641 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6642 "SampleAfterValue": "100003", 6643 "UMask": "0x1" 6644 }, 6645 { 6646 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 6647 "Counter": "0,1,2,3", 6648 "CounterHTOff": "0,1,2,3", 6649 "Deprecated": "1", 6650 "EventCode": "0xB7, 0xBB", 6651 "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 6652 "MSRIndex": "0x1a6,0x1a7", 6653 "MSRValue": "0x0090000491", 6654 "Offcore": "1", 6655 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6656 "SampleAfterValue": "100003", 6657 "UMask": "0x1" 6658 }, 6659 { 6660 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 6661 "Counter": "0,1,2,3", 6662 "CounterHTOff": "0,1,2,3", 6663 "Deprecated": "1", 6664 "EventCode": "0xB7, 0xBB", 6665 "EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 6666 "MSRIndex": "0x1a6,0x1a7", 6667 "MSRValue": "0x3F84000400", 6668 "Offcore": "1", 6669 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6670 "SampleAfterValue": "100003", 6671 "UMask": "0x1" 6672 }, 6673 { 6674 "BriefDescription": "Counts demand data reads", 6675 "Counter": "0,1,2,3", 6676 "CounterHTOff": "0,1,2,3", 6677 "EventCode": "0xB7, 0xBB", 6678 "EventName": "OCR.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 6679 "MSRIndex": "0x1a6,0x1a7", 6680 "MSRValue": "0x0090000001", 6681 "Offcore": "1", 6682 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6683 "SampleAfterValue": "100003", 6684 "UMask": "0x1" 6685 }, 6686 { 6687 "BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_MISS.SNOOP_NONE", 6688 "Counter": "0,1,2,3", 6689 "CounterHTOff": "0,1,2,3", 6690 "EventCode": "0xB7, 0xBB", 6691 "EventName": "OCR.PF_L2_DATA_RD.L3_MISS.SNOOP_NONE", 6692 "MSRIndex": "0x1a6,0x1a7", 6693 "MSRValue": "0x00BC000010", 6694 "Offcore": "1", 6695 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6696 "SampleAfterValue": "100003", 6697 "UMask": "0x1" 6698 }, 6699 { 6700 "BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 6701 "Counter": "0,1,2,3", 6702 "CounterHTOff": "0,1,2,3", 6703 "EventCode": "0xB7, 0xBB", 6704 "EventName": "OCR.DEMAND_RFO.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 6705 "MSRIndex": "0x1a6,0x1a7", 6706 "MSRValue": "0x1004000002", 6707 "Offcore": "1", 6708 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6709 "SampleAfterValue": "100003", 6710 "UMask": "0x1" 6711 }, 6712 { 6713 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 6714 "Counter": "0,1,2,3", 6715 "CounterHTOff": "0,1,2,3", 6716 "Deprecated": "1", 6717 "EventCode": "0xB7, 0xBB", 6718 "EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 6719 "MSRIndex": "0x1a6,0x1a7", 6720 "MSRValue": "0x063B800400", 6721 "Offcore": "1", 6722 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6723 "SampleAfterValue": "100003", 6724 "UMask": "0x1" 6725 }, 6726 { 6727 "BriefDescription": "Number of times a transactional abort was signaled due to a data capacity limitation for transactional reads or writes.", 6728 "Counter": "0,1,2,3", 6729 "CounterHTOff": "0,1,2,3,4,5,6,7", 6730 "EventCode": "0x54", 6731 "EventName": "TX_MEM.ABORT_CAPACITY", 6732 "SampleAfterValue": "2000003", 6733 "UMask": "0x2" 6734 }, 6735 { 6736 "BriefDescription": "Number of times an HLE execution aborted due to incompatible memory type", 6737 "Counter": "0,1,2,3", 6738 "CounterHTOff": "0,1,2,3,4,5,6,7", 6739 "EventCode": "0xC8", 6740 "EventName": "HLE_RETIRED.ABORTED_MEMTYPE", 6741 "PublicDescription": "Number of times an HLE execution aborted due to incompatible memory type.", 6742 "SampleAfterValue": "2000003", 6743 "UMask": "0x40" 6744 }, 6745 { 6746 "BriefDescription": "Number of times an RTM execution started.", 6747 "Counter": "0,1,2,3", 6748 "CounterHTOff": "0,1,2,3,4,5,6,7", 6749 "EventCode": "0xC9", 6750 "EventName": "RTM_RETIRED.START", 6751 "PublicDescription": "Number of times we entered an RTM region. Does not count nested transactions.", 6752 "SampleAfterValue": "2000003", 6753 "UMask": "0x1" 6754 }, 6755 { 6756 "BriefDescription": "OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 6757 "Counter": "0,1,2,3", 6758 "CounterHTOff": "0,1,2,3", 6759 "EventCode": "0xB7, 0xBB", 6760 "EventName": "OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 6761 "MSRIndex": "0x1a6,0x1a7", 6762 "MSRValue": "0x0804000122", 6763 "Offcore": "1", 6764 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6765 "SampleAfterValue": "100003", 6766 "UMask": "0x1" 6767 }, 6768 { 6769 "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 6770 "Counter": "0,1,2,3", 6771 "CounterHTOff": "0,1,2,3", 6772 "EventCode": "0xB7, 0xBB", 6773 "EventName": "OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 6774 "MSRIndex": "0x1a6,0x1a7", 6775 "MSRValue": "0x0210000490", 6776 "Offcore": "1", 6777 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6778 "SampleAfterValue": "100003", 6779 "UMask": "0x1" 6780 }, 6781 { 6782 "BriefDescription": "Counts any other requests OCR.OTHER.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 6783 "Counter": "0,1,2,3", 6784 "CounterHTOff": "0,1,2,3", 6785 "EventCode": "0xB7, 0xBB", 6786 "EventName": "OCR.OTHER.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 6787 "MSRIndex": "0x1a6,0x1a7", 6788 "MSRValue": "0x0404008000", 6789 "Offcore": "1", 6790 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6791 "SampleAfterValue": "100003", 6792 "UMask": "0x1" 6793 }, 6794 { 6795 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 6796 "Counter": "0,1,2,3", 6797 "CounterHTOff": "0,1,2,3", 6798 "Deprecated": "1", 6799 "EventCode": "0xB7, 0xBB", 6800 "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 6801 "MSRIndex": "0x1a6,0x1a7", 6802 "MSRValue": "0x0210000100", 6803 "Offcore": "1", 6804 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6805 "SampleAfterValue": "100003", 6806 "UMask": "0x1" 6807 }, 6808 { 6809 "BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 6810 "Counter": "0,1,2,3", 6811 "CounterHTOff": "0,1,2,3", 6812 "EventCode": "0xB7, 0xBB", 6813 "EventName": "OCR.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 6814 "MSRIndex": "0x1a6,0x1a7", 6815 "MSRValue": "0x1010000001", 6816 "Offcore": "1", 6817 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6818 "SampleAfterValue": "100003", 6819 "UMask": "0x1" 6820 }, 6821 { 6822 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS.SNOOP_NONE", 6823 "Counter": "0,1,2,3", 6824 "CounterHTOff": "0,1,2,3", 6825 "Deprecated": "1", 6826 "EventCode": "0xB7, 0xBB", 6827 "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS.SNOOP_NONE", 6828 "MSRIndex": "0x1a6,0x1a7", 6829 "MSRValue": "0x00BC000490", 6830 "Offcore": "1", 6831 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6832 "SampleAfterValue": "100003", 6833 "UMask": "0x1" 6834 }, 6835 { 6836 "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 6837 "Counter": "0,1,2,3", 6838 "CounterHTOff": "0,1,2,3", 6839 "EventCode": "0xB7, 0xBB", 6840 "EventName": "OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 6841 "MSRIndex": "0x1a6,0x1a7", 6842 "MSRValue": "0x1010000490", 6843 "Offcore": "1", 6844 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6845 "SampleAfterValue": "100003", 6846 "UMask": "0x1" 6847 }, 6848 { 6849 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 6850 "Counter": "0,1,2,3", 6851 "CounterHTOff": "0,1,2,3", 6852 "Deprecated": "1", 6853 "EventCode": "0xB7, 0xBB", 6854 "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 6855 "MSRIndex": "0x1a6,0x1a7", 6856 "MSRValue": "0x0084000080", 6857 "Offcore": "1", 6858 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6859 "SampleAfterValue": "100003", 6860 "UMask": "0x1" 6861 }, 6862 { 6863 "BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 512 cycles.", 6864 "Counter": "0,1,2,3", 6865 "CounterHTOff": "0,1,2,3", 6866 "Data_LA": "1", 6867 "EventCode": "0xcd", 6868 "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_512", 6869 "MSRIndex": "0x3F6", 6870 "MSRValue": "0x200", 6871 "PEBS": "2", 6872 "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 512 cycles. Reported latency may be longer than just the memory latency.", 6873 "SampleAfterValue": "101", 6874 "TakenAlone": "1", 6875 "UMask": "0x1" 6876 }, 6877 { 6878 "BriefDescription": "Number of times an HLE execution aborted due to HLE-unfriendly instructions and certain unfriendly events (such as AD assists etc.).", 6879 "Counter": "0,1,2,3", 6880 "CounterHTOff": "0,1,2,3,4,5,6,7", 6881 "EventCode": "0xC8", 6882 "EventName": "HLE_RETIRED.ABORTED_UNFRIENDLY", 6883 "SampleAfterValue": "2000003", 6884 "UMask": "0x20" 6885 }, 6886 { 6887 "BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 6888 "Counter": "0,1,2,3", 6889 "CounterHTOff": "0,1,2,3", 6890 "EventCode": "0xB7, 0xBB", 6891 "EventName": "OCR.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 6892 "MSRIndex": "0x1a6,0x1a7", 6893 "MSRValue": "0x0404000010", 6894 "Offcore": "1", 6895 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6896 "SampleAfterValue": "100003", 6897 "UMask": "0x1" 6898 }, 6899 { 6900 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS.HITM_OTHER_CORE", 6901 "Counter": "0,1,2,3", 6902 "CounterHTOff": "0,1,2,3", 6903 "Deprecated": "1", 6904 "EventCode": "0xB7, 0xBB", 6905 "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS.HITM_OTHER_CORE", 6906 "MSRIndex": "0x1a6,0x1a7", 6907 "MSRValue": "0x103C000020", 6908 "Offcore": "1", 6909 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6910 "SampleAfterValue": "100003", 6911 "UMask": "0x1" 6912 }, 6913 { 6914 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 6915 "Counter": "0,1,2,3", 6916 "CounterHTOff": "0,1,2,3", 6917 "Deprecated": "1", 6918 "EventCode": "0xB7, 0xBB", 6919 "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 6920 "MSRIndex": "0x1a6,0x1a7", 6921 "MSRValue": "0x0810000080", 6922 "Offcore": "1", 6923 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6924 "SampleAfterValue": "100003", 6925 "UMask": "0x1" 6926 }, 6927 { 6928 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 6929 "Counter": "0,1,2,3", 6930 "CounterHTOff": "0,1,2,3", 6931 "Deprecated": "1", 6932 "EventCode": "0xB7, 0xBB", 6933 "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 6934 "MSRIndex": "0x1a6,0x1a7", 6935 "MSRValue": "0x1010000120", 6936 "Offcore": "1", 6937 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6938 "SampleAfterValue": "100003", 6939 "UMask": "0x1" 6940 }, 6941 { 6942 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 6943 "Counter": "0,1,2,3", 6944 "CounterHTOff": "0,1,2,3", 6945 "Deprecated": "1", 6946 "EventCode": "0xB7, 0xBB", 6947 "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 6948 "MSRIndex": "0x1a6,0x1a7", 6949 "MSRValue": "0x3F84000490", 6950 "Offcore": "1", 6951 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6952 "SampleAfterValue": "100003", 6953 "UMask": "0x1" 6954 }, 6955 { 6956 "BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 6957 "Counter": "0,1,2,3", 6958 "CounterHTOff": "0,1,2,3", 6959 "EventCode": "0xB7, 0xBB", 6960 "EventName": "OCR.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 6961 "MSRIndex": "0x1a6,0x1a7", 6962 "MSRValue": "0x0604000010", 6963 "Offcore": "1", 6964 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6965 "SampleAfterValue": "100003", 6966 "UMask": "0x1" 6967 }, 6968 { 6969 "BriefDescription": "OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 6970 "Counter": "0,1,2,3", 6971 "CounterHTOff": "0,1,2,3", 6972 "EventCode": "0xB7, 0xBB", 6973 "EventName": "OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 6974 "MSRIndex": "0x1a6,0x1a7", 6975 "MSRValue": "0x02100007F7", 6976 "Offcore": "1", 6977 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6978 "SampleAfterValue": "100003", 6979 "UMask": "0x1" 6980 }, 6981 { 6982 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS.HITM_OTHER_CORE", 6983 "Counter": "0,1,2,3", 6984 "CounterHTOff": "0,1,2,3", 6985 "Deprecated": "1", 6986 "EventCode": "0xB7, 0xBB", 6987 "EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS.HITM_OTHER_CORE", 6988 "MSRIndex": "0x1a6,0x1a7", 6989 "MSRValue": "0x103C0007F7", 6990 "Offcore": "1", 6991 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6992 "SampleAfterValue": "100003", 6993 "UMask": "0x1" 6994 }, 6995 { 6996 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS.NO_SNOOP_NEEDED", 6997 "Counter": "0,1,2,3", 6998 "CounterHTOff": "0,1,2,3", 6999 "Deprecated": "1", 7000 "EventCode": "0xB7, 0xBB", 7001 "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS.NO_SNOOP_NEEDED", 7002 "MSRIndex": "0x1a6,0x1a7", 7003 "MSRValue": "0x013C000020", 7004 "Offcore": "1", 7005 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7006 "SampleAfterValue": "100003", 7007 "UMask": "0x1" 7008 }, 7009 { 7010 "BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_MISS.NO_SNOOP_NEEDED OCR.DEMAND_CODE_RD.L3_MISS.NO_SNOOP_NEEDED", 7011 "Counter": "0,1,2,3", 7012 "CounterHTOff": "0,1,2,3", 7013 "EventCode": "0xB7, 0xBB", 7014 "EventName": "OCR.DEMAND_CODE_RD.L3_MISS.NO_SNOOP_NEEDED", 7015 "MSRIndex": "0x1a6,0x1a7", 7016 "MSRValue": "0x013C000004", 7017 "Offcore": "1", 7018 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7019 "SampleAfterValue": "100003", 7020 "UMask": "0x1" 7021 }, 7022 { 7023 "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_MISS.HITM_OTHER_CORE OCR.PF_L1D_AND_SW.L3_MISS.HITM_OTHER_CORE", 7024 "Counter": "0,1,2,3", 7025 "CounterHTOff": "0,1,2,3", 7026 "EventCode": "0xB7, 0xBB", 7027 "EventName": "OCR.PF_L1D_AND_SW.L3_MISS.HITM_OTHER_CORE", 7028 "MSRIndex": "0x1a6,0x1a7", 7029 "MSRValue": "0x103C000400", 7030 "Offcore": "1", 7031 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7032 "SampleAfterValue": "100003", 7033 "UMask": "0x1" 7034 }, 7035 { 7036 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 7037 "Counter": "0,1,2,3", 7038 "CounterHTOff": "0,1,2,3", 7039 "Deprecated": "1", 7040 "EventCode": "0xB7, 0xBB", 7041 "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 7042 "MSRIndex": "0x1a6,0x1a7", 7043 "MSRValue": "0x0110000002", 7044 "Offcore": "1", 7045 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7046 "SampleAfterValue": "100003", 7047 "UMask": "0x1" 7048 }, 7049 { 7050 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 7051 "Counter": "0,1,2,3", 7052 "CounterHTOff": "0,1,2,3", 7053 "Deprecated": "1", 7054 "EventCode": "0xB7, 0xBB", 7055 "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 7056 "MSRIndex": "0x1a6,0x1a7", 7057 "MSRValue": "0x1010000122", 7058 "Offcore": "1", 7059 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7060 "SampleAfterValue": "100003", 7061 "UMask": "0x1" 7062 }, 7063 { 7064 "BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_MISS.REMOTE_HITM", 7065 "Counter": "0,1,2,3", 7066 "CounterHTOff": "0,1,2,3", 7067 "EventCode": "0xB7, 0xBB", 7068 "EventName": "OCR.DEMAND_DATA_RD.L3_MISS.REMOTE_HITM", 7069 "MSRIndex": "0x1a6,0x1a7", 7070 "MSRValue": "0x103FC00001", 7071 "Offcore": "1", 7072 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7073 "SampleAfterValue": "100003", 7074 "UMask": "0x1" 7075 }, 7076 { 7077 "BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_MISS.NO_SNOOP_NEEDED OCR.DEMAND_DATA_RD.L3_MISS.NO_SNOOP_NEEDED", 7078 "Counter": "0,1,2,3", 7079 "CounterHTOff": "0,1,2,3", 7080 "EventCode": "0xB7, 0xBB", 7081 "EventName": "OCR.DEMAND_DATA_RD.L3_MISS.NO_SNOOP_NEEDED", 7082 "MSRIndex": "0x1a6,0x1a7", 7083 "MSRValue": "0x013C000001", 7084 "Offcore": "1", 7085 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7086 "SampleAfterValue": "100003", 7087 "UMask": "0x1" 7088 }, 7089 { 7090 "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 7091 "Counter": "0,1,2,3", 7092 "CounterHTOff": "0,1,2,3", 7093 "EventCode": "0xB7, 0xBB", 7094 "EventName": "OCR.PF_L2_RFO.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 7095 "MSRIndex": "0x1a6,0x1a7", 7096 "MSRValue": "0x063B800020", 7097 "Offcore": "1", 7098 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7099 "SampleAfterValue": "100003", 7100 "UMask": "0x1" 7101 }, 7102 { 7103 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 7104 "Counter": "0,1,2,3", 7105 "CounterHTOff": "0,1,2,3", 7106 "Deprecated": "1", 7107 "EventCode": "0xB7, 0xBB", 7108 "EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 7109 "MSRIndex": "0x1a6,0x1a7", 7110 "MSRValue": "0x04100007F7", 7111 "Offcore": "1", 7112 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7113 "SampleAfterValue": "100003", 7114 "UMask": "0x1" 7115 }, 7116 { 7117 "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 7118 "Counter": "0,1,2,3", 7119 "CounterHTOff": "0,1,2,3", 7120 "EventCode": "0xB7, 0xBB", 7121 "EventName": "OCR.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 7122 "MSRIndex": "0x1a6,0x1a7", 7123 "MSRValue": "0x0604000080", 7124 "Offcore": "1", 7125 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7126 "SampleAfterValue": "100003", 7127 "UMask": "0x1" 7128 }, 7129 { 7130 "BriefDescription": "OCR.ALL_RFO.L3_MISS.ANY_SNOOP OCR.ALL_RFO.L3_MISS.ANY_SNOOP OCR.ALL_RFO.L3_MISS.ANY_SNOOP", 7131 "Counter": "0,1,2,3", 7132 "CounterHTOff": "0,1,2,3", 7133 "EventCode": "0xB7, 0xBB", 7134 "EventName": "OCR.ALL_RFO.L3_MISS.ANY_SNOOP", 7135 "MSRIndex": "0x1a6,0x1a7", 7136 "MSRValue": "0x3FBC000122", 7137 "Offcore": "1", 7138 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7139 "SampleAfterValue": "100003", 7140 "UMask": "0x1" 7141 }, 7142 { 7143 "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 7144 "Counter": "0,1,2,3", 7145 "CounterHTOff": "0,1,2,3", 7146 "EventCode": "0xB7, 0xBB", 7147 "EventName": "OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 7148 "MSRIndex": "0x1a6,0x1a7", 7149 "MSRValue": "0x3F90000490", 7150 "Offcore": "1", 7151 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7152 "SampleAfterValue": "100003", 7153 "UMask": "0x1" 7154 }, 7155 { 7156 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 7157 "Counter": "0,1,2,3", 7158 "CounterHTOff": "0,1,2,3", 7159 "Deprecated": "1", 7160 "EventCode": "0xB7, 0xBB", 7161 "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 7162 "MSRIndex": "0x1a6,0x1a7", 7163 "MSRValue": "0x1010000490", 7164 "Offcore": "1", 7165 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7166 "SampleAfterValue": "100003", 7167 "UMask": "0x1" 7168 }, 7169 { 7170 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS.ANY_SNOOP", 7171 "Counter": "0,1,2,3", 7172 "CounterHTOff": "0,1,2,3", 7173 "Deprecated": "1", 7174 "EventCode": "0xB7, 0xBB", 7175 "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS.ANY_SNOOP", 7176 "MSRIndex": "0x1a6,0x1a7", 7177 "MSRValue": "0x3FBC000004", 7178 "Offcore": "1", 7179 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7180 "SampleAfterValue": "100003", 7181 "UMask": "0x1" 7182 }, 7183 { 7184 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS.REMOTE_HIT_FORWARD", 7185 "Counter": "0,1,2,3", 7186 "CounterHTOff": "0,1,2,3", 7187 "Deprecated": "1", 7188 "EventCode": "0xB7, 0xBB", 7189 "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS.REMOTE_HIT_FORWARD", 7190 "MSRIndex": "0x1a6,0x1a7", 7191 "MSRValue": "0x083FC00120", 7192 "Offcore": "1", 7193 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7194 "SampleAfterValue": "100003", 7195 "UMask": "0x1" 7196 }, 7197 { 7198 "BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_MISS.HIT_OTHER_CORE_FWD OCR.DEMAND_CODE_RD.L3_MISS.HIT_OTHER_CORE_FWD", 7199 "Counter": "0,1,2,3", 7200 "CounterHTOff": "0,1,2,3", 7201 "EventCode": "0xB7, 0xBB", 7202 "EventName": "OCR.DEMAND_CODE_RD.L3_MISS.HIT_OTHER_CORE_FWD", 7203 "MSRIndex": "0x1a6,0x1a7", 7204 "MSRValue": "0x083C000004", 7205 "Offcore": "1", 7206 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7207 "SampleAfterValue": "100003", 7208 "UMask": "0x1" 7209 }, 7210 { 7211 "BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_MISS.REMOTE_HITM", 7212 "Counter": "0,1,2,3", 7213 "CounterHTOff": "0,1,2,3", 7214 "EventCode": "0xB7, 0xBB", 7215 "EventName": "OCR.PF_L2_DATA_RD.L3_MISS.REMOTE_HITM", 7216 "MSRIndex": "0x1a6,0x1a7", 7217 "MSRValue": "0x103FC00010", 7218 "Offcore": "1", 7219 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7220 "SampleAfterValue": "100003", 7221 "UMask": "0x1" 7222 }, 7223 { 7224 "BriefDescription": "Cycles with at least 6 Demand Data Read requests that miss L3 cache in the superQ.", 7225 "Counter": "0,1,2,3", 7226 "CounterHTOff": "0,1,2,3,4,5,6,7", 7227 "CounterMask": "6", 7228 "EventCode": "0x60", 7229 "EventName": "OFFCORE_REQUESTS_OUTSTANDING.L3_MISS_DEMAND_DATA_RD_GE_6", 7230 "SampleAfterValue": "2000003", 7231 "UMask": "0x10" 7232 }, 7233 { 7234 "BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 64 cycles.", 7235 "Counter": "0,1,2,3", 7236 "CounterHTOff": "0,1,2,3", 7237 "Data_LA": "1", 7238 "EventCode": "0xcd", 7239 "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_64", 7240 "MSRIndex": "0x3F6", 7241 "MSRValue": "0x40", 7242 "PEBS": "2", 7243 "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 64 cycles. Reported latency may be longer than just the memory latency.", 7244 "SampleAfterValue": "2003", 7245 "TakenAlone": "1", 7246 "UMask": "0x1" 7247 }, 7248 { 7249 "BriefDescription": "OCR.ALL_RFO.L3_MISS.HITM_OTHER_CORE OCR.ALL_RFO.L3_MISS.HITM_OTHER_CORE OCR.ALL_RFO.L3_MISS.HITM_OTHER_CORE", 7250 "Counter": "0,1,2,3", 7251 "CounterHTOff": "0,1,2,3", 7252 "EventCode": "0xB7, 0xBB", 7253 "EventName": "OCR.ALL_RFO.L3_MISS.HITM_OTHER_CORE", 7254 "MSRIndex": "0x1a6,0x1a7", 7255 "MSRValue": "0x103C000122", 7256 "Offcore": "1", 7257 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7258 "SampleAfterValue": "100003", 7259 "UMask": "0x1" 7260 }, 7261 { 7262 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD", 7263 "Counter": "0,1,2,3", 7264 "CounterHTOff": "0,1,2,3", 7265 "Deprecated": "1", 7266 "EventCode": "0xB7, 0xBB", 7267 "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD", 7268 "MSRIndex": "0x1a6,0x1a7", 7269 "MSRValue": "0x043C000002", 7270 "Offcore": "1", 7271 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7272 "SampleAfterValue": "100003", 7273 "UMask": "0x1" 7274 }, 7275 { 7276 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 7277 "Counter": "0,1,2,3", 7278 "CounterHTOff": "0,1,2,3", 7279 "Deprecated": "1", 7280 "EventCode": "0xB7, 0xBB", 7281 "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 7282 "MSRIndex": "0x1a6,0x1a7", 7283 "MSRValue": "0x0404000010", 7284 "Offcore": "1", 7285 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7286 "SampleAfterValue": "100003", 7287 "UMask": "0x1" 7288 }, 7289 { 7290 "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_MISS.SNOOP_NONE OCR.ALL_PF_DATA_RD.L3_MISS.SNOOP_NONE", 7291 "Counter": "0,1,2,3", 7292 "CounterHTOff": "0,1,2,3", 7293 "EventCode": "0xB7, 0xBB", 7294 "EventName": "OCR.ALL_PF_DATA_RD.L3_MISS.SNOOP_NONE", 7295 "MSRIndex": "0x1a6,0x1a7", 7296 "MSRValue": "0x00BC000490", 7297 "Offcore": "1", 7298 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7299 "SampleAfterValue": "100003", 7300 "UMask": "0x1" 7301 }, 7302 { 7303 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS.REMOTE_HITM", 7304 "Counter": "0,1,2,3", 7305 "CounterHTOff": "0,1,2,3", 7306 "Deprecated": "1", 7307 "EventCode": "0xB7, 0xBB", 7308 "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS.REMOTE_HITM", 7309 "MSRIndex": "0x1a6,0x1a7", 7310 "MSRValue": "0x103FC00120", 7311 "Offcore": "1", 7312 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7313 "SampleAfterValue": "100003", 7314 "UMask": "0x1" 7315 }, 7316 { 7317 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 7318 "Counter": "0,1,2,3", 7319 "CounterHTOff": "0,1,2,3", 7320 "Deprecated": "1", 7321 "EventCode": "0xB7, 0xBB", 7322 "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 7323 "MSRIndex": "0x1a6,0x1a7", 7324 "MSRValue": "0x0090000122", 7325 "Offcore": "1", 7326 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7327 "SampleAfterValue": "100003", 7328 "UMask": "0x1" 7329 }, 7330 { 7331 "BriefDescription": "Counts any other requests OCR.OTHER.L3_MISS.NO_SNOOP_NEEDED OCR.OTHER.L3_MISS.NO_SNOOP_NEEDED", 7332 "Counter": "0,1,2,3", 7333 "CounterHTOff": "0,1,2,3", 7334 "EventCode": "0xB7, 0xBB", 7335 "EventName": "OCR.OTHER.L3_MISS.NO_SNOOP_NEEDED", 7336 "MSRIndex": "0x1a6,0x1a7", 7337 "MSRValue": "0x013C008000", 7338 "Offcore": "1", 7339 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7340 "SampleAfterValue": "100003", 7341 "UMask": "0x1" 7342 }, 7343 { 7344 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 7345 "Counter": "0,1,2,3", 7346 "CounterHTOff": "0,1,2,3", 7347 "Deprecated": "1", 7348 "EventCode": "0xB7, 0xBB", 7349 "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 7350 "MSRIndex": "0x1a6,0x1a7", 7351 "MSRValue": "0x0204000120", 7352 "Offcore": "1", 7353 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7354 "SampleAfterValue": "100003", 7355 "UMask": "0x1" 7356 }, 7357 { 7358 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 7359 "Counter": "0,1,2,3", 7360 "CounterHTOff": "0,1,2,3", 7361 "Deprecated": "1", 7362 "EventCode": "0xB7, 0xBB", 7363 "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 7364 "MSRIndex": "0x1a6,0x1a7", 7365 "MSRValue": "0x063B800010", 7366 "Offcore": "1", 7367 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7368 "SampleAfterValue": "100003", 7369 "UMask": "0x1" 7370 }, 7371 { 7372 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 7373 "Counter": "0,1,2,3", 7374 "CounterHTOff": "0,1,2,3", 7375 "Deprecated": "1", 7376 "EventCode": "0xB7, 0xBB", 7377 "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 7378 "MSRIndex": "0x1a6,0x1a7", 7379 "MSRValue": "0x0204000491", 7380 "Offcore": "1", 7381 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7382 "SampleAfterValue": "100003", 7383 "UMask": "0x1" 7384 }, 7385 { 7386 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS.REMOTE_HIT_FORWARD", 7387 "Counter": "0,1,2,3", 7388 "CounterHTOff": "0,1,2,3", 7389 "Deprecated": "1", 7390 "EventCode": "0xB7, 0xBB", 7391 "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS.REMOTE_HIT_FORWARD", 7392 "MSRIndex": "0x1a6,0x1a7", 7393 "MSRValue": "0x083FC00020", 7394 "Offcore": "1", 7395 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7396 "SampleAfterValue": "100003", 7397 "UMask": "0x1" 7398 }, 7399 { 7400 "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 7401 "Counter": "0,1,2,3", 7402 "CounterHTOff": "0,1,2,3", 7403 "EventCode": "0xB7, 0xBB", 7404 "EventName": "OCR.PF_L1D_AND_SW.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 7405 "MSRIndex": "0x1a6,0x1a7", 7406 "MSRValue": "0x063B800400", 7407 "Offcore": "1", 7408 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7409 "SampleAfterValue": "100003", 7410 "UMask": "0x1" 7411 }, 7412 { 7413 "BriefDescription": "Counts any other requests OCR.OTHER.L3_MISS.ANY_SNOOP OCR.OTHER.L3_MISS.ANY_SNOOP", 7414 "Counter": "0,1,2,3", 7415 "CounterHTOff": "0,1,2,3", 7416 "EventCode": "0xB7, 0xBB", 7417 "EventName": "OCR.OTHER.L3_MISS.ANY_SNOOP", 7418 "MSRIndex": "0x1a6,0x1a7", 7419 "MSRValue": "0x3FBC008000", 7420 "Offcore": "1", 7421 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7422 "SampleAfterValue": "100003", 7423 "UMask": "0x1" 7424 }, 7425 { 7426 "BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 7427 "Counter": "0,1,2,3", 7428 "CounterHTOff": "0,1,2,3", 7429 "EventCode": "0xB7, 0xBB", 7430 "EventName": "OCR.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 7431 "MSRIndex": "0x1a6,0x1a7", 7432 "MSRValue": "0x0110000004", 7433 "Offcore": "1", 7434 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7435 "SampleAfterValue": "100003", 7436 "UMask": "0x1" 7437 }, 7438 { 7439 "BriefDescription": "OCR.ALL_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD OCR.ALL_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD OCR.ALL_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD", 7440 "Counter": "0,1,2,3", 7441 "CounterHTOff": "0,1,2,3", 7442 "EventCode": "0xB7, 0xBB", 7443 "EventName": "OCR.ALL_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD", 7444 "MSRIndex": "0x1a6,0x1a7", 7445 "MSRValue": "0x043C000122", 7446 "Offcore": "1", 7447 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7448 "SampleAfterValue": "100003", 7449 "UMask": "0x1" 7450 }, 7451 { 7452 "BriefDescription": "OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 7453 "Counter": "0,1,2,3", 7454 "CounterHTOff": "0,1,2,3", 7455 "EventCode": "0xB7, 0xBB", 7456 "EventName": "OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 7457 "MSRIndex": "0x1a6,0x1a7", 7458 "MSRValue": "0x0604000122", 7459 "Offcore": "1", 7460 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7461 "SampleAfterValue": "100003", 7462 "UMask": "0x1" 7463 }, 7464 { 7465 "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD OCR.PF_L3_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD", 7466 "Counter": "0,1,2,3", 7467 "CounterHTOff": "0,1,2,3", 7468 "EventCode": "0xB7, 0xBB", 7469 "EventName": "OCR.PF_L3_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD", 7470 "MSRIndex": "0x1a6,0x1a7", 7471 "MSRValue": "0x083C000080", 7472 "Offcore": "1", 7473 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7474 "SampleAfterValue": "100003", 7475 "UMask": "0x1" 7476 }, 7477 { 7478 "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 7479 "Counter": "0,1,2,3", 7480 "CounterHTOff": "0,1,2,3", 7481 "EventCode": "0xB7, 0xBB", 7482 "EventName": "OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 7483 "MSRIndex": "0x1a6,0x1a7", 7484 "MSRValue": "0x0604000490", 7485 "Offcore": "1", 7486 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7487 "SampleAfterValue": "100003", 7488 "UMask": "0x1" 7489 }, 7490 { 7491 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 7492 "Counter": "0,1,2,3", 7493 "CounterHTOff": "0,1,2,3", 7494 "Deprecated": "1", 7495 "EventCode": "0xB7, 0xBB", 7496 "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 7497 "MSRIndex": "0x1a6,0x1a7", 7498 "MSRValue": "0x0210000080", 7499 "Offcore": "1", 7500 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7501 "SampleAfterValue": "100003", 7502 "UMask": "0x1" 7503 }, 7504 { 7505 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS.REMOTE_HITM", 7506 "Counter": "0,1,2,3", 7507 "CounterHTOff": "0,1,2,3", 7508 "Deprecated": "1", 7509 "EventCode": "0xB7, 0xBB", 7510 "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS.REMOTE_HITM", 7511 "MSRIndex": "0x1a6,0x1a7", 7512 "MSRValue": "0x103FC00020", 7513 "Offcore": "1", 7514 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7515 "SampleAfterValue": "100003", 7516 "UMask": "0x1" 7517 }, 7518 { 7519 "BriefDescription": "OCR.ALL_PF_RFO.L3_MISS.REMOTE_HIT_FORWARD OCR.ALL_PF_RFO.L3_MISS.REMOTE_HIT_FORWARD", 7520 "Counter": "0,1,2,3", 7521 "CounterHTOff": "0,1,2,3", 7522 "EventCode": "0xB7, 0xBB", 7523 "EventName": "OCR.ALL_PF_RFO.L3_MISS.REMOTE_HIT_FORWARD", 7524 "MSRIndex": "0x1a6,0x1a7", 7525 "MSRValue": "0x083FC00120", 7526 "Offcore": "1", 7527 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7528 "SampleAfterValue": "100003", 7529 "UMask": "0x1" 7530 }, 7531 { 7532 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 7533 "Counter": "0,1,2,3", 7534 "CounterHTOff": "0,1,2,3", 7535 "Deprecated": "1", 7536 "EventCode": "0xB7, 0xBB", 7537 "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 7538 "MSRIndex": "0x1a6,0x1a7", 7539 "MSRValue": "0x0804000080", 7540 "Offcore": "1", 7541 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7542 "SampleAfterValue": "100003", 7543 "UMask": "0x1" 7544 }, 7545 { 7546 "BriefDescription": "OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 7547 "Counter": "0,1,2,3", 7548 "CounterHTOff": "0,1,2,3", 7549 "EventCode": "0xB7, 0xBB", 7550 "EventName": "OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 7551 "MSRIndex": "0x1a6,0x1a7", 7552 "MSRValue": "0x1004000120", 7553 "Offcore": "1", 7554 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7555 "SampleAfterValue": "100003", 7556 "UMask": "0x1" 7557 }, 7558 { 7559 "BriefDescription": "Counts any other requests OCR.OTHER.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 7560 "Counter": "0,1,2,3", 7561 "CounterHTOff": "0,1,2,3", 7562 "EventCode": "0xB7, 0xBB", 7563 "EventName": "OCR.OTHER.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 7564 "MSRIndex": "0x1a6,0x1a7", 7565 "MSRValue": "0x3F84008000", 7566 "Offcore": "1", 7567 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7568 "SampleAfterValue": "100003", 7569 "UMask": "0x1" 7570 }, 7571 { 7572 "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD OCR.PF_L3_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD", 7573 "Counter": "0,1,2,3", 7574 "CounterHTOff": "0,1,2,3", 7575 "EventCode": "0xB7, 0xBB", 7576 "EventName": "OCR.PF_L3_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD", 7577 "MSRIndex": "0x1a6,0x1a7", 7578 "MSRValue": "0x043C000100", 7579 "Offcore": "1", 7580 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7581 "SampleAfterValue": "100003", 7582 "UMask": "0x1" 7583 }, 7584 { 7585 "BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS.HITM_OTHER_CORE", 7586 "Counter": "0,1,2,3", 7587 "CounterHTOff": "0,1,2,3", 7588 "Deprecated": "1", 7589 "EventCode": "0xB7, 0xBB", 7590 "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS.HITM_OTHER_CORE", 7591 "MSRIndex": "0x1a6,0x1a7", 7592 "MSRValue": "0x103C008000", 7593 "Offcore": "1", 7594 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7595 "SampleAfterValue": "100003", 7596 "UMask": "0x1" 7597 }, 7598 { 7599 "BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 7600 "Counter": "0,1,2,3", 7601 "CounterHTOff": "0,1,2,3", 7602 "EventCode": "0xB7, 0xBB", 7603 "EventName": "OCR.DEMAND_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 7604 "MSRIndex": "0x1a6,0x1a7", 7605 "MSRValue": "0x3F84000002", 7606 "Offcore": "1", 7607 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7608 "SampleAfterValue": "100003", 7609 "UMask": "0x1" 7610 }, 7611 { 7612 "BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_MISS.HITM_OTHER_CORE OCR.DEMAND_RFO.L3_MISS.HITM_OTHER_CORE", 7613 "Counter": "0,1,2,3", 7614 "CounterHTOff": "0,1,2,3", 7615 "EventCode": "0xB7, 0xBB", 7616 "EventName": "OCR.DEMAND_RFO.L3_MISS.HITM_OTHER_CORE", 7617 "MSRIndex": "0x1a6,0x1a7", 7618 "MSRValue": "0x103C000002", 7619 "Offcore": "1", 7620 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7621 "SampleAfterValue": "100003", 7622 "UMask": "0x1" 7623 }, 7624 { 7625 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS.REMOTE_HITM", 7626 "Counter": "0,1,2,3", 7627 "CounterHTOff": "0,1,2,3", 7628 "Deprecated": "1", 7629 "EventCode": "0xB7, 0xBB", 7630 "EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS.REMOTE_HITM", 7631 "MSRIndex": "0x1a6,0x1a7", 7632 "MSRValue": "0x103FC00400", 7633 "Offcore": "1", 7634 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7635 "SampleAfterValue": "100003", 7636 "UMask": "0x1" 7637 }, 7638 { 7639 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 7640 "Counter": "0,1,2,3", 7641 "CounterHTOff": "0,1,2,3", 7642 "Deprecated": "1", 7643 "EventCode": "0xB7, 0xBB", 7644 "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 7645 "MSRIndex": "0x1a6,0x1a7", 7646 "MSRValue": "0x0410000120", 7647 "Offcore": "1", 7648 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7649 "SampleAfterValue": "100003", 7650 "UMask": "0x1" 7651 }, 7652 { 7653 "BriefDescription": "OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 7654 "Counter": "0,1,2,3", 7655 "CounterHTOff": "0,1,2,3", 7656 "EventCode": "0xB7, 0xBB", 7657 "EventName": "OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 7658 "MSRIndex": "0x1a6,0x1a7", 7659 "MSRValue": "0x0210000491", 7660 "Offcore": "1", 7661 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7662 "SampleAfterValue": "100003", 7663 "UMask": "0x1" 7664 }, 7665 { 7666 "BriefDescription": "Cycles while L3 cache miss demand load is outstanding.", 7667 "Counter": "0,1,2,3", 7668 "CounterHTOff": "0,1,2,3,4,5,6,7", 7669 "CounterMask": "2", 7670 "EventCode": "0xA3", 7671 "EventName": "CYCLE_ACTIVITY.CYCLES_L3_MISS", 7672 "SampleAfterValue": "2000003", 7673 "UMask": "0x2" 7674 }, 7675 { 7676 "BriefDescription": "Counts any other requests OCR.OTHER.L3_MISS.REMOTE_HITM", 7677 "Counter": "0,1,2,3", 7678 "CounterHTOff": "0,1,2,3", 7679 "EventCode": "0xB7, 0xBB", 7680 "EventName": "OCR.OTHER.L3_MISS.REMOTE_HITM", 7681 "MSRIndex": "0x1a6,0x1a7", 7682 "MSRValue": "0x103FC08000", 7683 "Offcore": "1", 7684 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7685 "SampleAfterValue": "100003", 7686 "UMask": "0x1" 7687 }, 7688 { 7689 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS.NO_SNOOP_NEEDED", 7690 "Counter": "0,1,2,3", 7691 "CounterHTOff": "0,1,2,3", 7692 "Deprecated": "1", 7693 "EventCode": "0xB7, 0xBB", 7694 "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS.NO_SNOOP_NEEDED", 7695 "MSRIndex": "0x1a6,0x1a7", 7696 "MSRValue": "0x013C000122", 7697 "Offcore": "1", 7698 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7699 "SampleAfterValue": "100003", 7700 "UMask": "0x1" 7701 }, 7702 { 7703 "BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 7704 "Counter": "0,1,2,3", 7705 "CounterHTOff": "0,1,2,3", 7706 "EventCode": "0xB7, 0xBB", 7707 "EventName": "OCR.DEMAND_DATA_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 7708 "MSRIndex": "0x1a6,0x1a7", 7709 "MSRValue": "0x063B800001", 7710 "Offcore": "1", 7711 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7712 "SampleAfterValue": "100003", 7713 "UMask": "0x1" 7714 }, 7715 { 7716 "BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS.NO_SNOOP_NEEDED", 7717 "Counter": "0,1,2,3", 7718 "CounterHTOff": "0,1,2,3", 7719 "Deprecated": "1", 7720 "EventCode": "0xB7, 0xBB", 7721 "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS.NO_SNOOP_NEEDED", 7722 "MSRIndex": "0x1a6,0x1a7", 7723 "MSRValue": "0x013C008000", 7724 "Offcore": "1", 7725 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7726 "SampleAfterValue": "100003", 7727 "UMask": "0x1" 7728 }, 7729 { 7730 "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD OCR.PF_L3_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD", 7731 "Counter": "0,1,2,3", 7732 "CounterHTOff": "0,1,2,3", 7733 "EventCode": "0xB7, 0xBB", 7734 "EventName": "OCR.PF_L3_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD", 7735 "MSRIndex": "0x1a6,0x1a7", 7736 "MSRValue": "0x043C000080", 7737 "Offcore": "1", 7738 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7739 "SampleAfterValue": "100003", 7740 "UMask": "0x1" 7741 }, 7742 { 7743 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 7744 "Counter": "0,1,2,3", 7745 "CounterHTOff": "0,1,2,3", 7746 "Deprecated": "1", 7747 "EventCode": "0xB7, 0xBB", 7748 "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 7749 "MSRIndex": "0x1a6,0x1a7", 7750 "MSRValue": "0x3F84000122", 7751 "Offcore": "1", 7752 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7753 "SampleAfterValue": "100003", 7754 "UMask": "0x1" 7755 }, 7756 { 7757 "BriefDescription": "OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 7758 "Counter": "0,1,2,3", 7759 "CounterHTOff": "0,1,2,3", 7760 "EventCode": "0xB7, 0xBB", 7761 "EventName": "OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 7762 "MSRIndex": "0x1a6,0x1a7", 7763 "MSRValue": "0x0210000120", 7764 "Offcore": "1", 7765 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7766 "SampleAfterValue": "100003", 7767 "UMask": "0x1" 7768 }, 7769 { 7770 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS.HIT_OTHER_CORE_NO_FWD", 7771 "Counter": "0,1,2,3", 7772 "CounterHTOff": "0,1,2,3", 7773 "Deprecated": "1", 7774 "EventCode": "0xB7, 0xBB", 7775 "EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS.HIT_OTHER_CORE_NO_FWD", 7776 "MSRIndex": "0x1a6,0x1a7", 7777 "MSRValue": "0x043C0007F7", 7778 "Offcore": "1", 7779 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7780 "SampleAfterValue": "100003", 7781 "UMask": "0x1" 7782 }, 7783 { 7784 "BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 7785 "Counter": "0,1,2,3", 7786 "CounterHTOff": "0,1,2,3", 7787 "EventCode": "0xB7, 0xBB", 7788 "EventName": "OCR.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 7789 "MSRIndex": "0x1a6,0x1a7", 7790 "MSRValue": "0x0110000002", 7791 "Offcore": "1", 7792 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7793 "SampleAfterValue": "100003", 7794 "UMask": "0x1" 7795 }, 7796 { 7797 "BriefDescription": "OCR.ALL_DATA_RD.L3_MISS.SNOOP_NONE OCR.ALL_DATA_RD.L3_MISS.SNOOP_NONE", 7798 "Counter": "0,1,2,3", 7799 "CounterHTOff": "0,1,2,3", 7800 "EventCode": "0xB7, 0xBB", 7801 "EventName": "OCR.ALL_DATA_RD.L3_MISS.SNOOP_NONE", 7802 "MSRIndex": "0x1a6,0x1a7", 7803 "MSRValue": "0x00BC000491", 7804 "Offcore": "1", 7805 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7806 "SampleAfterValue": "100003", 7807 "UMask": "0x1" 7808 }, 7809 { 7810 "BriefDescription": "OCR.ALL_DATA_RD.L3_MISS.NO_SNOOP_NEEDED OCR.ALL_DATA_RD.L3_MISS.NO_SNOOP_NEEDED OCR.ALL_DATA_RD.L3_MISS.NO_SNOOP_NEEDED", 7811 "Counter": "0,1,2,3", 7812 "CounterHTOff": "0,1,2,3", 7813 "EventCode": "0xB7, 0xBB", 7814 "EventName": "OCR.ALL_DATA_RD.L3_MISS.NO_SNOOP_NEEDED", 7815 "MSRIndex": "0x1a6,0x1a7", 7816 "MSRValue": "0x013C000491", 7817 "Offcore": "1", 7818 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7819 "SampleAfterValue": "100003", 7820 "UMask": "0x1" 7821 }, 7822 { 7823 "BriefDescription": "OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 7824 "Counter": "0,1,2,3", 7825 "CounterHTOff": "0,1,2,3", 7826 "EventCode": "0xB7, 0xBB", 7827 "EventName": "OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 7828 "MSRIndex": "0x1a6,0x1a7", 7829 "MSRValue": "0x3F84000122", 7830 "Offcore": "1", 7831 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7832 "SampleAfterValue": "100003", 7833 "UMask": "0x1" 7834 }, 7835 { 7836 "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 7837 "Counter": "0,1,2,3", 7838 "CounterHTOff": "0,1,2,3", 7839 "EventCode": "0xB7, 0xBB", 7840 "EventName": "OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 7841 "MSRIndex": "0x1a6,0x1a7", 7842 "MSRValue": "0x0084000490", 7843 "Offcore": "1", 7844 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7845 "SampleAfterValue": "100003", 7846 "UMask": "0x1" 7847 }, 7848 { 7849 "BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 7850 "Counter": "0,1,2,3", 7851 "CounterHTOff": "0,1,2,3", 7852 "EventCode": "0xB7, 0xBB", 7853 "EventName": "OCR.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 7854 "MSRIndex": "0x1a6,0x1a7", 7855 "MSRValue": "0x0804000001", 7856 "Offcore": "1", 7857 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7858 "SampleAfterValue": "100003", 7859 "UMask": "0x1" 7860 }, 7861 { 7862 "BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS.REMOTE_HIT_FORWARD", 7863 "Counter": "0,1,2,3", 7864 "CounterHTOff": "0,1,2,3", 7865 "Deprecated": "1", 7866 "EventCode": "0xB7, 0xBB", 7867 "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS.REMOTE_HIT_FORWARD", 7868 "MSRIndex": "0x1a6,0x1a7", 7869 "MSRValue": "0x083FC08000", 7870 "Offcore": "1", 7871 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7872 "SampleAfterValue": "100003", 7873 "UMask": "0x1" 7874 }, 7875 { 7876 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 7877 "Counter": "0,1,2,3", 7878 "CounterHTOff": "0,1,2,3", 7879 "Deprecated": "1", 7880 "EventCode": "0xB7, 0xBB", 7881 "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 7882 "MSRIndex": "0x1a6,0x1a7", 7883 "MSRValue": "0x0810000120", 7884 "Offcore": "1", 7885 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7886 "SampleAfterValue": "100003", 7887 "UMask": "0x1" 7888 }, 7889 { 7890 "BriefDescription": "OCR.ALL_DATA_RD.L3_MISS.HITM_OTHER_CORE OCR.ALL_DATA_RD.L3_MISS.HITM_OTHER_CORE OCR.ALL_DATA_RD.L3_MISS.HITM_OTHER_CORE", 7891 "Counter": "0,1,2,3", 7892 "CounterHTOff": "0,1,2,3", 7893 "EventCode": "0xB7, 0xBB", 7894 "EventName": "OCR.ALL_DATA_RD.L3_MISS.HITM_OTHER_CORE", 7895 "MSRIndex": "0x1a6,0x1a7", 7896 "MSRValue": "0x103C000491", 7897 "Offcore": "1", 7898 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7899 "SampleAfterValue": "100003", 7900 "UMask": "0x1" 7901 }, 7902 { 7903 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS.ANY_SNOOP", 7904 "Counter": "0,1,2,3", 7905 "CounterHTOff": "0,1,2,3", 7906 "Deprecated": "1", 7907 "EventCode": "0xB7, 0xBB", 7908 "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS.ANY_SNOOP", 7909 "MSRIndex": "0x1a6,0x1a7", 7910 "MSRValue": "0x3FBC000020", 7911 "Offcore": "1", 7912 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7913 "SampleAfterValue": "100003", 7914 "UMask": "0x1" 7915 }, 7916 { 7917 "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 7918 "Counter": "0,1,2,3", 7919 "CounterHTOff": "0,1,2,3", 7920 "EventCode": "0xB7, 0xBB", 7921 "EventName": "OCR.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 7922 "MSRIndex": "0x1a6,0x1a7", 7923 "MSRValue": "0x1010000080", 7924 "Offcore": "1", 7925 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7926 "SampleAfterValue": "100003", 7927 "UMask": "0x1" 7928 }, 7929 { 7930 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD", 7931 "Counter": "0,1,2,3", 7932 "CounterHTOff": "0,1,2,3", 7933 "Deprecated": "1", 7934 "EventCode": "0xB7, 0xBB", 7935 "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD", 7936 "MSRIndex": "0x1a6,0x1a7", 7937 "MSRValue": "0x083C000001", 7938 "Offcore": "1", 7939 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7940 "SampleAfterValue": "100003", 7941 "UMask": "0x1" 7942 }, 7943 { 7944 "BriefDescription": "OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 7945 "Counter": "0,1,2,3", 7946 "CounterHTOff": "0,1,2,3", 7947 "EventCode": "0xB7, 0xBB", 7948 "EventName": "OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 7949 "MSRIndex": "0x1a6,0x1a7", 7950 "MSRValue": "0x0104000491", 7951 "Offcore": "1", 7952 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7953 "SampleAfterValue": "100003", 7954 "UMask": "0x1" 7955 }, 7956 { 7957 "BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 7958 "Counter": "0,1,2,3", 7959 "CounterHTOff": "0,1,2,3", 7960 "Deprecated": "1", 7961 "EventCode": "0xB7, 0xBB", 7962 "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 7963 "MSRIndex": "0x1a6,0x1a7", 7964 "MSRValue": "0x1004008000", 7965 "Offcore": "1", 7966 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7967 "SampleAfterValue": "100003", 7968 "UMask": "0x1" 7969 }, 7970 { 7971 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 7972 "Counter": "0,1,2,3", 7973 "CounterHTOff": "0,1,2,3", 7974 "Deprecated": "1", 7975 "EventCode": "0xB7, 0xBB", 7976 "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 7977 "MSRIndex": "0x1a6,0x1a7", 7978 "MSRValue": "0x0210000010", 7979 "Offcore": "1", 7980 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7981 "SampleAfterValue": "100003", 7982 "UMask": "0x1" 7983 }, 7984 { 7985 "BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 7986 "Counter": "0,1,2,3", 7987 "CounterHTOff": "0,1,2,3", 7988 "EventCode": "0xB7, 0xBB", 7989 "EventName": "OCR.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 7990 "MSRIndex": "0x1a6,0x1a7", 7991 "MSRValue": "0x0104000010", 7992 "Offcore": "1", 7993 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7994 "SampleAfterValue": "100003", 7995 "UMask": "0x1" 7996 }, 7997 { 7998 "BriefDescription": "Number of times an RTM execution successfully committed", 7999 "Counter": "0,1,2,3", 8000 "CounterHTOff": "0,1,2,3,4,5,6,7", 8001 "EventCode": "0xC9", 8002 "EventName": "RTM_RETIRED.COMMIT", 8003 "PublicDescription": "Number of times RTM commit succeeded.", 8004 "SampleAfterValue": "2000003", 8005 "UMask": "0x2" 8006 }, 8007 { 8008 "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 8009 "Counter": "0,1,2,3", 8010 "CounterHTOff": "0,1,2,3", 8011 "EventCode": "0xB7, 0xBB", 8012 "EventName": "OCR.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 8013 "MSRIndex": "0x1a6,0x1a7", 8014 "MSRValue": "0x0604000400", 8015 "Offcore": "1", 8016 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8017 "SampleAfterValue": "100003", 8018 "UMask": "0x1" 8019 }, 8020 { 8021 "BriefDescription": "OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 8022 "Counter": "0,1,2,3", 8023 "CounterHTOff": "0,1,2,3", 8024 "EventCode": "0xB7, 0xBB", 8025 "EventName": "OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 8026 "MSRIndex": "0x1a6,0x1a7", 8027 "MSRValue": "0x1004000491", 8028 "Offcore": "1", 8029 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8030 "SampleAfterValue": "100003", 8031 "UMask": "0x1" 8032 }, 8033 { 8034 "BriefDescription": "Number of times an HLE execution aborted due to unfriendly events (such as interrupts).", 8035 "Counter": "0,1,2,3", 8036 "CounterHTOff": "0,1,2,3,4,5,6,7", 8037 "EventCode": "0xC8", 8038 "EventName": "HLE_RETIRED.ABORTED_EVENTS", 8039 "SampleAfterValue": "2000003", 8040 "UMask": "0x80" 8041 }, 8042 { 8043 "BriefDescription": "Counts number of Offcore outstanding Demand Data Read requests that miss L3 cache in the superQ every cycle.", 8044 "Counter": "0,1,2,3", 8045 "CounterHTOff": "0,1,2,3,4,5,6,7", 8046 "EventCode": "0x60", 8047 "EventName": "OFFCORE_REQUESTS_OUTSTANDING.L3_MISS_DEMAND_DATA_RD", 8048 "SampleAfterValue": "2000003", 8049 "UMask": "0x10" 8050 }, 8051 { 8052 "BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_MISS.ANY_SNOOP OCR.DEMAND_RFO.L3_MISS.ANY_SNOOP", 8053 "Counter": "0,1,2,3", 8054 "CounterHTOff": "0,1,2,3", 8055 "EventCode": "0xB7, 0xBB", 8056 "EventName": "OCR.DEMAND_RFO.L3_MISS.ANY_SNOOP", 8057 "MSRIndex": "0x1a6,0x1a7", 8058 "MSRValue": "0x3FBC000002", 8059 "Offcore": "1", 8060 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8061 "SampleAfterValue": "100003", 8062 "UMask": "0x1" 8063 }, 8064 { 8065 "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 8066 "Counter": "0,1,2,3", 8067 "CounterHTOff": "0,1,2,3", 8068 "EventCode": "0xB7, 0xBB", 8069 "EventName": "OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 8070 "MSRIndex": "0x1a6,0x1a7", 8071 "MSRValue": "0x0204000490", 8072 "Offcore": "1", 8073 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8074 "SampleAfterValue": "100003", 8075 "UMask": "0x1" 8076 }, 8077 { 8078 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 8079 "Counter": "0,1,2,3", 8080 "CounterHTOff": "0,1,2,3", 8081 "Deprecated": "1", 8082 "EventCode": "0xB7, 0xBB", 8083 "EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 8084 "MSRIndex": "0x1a6,0x1a7", 8085 "MSRValue": "0x04040007F7", 8086 "Offcore": "1", 8087 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8088 "SampleAfterValue": "100003", 8089 "UMask": "0x1" 8090 }, 8091 { 8092 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS.SNOOP_NONE", 8093 "Counter": "0,1,2,3", 8094 "CounterHTOff": "0,1,2,3", 8095 "Deprecated": "1", 8096 "EventCode": "0xB7, 0xBB", 8097 "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS.SNOOP_NONE", 8098 "MSRIndex": "0x1a6,0x1a7", 8099 "MSRValue": "0x00BC000080", 8100 "Offcore": "1", 8101 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8102 "SampleAfterValue": "100003", 8103 "UMask": "0x1" 8104 }, 8105 { 8106 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 8107 "Counter": "0,1,2,3", 8108 "CounterHTOff": "0,1,2,3", 8109 "Deprecated": "1", 8110 "EventCode": "0xB7, 0xBB", 8111 "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 8112 "MSRIndex": "0x1a6,0x1a7", 8113 "MSRValue": "0x0804000001", 8114 "Offcore": "1", 8115 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8116 "SampleAfterValue": "100003", 8117 "UMask": "0x1" 8118 }, 8119 { 8120 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 8121 "Counter": "0,1,2,3", 8122 "CounterHTOff": "0,1,2,3", 8123 "Deprecated": "1", 8124 "EventCode": "0xB7, 0xBB", 8125 "EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 8126 "MSRIndex": "0x1a6,0x1a7", 8127 "MSRValue": "0x3F900007F7", 8128 "Offcore": "1", 8129 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8130 "SampleAfterValue": "100003", 8131 "UMask": "0x1" 8132 }, 8133 { 8134 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 8135 "Counter": "0,1,2,3", 8136 "CounterHTOff": "0,1,2,3", 8137 "Deprecated": "1", 8138 "EventCode": "0xB7, 0xBB", 8139 "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 8140 "MSRIndex": "0x1a6,0x1a7", 8141 "MSRValue": "0x3F84000004", 8142 "Offcore": "1", 8143 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8144 "SampleAfterValue": "100003", 8145 "UMask": "0x1" 8146 }, 8147 { 8148 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS.HIT_OTHER_CORE_FWD", 8149 "Counter": "0,1,2,3", 8150 "CounterHTOff": "0,1,2,3", 8151 "Deprecated": "1", 8152 "EventCode": "0xB7, 0xBB", 8153 "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS.HIT_OTHER_CORE_FWD", 8154 "MSRIndex": "0x1a6,0x1a7", 8155 "MSRValue": "0x083C000120", 8156 "Offcore": "1", 8157 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8158 "SampleAfterValue": "100003", 8159 "UMask": "0x1" 8160 }, 8161 { 8162 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS.SNOOP_NONE", 8163 "Counter": "0,1,2,3", 8164 "CounterHTOff": "0,1,2,3", 8165 "Deprecated": "1", 8166 "EventCode": "0xB7, 0xBB", 8167 "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS.SNOOP_NONE", 8168 "MSRIndex": "0x1a6,0x1a7", 8169 "MSRValue": "0x00BC000010", 8170 "Offcore": "1", 8171 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8172 "SampleAfterValue": "100003", 8173 "UMask": "0x1" 8174 }, 8175 { 8176 "BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS.HIT_OTHER_CORE_NO_FWD", 8177 "Counter": "0,1,2,3", 8178 "CounterHTOff": "0,1,2,3", 8179 "Deprecated": "1", 8180 "EventCode": "0xB7, 0xBB", 8181 "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS.HIT_OTHER_CORE_NO_FWD", 8182 "MSRIndex": "0x1a6,0x1a7", 8183 "MSRValue": "0x043C008000", 8184 "Offcore": "1", 8185 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8186 "SampleAfterValue": "100003", 8187 "UMask": "0x1" 8188 }, 8189 { 8190 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS.SNOOP_NONE", 8191 "Counter": "0,1,2,3", 8192 "CounterHTOff": "0,1,2,3", 8193 "Deprecated": "1", 8194 "EventCode": "0xB7, 0xBB", 8195 "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS.SNOOP_NONE", 8196 "MSRIndex": "0x1a6,0x1a7", 8197 "MSRValue": "0x00BC000020", 8198 "Offcore": "1", 8199 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8200 "SampleAfterValue": "100003", 8201 "UMask": "0x1" 8202 }, 8203 { 8204 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS.REMOTE_HITM", 8205 "Counter": "0,1,2,3", 8206 "CounterHTOff": "0,1,2,3", 8207 "Deprecated": "1", 8208 "EventCode": "0xB7, 0xBB", 8209 "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS.REMOTE_HITM", 8210 "MSRIndex": "0x1a6,0x1a7", 8211 "MSRValue": "0x103FC00004", 8212 "Offcore": "1", 8213 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8214 "SampleAfterValue": "100003", 8215 "UMask": "0x1" 8216 }, 8217 { 8218 "BriefDescription": "OCR.ALL_READS.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED OCR.ALL_READS.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 8219 "Counter": "0,1,2,3", 8220 "CounterHTOff": "0,1,2,3", 8221 "EventCode": "0xB7, 0xBB", 8222 "EventName": "OCR.ALL_READS.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 8223 "MSRIndex": "0x1a6,0x1a7", 8224 "MSRValue": "0x01040007F7", 8225 "Offcore": "1", 8226 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8227 "SampleAfterValue": "100003", 8228 "UMask": "0x1" 8229 }, 8230 { 8231 "BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD OCR.DEMAND_CODE_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD", 8232 "Counter": "0,1,2,3", 8233 "CounterHTOff": "0,1,2,3", 8234 "EventCode": "0xB7, 0xBB", 8235 "EventName": "OCR.DEMAND_CODE_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD", 8236 "MSRIndex": "0x1a6,0x1a7", 8237 "MSRValue": "0x043C000004", 8238 "Offcore": "1", 8239 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8240 "SampleAfterValue": "100003", 8241 "UMask": "0x1" 8242 }, 8243 { 8244 "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 8245 "Counter": "0,1,2,3", 8246 "CounterHTOff": "0,1,2,3", 8247 "EventCode": "0xB7, 0xBB", 8248 "EventName": "OCR.PF_L3_DATA_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 8249 "MSRIndex": "0x1a6,0x1a7", 8250 "MSRValue": "0x063B800080", 8251 "Offcore": "1", 8252 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8253 "SampleAfterValue": "100003", 8254 "UMask": "0x1" 8255 }, 8256 { 8257 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS.HITM_OTHER_CORE", 8258 "Counter": "0,1,2,3", 8259 "CounterHTOff": "0,1,2,3", 8260 "Deprecated": "1", 8261 "EventCode": "0xB7, 0xBB", 8262 "EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS.HITM_OTHER_CORE", 8263 "MSRIndex": "0x1a6,0x1a7", 8264 "MSRValue": "0x103C000400", 8265 "Offcore": "1", 8266 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8267 "SampleAfterValue": "100003", 8268 "UMask": "0x1" 8269 }, 8270 { 8271 "BriefDescription": "OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 8272 "Counter": "0,1,2,3", 8273 "CounterHTOff": "0,1,2,3", 8274 "EventCode": "0xB7, 0xBB", 8275 "EventName": "OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 8276 "MSRIndex": "0x1a6,0x1a7", 8277 "MSRValue": "0x0084000120", 8278 "Offcore": "1", 8279 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8280 "SampleAfterValue": "100003", 8281 "UMask": "0x1" 8282 }, 8283 { 8284 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 8285 "Counter": "0,1,2,3", 8286 "CounterHTOff": "0,1,2,3", 8287 "Deprecated": "1", 8288 "EventCode": "0xB7, 0xBB", 8289 "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 8290 "MSRIndex": "0x1a6,0x1a7", 8291 "MSRValue": "0x0810000020", 8292 "Offcore": "1", 8293 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8294 "SampleAfterValue": "100003", 8295 "UMask": "0x1" 8296 }, 8297 { 8298 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 8299 "Counter": "0,1,2,3", 8300 "CounterHTOff": "0,1,2,3", 8301 "Deprecated": "1", 8302 "EventCode": "0xB7, 0xBB", 8303 "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 8304 "MSRIndex": "0x1a6,0x1a7", 8305 "MSRValue": "0x3F84000080", 8306 "Offcore": "1", 8307 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8308 "SampleAfterValue": "100003", 8309 "UMask": "0x1" 8310 }, 8311 { 8312 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 8313 "Counter": "0,1,2,3", 8314 "CounterHTOff": "0,1,2,3", 8315 "Deprecated": "1", 8316 "EventCode": "0xB7, 0xBB", 8317 "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 8318 "MSRIndex": "0x1a6,0x1a7", 8319 "MSRValue": "0x1010000010", 8320 "Offcore": "1", 8321 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8322 "SampleAfterValue": "100003", 8323 "UMask": "0x1" 8324 }, 8325 { 8326 "BriefDescription": "OCR.ALL_DATA_RD.L3_MISS.REMOTE_HITM OCR.ALL_DATA_RD.L3_MISS.REMOTE_HITM", 8327 "Counter": "0,1,2,3", 8328 "CounterHTOff": "0,1,2,3", 8329 "EventCode": "0xB7, 0xBB", 8330 "EventName": "OCR.ALL_DATA_RD.L3_MISS.REMOTE_HITM", 8331 "MSRIndex": "0x1a6,0x1a7", 8332 "MSRValue": "0x103FC00491", 8333 "Offcore": "1", 8334 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8335 "SampleAfterValue": "100003", 8336 "UMask": "0x1" 8337 }, 8338 { 8339 "BriefDescription": "OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 8340 "Counter": "0,1,2,3", 8341 "CounterHTOff": "0,1,2,3", 8342 "EventCode": "0xB7, 0xBB", 8343 "EventName": "OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 8344 "MSRIndex": "0x1a6,0x1a7", 8345 "MSRValue": "0x0090000122", 8346 "Offcore": "1", 8347 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8348 "SampleAfterValue": "100003", 8349 "UMask": "0x1" 8350 }, 8351 { 8352 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD", 8353 "Counter": "0,1,2,3", 8354 "CounterHTOff": "0,1,2,3", 8355 "Deprecated": "1", 8356 "EventCode": "0xB7, 0xBB", 8357 "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD", 8358 "MSRIndex": "0x1a6,0x1a7", 8359 "MSRValue": "0x043C000001", 8360 "Offcore": "1", 8361 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8362 "SampleAfterValue": "100003", 8363 "UMask": "0x1" 8364 }, 8365 { 8366 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 8367 "Counter": "0,1,2,3", 8368 "CounterHTOff": "0,1,2,3", 8369 "Deprecated": "1", 8370 "EventCode": "0xB7, 0xBB", 8371 "EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 8372 "MSRIndex": "0x1a6,0x1a7", 8373 "MSRValue": "0x0084000400", 8374 "Offcore": "1", 8375 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8376 "SampleAfterValue": "100003", 8377 "UMask": "0x1" 8378 }, 8379 { 8380 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS.REMOTE_HIT_FORWARD", 8381 "Counter": "0,1,2,3", 8382 "CounterHTOff": "0,1,2,3", 8383 "Deprecated": "1", 8384 "EventCode": "0xB7, 0xBB", 8385 "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS.REMOTE_HIT_FORWARD", 8386 "MSRIndex": "0x1a6,0x1a7", 8387 "MSRValue": "0x083FC00001", 8388 "Offcore": "1", 8389 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8390 "SampleAfterValue": "100003", 8391 "UMask": "0x1" 8392 }, 8393 { 8394 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 8395 "Counter": "0,1,2,3", 8396 "CounterHTOff": "0,1,2,3", 8397 "Deprecated": "1", 8398 "EventCode": "0xB7, 0xBB", 8399 "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 8400 "MSRIndex": "0x1a6,0x1a7", 8401 "MSRValue": "0x0404000120", 8402 "Offcore": "1", 8403 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8404 "SampleAfterValue": "100003", 8405 "UMask": "0x1" 8406 }, 8407 { 8408 "BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_MISS.REMOTE_HITM", 8409 "Counter": "0,1,2,3", 8410 "CounterHTOff": "0,1,2,3", 8411 "EventCode": "0xB7, 0xBB", 8412 "EventName": "OCR.DEMAND_CODE_RD.L3_MISS.REMOTE_HITM", 8413 "MSRIndex": "0x1a6,0x1a7", 8414 "MSRValue": "0x103FC00004", 8415 "Offcore": "1", 8416 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8417 "SampleAfterValue": "100003", 8418 "UMask": "0x1" 8419 }, 8420 { 8421 "BriefDescription": "OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 8422 "Counter": "0,1,2,3", 8423 "CounterHTOff": "0,1,2,3", 8424 "EventCode": "0xB7, 0xBB", 8425 "EventName": "OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 8426 "MSRIndex": "0x1a6,0x1a7", 8427 "MSRValue": "0x0804000491", 8428 "Offcore": "1", 8429 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8430 "SampleAfterValue": "100003", 8431 "UMask": "0x1" 8432 }, 8433 { 8434 "BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_MISS.REMOTE_HIT_FORWARD", 8435 "Counter": "0,1,2,3", 8436 "CounterHTOff": "0,1,2,3", 8437 "EventCode": "0xB7, 0xBB", 8438 "EventName": "OCR.DEMAND_RFO.L3_MISS.REMOTE_HIT_FORWARD", 8439 "MSRIndex": "0x1a6,0x1a7", 8440 "MSRValue": "0x083FC00002", 8441 "Offcore": "1", 8442 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8443 "SampleAfterValue": "100003", 8444 "UMask": "0x1" 8445 }, 8446 { 8447 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS.SNOOP_MISS", 8448 "Counter": "0,1,2,3", 8449 "CounterHTOff": "0,1,2,3", 8450 "Deprecated": "1", 8451 "EventCode": "0xB7, 0xBB", 8452 "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS.SNOOP_MISS", 8453 "MSRIndex": "0x1a6,0x1a7", 8454 "MSRValue": "0x023C000120", 8455 "Offcore": "1", 8456 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8457 "SampleAfterValue": "100003", 8458 "UMask": "0x1" 8459 }, 8460 { 8461 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS.HITM_OTHER_CORE", 8462 "Counter": "0,1,2,3", 8463 "CounterHTOff": "0,1,2,3", 8464 "Deprecated": "1", 8465 "EventCode": "0xB7, 0xBB", 8466 "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS.HITM_OTHER_CORE", 8467 "MSRIndex": "0x1a6,0x1a7", 8468 "MSRValue": "0x103C000490", 8469 "Offcore": "1", 8470 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8471 "SampleAfterValue": "100003", 8472 "UMask": "0x1" 8473 }, 8474 { 8475 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS.REMOTE_HIT_FORWARD", 8476 "Counter": "0,1,2,3", 8477 "CounterHTOff": "0,1,2,3", 8478 "Deprecated": "1", 8479 "EventCode": "0xB7, 0xBB", 8480 "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS.REMOTE_HIT_FORWARD", 8481 "MSRIndex": "0x1a6,0x1a7", 8482 "MSRValue": "0x083FC00100", 8483 "Offcore": "1", 8484 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8485 "SampleAfterValue": "100003", 8486 "UMask": "0x1" 8487 }, 8488 { 8489 "BriefDescription": "Counts all demand data writes (RFOs)", 8490 "Counter": "0,1,2,3", 8491 "CounterHTOff": "0,1,2,3", 8492 "EventCode": "0xB7, 0xBB", 8493 "EventName": "OCR.DEMAND_RFO.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 8494 "MSRIndex": "0x1a6,0x1a7", 8495 "MSRValue": "0x0084000002", 8496 "Offcore": "1", 8497 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8498 "SampleAfterValue": "100003", 8499 "UMask": "0x1" 8500 }, 8501 { 8502 "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_MISS.REMOTE_HITM", 8503 "Counter": "0,1,2,3", 8504 "CounterHTOff": "0,1,2,3", 8505 "EventCode": "0xB7, 0xBB", 8506 "EventName": "OCR.PF_L3_RFO.L3_MISS.REMOTE_HITM", 8507 "MSRIndex": "0x1a6,0x1a7", 8508 "MSRValue": "0x103FC00100", 8509 "Offcore": "1", 8510 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8511 "SampleAfterValue": "100003", 8512 "UMask": "0x1" 8513 }, 8514 { 8515 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 8516 "Counter": "0,1,2,3", 8517 "CounterHTOff": "0,1,2,3", 8518 "Deprecated": "1", 8519 "EventCode": "0xB7, 0xBB", 8520 "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 8521 "MSRIndex": "0x1a6,0x1a7", 8522 "MSRValue": "0x063B800001", 8523 "Offcore": "1", 8524 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8525 "SampleAfterValue": "100003", 8526 "UMask": "0x1" 8527 }, 8528 { 8529 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 8530 "Counter": "0,1,2,3", 8531 "CounterHTOff": "0,1,2,3", 8532 "Deprecated": "1", 8533 "EventCode": "0xB7, 0xBB", 8534 "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 8535 "MSRIndex": "0x1a6,0x1a7", 8536 "MSRValue": "0x0104000002", 8537 "Offcore": "1", 8538 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8539 "SampleAfterValue": "100003", 8540 "UMask": "0x1" 8541 }, 8542 { 8543 "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads", 8544 "Counter": "0,1,2,3", 8545 "CounterHTOff": "0,1,2,3", 8546 "EventCode": "0xB7, 0xBB", 8547 "EventName": "OCR.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 8548 "MSRIndex": "0x1a6,0x1a7", 8549 "MSRValue": "0x0204000080", 8550 "Offcore": "1", 8551 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8552 "SampleAfterValue": "100003", 8553 "UMask": "0x1" 8554 }, 8555 { 8556 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 8557 "Counter": "0,1,2,3", 8558 "CounterHTOff": "0,1,2,3", 8559 "Deprecated": "1", 8560 "EventCode": "0xB7, 0xBB", 8561 "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 8562 "MSRIndex": "0x1a6,0x1a7", 8563 "MSRValue": "0x0804000122", 8564 "Offcore": "1", 8565 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8566 "SampleAfterValue": "100003", 8567 "UMask": "0x1" 8568 }, 8569 { 8570 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 8571 "Counter": "0,1,2,3", 8572 "CounterHTOff": "0,1,2,3", 8573 "Deprecated": "1", 8574 "EventCode": "0xB7, 0xBB", 8575 "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 8576 "MSRIndex": "0x1a6,0x1a7", 8577 "MSRValue": "0x0810000002", 8578 "Offcore": "1", 8579 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8580 "SampleAfterValue": "100003", 8581 "UMask": "0x1" 8582 }, 8583 { 8584 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 8585 "Counter": "0,1,2,3", 8586 "CounterHTOff": "0,1,2,3", 8587 "Deprecated": "1", 8588 "EventCode": "0xB7, 0xBB", 8589 "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 8590 "MSRIndex": "0x1a6,0x1a7", 8591 "MSRValue": "0x0204000080", 8592 "Offcore": "1", 8593 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8594 "SampleAfterValue": "100003", 8595 "UMask": "0x1" 8596 }, 8597 { 8598 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 8599 "Counter": "0,1,2,3", 8600 "CounterHTOff": "0,1,2,3", 8601 "Deprecated": "1", 8602 "EventCode": "0xB7, 0xBB", 8603 "EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 8604 "MSRIndex": "0x1a6,0x1a7", 8605 "MSRValue": "0x0104000400", 8606 "Offcore": "1", 8607 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8608 "SampleAfterValue": "100003", 8609 "UMask": "0x1" 8610 }, 8611 { 8612 "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_MISS.NO_SNOOP_NEEDED OCR.PF_L3_DATA_RD.L3_MISS.NO_SNOOP_NEEDED", 8613 "Counter": "0,1,2,3", 8614 "CounterHTOff": "0,1,2,3", 8615 "EventCode": "0xB7, 0xBB", 8616 "EventName": "OCR.PF_L3_DATA_RD.L3_MISS.NO_SNOOP_NEEDED", 8617 "MSRIndex": "0x1a6,0x1a7", 8618 "MSRValue": "0x013C000080", 8619 "Offcore": "1", 8620 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8621 "SampleAfterValue": "100003", 8622 "UMask": "0x1" 8623 }, 8624 { 8625 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 8626 "Counter": "0,1,2,3", 8627 "CounterHTOff": "0,1,2,3", 8628 "Deprecated": "1", 8629 "EventCode": "0xB7, 0xBB", 8630 "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 8631 "MSRIndex": "0x1a6,0x1a7", 8632 "MSRValue": "0x3F90000010", 8633 "Offcore": "1", 8634 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8635 "SampleAfterValue": "100003", 8636 "UMask": "0x1" 8637 }, 8638 { 8639 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 8640 "Counter": "0,1,2,3", 8641 "CounterHTOff": "0,1,2,3", 8642 "Deprecated": "1", 8643 "EventCode": "0xB7, 0xBB", 8644 "EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 8645 "MSRIndex": "0x1a6,0x1a7", 8646 "MSRValue": "0x1004000400", 8647 "Offcore": "1", 8648 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8649 "SampleAfterValue": "100003", 8650 "UMask": "0x1" 8651 }, 8652 { 8653 "BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS.HIT_OTHER_CORE_FWD", 8654 "Counter": "0,1,2,3", 8655 "CounterHTOff": "0,1,2,3", 8656 "Deprecated": "1", 8657 "EventCode": "0xB7, 0xBB", 8658 "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS.HIT_OTHER_CORE_FWD", 8659 "MSRIndex": "0x1a6,0x1a7", 8660 "MSRValue": "0x083C008000", 8661 "Offcore": "1", 8662 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8663 "SampleAfterValue": "100003", 8664 "UMask": "0x1" 8665 }, 8666 { 8667 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 8668 "Counter": "0,1,2,3", 8669 "CounterHTOff": "0,1,2,3", 8670 "Deprecated": "1", 8671 "EventCode": "0xB7, 0xBB", 8672 "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 8673 "MSRIndex": "0x1a6,0x1a7", 8674 "MSRValue": "0x0110000004", 8675 "Offcore": "1", 8676 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8677 "SampleAfterValue": "100003", 8678 "UMask": "0x1" 8679 }, 8680 { 8681 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS.NO_SNOOP_NEEDED", 8682 "Counter": "0,1,2,3", 8683 "CounterHTOff": "0,1,2,3", 8684 "Deprecated": "1", 8685 "EventCode": "0xB7, 0xBB", 8686 "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS.NO_SNOOP_NEEDED", 8687 "MSRIndex": "0x1a6,0x1a7", 8688 "MSRValue": "0x013C000001", 8689 "Offcore": "1", 8690 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8691 "SampleAfterValue": "100003", 8692 "UMask": "0x1" 8693 }, 8694 { 8695 "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 8696 "Counter": "0,1,2,3", 8697 "CounterHTOff": "0,1,2,3", 8698 "EventCode": "0xB7, 0xBB", 8699 "EventName": "OCR.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 8700 "MSRIndex": "0x1a6,0x1a7", 8701 "MSRValue": "0x0810000400", 8702 "Offcore": "1", 8703 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8704 "SampleAfterValue": "100003", 8705 "UMask": "0x1" 8706 }, 8707 { 8708 "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 8709 "Counter": "0,1,2,3", 8710 "CounterHTOff": "0,1,2,3", 8711 "EventCode": "0xB7, 0xBB", 8712 "EventName": "OCR.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 8713 "MSRIndex": "0x1a6,0x1a7", 8714 "MSRValue": "0x0804000080", 8715 "Offcore": "1", 8716 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8717 "SampleAfterValue": "100003", 8718 "UMask": "0x1" 8719 }, 8720 { 8721 "BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 8722 "Counter": "0,1,2,3", 8723 "CounterHTOff": "0,1,2,3", 8724 "Deprecated": "1", 8725 "EventCode": "0xB7, 0xBB", 8726 "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 8727 "MSRIndex": "0x1a6,0x1a7", 8728 "MSRValue": "0x0210008000", 8729 "Offcore": "1", 8730 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8731 "SampleAfterValue": "100003", 8732 "UMask": "0x1" 8733 }, 8734 { 8735 "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs", 8736 "Counter": "0,1,2,3", 8737 "CounterHTOff": "0,1,2,3", 8738 "EventCode": "0xB7, 0xBB", 8739 "EventName": "OCR.PF_L3_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 8740 "MSRIndex": "0x1a6,0x1a7", 8741 "MSRValue": "0x0204000100", 8742 "Offcore": "1", 8743 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8744 "SampleAfterValue": "100003", 8745 "UMask": "0x1" 8746 }, 8747 { 8748 "BriefDescription": "OCR.ALL_DATA_RD.L3_MISS.REMOTE_HIT_FORWARD OCR.ALL_DATA_RD.L3_MISS.REMOTE_HIT_FORWARD", 8749 "Counter": "0,1,2,3", 8750 "CounterHTOff": "0,1,2,3", 8751 "EventCode": "0xB7, 0xBB", 8752 "EventName": "OCR.ALL_DATA_RD.L3_MISS.REMOTE_HIT_FORWARD", 8753 "MSRIndex": "0x1a6,0x1a7", 8754 "MSRValue": "0x083FC00491", 8755 "Offcore": "1", 8756 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8757 "SampleAfterValue": "100003", 8758 "UMask": "0x1" 8759 }, 8760 { 8761 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS.ANY_SNOOP", 8762 "Counter": "0,1,2,3", 8763 "CounterHTOff": "0,1,2,3", 8764 "Deprecated": "1", 8765 "EventCode": "0xB7, 0xBB", 8766 "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS.ANY_SNOOP", 8767 "MSRIndex": "0x1a6,0x1a7", 8768 "MSRValue": "0x3FBC000491", 8769 "Offcore": "1", 8770 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8771 "SampleAfterValue": "100003", 8772 "UMask": "0x1" 8773 }, 8774 { 8775 "BriefDescription": "Demand Data Read requests who miss L3 cache", 8776 "Counter": "0,1,2,3", 8777 "CounterHTOff": "0,1,2,3,4,5,6,7", 8778 "EventCode": "0xB0", 8779 "EventName": "OFFCORE_REQUESTS.L3_MISS_DEMAND_DATA_RD", 8780 "PublicDescription": "Demand Data Read requests who miss L3 cache.", 8781 "SampleAfterValue": "100003", 8782 "UMask": "0x10" 8783 }, 8784 { 8785 "BriefDescription": "OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 8786 "Counter": "0,1,2,3", 8787 "CounterHTOff": "0,1,2,3", 8788 "EventCode": "0xB7, 0xBB", 8789 "EventName": "OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 8790 "MSRIndex": "0x1a6,0x1a7", 8791 "MSRValue": "0x01100007F7", 8792 "Offcore": "1", 8793 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8794 "SampleAfterValue": "100003", 8795 "UMask": "0x1" 8796 }, 8797 { 8798 "BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 8799 "Counter": "0,1,2,3", 8800 "CounterHTOff": "0,1,2,3", 8801 "EventCode": "0xB7, 0xBB", 8802 "EventName": "OCR.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 8803 "MSRIndex": "0x1a6,0x1a7", 8804 "MSRValue": "0x0810000010", 8805 "Offcore": "1", 8806 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8807 "SampleAfterValue": "100003", 8808 "UMask": "0x1" 8809 }, 8810 { 8811 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS.NO_SNOOP_NEEDED", 8812 "Counter": "0,1,2,3", 8813 "CounterHTOff": "0,1,2,3", 8814 "Deprecated": "1", 8815 "EventCode": "0xB7, 0xBB", 8816 "EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS.NO_SNOOP_NEEDED", 8817 "MSRIndex": "0x1a6,0x1a7", 8818 "MSRValue": "0x013C000400", 8819 "Offcore": "1", 8820 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8821 "SampleAfterValue": "100003", 8822 "UMask": "0x1" 8823 }, 8824 { 8825 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 8826 "Counter": "0,1,2,3", 8827 "CounterHTOff": "0,1,2,3", 8828 "Deprecated": "1", 8829 "EventCode": "0xB7, 0xBB", 8830 "EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 8831 "MSRIndex": "0x1a6,0x1a7", 8832 "MSRValue": "0x02040007F7", 8833 "Offcore": "1", 8834 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8835 "SampleAfterValue": "100003", 8836 "UMask": "0x1" 8837 }, 8838 { 8839 "BriefDescription": "OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 8840 "Counter": "0,1,2,3", 8841 "CounterHTOff": "0,1,2,3", 8842 "EventCode": "0xB7, 0xBB", 8843 "EventName": "OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 8844 "MSRIndex": "0x1a6,0x1a7", 8845 "MSRValue": "0x0404000120", 8846 "Offcore": "1", 8847 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8848 "SampleAfterValue": "100003", 8849 "UMask": "0x1" 8850 }, 8851 { 8852 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 8853 "Counter": "0,1,2,3", 8854 "CounterHTOff": "0,1,2,3", 8855 "Deprecated": "1", 8856 "EventCode": "0xB7, 0xBB", 8857 "EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 8858 "MSRIndex": "0x1a6,0x1a7", 8859 "MSRValue": "0x0110000400", 8860 "Offcore": "1", 8861 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8862 "SampleAfterValue": "100003", 8863 "UMask": "0x1" 8864 }, 8865 { 8866 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 8867 "Counter": "0,1,2,3", 8868 "CounterHTOff": "0,1,2,3", 8869 "Deprecated": "1", 8870 "EventCode": "0xB7, 0xBB", 8871 "EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 8872 "MSRIndex": "0x1a6,0x1a7", 8873 "MSRValue": "0x00900007F7", 8874 "Offcore": "1", 8875 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8876 "SampleAfterValue": "100003", 8877 "UMask": "0x1" 8878 }, 8879 { 8880 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 8881 "Counter": "0,1,2,3", 8882 "CounterHTOff": "0,1,2,3", 8883 "Deprecated": "1", 8884 "EventCode": "0xB7, 0xBB", 8885 "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 8886 "MSRIndex": "0x1a6,0x1a7", 8887 "MSRValue": "0x3F84000120", 8888 "Offcore": "1", 8889 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8890 "SampleAfterValue": "100003", 8891 "UMask": "0x1" 8892 }, 8893 { 8894 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 8895 "Counter": "0,1,2,3", 8896 "CounterHTOff": "0,1,2,3", 8897 "Deprecated": "1", 8898 "EventCode": "0xB7, 0xBB", 8899 "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 8900 "MSRIndex": "0x1a6,0x1a7", 8901 "MSRValue": "0x0410000100", 8902 "Offcore": "1", 8903 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8904 "SampleAfterValue": "100003", 8905 "UMask": "0x1" 8906 }, 8907 { 8908 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS.SNOOP_NONE", 8909 "Counter": "0,1,2,3", 8910 "CounterHTOff": "0,1,2,3", 8911 "Deprecated": "1", 8912 "EventCode": "0xB7, 0xBB", 8913 "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS.SNOOP_NONE", 8914 "MSRIndex": "0x1a6,0x1a7", 8915 "MSRValue": "0x00BC000122", 8916 "Offcore": "1", 8917 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8918 "SampleAfterValue": "100003", 8919 "UMask": "0x1" 8920 }, 8921 { 8922 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 8923 "Counter": "0,1,2,3", 8924 "CounterHTOff": "0,1,2,3", 8925 "Deprecated": "1", 8926 "EventCode": "0xB7, 0xBB", 8927 "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 8928 "MSRIndex": "0x1a6,0x1a7", 8929 "MSRValue": "0x0810000490", 8930 "Offcore": "1", 8931 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8932 "SampleAfterValue": "100003", 8933 "UMask": "0x1" 8934 }, 8935 { 8936 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 8937 "Counter": "0,1,2,3", 8938 "CounterHTOff": "0,1,2,3", 8939 "Deprecated": "1", 8940 "EventCode": "0xB7, 0xBB", 8941 "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 8942 "MSRIndex": "0x1a6,0x1a7", 8943 "MSRValue": "0x0604000080", 8944 "Offcore": "1", 8945 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8946 "SampleAfterValue": "100003", 8947 "UMask": "0x1" 8948 }, 8949 { 8950 "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_MISS.HIT_OTHER_CORE_NO_FWD OCR.PF_L1D_AND_SW.L3_MISS.HIT_OTHER_CORE_NO_FWD", 8951 "Counter": "0,1,2,3", 8952 "CounterHTOff": "0,1,2,3", 8953 "EventCode": "0xB7, 0xBB", 8954 "EventName": "OCR.PF_L1D_AND_SW.L3_MISS.HIT_OTHER_CORE_NO_FWD", 8955 "MSRIndex": "0x1a6,0x1a7", 8956 "MSRValue": "0x043C000400", 8957 "Offcore": "1", 8958 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8959 "SampleAfterValue": "100003", 8960 "UMask": "0x1" 8961 }, 8962 { 8963 "BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_MISS.HITM_OTHER_CORE OCR.DEMAND_CODE_RD.L3_MISS.HITM_OTHER_CORE", 8964 "Counter": "0,1,2,3", 8965 "CounterHTOff": "0,1,2,3", 8966 "EventCode": "0xB7, 0xBB", 8967 "EventName": "OCR.DEMAND_CODE_RD.L3_MISS.HITM_OTHER_CORE", 8968 "MSRIndex": "0x1a6,0x1a7", 8969 "MSRValue": "0x103C000004", 8970 "Offcore": "1", 8971 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8972 "SampleAfterValue": "100003", 8973 "UMask": "0x1" 8974 }, 8975 { 8976 "BriefDescription": "OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 8977 "Counter": "0,1,2,3", 8978 "CounterHTOff": "0,1,2,3", 8979 "EventCode": "0xB7, 0xBB", 8980 "EventName": "OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 8981 "MSRIndex": "0x1a6,0x1a7", 8982 "MSRValue": "0x1010000491", 8983 "Offcore": "1", 8984 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8985 "SampleAfterValue": "100003", 8986 "UMask": "0x1" 8987 }, 8988 { 8989 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS.SNOOP_MISS", 8990 "Counter": "0,1,2,3", 8991 "CounterHTOff": "0,1,2,3", 8992 "Deprecated": "1", 8993 "EventCode": "0xB7, 0xBB", 8994 "EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS.SNOOP_MISS", 8995 "MSRIndex": "0x1a6,0x1a7", 8996 "MSRValue": "0x023C000400", 8997 "Offcore": "1", 8998 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8999 "SampleAfterValue": "100003", 9000 "UMask": "0x1" 9001 }, 9002 { 9003 "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 9004 "Counter": "0,1,2,3", 9005 "CounterHTOff": "0,1,2,3", 9006 "EventCode": "0xB7, 0xBB", 9007 "EventName": "OCR.PF_L2_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 9008 "MSRIndex": "0x1a6,0x1a7", 9009 "MSRValue": "0x0804000020", 9010 "Offcore": "1", 9011 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9012 "SampleAfterValue": "100003", 9013 "UMask": "0x1" 9014 }, 9015 { 9016 "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs", 9017 "Counter": "0,1,2,3", 9018 "CounterHTOff": "0,1,2,3", 9019 "EventCode": "0xB7, 0xBB", 9020 "EventName": "OCR.PF_L2_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 9021 "MSRIndex": "0x1a6,0x1a7", 9022 "MSRValue": "0x0204000020", 9023 "Offcore": "1", 9024 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9025 "SampleAfterValue": "100003", 9026 "UMask": "0x1" 9027 }, 9028 { 9029 "BriefDescription": "OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 9030 "Counter": "0,1,2,3", 9031 "CounterHTOff": "0,1,2,3", 9032 "EventCode": "0xB7, 0xBB", 9033 "EventName": "OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 9034 "MSRIndex": "0x1a6,0x1a7", 9035 "MSRValue": "0x0110000491", 9036 "Offcore": "1", 9037 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9038 "SampleAfterValue": "100003", 9039 "UMask": "0x1" 9040 }, 9041 { 9042 "BriefDescription": "OCR.ALL_READS.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD OCR.ALL_READS.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 9043 "Counter": "0,1,2,3", 9044 "CounterHTOff": "0,1,2,3", 9045 "EventCode": "0xB7, 0xBB", 9046 "EventName": "OCR.ALL_READS.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 9047 "MSRIndex": "0x1a6,0x1a7", 9048 "MSRValue": "0x08040007F7", 9049 "Offcore": "1", 9050 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9051 "SampleAfterValue": "100003", 9052 "UMask": "0x1" 9053 }, 9054 { 9055 "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 9056 "Counter": "0,1,2,3", 9057 "CounterHTOff": "0,1,2,3", 9058 "EventCode": "0xB7, 0xBB", 9059 "EventName": "OCR.PF_L3_RFO.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 9060 "MSRIndex": "0x1a6,0x1a7", 9061 "MSRValue": "0x1004000100", 9062 "Offcore": "1", 9063 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9064 "SampleAfterValue": "100003", 9065 "UMask": "0x1" 9066 }, 9067 { 9068 "BriefDescription": "Counts all demand code reads", 9069 "Counter": "0,1,2,3", 9070 "CounterHTOff": "0,1,2,3", 9071 "EventCode": "0xB7, 0xBB", 9072 "EventName": "OCR.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 9073 "MSRIndex": "0x1a6,0x1a7", 9074 "MSRValue": "0x0084000004", 9075 "Offcore": "1", 9076 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9077 "SampleAfterValue": "100003", 9078 "UMask": "0x1" 9079 }, 9080 { 9081 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 9082 "Counter": "0,1,2,3", 9083 "CounterHTOff": "0,1,2,3", 9084 "Deprecated": "1", 9085 "EventCode": "0xB7, 0xBB", 9086 "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 9087 "MSRIndex": "0x1a6,0x1a7", 9088 "MSRValue": "0x3F90000122", 9089 "Offcore": "1", 9090 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9091 "SampleAfterValue": "100003", 9092 "UMask": "0x1" 9093 }, 9094 { 9095 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS.REMOTE_HITM", 9096 "Counter": "0,1,2,3", 9097 "CounterHTOff": "0,1,2,3", 9098 "Deprecated": "1", 9099 "EventCode": "0xB7, 0xBB", 9100 "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS.REMOTE_HITM", 9101 "MSRIndex": "0x1a6,0x1a7", 9102 "MSRValue": "0x103FC00010", 9103 "Offcore": "1", 9104 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9105 "SampleAfterValue": "100003", 9106 "UMask": "0x1" 9107 }, 9108 { 9109 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 9110 "Counter": "0,1,2,3", 9111 "CounterHTOff": "0,1,2,3", 9112 "Deprecated": "1", 9113 "EventCode": "0xB7, 0xBB", 9114 "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 9115 "MSRIndex": "0x1a6,0x1a7", 9116 "MSRValue": "0x1004000002", 9117 "Offcore": "1", 9118 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9119 "SampleAfterValue": "100003", 9120 "UMask": "0x1" 9121 }, 9122 { 9123 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 9124 "Counter": "0,1,2,3", 9125 "CounterHTOff": "0,1,2,3", 9126 "Deprecated": "1", 9127 "EventCode": "0xB7, 0xBB", 9128 "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 9129 "MSRIndex": "0x1a6,0x1a7", 9130 "MSRValue": "0x0084000004", 9131 "Offcore": "1", 9132 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9133 "SampleAfterValue": "100003", 9134 "UMask": "0x1" 9135 }, 9136 { 9137 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 9138 "Counter": "0,1,2,3", 9139 "CounterHTOff": "0,1,2,3", 9140 "Deprecated": "1", 9141 "EventCode": "0xB7, 0xBB", 9142 "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 9143 "MSRIndex": "0x1a6,0x1a7", 9144 "MSRValue": "0x0104000120", 9145 "Offcore": "1", 9146 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9147 "SampleAfterValue": "100003", 9148 "UMask": "0x1" 9149 }, 9150 { 9151 "BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 9152 "Counter": "0,1,2,3", 9153 "CounterHTOff": "0,1,2,3", 9154 "EventCode": "0xB7, 0xBB", 9155 "EventName": "OCR.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 9156 "MSRIndex": "0x1a6,0x1a7", 9157 "MSRValue": "0x0810000001", 9158 "Offcore": "1", 9159 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9160 "SampleAfterValue": "100003", 9161 "UMask": "0x1" 9162 }, 9163 { 9164 "BriefDescription": "Number of times an HLE execution aborted due to any reasons (multiple categories may count as one).", 9165 "Counter": "0,1,2,3", 9166 "CounterHTOff": "0,1,2,3,4,5,6,7", 9167 "EventCode": "0xC8", 9168 "EventName": "HLE_RETIRED.ABORTED", 9169 "PEBS": "1", 9170 "PublicDescription": "Number of times HLE abort was triggered.", 9171 "SampleAfterValue": "2000003", 9172 "UMask": "0x4" 9173 }, 9174 { 9175 "BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS.SNOOP_MISS", 9176 "Counter": "0,1,2,3", 9177 "CounterHTOff": "0,1,2,3", 9178 "Deprecated": "1", 9179 "EventCode": "0xB7, 0xBB", 9180 "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS.SNOOP_MISS", 9181 "MSRIndex": "0x1a6,0x1a7", 9182 "MSRValue": "0x023C008000", 9183 "Offcore": "1", 9184 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9185 "SampleAfterValue": "100003", 9186 "UMask": "0x1" 9187 }, 9188 { 9189 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS.NO_SNOOP_NEEDED", 9190 "Counter": "0,1,2,3", 9191 "CounterHTOff": "0,1,2,3", 9192 "Deprecated": "1", 9193 "EventCode": "0xB7, 0xBB", 9194 "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS.NO_SNOOP_NEEDED", 9195 "MSRIndex": "0x1a6,0x1a7", 9196 "MSRValue": "0x013C000010", 9197 "Offcore": "1", 9198 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9199 "SampleAfterValue": "100003", 9200 "UMask": "0x1" 9201 }, 9202 { 9203 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 9204 "Counter": "0,1,2,3", 9205 "CounterHTOff": "0,1,2,3", 9206 "Deprecated": "1", 9207 "EventCode": "0xB7, 0xBB", 9208 "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 9209 "MSRIndex": "0x1a6,0x1a7", 9210 "MSRValue": "0x0604000120", 9211 "Offcore": "1", 9212 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9213 "SampleAfterValue": "100003", 9214 "UMask": "0x1" 9215 }, 9216 { 9217 "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs", 9218 "Counter": "0,1,2,3", 9219 "CounterHTOff": "0,1,2,3", 9220 "EventCode": "0xB7, 0xBB", 9221 "EventName": "OCR.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 9222 "MSRIndex": "0x1a6,0x1a7", 9223 "MSRValue": "0x0090000020", 9224 "Offcore": "1", 9225 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9226 "SampleAfterValue": "100003", 9227 "UMask": "0x1" 9228 }, 9229 { 9230 "BriefDescription": "Counts prefetch (that bring data to L2) data reads", 9231 "Counter": "0,1,2,3", 9232 "CounterHTOff": "0,1,2,3", 9233 "EventCode": "0xB7, 0xBB", 9234 "EventName": "OCR.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 9235 "MSRIndex": "0x1a6,0x1a7", 9236 "MSRValue": "0x0204000010", 9237 "Offcore": "1", 9238 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9239 "SampleAfterValue": "100003", 9240 "UMask": "0x1" 9241 }, 9242 { 9243 "BriefDescription": "Counts all demand code reads", 9244 "Counter": "0,1,2,3", 9245 "CounterHTOff": "0,1,2,3", 9246 "EventCode": "0xB7, 0xBB", 9247 "EventName": "OCR.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 9248 "MSRIndex": "0x1a6,0x1a7", 9249 "MSRValue": "0x0090000004", 9250 "Offcore": "1", 9251 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9252 "SampleAfterValue": "100003", 9253 "UMask": "0x1" 9254 }, 9255 { 9256 "BriefDescription": "OCR.ALL_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD OCR.ALL_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD OCR.ALL_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD", 9257 "Counter": "0,1,2,3", 9258 "CounterHTOff": "0,1,2,3", 9259 "EventCode": "0xB7, 0xBB", 9260 "EventName": "OCR.ALL_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD", 9261 "MSRIndex": "0x1a6,0x1a7", 9262 "MSRValue": "0x083C000491", 9263 "Offcore": "1", 9264 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9265 "SampleAfterValue": "100003", 9266 "UMask": "0x1" 9267 }, 9268 { 9269 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 9270 "Counter": "0,1,2,3", 9271 "CounterHTOff": "0,1,2,3", 9272 "Deprecated": "1", 9273 "EventCode": "0xB7, 0xBB", 9274 "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 9275 "MSRIndex": "0x1a6,0x1a7", 9276 "MSRValue": "0x1010000491", 9277 "Offcore": "1", 9278 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9279 "SampleAfterValue": "100003", 9280 "UMask": "0x1" 9281 }, 9282 { 9283 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 9284 "Counter": "0,1,2,3", 9285 "CounterHTOff": "0,1,2,3", 9286 "Deprecated": "1", 9287 "EventCode": "0xB7, 0xBB", 9288 "EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 9289 "MSRIndex": "0x1a6,0x1a7", 9290 "MSRValue": "0x0804000400", 9291 "Offcore": "1", 9292 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9293 "SampleAfterValue": "100003", 9294 "UMask": "0x1" 9295 }, 9296 { 9297 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 9298 "Counter": "0,1,2,3", 9299 "CounterHTOff": "0,1,2,3", 9300 "Deprecated": "1", 9301 "EventCode": "0xB7, 0xBB", 9302 "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 9303 "MSRIndex": "0x1a6,0x1a7", 9304 "MSRValue": "0x063B800120", 9305 "Offcore": "1", 9306 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9307 "SampleAfterValue": "100003", 9308 "UMask": "0x1" 9309 }, 9310 { 9311 "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 9312 "Counter": "0,1,2,3", 9313 "CounterHTOff": "0,1,2,3", 9314 "EventCode": "0xB7, 0xBB", 9315 "EventName": "OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 9316 "MSRIndex": "0x1a6,0x1a7", 9317 "MSRValue": "0x0810000490", 9318 "Offcore": "1", 9319 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9320 "SampleAfterValue": "100003", 9321 "UMask": "0x1" 9322 }, 9323 { 9324 "BriefDescription": "OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 9325 "Counter": "0,1,2,3", 9326 "CounterHTOff": "0,1,2,3", 9327 "EventCode": "0xB7, 0xBB", 9328 "EventName": "OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 9329 "MSRIndex": "0x1a6,0x1a7", 9330 "MSRValue": "0x3F84000491", 9331 "Offcore": "1", 9332 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9333 "SampleAfterValue": "100003", 9334 "UMask": "0x1" 9335 }, 9336 { 9337 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 9338 "Counter": "0,1,2,3", 9339 "CounterHTOff": "0,1,2,3", 9340 "Deprecated": "1", 9341 "EventCode": "0xB7, 0xBB", 9342 "EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 9343 "MSRIndex": "0x1a6,0x1a7", 9344 "MSRValue": "0x0810000400", 9345 "Offcore": "1", 9346 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9347 "SampleAfterValue": "100003", 9348 "UMask": "0x1" 9349 }, 9350 { 9351 "BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_MISS.ANY_SNOOP OCR.PF_L2_DATA_RD.L3_MISS.ANY_SNOOP", 9352 "Counter": "0,1,2,3", 9353 "CounterHTOff": "0,1,2,3", 9354 "EventCode": "0xB7, 0xBB", 9355 "EventName": "OCR.PF_L2_DATA_RD.L3_MISS.ANY_SNOOP", 9356 "MSRIndex": "0x1a6,0x1a7", 9357 "MSRValue": "0x3FBC000010", 9358 "Offcore": "1", 9359 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9360 "SampleAfterValue": "100003", 9361 "UMask": "0x1" 9362 }, 9363 { 9364 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 9365 "Counter": "0,1,2,3", 9366 "CounterHTOff": "0,1,2,3", 9367 "Deprecated": "1", 9368 "EventCode": "0xB7, 0xBB", 9369 "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 9370 "MSRIndex": "0x1a6,0x1a7", 9371 "MSRValue": "0x0410000122", 9372 "Offcore": "1", 9373 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9374 "SampleAfterValue": "100003", 9375 "UMask": "0x1" 9376 }, 9377 { 9378 "BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 9379 "Counter": "0,1,2,3", 9380 "CounterHTOff": "0,1,2,3", 9381 "EventCode": "0xB7, 0xBB", 9382 "EventName": "OCR.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 9383 "MSRIndex": "0x1a6,0x1a7", 9384 "MSRValue": "0x0410000004", 9385 "Offcore": "1", 9386 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9387 "SampleAfterValue": "100003", 9388 "UMask": "0x1" 9389 }, 9390 { 9391 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 9392 "Counter": "0,1,2,3", 9393 "CounterHTOff": "0,1,2,3", 9394 "Deprecated": "1", 9395 "EventCode": "0xB7, 0xBB", 9396 "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 9397 "MSRIndex": "0x1a6,0x1a7", 9398 "MSRValue": "0x0210000004", 9399 "Offcore": "1", 9400 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9401 "SampleAfterValue": "100003", 9402 "UMask": "0x1" 9403 }, 9404 { 9405 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 9406 "Counter": "0,1,2,3", 9407 "CounterHTOff": "0,1,2,3", 9408 "Deprecated": "1", 9409 "EventCode": "0xB7, 0xBB", 9410 "EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 9411 "MSRIndex": "0x1a6,0x1a7", 9412 "MSRValue": "0x1010000400", 9413 "Offcore": "1", 9414 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9415 "SampleAfterValue": "100003", 9416 "UMask": "0x1" 9417 }, 9418 { 9419 "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 9420 "Counter": "0,1,2,3", 9421 "CounterHTOff": "0,1,2,3", 9422 "EventCode": "0xB7, 0xBB", 9423 "EventName": "OCR.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 9424 "MSRIndex": "0x1a6,0x1a7", 9425 "MSRValue": "0x0410000080", 9426 "Offcore": "1", 9427 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9428 "SampleAfterValue": "100003", 9429 "UMask": "0x1" 9430 }, 9431 { 9432 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 9433 "Counter": "0,1,2,3", 9434 "CounterHTOff": "0,1,2,3", 9435 "Deprecated": "1", 9436 "EventCode": "0xB7, 0xBB", 9437 "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 9438 "MSRIndex": "0x1a6,0x1a7", 9439 "MSRValue": "0x0810000491", 9440 "Offcore": "1", 9441 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9442 "SampleAfterValue": "100003", 9443 "UMask": "0x1" 9444 }, 9445 { 9446 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 9447 "Counter": "0,1,2,3", 9448 "CounterHTOff": "0,1,2,3", 9449 "Deprecated": "1", 9450 "EventCode": "0xB7, 0xBB", 9451 "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 9452 "MSRIndex": "0x1a6,0x1a7", 9453 "MSRValue": "0x3F90000001", 9454 "Offcore": "1", 9455 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9456 "SampleAfterValue": "100003", 9457 "UMask": "0x1" 9458 }, 9459 { 9460 "BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 9461 "Counter": "0,1,2,3", 9462 "CounterHTOff": "0,1,2,3", 9463 "EventCode": "0xB7, 0xBB", 9464 "EventName": "OCR.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 9465 "MSRIndex": "0x1a6,0x1a7", 9466 "MSRValue": "0x0104000001", 9467 "Offcore": "1", 9468 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9469 "SampleAfterValue": "100003", 9470 "UMask": "0x1" 9471 }, 9472 { 9473 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS.REMOTE_HIT_FORWARD", 9474 "Counter": "0,1,2,3", 9475 "CounterHTOff": "0,1,2,3", 9476 "Deprecated": "1", 9477 "EventCode": "0xB7, 0xBB", 9478 "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS.REMOTE_HIT_FORWARD", 9479 "MSRIndex": "0x1a6,0x1a7", 9480 "MSRValue": "0x083FC00010", 9481 "Offcore": "1", 9482 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9483 "SampleAfterValue": "100003", 9484 "UMask": "0x1" 9485 }, 9486 { 9487 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS.HITM_OTHER_CORE", 9488 "Counter": "0,1,2,3", 9489 "CounterHTOff": "0,1,2,3", 9490 "Deprecated": "1", 9491 "EventCode": "0xB7, 0xBB", 9492 "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS.HITM_OTHER_CORE", 9493 "MSRIndex": "0x1a6,0x1a7", 9494 "MSRValue": "0x103C000491", 9495 "Offcore": "1", 9496 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9497 "SampleAfterValue": "100003", 9498 "UMask": "0x1" 9499 }, 9500 { 9501 "BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD OCR.PF_L2_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD", 9502 "Counter": "0,1,2,3", 9503 "CounterHTOff": "0,1,2,3", 9504 "EventCode": "0xB7, 0xBB", 9505 "EventName": "OCR.PF_L2_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD", 9506 "MSRIndex": "0x1a6,0x1a7", 9507 "MSRValue": "0x043C000010", 9508 "Offcore": "1", 9509 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9510 "SampleAfterValue": "100003", 9511 "UMask": "0x1" 9512 }, 9513 { 9514 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS.HIT_OTHER_CORE_FWD", 9515 "Counter": "0,1,2,3", 9516 "CounterHTOff": "0,1,2,3", 9517 "Deprecated": "1", 9518 "EventCode": "0xB7, 0xBB", 9519 "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS.HIT_OTHER_CORE_FWD", 9520 "MSRIndex": "0x1a6,0x1a7", 9521 "MSRValue": "0x083C000100", 9522 "Offcore": "1", 9523 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9524 "SampleAfterValue": "100003", 9525 "UMask": "0x1" 9526 }, 9527 { 9528 "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 9529 "Counter": "0,1,2,3", 9530 "CounterHTOff": "0,1,2,3", 9531 "EventCode": "0xB7, 0xBB", 9532 "EventName": "OCR.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 9533 "MSRIndex": "0x1a6,0x1a7", 9534 "MSRValue": "0x0804000400", 9535 "Offcore": "1", 9536 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9537 "SampleAfterValue": "100003", 9538 "UMask": "0x1" 9539 }, 9540 { 9541 "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 9542 "Counter": "0,1,2,3", 9543 "CounterHTOff": "0,1,2,3", 9544 "EventCode": "0xB7, 0xBB", 9545 "EventName": "OCR.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 9546 "MSRIndex": "0x1a6,0x1a7", 9547 "MSRValue": "0x3F90000020", 9548 "Offcore": "1", 9549 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9550 "SampleAfterValue": "100003", 9551 "UMask": "0x1" 9552 }, 9553 { 9554 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 9555 "Counter": "0,1,2,3", 9556 "CounterHTOff": "0,1,2,3", 9557 "Deprecated": "1", 9558 "EventCode": "0xB7, 0xBB", 9559 "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 9560 "MSRIndex": "0x1a6,0x1a7", 9561 "MSRValue": "0x0210000122", 9562 "Offcore": "1", 9563 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9564 "SampleAfterValue": "100003", 9565 "UMask": "0x1" 9566 }, 9567 { 9568 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 9569 "Counter": "0,1,2,3", 9570 "CounterHTOff": "0,1,2,3", 9571 "Deprecated": "1", 9572 "EventCode": "0xB7, 0xBB", 9573 "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 9574 "MSRIndex": "0x1a6,0x1a7", 9575 "MSRValue": "0x0810000001", 9576 "Offcore": "1", 9577 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9578 "SampleAfterValue": "100003", 9579 "UMask": "0x1" 9580 }, 9581 { 9582 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 9583 "Counter": "0,1,2,3", 9584 "CounterHTOff": "0,1,2,3", 9585 "Deprecated": "1", 9586 "EventCode": "0xB7, 0xBB", 9587 "EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 9588 "MSRIndex": "0x1a6,0x1a7", 9589 "MSRValue": "0x3F90000400", 9590 "Offcore": "1", 9591 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9592 "SampleAfterValue": "100003", 9593 "UMask": "0x1" 9594 }, 9595 { 9596 "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 9597 "Counter": "0,1,2,3", 9598 "CounterHTOff": "0,1,2,3", 9599 "EventCode": "0xB7, 0xBB", 9600 "EventName": "OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 9601 "MSRIndex": "0x1a6,0x1a7", 9602 "MSRValue": "0x0090000490", 9603 "Offcore": "1", 9604 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9605 "SampleAfterValue": "100003", 9606 "UMask": "0x1" 9607 }, 9608 { 9609 "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_MISS.HIT_OTHER_CORE_FWD OCR.PF_L1D_AND_SW.L3_MISS.HIT_OTHER_CORE_FWD", 9610 "Counter": "0,1,2,3", 9611 "CounterHTOff": "0,1,2,3", 9612 "EventCode": "0xB7, 0xBB", 9613 "EventName": "OCR.PF_L1D_AND_SW.L3_MISS.HIT_OTHER_CORE_FWD", 9614 "MSRIndex": "0x1a6,0x1a7", 9615 "MSRValue": "0x083C000400", 9616 "Offcore": "1", 9617 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9618 "SampleAfterValue": "100003", 9619 "UMask": "0x1" 9620 }, 9621 { 9622 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 9623 "Counter": "0,1,2,3", 9624 "CounterHTOff": "0,1,2,3", 9625 "Deprecated": "1", 9626 "EventCode": "0xB7, 0xBB", 9627 "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 9628 "MSRIndex": "0x1a6,0x1a7", 9629 "MSRValue": "0x0110000120", 9630 "Offcore": "1", 9631 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9632 "SampleAfterValue": "100003", 9633 "UMask": "0x1" 9634 }, 9635 { 9636 "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_MISS.REMOTE_HITM", 9637 "Counter": "0,1,2,3", 9638 "CounterHTOff": "0,1,2,3", 9639 "EventCode": "0xB7, 0xBB", 9640 "EventName": "OCR.PF_L2_RFO.L3_MISS.REMOTE_HITM", 9641 "MSRIndex": "0x1a6,0x1a7", 9642 "MSRValue": "0x103FC00020", 9643 "Offcore": "1", 9644 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9645 "SampleAfterValue": "100003", 9646 "UMask": "0x1" 9647 }, 9648 { 9649 "BriefDescription": "Number of times an HLE execution started.", 9650 "Counter": "0,1,2,3", 9651 "CounterHTOff": "0,1,2,3,4,5,6,7", 9652 "EventCode": "0xC8", 9653 "EventName": "HLE_RETIRED.START", 9654 "PublicDescription": "Number of times we entered an HLE region. Does not count nested transactions.", 9655 "SampleAfterValue": "2000003", 9656 "UMask": "0x1" 9657 }, 9658 { 9659 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 9660 "Counter": "0,1,2,3", 9661 "CounterHTOff": "0,1,2,3", 9662 "Deprecated": "1", 9663 "EventCode": "0xB7, 0xBB", 9664 "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 9665 "MSRIndex": "0x1a6,0x1a7", 9666 "MSRValue": "0x1004000020", 9667 "Offcore": "1", 9668 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9669 "SampleAfterValue": "100003", 9670 "UMask": "0x1" 9671 }, 9672 { 9673 "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 9674 "Counter": "0,1,2,3", 9675 "CounterHTOff": "0,1,2,3", 9676 "EventCode": "0xB7, 0xBB", 9677 "EventName": "OCR.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 9678 "MSRIndex": "0x1a6,0x1a7", 9679 "MSRValue": "0x1010000400", 9680 "Offcore": "1", 9681 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9682 "SampleAfterValue": "100003", 9683 "UMask": "0x1" 9684 }, 9685 { 9686 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS.REMOTE_HIT_FORWARD", 9687 "Counter": "0,1,2,3", 9688 "CounterHTOff": "0,1,2,3", 9689 "Deprecated": "1", 9690 "EventCode": "0xB7, 0xBB", 9691 "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS.REMOTE_HIT_FORWARD", 9692 "MSRIndex": "0x1a6,0x1a7", 9693 "MSRValue": "0x083FC00004", 9694 "Offcore": "1", 9695 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9696 "SampleAfterValue": "100003", 9697 "UMask": "0x1" 9698 }, 9699 { 9700 "BriefDescription": "OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 9701 "Counter": "0,1,2,3", 9702 "CounterHTOff": "0,1,2,3", 9703 "EventCode": "0xB7, 0xBB", 9704 "EventName": "OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 9705 "MSRIndex": "0x1a6,0x1a7", 9706 "MSRValue": "0x0410000491", 9707 "Offcore": "1", 9708 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9709 "SampleAfterValue": "100003", 9710 "UMask": "0x1" 9711 }, 9712 { 9713 "BriefDescription": "OCR.ALL_PF_RFO.L3_MISS.HIT_OTHER_CORE_FWD OCR.ALL_PF_RFO.L3_MISS.HIT_OTHER_CORE_FWD OCR.ALL_PF_RFO.L3_MISS.HIT_OTHER_CORE_FWD", 9714 "Counter": "0,1,2,3", 9715 "CounterHTOff": "0,1,2,3", 9716 "EventCode": "0xB7, 0xBB", 9717 "EventName": "OCR.ALL_PF_RFO.L3_MISS.HIT_OTHER_CORE_FWD", 9718 "MSRIndex": "0x1a6,0x1a7", 9719 "MSRValue": "0x083C000120", 9720 "Offcore": "1", 9721 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9722 "SampleAfterValue": "100003", 9723 "UMask": "0x1" 9724 }, 9725 { 9726 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 9727 "Counter": "0,1,2,3", 9728 "CounterHTOff": "0,1,2,3", 9729 "Deprecated": "1", 9730 "EventCode": "0xB7, 0xBB", 9731 "EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 9732 "MSRIndex": "0x1a6,0x1a7", 9733 "MSRValue": "0x0410000400", 9734 "Offcore": "1", 9735 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9736 "SampleAfterValue": "100003", 9737 "UMask": "0x1" 9738 }, 9739 { 9740 "BriefDescription": "OCR.ALL_READS.L3_MISS.HITM_OTHER_CORE OCR.ALL_READS.L3_MISS.HITM_OTHER_CORE OCR.ALL_READS.L3_MISS.HITM_OTHER_CORE", 9741 "Counter": "0,1,2,3", 9742 "CounterHTOff": "0,1,2,3", 9743 "EventCode": "0xB7, 0xBB", 9744 "EventName": "OCR.ALL_READS.L3_MISS.HITM_OTHER_CORE", 9745 "MSRIndex": "0x1a6,0x1a7", 9746 "MSRValue": "0x103C0007F7", 9747 "Offcore": "1", 9748 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9749 "SampleAfterValue": "100003", 9750 "UMask": "0x1" 9751 }, 9752 { 9753 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 9754 "Counter": "0,1,2,3", 9755 "CounterHTOff": "0,1,2,3", 9756 "Deprecated": "1", 9757 "EventCode": "0xB7, 0xBB", 9758 "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 9759 "MSRIndex": "0x1a6,0x1a7", 9760 "MSRValue": "0x0404000100", 9761 "Offcore": "1", 9762 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9763 "SampleAfterValue": "100003", 9764 "UMask": "0x1" 9765 }, 9766 { 9767 "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 9768 "Counter": "0,1,2,3", 9769 "CounterHTOff": "0,1,2,3", 9770 "EventCode": "0xB7, 0xBB", 9771 "EventName": "OCR.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 9772 "MSRIndex": "0x1a6,0x1a7", 9773 "MSRValue": "0x1010000100", 9774 "Offcore": "1", 9775 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9776 "SampleAfterValue": "100003", 9777 "UMask": "0x1" 9778 }, 9779 { 9780 "BriefDescription": "Counts any other requests OCR.OTHER.L3_MISS.HIT_OTHER_CORE_FWD OCR.OTHER.L3_MISS.HIT_OTHER_CORE_FWD", 9781 "Counter": "0,1,2,3", 9782 "CounterHTOff": "0,1,2,3", 9783 "EventCode": "0xB7, 0xBB", 9784 "EventName": "OCR.OTHER.L3_MISS.HIT_OTHER_CORE_FWD", 9785 "MSRIndex": "0x1a6,0x1a7", 9786 "MSRValue": "0x083C008000", 9787 "Offcore": "1", 9788 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9789 "SampleAfterValue": "100003", 9790 "UMask": "0x1" 9791 }, 9792 { 9793 "BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 9794 "Counter": "0,1,2,3", 9795 "CounterHTOff": "0,1,2,3", 9796 "Deprecated": "1", 9797 "EventCode": "0xB7, 0xBB", 9798 "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 9799 "MSRIndex": "0x1a6,0x1a7", 9800 "MSRValue": "0x0810008000", 9801 "Offcore": "1", 9802 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9803 "SampleAfterValue": "100003", 9804 "UMask": "0x1" 9805 }, 9806 { 9807 "BriefDescription": "OCR.ALL_PF_RFO.L3_MISS.REMOTE_HITM OCR.ALL_PF_RFO.L3_MISS.REMOTE_HITM", 9808 "Counter": "0,1,2,3", 9809 "CounterHTOff": "0,1,2,3", 9810 "EventCode": "0xB7, 0xBB", 9811 "EventName": "OCR.ALL_PF_RFO.L3_MISS.REMOTE_HITM", 9812 "MSRIndex": "0x1a6,0x1a7", 9813 "MSRValue": "0x103FC00120", 9814 "Offcore": "1", 9815 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9816 "SampleAfterValue": "100003", 9817 "UMask": "0x1" 9818 }, 9819 { 9820 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 9821 "Counter": "0,1,2,3", 9822 "CounterHTOff": "0,1,2,3", 9823 "Deprecated": "1", 9824 "EventCode": "0xB7, 0xBB", 9825 "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 9826 "MSRIndex": "0x1a6,0x1a7", 9827 "MSRValue": "0x0204000010", 9828 "Offcore": "1", 9829 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9830 "SampleAfterValue": "100003", 9831 "UMask": "0x1" 9832 }, 9833 { 9834 "BriefDescription": "OCR.ALL_READS.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 9835 "Counter": "0,1,2,3", 9836 "CounterHTOff": "0,1,2,3", 9837 "EventCode": "0xB7, 0xBB", 9838 "EventName": "OCR.ALL_READS.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 9839 "MSRIndex": "0x1a6,0x1a7", 9840 "MSRValue": "0x00840007F7", 9841 "Offcore": "1", 9842 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9843 "SampleAfterValue": "100003", 9844 "UMask": "0x1" 9845 }, 9846 { 9847 "BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 4 cycles.", 9848 "Counter": "0,1,2,3", 9849 "CounterHTOff": "0,1,2,3", 9850 "Data_LA": "1", 9851 "EventCode": "0xcd", 9852 "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_4", 9853 "MSRIndex": "0x3F6", 9854 "MSRValue": "0x4", 9855 "PEBS": "2", 9856 "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 4 cycles. Reported latency may be longer than just the memory latency.", 9857 "SampleAfterValue": "100003", 9858 "TakenAlone": "1", 9859 "UMask": "0x1" 9860 }, 9861 { 9862 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS.SNOOP_MISS", 9863 "Counter": "0,1,2,3", 9864 "CounterHTOff": "0,1,2,3", 9865 "Deprecated": "1", 9866 "EventCode": "0xB7, 0xBB", 9867 "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS.SNOOP_MISS", 9868 "MSRIndex": "0x1a6,0x1a7", 9869 "MSRValue": "0x023C000100", 9870 "Offcore": "1", 9871 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9872 "SampleAfterValue": "100003", 9873 "UMask": "0x1" 9874 }, 9875 { 9876 "BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 8 cycles.", 9877 "Counter": "0,1,2,3", 9878 "CounterHTOff": "0,1,2,3", 9879 "Data_LA": "1", 9880 "EventCode": "0xcd", 9881 "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_8", 9882 "MSRIndex": "0x3F6", 9883 "MSRValue": "0x8", 9884 "PEBS": "2", 9885 "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 8 cycles. Reported latency may be longer than just the memory latency.", 9886 "SampleAfterValue": "50021", 9887 "TakenAlone": "1", 9888 "UMask": "0x1" 9889 }, 9890 { 9891 "BriefDescription": "OCR.ALL_READS.L3_MISS.HIT_OTHER_CORE_FWD OCR.ALL_READS.L3_MISS.HIT_OTHER_CORE_FWD OCR.ALL_READS.L3_MISS.HIT_OTHER_CORE_FWD", 9892 "Counter": "0,1,2,3", 9893 "CounterHTOff": "0,1,2,3", 9894 "EventCode": "0xB7, 0xBB", 9895 "EventName": "OCR.ALL_READS.L3_MISS.HIT_OTHER_CORE_FWD", 9896 "MSRIndex": "0x1a6,0x1a7", 9897 "MSRValue": "0x083C0007F7", 9898 "Offcore": "1", 9899 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9900 "SampleAfterValue": "100003", 9901 "UMask": "0x1" 9902 }, 9903 { 9904 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 9905 "Counter": "0,1,2,3", 9906 "CounterHTOff": "0,1,2,3", 9907 "Deprecated": "1", 9908 "EventCode": "0xB7, 0xBB", 9909 "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 9910 "MSRIndex": "0x1a6,0x1a7", 9911 "MSRValue": "0x0110000001", 9912 "Offcore": "1", 9913 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9914 "SampleAfterValue": "100003", 9915 "UMask": "0x1" 9916 } 9917]