1ecd94f1bSKan Liang[ 2ecd94f1bSKan Liang { 3*e0ddfd8dSJin Yao "BriefDescription": "Cycles while L3 cache miss demand load is outstanding.", 4*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 5*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3,4,5,6,7", 6*e0ddfd8dSJin Yao "CounterMask": "2", 7*e0ddfd8dSJin Yao "EventCode": "0xA3", 8*e0ddfd8dSJin Yao "EventName": "CYCLE_ACTIVITY.CYCLES_L3_MISS", 9*e0ddfd8dSJin Yao "SampleAfterValue": "2000003", 10*e0ddfd8dSJin Yao "UMask": "0x2" 11*e0ddfd8dSJin Yao }, 12*e0ddfd8dSJin Yao { 13*e0ddfd8dSJin Yao "BriefDescription": "Execution stalls while L3 cache miss demand load is outstanding.", 14*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 15*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3,4,5,6,7", 16*e0ddfd8dSJin Yao "CounterMask": "6", 17*e0ddfd8dSJin Yao "EventCode": "0xA3", 18*e0ddfd8dSJin Yao "EventName": "CYCLE_ACTIVITY.STALLS_L3_MISS", 19*e0ddfd8dSJin Yao "SampleAfterValue": "2000003", 20*e0ddfd8dSJin Yao "UMask": "0x6" 21*e0ddfd8dSJin Yao }, 22*e0ddfd8dSJin Yao { 23*e0ddfd8dSJin Yao "BriefDescription": "Number of times an HLE execution aborted due to any reasons (multiple categories may count as one).", 24*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 25*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3,4,5,6,7", 26*e0ddfd8dSJin Yao "EventCode": "0xC8", 27*e0ddfd8dSJin Yao "EventName": "HLE_RETIRED.ABORTED", 28*e0ddfd8dSJin Yao "PEBS": "1", 29*e0ddfd8dSJin Yao "PublicDescription": "Number of times HLE abort was triggered.", 30*e0ddfd8dSJin Yao "SampleAfterValue": "2000003", 31*e0ddfd8dSJin Yao "UMask": "0x4" 32*e0ddfd8dSJin Yao }, 33*e0ddfd8dSJin Yao { 34*e0ddfd8dSJin Yao "BriefDescription": "Number of times an HLE execution aborted due to unfriendly events (such as interrupts).", 35*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 36*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3,4,5,6,7", 37*e0ddfd8dSJin Yao "EventCode": "0xC8", 38*e0ddfd8dSJin Yao "EventName": "HLE_RETIRED.ABORTED_EVENTS", 39*e0ddfd8dSJin Yao "SampleAfterValue": "2000003", 40*e0ddfd8dSJin Yao "UMask": "0x80" 41*e0ddfd8dSJin Yao }, 42*e0ddfd8dSJin Yao { 43*e0ddfd8dSJin Yao "BriefDescription": "Number of times an HLE execution aborted due to various memory events (e.g., read/write capacity and conflicts).", 44*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 45*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3,4,5,6,7", 46*e0ddfd8dSJin Yao "EventCode": "0xC8", 47*e0ddfd8dSJin Yao "EventName": "HLE_RETIRED.ABORTED_MEM", 48*e0ddfd8dSJin Yao "SampleAfterValue": "2000003", 49*e0ddfd8dSJin Yao "UMask": "0x8" 50*e0ddfd8dSJin Yao }, 51*e0ddfd8dSJin Yao { 52*e0ddfd8dSJin Yao "BriefDescription": "Number of times an HLE execution aborted due to incompatible memory type", 53*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 54*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3,4,5,6,7", 55*e0ddfd8dSJin Yao "EventCode": "0xC8", 56*e0ddfd8dSJin Yao "EventName": "HLE_RETIRED.ABORTED_MEMTYPE", 57*e0ddfd8dSJin Yao "PublicDescription": "Number of times an HLE execution aborted due to incompatible memory type.", 58*e0ddfd8dSJin Yao "SampleAfterValue": "2000003", 59*e0ddfd8dSJin Yao "UMask": "0x40" 60*e0ddfd8dSJin Yao }, 61*e0ddfd8dSJin Yao { 62*e0ddfd8dSJin Yao "BriefDescription": "Number of times an HLE execution aborted due to hardware timer expiration.", 63*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 64*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3,4,5,6,7", 65*e0ddfd8dSJin Yao "EventCode": "0xC8", 66*e0ddfd8dSJin Yao "EventName": "HLE_RETIRED.ABORTED_TIMER", 67*e0ddfd8dSJin Yao "SampleAfterValue": "2000003", 68*e0ddfd8dSJin Yao "UMask": "0x10" 69*e0ddfd8dSJin Yao }, 70*e0ddfd8dSJin Yao { 71*e0ddfd8dSJin Yao "BriefDescription": "Number of times an HLE execution aborted due to HLE-unfriendly instructions and certain unfriendly events (such as AD assists etc.).", 72*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 73*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3,4,5,6,7", 74*e0ddfd8dSJin Yao "EventCode": "0xC8", 75*e0ddfd8dSJin Yao "EventName": "HLE_RETIRED.ABORTED_UNFRIENDLY", 76*e0ddfd8dSJin Yao "SampleAfterValue": "2000003", 77*e0ddfd8dSJin Yao "UMask": "0x20" 78*e0ddfd8dSJin Yao }, 79*e0ddfd8dSJin Yao { 80*e0ddfd8dSJin Yao "BriefDescription": "Number of times an HLE execution successfully committed", 81*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 82*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3,4,5,6,7", 83*e0ddfd8dSJin Yao "EventCode": "0xC8", 84*e0ddfd8dSJin Yao "EventName": "HLE_RETIRED.COMMIT", 85*e0ddfd8dSJin Yao "PublicDescription": "Number of times HLE commit succeeded.", 86*e0ddfd8dSJin Yao "SampleAfterValue": "2000003", 87*e0ddfd8dSJin Yao "UMask": "0x2" 88*e0ddfd8dSJin Yao }, 89*e0ddfd8dSJin Yao { 90*e0ddfd8dSJin Yao "BriefDescription": "Number of times an HLE execution started.", 91*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 92*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3,4,5,6,7", 93*e0ddfd8dSJin Yao "EventCode": "0xC8", 94*e0ddfd8dSJin Yao "EventName": "HLE_RETIRED.START", 95*e0ddfd8dSJin Yao "PublicDescription": "Number of times we entered an HLE region. Does not count nested transactions.", 96*e0ddfd8dSJin Yao "SampleAfterValue": "2000003", 97*e0ddfd8dSJin Yao "UMask": "0x1" 98*e0ddfd8dSJin Yao }, 99*e0ddfd8dSJin Yao { 100*e0ddfd8dSJin Yao "BriefDescription": "Counts the number of machine clears due to memory order conflicts.", 101*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 102*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3,4,5,6,7", 103*e0ddfd8dSJin Yao "Errata": "SKL089", 104*e0ddfd8dSJin Yao "EventCode": "0xC3", 105*e0ddfd8dSJin Yao "EventName": "MACHINE_CLEARS.MEMORY_ORDERING", 106*e0ddfd8dSJin Yao "PublicDescription": "Counts the number of memory ordering Machine Clears detected. Memory Ordering Machine Clears can result from one of the following:a. memory disambiguation,b. external snoop, orc. cross SMT-HW-thread snoop (stores) hitting load buffer.", 107*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 108*e0ddfd8dSJin Yao "UMask": "0x2" 109*e0ddfd8dSJin Yao }, 110*e0ddfd8dSJin Yao { 111*e0ddfd8dSJin Yao "BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 128 cycles.", 112*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 113*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 114*e0ddfd8dSJin Yao "Data_LA": "1", 115*e0ddfd8dSJin Yao "EventCode": "0xcd", 116*e0ddfd8dSJin Yao "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_128", 117*e0ddfd8dSJin Yao "MSRIndex": "0x3F6", 118*e0ddfd8dSJin Yao "MSRValue": "0x80", 119*e0ddfd8dSJin Yao "PEBS": "2", 120*e0ddfd8dSJin Yao "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 128 cycles. Reported latency may be longer than just the memory latency.", 121*e0ddfd8dSJin Yao "SampleAfterValue": "1009", 122*e0ddfd8dSJin Yao "TakenAlone": "1", 123*e0ddfd8dSJin Yao "UMask": "0x1" 124*e0ddfd8dSJin Yao }, 125*e0ddfd8dSJin Yao { 126*e0ddfd8dSJin Yao "BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 16 cycles.", 127*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 128*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 129*e0ddfd8dSJin Yao "Data_LA": "1", 130*e0ddfd8dSJin Yao "EventCode": "0xcd", 131*e0ddfd8dSJin Yao "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_16", 132*e0ddfd8dSJin Yao "MSRIndex": "0x3F6", 133*e0ddfd8dSJin Yao "MSRValue": "0x10", 134*e0ddfd8dSJin Yao "PEBS": "2", 135*e0ddfd8dSJin Yao "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 16 cycles. Reported latency may be longer than just the memory latency.", 136*e0ddfd8dSJin Yao "SampleAfterValue": "20011", 137*e0ddfd8dSJin Yao "TakenAlone": "1", 138*e0ddfd8dSJin Yao "UMask": "0x1" 139*e0ddfd8dSJin Yao }, 140*e0ddfd8dSJin Yao { 141*e0ddfd8dSJin Yao "BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 256 cycles.", 142*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 143*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 144*e0ddfd8dSJin Yao "Data_LA": "1", 145*e0ddfd8dSJin Yao "EventCode": "0xcd", 146*e0ddfd8dSJin Yao "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_256", 147*e0ddfd8dSJin Yao "MSRIndex": "0x3F6", 148*e0ddfd8dSJin Yao "MSRValue": "0x100", 149*e0ddfd8dSJin Yao "PEBS": "2", 150*e0ddfd8dSJin Yao "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 256 cycles. Reported latency may be longer than just the memory latency.", 151*e0ddfd8dSJin Yao "SampleAfterValue": "503", 152*e0ddfd8dSJin Yao "TakenAlone": "1", 153*e0ddfd8dSJin Yao "UMask": "0x1" 154*e0ddfd8dSJin Yao }, 155*e0ddfd8dSJin Yao { 156*e0ddfd8dSJin Yao "BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 32 cycles.", 157*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 158*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 159*e0ddfd8dSJin Yao "Data_LA": "1", 160*e0ddfd8dSJin Yao "EventCode": "0xcd", 161*e0ddfd8dSJin Yao "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_32", 162*e0ddfd8dSJin Yao "MSRIndex": "0x3F6", 163*e0ddfd8dSJin Yao "MSRValue": "0x20", 164*e0ddfd8dSJin Yao "PEBS": "2", 165*e0ddfd8dSJin Yao "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 32 cycles. Reported latency may be longer than just the memory latency.", 166*e0ddfd8dSJin Yao "SampleAfterValue": "100007", 167*e0ddfd8dSJin Yao "TakenAlone": "1", 168*e0ddfd8dSJin Yao "UMask": "0x1" 169*e0ddfd8dSJin Yao }, 170*e0ddfd8dSJin Yao { 171*e0ddfd8dSJin Yao "BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 4 cycles.", 172*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 173*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 174*e0ddfd8dSJin Yao "Data_LA": "1", 175*e0ddfd8dSJin Yao "EventCode": "0xcd", 176*e0ddfd8dSJin Yao "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_4", 177*e0ddfd8dSJin Yao "MSRIndex": "0x3F6", 178*e0ddfd8dSJin Yao "MSRValue": "0x4", 179*e0ddfd8dSJin Yao "PEBS": "2", 180*e0ddfd8dSJin Yao "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 4 cycles. Reported latency may be longer than just the memory latency.", 181*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 182*e0ddfd8dSJin Yao "TakenAlone": "1", 183*e0ddfd8dSJin Yao "UMask": "0x1" 184*e0ddfd8dSJin Yao }, 185*e0ddfd8dSJin Yao { 186*e0ddfd8dSJin Yao "BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 512 cycles.", 187*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 188*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 189*e0ddfd8dSJin Yao "Data_LA": "1", 190*e0ddfd8dSJin Yao "EventCode": "0xcd", 191*e0ddfd8dSJin Yao "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_512", 192*e0ddfd8dSJin Yao "MSRIndex": "0x3F6", 193*e0ddfd8dSJin Yao "MSRValue": "0x200", 194*e0ddfd8dSJin Yao "PEBS": "2", 195*e0ddfd8dSJin Yao "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 512 cycles. Reported latency may be longer than just the memory latency.", 196*e0ddfd8dSJin Yao "SampleAfterValue": "101", 197*e0ddfd8dSJin Yao "TakenAlone": "1", 198*e0ddfd8dSJin Yao "UMask": "0x1" 199*e0ddfd8dSJin Yao }, 200*e0ddfd8dSJin Yao { 201*e0ddfd8dSJin Yao "BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 64 cycles.", 202*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 203*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 204*e0ddfd8dSJin Yao "Data_LA": "1", 205*e0ddfd8dSJin Yao "EventCode": "0xcd", 206*e0ddfd8dSJin Yao "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_64", 207*e0ddfd8dSJin Yao "MSRIndex": "0x3F6", 208*e0ddfd8dSJin Yao "MSRValue": "0x40", 209*e0ddfd8dSJin Yao "PEBS": "2", 210*e0ddfd8dSJin Yao "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 64 cycles. Reported latency may be longer than just the memory latency.", 211*e0ddfd8dSJin Yao "SampleAfterValue": "2003", 212*e0ddfd8dSJin Yao "TakenAlone": "1", 213*e0ddfd8dSJin Yao "UMask": "0x1" 214*e0ddfd8dSJin Yao }, 215*e0ddfd8dSJin Yao { 216*e0ddfd8dSJin Yao "BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 8 cycles.", 217*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 218*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 219*e0ddfd8dSJin Yao "Data_LA": "1", 220*e0ddfd8dSJin Yao "EventCode": "0xcd", 221*e0ddfd8dSJin Yao "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_8", 222*e0ddfd8dSJin Yao "MSRIndex": "0x3F6", 223*e0ddfd8dSJin Yao "MSRValue": "0x8", 224*e0ddfd8dSJin Yao "PEBS": "2", 225*e0ddfd8dSJin Yao "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 8 cycles. Reported latency may be longer than just the memory latency.", 226*e0ddfd8dSJin Yao "SampleAfterValue": "50021", 227*e0ddfd8dSJin Yao "TakenAlone": "1", 228*e0ddfd8dSJin Yao "UMask": "0x1" 229*e0ddfd8dSJin Yao }, 230*e0ddfd8dSJin Yao { 231*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_DATA_RD.L3_MISS.ANY_SNOOP OCR.ALL_DATA_RD.L3_MISS.ANY_SNOOP OCR.ALL_DATA_RD.L3_MISS.ANY_SNOOP", 232ecd94f1bSKan Liang "Counter": "0,1,2,3", 2337fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 2347fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 235*e0ddfd8dSJin Yao "EventName": "OCR.ALL_DATA_RD.L3_MISS.ANY_SNOOP", 2367fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 237*e0ddfd8dSJin Yao "MSRValue": "0x3FBC000491", 2387fcf1b89SHaiyan Song "Offcore": "1", 2397fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 240ecd94f1bSKan Liang "SampleAfterValue": "100003", 2417fcf1b89SHaiyan Song "UMask": "0x1" 242ecd94f1bSKan Liang }, 243ecd94f1bSKan Liang { 244*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_DATA_RD.L3_MISS.HITM_OTHER_CORE OCR.ALL_DATA_RD.L3_MISS.HITM_OTHER_CORE OCR.ALL_DATA_RD.L3_MISS.HITM_OTHER_CORE", 245ecd94f1bSKan Liang "Counter": "0,1,2,3", 2467fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 2477fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 248*e0ddfd8dSJin Yao "EventName": "OCR.ALL_DATA_RD.L3_MISS.HITM_OTHER_CORE", 2497fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 250*e0ddfd8dSJin Yao "MSRValue": "0x103C000491", 2517fcf1b89SHaiyan Song "Offcore": "1", 2527fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 253ecd94f1bSKan Liang "SampleAfterValue": "100003", 2547fcf1b89SHaiyan Song "UMask": "0x1" 255ecd94f1bSKan Liang }, 256ecd94f1bSKan Liang { 257*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD OCR.ALL_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD OCR.ALL_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD", 258ecd94f1bSKan Liang "Counter": "0,1,2,3", 2597fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 2607fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 261*e0ddfd8dSJin Yao "EventName": "OCR.ALL_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD", 2627fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 263*e0ddfd8dSJin Yao "MSRValue": "0x083C000491", 2647fcf1b89SHaiyan Song "Offcore": "1", 2657fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2667fcf1b89SHaiyan Song "SampleAfterValue": "100003", 2677fcf1b89SHaiyan Song "UMask": "0x1" 2687fcf1b89SHaiyan Song }, 2697fcf1b89SHaiyan Song { 270038d3b53SJin Yao "BriefDescription": "OCR.ALL_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD OCR.ALL_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD OCR.ALL_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD", 2717fcf1b89SHaiyan Song "Counter": "0,1,2,3", 2727fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 2737fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 2747fcf1b89SHaiyan Song "EventName": "OCR.ALL_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD", 2757fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 2767fcf1b89SHaiyan Song "MSRValue": "0x043C000491", 2777fcf1b89SHaiyan Song "Offcore": "1", 2787fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2797fcf1b89SHaiyan Song "SampleAfterValue": "100003", 2807fcf1b89SHaiyan Song "UMask": "0x1" 2817fcf1b89SHaiyan Song }, 2827fcf1b89SHaiyan Song { 283*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_DATA_RD.L3_MISS.NO_SNOOP_NEEDED OCR.ALL_DATA_RD.L3_MISS.NO_SNOOP_NEEDED OCR.ALL_DATA_RD.L3_MISS.NO_SNOOP_NEEDED", 2847fcf1b89SHaiyan Song "Counter": "0,1,2,3", 2857fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 2867fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 287*e0ddfd8dSJin Yao "EventName": "OCR.ALL_DATA_RD.L3_MISS.NO_SNOOP_NEEDED", 2887fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 2897fcf1b89SHaiyan Song "MSRValue": "0x013C000491", 2907fcf1b89SHaiyan Song "Offcore": "1", 2917fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2927fcf1b89SHaiyan Song "SampleAfterValue": "100003", 2937fcf1b89SHaiyan Song "UMask": "0x1" 2947fcf1b89SHaiyan Song }, 2957fcf1b89SHaiyan Song { 296*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_DATA_RD.L3_MISS.REMOTE_HITM OCR.ALL_DATA_RD.L3_MISS.REMOTE_HITM", 2977fcf1b89SHaiyan Song "Counter": "0,1,2,3", 2987fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 2997fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 300*e0ddfd8dSJin Yao "EventName": "OCR.ALL_DATA_RD.L3_MISS.REMOTE_HITM", 3017fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 302*e0ddfd8dSJin Yao "MSRValue": "0x103FC00491", 3037fcf1b89SHaiyan Song "Offcore": "1", 3047fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3057fcf1b89SHaiyan Song "SampleAfterValue": "100003", 3067fcf1b89SHaiyan Song "UMask": "0x1" 3077fcf1b89SHaiyan Song }, 3087fcf1b89SHaiyan Song { 309*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_DATA_RD.L3_MISS.REMOTE_HIT_FORWARD OCR.ALL_DATA_RD.L3_MISS.REMOTE_HIT_FORWARD", 3107fcf1b89SHaiyan Song "Counter": "0,1,2,3", 3117fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 3127fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 313*e0ddfd8dSJin Yao "EventName": "OCR.ALL_DATA_RD.L3_MISS.REMOTE_HIT_FORWARD", 3147fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 315*e0ddfd8dSJin Yao "MSRValue": "0x083FC00491", 3167fcf1b89SHaiyan Song "Offcore": "1", 3177fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3187fcf1b89SHaiyan Song "SampleAfterValue": "100003", 3197fcf1b89SHaiyan Song "UMask": "0x1" 3207fcf1b89SHaiyan Song }, 3217fcf1b89SHaiyan Song { 322*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_DATA_RD.L3_MISS.SNOOP_MISS OCR.ALL_DATA_RD.L3_MISS.SNOOP_MISS", 3237fcf1b89SHaiyan Song "Counter": "0,1,2,3", 3247fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 3257fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 326*e0ddfd8dSJin Yao "EventName": "OCR.ALL_DATA_RD.L3_MISS.SNOOP_MISS", 3277fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 328*e0ddfd8dSJin Yao "MSRValue": "0x023C000491", 3297fcf1b89SHaiyan Song "Offcore": "1", 3307fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3317fcf1b89SHaiyan Song "SampleAfterValue": "100003", 3327fcf1b89SHaiyan Song "UMask": "0x1" 3337fcf1b89SHaiyan Song }, 3347fcf1b89SHaiyan Song { 335*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_DATA_RD.L3_MISS.SNOOP_NONE OCR.ALL_DATA_RD.L3_MISS.SNOOP_NONE", 3367fcf1b89SHaiyan Song "Counter": "0,1,2,3", 3377fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 3387fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 339*e0ddfd8dSJin Yao "EventName": "OCR.ALL_DATA_RD.L3_MISS.SNOOP_NONE", 3407fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 341*e0ddfd8dSJin Yao "MSRValue": "0x00BC000491", 3427fcf1b89SHaiyan Song "Offcore": "1", 3437fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3447fcf1b89SHaiyan Song "SampleAfterValue": "100003", 3457fcf1b89SHaiyan Song "UMask": "0x1" 3467fcf1b89SHaiyan Song }, 3477fcf1b89SHaiyan Song { 348*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 3497fcf1b89SHaiyan Song "Counter": "0,1,2,3", 3507fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 3517fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 352*e0ddfd8dSJin Yao "EventName": "OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 3537fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 354*e0ddfd8dSJin Yao "MSRValue": "0x3F84000491", 3557fcf1b89SHaiyan Song "Offcore": "1", 3567fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3577fcf1b89SHaiyan Song "SampleAfterValue": "100003", 3587fcf1b89SHaiyan Song "UMask": "0x1" 3597fcf1b89SHaiyan Song }, 3607fcf1b89SHaiyan Song { 361*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 3627fcf1b89SHaiyan Song "Counter": "0,1,2,3", 3637fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 3647fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 365*e0ddfd8dSJin Yao "EventName": "OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 3667fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 367*e0ddfd8dSJin Yao "MSRValue": "0x1004000491", 3687fcf1b89SHaiyan Song "Offcore": "1", 3697fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3707fcf1b89SHaiyan Song "SampleAfterValue": "100003", 3717fcf1b89SHaiyan Song "UMask": "0x1" 3727fcf1b89SHaiyan Song }, 3737fcf1b89SHaiyan Song { 374*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 3757fcf1b89SHaiyan Song "Counter": "0,1,2,3", 3767fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 3777fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 378*e0ddfd8dSJin Yao "EventName": "OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 3797fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 380*e0ddfd8dSJin Yao "MSRValue": "0x0804000491", 3817fcf1b89SHaiyan Song "Offcore": "1", 3827fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3837fcf1b89SHaiyan Song "SampleAfterValue": "100003", 3847fcf1b89SHaiyan Song "UMask": "0x1" 3857fcf1b89SHaiyan Song }, 3867fcf1b89SHaiyan Song { 387*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 388ecd94f1bSKan Liang "Counter": "0,1,2,3", 3897fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 3907fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 391*e0ddfd8dSJin Yao "EventName": "OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 3927fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 393*e0ddfd8dSJin Yao "MSRValue": "0x0404000491", 3947fcf1b89SHaiyan Song "Offcore": "1", 3957fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3967fcf1b89SHaiyan Song "SampleAfterValue": "100003", 3977fcf1b89SHaiyan Song "UMask": "0x1" 398ecd94f1bSKan Liang }, 399ecd94f1bSKan Liang { 400*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 4017fcf1b89SHaiyan Song "Counter": "0,1,2,3", 4027fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 4037fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 404*e0ddfd8dSJin Yao "EventName": "OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 4057fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 406*e0ddfd8dSJin Yao "MSRValue": "0x0104000491", 4077fcf1b89SHaiyan Song "Offcore": "1", 4087fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4097fcf1b89SHaiyan Song "SampleAfterValue": "100003", 4107fcf1b89SHaiyan Song "UMask": "0x1" 4117fcf1b89SHaiyan Song }, 4127fcf1b89SHaiyan Song { 413038d3b53SJin Yao "BriefDescription": "OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 4147fcf1b89SHaiyan Song "Counter": "0,1,2,3", 4157fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 4167fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 4177fcf1b89SHaiyan Song "EventName": "OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 4187fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 4197fcf1b89SHaiyan Song "MSRValue": "0x0204000491", 4207fcf1b89SHaiyan Song "Offcore": "1", 4217fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4227fcf1b89SHaiyan Song "SampleAfterValue": "100003", 4237fcf1b89SHaiyan Song "UMask": "0x1" 4247fcf1b89SHaiyan Song }, 4257fcf1b89SHaiyan Song { 426*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 4277fcf1b89SHaiyan Song "Counter": "0,1,2,3", 4287fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 4297fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 430*e0ddfd8dSJin Yao "EventName": "OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 4317fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 432*e0ddfd8dSJin Yao "MSRValue": "0x0604000491", 4337fcf1b89SHaiyan Song "Offcore": "1", 4347fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4357fcf1b89SHaiyan Song "SampleAfterValue": "100003", 4367fcf1b89SHaiyan Song "UMask": "0x1" 4377fcf1b89SHaiyan Song }, 4387fcf1b89SHaiyan Song { 439*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 4407fcf1b89SHaiyan Song "Counter": "0,1,2,3", 4417fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 4427fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 443*e0ddfd8dSJin Yao "EventName": "OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 4447fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 445*e0ddfd8dSJin Yao "MSRValue": "0x0084000491", 4467fcf1b89SHaiyan Song "Offcore": "1", 4477fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4487fcf1b89SHaiyan Song "SampleAfterValue": "100003", 4497fcf1b89SHaiyan Song "UMask": "0x1" 4507fcf1b89SHaiyan Song }, 4517fcf1b89SHaiyan Song { 452*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_DATA_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD OCR.ALL_DATA_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 4537fcf1b89SHaiyan Song "Counter": "0,1,2,3", 4547fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 4557fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 456*e0ddfd8dSJin Yao "EventName": "OCR.ALL_DATA_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 4577fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 458*e0ddfd8dSJin Yao "MSRValue": "0x063B800491", 4597fcf1b89SHaiyan Song "Offcore": "1", 4607fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4617fcf1b89SHaiyan Song "SampleAfterValue": "100003", 4627fcf1b89SHaiyan Song "UMask": "0x1" 4637fcf1b89SHaiyan Song }, 4647fcf1b89SHaiyan Song { 465*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 4667fcf1b89SHaiyan Song "Counter": "0,1,2,3", 4677fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 4687fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 469*e0ddfd8dSJin Yao "EventName": "OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 4707fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 471*e0ddfd8dSJin Yao "MSRValue": "0x3F90000491", 4727fcf1b89SHaiyan Song "Offcore": "1", 4737fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4747fcf1b89SHaiyan Song "SampleAfterValue": "100003", 4757fcf1b89SHaiyan Song "UMask": "0x1" 4767fcf1b89SHaiyan Song }, 4777fcf1b89SHaiyan Song { 478*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 4797fcf1b89SHaiyan Song "Counter": "0,1,2,3", 4807fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 4817fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 482*e0ddfd8dSJin Yao "EventName": "OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 4837fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 484*e0ddfd8dSJin Yao "MSRValue": "0x1010000491", 4857fcf1b89SHaiyan Song "Offcore": "1", 4867fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4877fcf1b89SHaiyan Song "SampleAfterValue": "100003", 4887fcf1b89SHaiyan Song "UMask": "0x1" 4897fcf1b89SHaiyan Song }, 4907fcf1b89SHaiyan Song { 491*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 4927fcf1b89SHaiyan Song "Counter": "0,1,2,3", 4937fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 4947fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 495*e0ddfd8dSJin Yao "EventName": "OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 4967fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 497*e0ddfd8dSJin Yao "MSRValue": "0x0810000491", 4987fcf1b89SHaiyan Song "Offcore": "1", 4997fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5007fcf1b89SHaiyan Song "SampleAfterValue": "100003", 5017fcf1b89SHaiyan Song "UMask": "0x1" 5027fcf1b89SHaiyan Song }, 5037fcf1b89SHaiyan Song { 504*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 5057fcf1b89SHaiyan Song "Counter": "0,1,2,3", 5067fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 5077fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 508*e0ddfd8dSJin Yao "EventName": "OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 5097fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 510*e0ddfd8dSJin Yao "MSRValue": "0x0410000491", 5117fcf1b89SHaiyan Song "Offcore": "1", 5127fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5137fcf1b89SHaiyan Song "SampleAfterValue": "100003", 5147fcf1b89SHaiyan Song "UMask": "0x1" 5157fcf1b89SHaiyan Song }, 5167fcf1b89SHaiyan Song { 517*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 5187fcf1b89SHaiyan Song "Counter": "0,1,2,3", 5197fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 5207fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 521*e0ddfd8dSJin Yao "EventName": "OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 5227fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 523*e0ddfd8dSJin Yao "MSRValue": "0x0110000491", 5247fcf1b89SHaiyan Song "Offcore": "1", 5257fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5267fcf1b89SHaiyan Song "SampleAfterValue": "100003", 5277fcf1b89SHaiyan Song "UMask": "0x1" 5287fcf1b89SHaiyan Song }, 5297fcf1b89SHaiyan Song { 530*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 5317fcf1b89SHaiyan Song "Counter": "0,1,2,3", 5327fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 5337fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 534*e0ddfd8dSJin Yao "EventName": "OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 5357fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 536*e0ddfd8dSJin Yao "MSRValue": "0x0210000491", 5377fcf1b89SHaiyan Song "Offcore": "1", 5387fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5397fcf1b89SHaiyan Song "SampleAfterValue": "100003", 5407fcf1b89SHaiyan Song "UMask": "0x1" 5417fcf1b89SHaiyan Song }, 5427fcf1b89SHaiyan Song { 543*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 5447fcf1b89SHaiyan Song "Counter": "0,1,2,3", 5457fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 5467fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 547*e0ddfd8dSJin Yao "EventName": "OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 5487fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 549*e0ddfd8dSJin Yao "MSRValue": "0x0090000491", 5507fcf1b89SHaiyan Song "Offcore": "1", 5517fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5527fcf1b89SHaiyan Song "SampleAfterValue": "100003", 5537fcf1b89SHaiyan Song "UMask": "0x1" 5547fcf1b89SHaiyan Song }, 5557fcf1b89SHaiyan Song { 556038d3b53SJin Yao "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_MISS.ANY_SNOOP OCR.ALL_PF_DATA_RD.L3_MISS.ANY_SNOOP OCR.ALL_PF_DATA_RD.L3_MISS.ANY_SNOOP", 5577fcf1b89SHaiyan Song "Counter": "0,1,2,3", 5587fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 5597fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 5607fcf1b89SHaiyan Song "EventName": "OCR.ALL_PF_DATA_RD.L3_MISS.ANY_SNOOP", 5617fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 5627fcf1b89SHaiyan Song "MSRValue": "0x3FBC000490", 5637fcf1b89SHaiyan Song "Offcore": "1", 5647fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5657fcf1b89SHaiyan Song "SampleAfterValue": "100003", 5667fcf1b89SHaiyan Song "UMask": "0x1" 5677fcf1b89SHaiyan Song }, 5687fcf1b89SHaiyan Song { 569*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_MISS.HITM_OTHER_CORE OCR.ALL_PF_DATA_RD.L3_MISS.HITM_OTHER_CORE OCR.ALL_PF_DATA_RD.L3_MISS.HITM_OTHER_CORE", 5707fcf1b89SHaiyan Song "Counter": "0,1,2,3", 5717fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 5727fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 573*e0ddfd8dSJin Yao "EventName": "OCR.ALL_PF_DATA_RD.L3_MISS.HITM_OTHER_CORE", 5747fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 575*e0ddfd8dSJin Yao "MSRValue": "0x103C000490", 5767fcf1b89SHaiyan Song "Offcore": "1", 5777fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5787fcf1b89SHaiyan Song "SampleAfterValue": "100003", 5797fcf1b89SHaiyan Song "UMask": "0x1" 5807fcf1b89SHaiyan Song }, 5817fcf1b89SHaiyan Song { 582*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD OCR.ALL_PF_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD OCR.ALL_PF_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD", 5837fcf1b89SHaiyan Song "Counter": "0,1,2,3", 5847fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 5857fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 586*e0ddfd8dSJin Yao "EventName": "OCR.ALL_PF_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD", 5877fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 588*e0ddfd8dSJin Yao "MSRValue": "0x083C000490", 589*e0ddfd8dSJin Yao "Offcore": "1", 590*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 591*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 592*e0ddfd8dSJin Yao "UMask": "0x1" 593*e0ddfd8dSJin Yao }, 594*e0ddfd8dSJin Yao { 595*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD OCR.ALL_PF_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD OCR.ALL_PF_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD", 596*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 597*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 598*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 599*e0ddfd8dSJin Yao "EventName": "OCR.ALL_PF_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD", 600*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 601*e0ddfd8dSJin Yao "MSRValue": "0x043C000490", 602*e0ddfd8dSJin Yao "Offcore": "1", 603*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 604*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 605*e0ddfd8dSJin Yao "UMask": "0x1" 606*e0ddfd8dSJin Yao }, 607*e0ddfd8dSJin Yao { 608*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_MISS.NO_SNOOP_NEEDED OCR.ALL_PF_DATA_RD.L3_MISS.NO_SNOOP_NEEDED OCR.ALL_PF_DATA_RD.L3_MISS.NO_SNOOP_NEEDED", 609*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 610*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 611*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 612*e0ddfd8dSJin Yao "EventName": "OCR.ALL_PF_DATA_RD.L3_MISS.NO_SNOOP_NEEDED", 613*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 614*e0ddfd8dSJin Yao "MSRValue": "0x013C000490", 615*e0ddfd8dSJin Yao "Offcore": "1", 616*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 617*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 618*e0ddfd8dSJin Yao "UMask": "0x1" 619*e0ddfd8dSJin Yao }, 620*e0ddfd8dSJin Yao { 621*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_MISS.REMOTE_HITM OCR.ALL_PF_DATA_RD.L3_MISS.REMOTE_HITM", 622*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 623*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 624*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 625*e0ddfd8dSJin Yao "EventName": "OCR.ALL_PF_DATA_RD.L3_MISS.REMOTE_HITM", 626*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 627*e0ddfd8dSJin Yao "MSRValue": "0x103FC00490", 628*e0ddfd8dSJin Yao "Offcore": "1", 629*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 630*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 631*e0ddfd8dSJin Yao "UMask": "0x1" 632*e0ddfd8dSJin Yao }, 633*e0ddfd8dSJin Yao { 634*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_MISS.REMOTE_HIT_FORWARD OCR.ALL_PF_DATA_RD.L3_MISS.REMOTE_HIT_FORWARD", 635*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 636*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 637*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 638*e0ddfd8dSJin Yao "EventName": "OCR.ALL_PF_DATA_RD.L3_MISS.REMOTE_HIT_FORWARD", 639*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 640*e0ddfd8dSJin Yao "MSRValue": "0x083FC00490", 641*e0ddfd8dSJin Yao "Offcore": "1", 642*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 643*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 644*e0ddfd8dSJin Yao "UMask": "0x1" 645*e0ddfd8dSJin Yao }, 646*e0ddfd8dSJin Yao { 647*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_MISS.SNOOP_MISS OCR.ALL_PF_DATA_RD.L3_MISS.SNOOP_MISS", 648*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 649*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 650*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 651*e0ddfd8dSJin Yao "EventName": "OCR.ALL_PF_DATA_RD.L3_MISS.SNOOP_MISS", 652*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 653*e0ddfd8dSJin Yao "MSRValue": "0x023C000490", 654*e0ddfd8dSJin Yao "Offcore": "1", 655*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 656*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 657*e0ddfd8dSJin Yao "UMask": "0x1" 658*e0ddfd8dSJin Yao }, 659*e0ddfd8dSJin Yao { 660*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_MISS.SNOOP_NONE OCR.ALL_PF_DATA_RD.L3_MISS.SNOOP_NONE", 661*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 662*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 663*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 664*e0ddfd8dSJin Yao "EventName": "OCR.ALL_PF_DATA_RD.L3_MISS.SNOOP_NONE", 665*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 666*e0ddfd8dSJin Yao "MSRValue": "0x00BC000490", 667*e0ddfd8dSJin Yao "Offcore": "1", 668*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 669*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 670*e0ddfd8dSJin Yao "UMask": "0x1" 671*e0ddfd8dSJin Yao }, 672*e0ddfd8dSJin Yao { 673*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 674*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 675*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 676*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 677*e0ddfd8dSJin Yao "EventName": "OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 678*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 679*e0ddfd8dSJin Yao "MSRValue": "0x3F84000490", 680*e0ddfd8dSJin Yao "Offcore": "1", 681*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 682*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 683*e0ddfd8dSJin Yao "UMask": "0x1" 684*e0ddfd8dSJin Yao }, 685*e0ddfd8dSJin Yao { 686*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 687*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 688*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 689*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 690*e0ddfd8dSJin Yao "EventName": "OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 691*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 692*e0ddfd8dSJin Yao "MSRValue": "0x1004000490", 693*e0ddfd8dSJin Yao "Offcore": "1", 694*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 695*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 696*e0ddfd8dSJin Yao "UMask": "0x1" 697*e0ddfd8dSJin Yao }, 698*e0ddfd8dSJin Yao { 699*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 700*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 701*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 702*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 703*e0ddfd8dSJin Yao "EventName": "OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 704*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 705*e0ddfd8dSJin Yao "MSRValue": "0x0804000490", 706*e0ddfd8dSJin Yao "Offcore": "1", 707*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 708*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 709*e0ddfd8dSJin Yao "UMask": "0x1" 710*e0ddfd8dSJin Yao }, 711*e0ddfd8dSJin Yao { 712*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 713*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 714*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 715*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 716*e0ddfd8dSJin Yao "EventName": "OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 717*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 718*e0ddfd8dSJin Yao "MSRValue": "0x0404000490", 719*e0ddfd8dSJin Yao "Offcore": "1", 720*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 721*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 722*e0ddfd8dSJin Yao "UMask": "0x1" 723*e0ddfd8dSJin Yao }, 724*e0ddfd8dSJin Yao { 725*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 726*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 727*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 728*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 729*e0ddfd8dSJin Yao "EventName": "OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 730*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 731*e0ddfd8dSJin Yao "MSRValue": "0x0104000490", 732*e0ddfd8dSJin Yao "Offcore": "1", 733*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 734*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 735*e0ddfd8dSJin Yao "UMask": "0x1" 736*e0ddfd8dSJin Yao }, 737*e0ddfd8dSJin Yao { 738*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 739*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 740*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 741*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 742*e0ddfd8dSJin Yao "EventName": "OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 743*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 744*e0ddfd8dSJin Yao "MSRValue": "0x0204000490", 745*e0ddfd8dSJin Yao "Offcore": "1", 746*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 747*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 748*e0ddfd8dSJin Yao "UMask": "0x1" 749*e0ddfd8dSJin Yao }, 750*e0ddfd8dSJin Yao { 751*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 752*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 753*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 754*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 755*e0ddfd8dSJin Yao "EventName": "OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 756*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 757*e0ddfd8dSJin Yao "MSRValue": "0x0604000490", 758*e0ddfd8dSJin Yao "Offcore": "1", 759*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 760*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 761*e0ddfd8dSJin Yao "UMask": "0x1" 762*e0ddfd8dSJin Yao }, 763*e0ddfd8dSJin Yao { 764*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 765*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 766*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 767*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 768*e0ddfd8dSJin Yao "EventName": "OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 769*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 770*e0ddfd8dSJin Yao "MSRValue": "0x0084000490", 771*e0ddfd8dSJin Yao "Offcore": "1", 772*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 773*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 774*e0ddfd8dSJin Yao "UMask": "0x1" 775*e0ddfd8dSJin Yao }, 776*e0ddfd8dSJin Yao { 777*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 778*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 779*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 780*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 781*e0ddfd8dSJin Yao "EventName": "OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 782*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 783*e0ddfd8dSJin Yao "MSRValue": "0x063B800490", 784*e0ddfd8dSJin Yao "Offcore": "1", 785*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 786*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 787*e0ddfd8dSJin Yao "UMask": "0x1" 788*e0ddfd8dSJin Yao }, 789*e0ddfd8dSJin Yao { 790*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 791*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 792*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 793*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 794*e0ddfd8dSJin Yao "EventName": "OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 795*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 796*e0ddfd8dSJin Yao "MSRValue": "0x3F90000490", 797*e0ddfd8dSJin Yao "Offcore": "1", 798*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 799*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 800*e0ddfd8dSJin Yao "UMask": "0x1" 801*e0ddfd8dSJin Yao }, 802*e0ddfd8dSJin Yao { 803*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 804*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 805*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 806*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 807*e0ddfd8dSJin Yao "EventName": "OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 808*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 809*e0ddfd8dSJin Yao "MSRValue": "0x1010000490", 810*e0ddfd8dSJin Yao "Offcore": "1", 811*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 812*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 813*e0ddfd8dSJin Yao "UMask": "0x1" 814*e0ddfd8dSJin Yao }, 815*e0ddfd8dSJin Yao { 816*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 817*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 818*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 819*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 820*e0ddfd8dSJin Yao "EventName": "OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 821*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 822*e0ddfd8dSJin Yao "MSRValue": "0x0810000490", 823*e0ddfd8dSJin Yao "Offcore": "1", 824*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 825*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 826*e0ddfd8dSJin Yao "UMask": "0x1" 827*e0ddfd8dSJin Yao }, 828*e0ddfd8dSJin Yao { 829*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 830*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 831*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 832*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 833*e0ddfd8dSJin Yao "EventName": "OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 834*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 835*e0ddfd8dSJin Yao "MSRValue": "0x0410000490", 836*e0ddfd8dSJin Yao "Offcore": "1", 837*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 838*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 839*e0ddfd8dSJin Yao "UMask": "0x1" 840*e0ddfd8dSJin Yao }, 841*e0ddfd8dSJin Yao { 842*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 843*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 844*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 845*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 846*e0ddfd8dSJin Yao "EventName": "OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 847*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 848*e0ddfd8dSJin Yao "MSRValue": "0x0110000490", 849*e0ddfd8dSJin Yao "Offcore": "1", 850*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 851*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 852*e0ddfd8dSJin Yao "UMask": "0x1" 853*e0ddfd8dSJin Yao }, 854*e0ddfd8dSJin Yao { 855*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 856*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 857*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 858*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 859*e0ddfd8dSJin Yao "EventName": "OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 860*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 861*e0ddfd8dSJin Yao "MSRValue": "0x0210000490", 862*e0ddfd8dSJin Yao "Offcore": "1", 863*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 864*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 865*e0ddfd8dSJin Yao "UMask": "0x1" 866*e0ddfd8dSJin Yao }, 867*e0ddfd8dSJin Yao { 868*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 869*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 870*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 871*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 872*e0ddfd8dSJin Yao "EventName": "OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 873*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 874*e0ddfd8dSJin Yao "MSRValue": "0x0090000490", 875*e0ddfd8dSJin Yao "Offcore": "1", 876*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 877*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 878*e0ddfd8dSJin Yao "UMask": "0x1" 879*e0ddfd8dSJin Yao }, 880*e0ddfd8dSJin Yao { 881*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_PF_RFO.L3_MISS.ANY_SNOOP OCR.ALL_PF_RFO.L3_MISS.ANY_SNOOP OCR.ALL_PF_RFO.L3_MISS.ANY_SNOOP", 882*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 883*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 884*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 885*e0ddfd8dSJin Yao "EventName": "OCR.ALL_PF_RFO.L3_MISS.ANY_SNOOP", 886*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 887*e0ddfd8dSJin Yao "MSRValue": "0x3FBC000120", 888*e0ddfd8dSJin Yao "Offcore": "1", 889*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 890*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 891*e0ddfd8dSJin Yao "UMask": "0x1" 892*e0ddfd8dSJin Yao }, 893*e0ddfd8dSJin Yao { 894*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_PF_RFO.L3_MISS.HITM_OTHER_CORE OCR.ALL_PF_RFO.L3_MISS.HITM_OTHER_CORE OCR.ALL_PF_RFO.L3_MISS.HITM_OTHER_CORE", 895*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 896*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 897*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 898*e0ddfd8dSJin Yao "EventName": "OCR.ALL_PF_RFO.L3_MISS.HITM_OTHER_CORE", 899*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 900*e0ddfd8dSJin Yao "MSRValue": "0x103C000120", 901*e0ddfd8dSJin Yao "Offcore": "1", 902*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 903*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 904*e0ddfd8dSJin Yao "UMask": "0x1" 905*e0ddfd8dSJin Yao }, 906*e0ddfd8dSJin Yao { 907*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_PF_RFO.L3_MISS.HIT_OTHER_CORE_FWD OCR.ALL_PF_RFO.L3_MISS.HIT_OTHER_CORE_FWD OCR.ALL_PF_RFO.L3_MISS.HIT_OTHER_CORE_FWD", 908*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 909*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 910*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 911*e0ddfd8dSJin Yao "EventName": "OCR.ALL_PF_RFO.L3_MISS.HIT_OTHER_CORE_FWD", 912*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 913*e0ddfd8dSJin Yao "MSRValue": "0x083C000120", 914*e0ddfd8dSJin Yao "Offcore": "1", 915*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 916*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 917*e0ddfd8dSJin Yao "UMask": "0x1" 918*e0ddfd8dSJin Yao }, 919*e0ddfd8dSJin Yao { 920*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_PF_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD OCR.ALL_PF_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD OCR.ALL_PF_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD", 921*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 922*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 923*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 924*e0ddfd8dSJin Yao "EventName": "OCR.ALL_PF_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD", 925*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 926*e0ddfd8dSJin Yao "MSRValue": "0x043C000120", 927*e0ddfd8dSJin Yao "Offcore": "1", 928*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 929*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 930*e0ddfd8dSJin Yao "UMask": "0x1" 931*e0ddfd8dSJin Yao }, 932*e0ddfd8dSJin Yao { 933*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_PF_RFO.L3_MISS.NO_SNOOP_NEEDED OCR.ALL_PF_RFO.L3_MISS.NO_SNOOP_NEEDED OCR.ALL_PF_RFO.L3_MISS.NO_SNOOP_NEEDED", 934*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 935*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 936*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 937*e0ddfd8dSJin Yao "EventName": "OCR.ALL_PF_RFO.L3_MISS.NO_SNOOP_NEEDED", 938*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 939*e0ddfd8dSJin Yao "MSRValue": "0x013C000120", 940*e0ddfd8dSJin Yao "Offcore": "1", 941*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 942*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 943*e0ddfd8dSJin Yao "UMask": "0x1" 944*e0ddfd8dSJin Yao }, 945*e0ddfd8dSJin Yao { 946*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_PF_RFO.L3_MISS.REMOTE_HITM OCR.ALL_PF_RFO.L3_MISS.REMOTE_HITM", 947*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 948*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 949*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 950*e0ddfd8dSJin Yao "EventName": "OCR.ALL_PF_RFO.L3_MISS.REMOTE_HITM", 951*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 952*e0ddfd8dSJin Yao "MSRValue": "0x103FC00120", 953*e0ddfd8dSJin Yao "Offcore": "1", 954*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 955*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 956*e0ddfd8dSJin Yao "UMask": "0x1" 957*e0ddfd8dSJin Yao }, 958*e0ddfd8dSJin Yao { 959*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_PF_RFO.L3_MISS.REMOTE_HIT_FORWARD OCR.ALL_PF_RFO.L3_MISS.REMOTE_HIT_FORWARD", 960*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 961*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 962*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 963*e0ddfd8dSJin Yao "EventName": "OCR.ALL_PF_RFO.L3_MISS.REMOTE_HIT_FORWARD", 964*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 965*e0ddfd8dSJin Yao "MSRValue": "0x083FC00120", 966*e0ddfd8dSJin Yao "Offcore": "1", 967*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 968*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 969*e0ddfd8dSJin Yao "UMask": "0x1" 970*e0ddfd8dSJin Yao }, 971*e0ddfd8dSJin Yao { 972*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_PF_RFO.L3_MISS.SNOOP_MISS OCR.ALL_PF_RFO.L3_MISS.SNOOP_MISS", 973*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 974*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 975*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 976*e0ddfd8dSJin Yao "EventName": "OCR.ALL_PF_RFO.L3_MISS.SNOOP_MISS", 977*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 978*e0ddfd8dSJin Yao "MSRValue": "0x023C000120", 979*e0ddfd8dSJin Yao "Offcore": "1", 980*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 981*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 982*e0ddfd8dSJin Yao "UMask": "0x1" 983*e0ddfd8dSJin Yao }, 984*e0ddfd8dSJin Yao { 985*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_PF_RFO.L3_MISS.SNOOP_NONE OCR.ALL_PF_RFO.L3_MISS.SNOOP_NONE", 986*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 987*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 988*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 989*e0ddfd8dSJin Yao "EventName": "OCR.ALL_PF_RFO.L3_MISS.SNOOP_NONE", 990*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 991*e0ddfd8dSJin Yao "MSRValue": "0x00BC000120", 992*e0ddfd8dSJin Yao "Offcore": "1", 993*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 994*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 995*e0ddfd8dSJin Yao "UMask": "0x1" 996*e0ddfd8dSJin Yao }, 997*e0ddfd8dSJin Yao { 998*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 999*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 1000*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 1001*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 1002*e0ddfd8dSJin Yao "EventName": "OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 1003*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 1004*e0ddfd8dSJin Yao "MSRValue": "0x3F84000120", 1005*e0ddfd8dSJin Yao "Offcore": "1", 1006*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1007*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 1008*e0ddfd8dSJin Yao "UMask": "0x1" 1009*e0ddfd8dSJin Yao }, 1010*e0ddfd8dSJin Yao { 1011*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 1012*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 1013*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 1014*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 1015*e0ddfd8dSJin Yao "EventName": "OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 1016*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 1017*e0ddfd8dSJin Yao "MSRValue": "0x1004000120", 1018*e0ddfd8dSJin Yao "Offcore": "1", 1019*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1020*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 1021*e0ddfd8dSJin Yao "UMask": "0x1" 1022*e0ddfd8dSJin Yao }, 1023*e0ddfd8dSJin Yao { 1024*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 1025*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 1026*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 1027*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 1028*e0ddfd8dSJin Yao "EventName": "OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 1029*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 1030*e0ddfd8dSJin Yao "MSRValue": "0x0804000120", 1031*e0ddfd8dSJin Yao "Offcore": "1", 1032*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1033*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 1034*e0ddfd8dSJin Yao "UMask": "0x1" 1035*e0ddfd8dSJin Yao }, 1036*e0ddfd8dSJin Yao { 1037*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 1038*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 1039*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 1040*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 1041*e0ddfd8dSJin Yao "EventName": "OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 1042*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 1043*e0ddfd8dSJin Yao "MSRValue": "0x0404000120", 1044*e0ddfd8dSJin Yao "Offcore": "1", 1045*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1046*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 1047*e0ddfd8dSJin Yao "UMask": "0x1" 1048*e0ddfd8dSJin Yao }, 1049*e0ddfd8dSJin Yao { 1050*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 1051*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 1052*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 1053*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 1054*e0ddfd8dSJin Yao "EventName": "OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 1055*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 1056*e0ddfd8dSJin Yao "MSRValue": "0x0104000120", 1057*e0ddfd8dSJin Yao "Offcore": "1", 1058*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1059*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 1060*e0ddfd8dSJin Yao "UMask": "0x1" 1061*e0ddfd8dSJin Yao }, 1062*e0ddfd8dSJin Yao { 1063*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 1064*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 1065*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 1066*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 1067*e0ddfd8dSJin Yao "EventName": "OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 1068*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 1069*e0ddfd8dSJin Yao "MSRValue": "0x0204000120", 1070*e0ddfd8dSJin Yao "Offcore": "1", 1071*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1072*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 1073*e0ddfd8dSJin Yao "UMask": "0x1" 1074*e0ddfd8dSJin Yao }, 1075*e0ddfd8dSJin Yao { 1076*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 1077*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 1078*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 1079*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 1080*e0ddfd8dSJin Yao "EventName": "OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 1081*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 1082*e0ddfd8dSJin Yao "MSRValue": "0x0604000120", 1083*e0ddfd8dSJin Yao "Offcore": "1", 1084*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1085*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 1086*e0ddfd8dSJin Yao "UMask": "0x1" 1087*e0ddfd8dSJin Yao }, 1088*e0ddfd8dSJin Yao { 1089*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 1090*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 1091*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 1092*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 1093*e0ddfd8dSJin Yao "EventName": "OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 1094*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 1095*e0ddfd8dSJin Yao "MSRValue": "0x0084000120", 1096*e0ddfd8dSJin Yao "Offcore": "1", 1097*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1098*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 1099*e0ddfd8dSJin Yao "UMask": "0x1" 1100*e0ddfd8dSJin Yao }, 1101*e0ddfd8dSJin Yao { 1102*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_PF_RFO.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD OCR.ALL_PF_RFO.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 1103*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 1104*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 1105*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 1106*e0ddfd8dSJin Yao "EventName": "OCR.ALL_PF_RFO.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 1107*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 1108*e0ddfd8dSJin Yao "MSRValue": "0x063B800120", 1109*e0ddfd8dSJin Yao "Offcore": "1", 1110*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1111*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 1112*e0ddfd8dSJin Yao "UMask": "0x1" 1113*e0ddfd8dSJin Yao }, 1114*e0ddfd8dSJin Yao { 1115*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 1116*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 1117*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 1118*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 1119*e0ddfd8dSJin Yao "EventName": "OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 1120*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 1121*e0ddfd8dSJin Yao "MSRValue": "0x3F90000120", 1122*e0ddfd8dSJin Yao "Offcore": "1", 1123*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1124*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 1125*e0ddfd8dSJin Yao "UMask": "0x1" 1126*e0ddfd8dSJin Yao }, 1127*e0ddfd8dSJin Yao { 1128*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 1129*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 1130*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 1131*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 1132*e0ddfd8dSJin Yao "EventName": "OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 1133*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 1134*e0ddfd8dSJin Yao "MSRValue": "0x1010000120", 1135*e0ddfd8dSJin Yao "Offcore": "1", 1136*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1137*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 1138*e0ddfd8dSJin Yao "UMask": "0x1" 1139*e0ddfd8dSJin Yao }, 1140*e0ddfd8dSJin Yao { 1141*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 1142*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 1143*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 1144*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 1145*e0ddfd8dSJin Yao "EventName": "OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 1146*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 1147*e0ddfd8dSJin Yao "MSRValue": "0x0810000120", 1148*e0ddfd8dSJin Yao "Offcore": "1", 1149*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1150*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 1151*e0ddfd8dSJin Yao "UMask": "0x1" 1152*e0ddfd8dSJin Yao }, 1153*e0ddfd8dSJin Yao { 1154*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 1155*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 1156*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 1157*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 1158*e0ddfd8dSJin Yao "EventName": "OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 1159*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 1160*e0ddfd8dSJin Yao "MSRValue": "0x0410000120", 1161*e0ddfd8dSJin Yao "Offcore": "1", 1162*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1163*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 1164*e0ddfd8dSJin Yao "UMask": "0x1" 1165*e0ddfd8dSJin Yao }, 1166*e0ddfd8dSJin Yao { 1167*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 1168*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 1169*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 1170*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 1171*e0ddfd8dSJin Yao "EventName": "OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 1172*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 1173*e0ddfd8dSJin Yao "MSRValue": "0x0110000120", 1174*e0ddfd8dSJin Yao "Offcore": "1", 1175*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1176*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 1177*e0ddfd8dSJin Yao "UMask": "0x1" 1178*e0ddfd8dSJin Yao }, 1179*e0ddfd8dSJin Yao { 1180*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 1181*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 1182*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 1183*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 1184*e0ddfd8dSJin Yao "EventName": "OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 1185*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 1186*e0ddfd8dSJin Yao "MSRValue": "0x0210000120", 1187*e0ddfd8dSJin Yao "Offcore": "1", 1188*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1189*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 1190*e0ddfd8dSJin Yao "UMask": "0x1" 1191*e0ddfd8dSJin Yao }, 1192*e0ddfd8dSJin Yao { 1193*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 1194*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 1195*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 1196*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 1197*e0ddfd8dSJin Yao "EventName": "OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 1198*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 1199*e0ddfd8dSJin Yao "MSRValue": "0x0090000120", 1200*e0ddfd8dSJin Yao "Offcore": "1", 1201*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1202*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 1203*e0ddfd8dSJin Yao "UMask": "0x1" 1204*e0ddfd8dSJin Yao }, 1205*e0ddfd8dSJin Yao { 1206*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_READS.L3_MISS.ANY_SNOOP OCR.ALL_READS.L3_MISS.ANY_SNOOP OCR.ALL_READS.L3_MISS.ANY_SNOOP", 1207*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 1208*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 1209*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 1210*e0ddfd8dSJin Yao "EventName": "OCR.ALL_READS.L3_MISS.ANY_SNOOP", 1211*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 1212*e0ddfd8dSJin Yao "MSRValue": "0x3FBC0007F7", 1213*e0ddfd8dSJin Yao "Offcore": "1", 1214*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1215*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 1216*e0ddfd8dSJin Yao "UMask": "0x1" 1217*e0ddfd8dSJin Yao }, 1218*e0ddfd8dSJin Yao { 1219*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_READS.L3_MISS.HITM_OTHER_CORE OCR.ALL_READS.L3_MISS.HITM_OTHER_CORE OCR.ALL_READS.L3_MISS.HITM_OTHER_CORE", 1220*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 1221*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 1222*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 1223*e0ddfd8dSJin Yao "EventName": "OCR.ALL_READS.L3_MISS.HITM_OTHER_CORE", 1224*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 1225*e0ddfd8dSJin Yao "MSRValue": "0x103C0007F7", 1226*e0ddfd8dSJin Yao "Offcore": "1", 1227*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1228*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 1229*e0ddfd8dSJin Yao "UMask": "0x1" 1230*e0ddfd8dSJin Yao }, 1231*e0ddfd8dSJin Yao { 1232*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_READS.L3_MISS.HIT_OTHER_CORE_FWD OCR.ALL_READS.L3_MISS.HIT_OTHER_CORE_FWD OCR.ALL_READS.L3_MISS.HIT_OTHER_CORE_FWD", 1233*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 1234*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 1235*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 1236*e0ddfd8dSJin Yao "EventName": "OCR.ALL_READS.L3_MISS.HIT_OTHER_CORE_FWD", 1237*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 1238*e0ddfd8dSJin Yao "MSRValue": "0x083C0007F7", 1239*e0ddfd8dSJin Yao "Offcore": "1", 1240*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1241*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 1242*e0ddfd8dSJin Yao "UMask": "0x1" 1243*e0ddfd8dSJin Yao }, 1244*e0ddfd8dSJin Yao { 1245*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_READS.L3_MISS.HIT_OTHER_CORE_NO_FWD OCR.ALL_READS.L3_MISS.HIT_OTHER_CORE_NO_FWD OCR.ALL_READS.L3_MISS.HIT_OTHER_CORE_NO_FWD", 1246*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 1247*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 1248*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 1249*e0ddfd8dSJin Yao "EventName": "OCR.ALL_READS.L3_MISS.HIT_OTHER_CORE_NO_FWD", 1250*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 1251*e0ddfd8dSJin Yao "MSRValue": "0x043C0007F7", 1252*e0ddfd8dSJin Yao "Offcore": "1", 1253*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1254*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 1255*e0ddfd8dSJin Yao "UMask": "0x1" 1256*e0ddfd8dSJin Yao }, 1257*e0ddfd8dSJin Yao { 1258*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_READS.L3_MISS.NO_SNOOP_NEEDED OCR.ALL_READS.L3_MISS.NO_SNOOP_NEEDED OCR.ALL_READS.L3_MISS.NO_SNOOP_NEEDED", 1259*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 1260*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 1261*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 1262*e0ddfd8dSJin Yao "EventName": "OCR.ALL_READS.L3_MISS.NO_SNOOP_NEEDED", 1263*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 1264*e0ddfd8dSJin Yao "MSRValue": "0x013C0007F7", 1265*e0ddfd8dSJin Yao "Offcore": "1", 1266*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1267*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 1268*e0ddfd8dSJin Yao "UMask": "0x1" 1269*e0ddfd8dSJin Yao }, 1270*e0ddfd8dSJin Yao { 1271*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_READS.L3_MISS.REMOTE_HITM OCR.ALL_READS.L3_MISS.REMOTE_HITM", 1272*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 1273*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 1274*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 1275*e0ddfd8dSJin Yao "EventName": "OCR.ALL_READS.L3_MISS.REMOTE_HITM", 1276*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 1277*e0ddfd8dSJin Yao "MSRValue": "0x103FC007F7", 1278*e0ddfd8dSJin Yao "Offcore": "1", 1279*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1280*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 1281*e0ddfd8dSJin Yao "UMask": "0x1" 1282*e0ddfd8dSJin Yao }, 1283*e0ddfd8dSJin Yao { 1284*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_READS.L3_MISS.REMOTE_HIT_FORWARD OCR.ALL_READS.L3_MISS.REMOTE_HIT_FORWARD", 1285*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 1286*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 1287*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 1288*e0ddfd8dSJin Yao "EventName": "OCR.ALL_READS.L3_MISS.REMOTE_HIT_FORWARD", 1289*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 1290*e0ddfd8dSJin Yao "MSRValue": "0x083FC007F7", 1291*e0ddfd8dSJin Yao "Offcore": "1", 1292*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1293*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 1294*e0ddfd8dSJin Yao "UMask": "0x1" 1295*e0ddfd8dSJin Yao }, 1296*e0ddfd8dSJin Yao { 1297*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_READS.L3_MISS.SNOOP_MISS OCR.ALL_READS.L3_MISS.SNOOP_MISS", 1298*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 1299*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 1300*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 1301*e0ddfd8dSJin Yao "EventName": "OCR.ALL_READS.L3_MISS.SNOOP_MISS", 1302*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 1303*e0ddfd8dSJin Yao "MSRValue": "0x023C0007F7", 1304*e0ddfd8dSJin Yao "Offcore": "1", 1305*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1306*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 1307*e0ddfd8dSJin Yao "UMask": "0x1" 1308*e0ddfd8dSJin Yao }, 1309*e0ddfd8dSJin Yao { 1310*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_READS.L3_MISS.SNOOP_NONE OCR.ALL_READS.L3_MISS.SNOOP_NONE", 1311*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 1312*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 1313*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 1314*e0ddfd8dSJin Yao "EventName": "OCR.ALL_READS.L3_MISS.SNOOP_NONE", 1315*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 1316*e0ddfd8dSJin Yao "MSRValue": "0x00BC0007F7", 1317*e0ddfd8dSJin Yao "Offcore": "1", 1318*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1319*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 1320*e0ddfd8dSJin Yao "UMask": "0x1" 1321*e0ddfd8dSJin Yao }, 1322*e0ddfd8dSJin Yao { 1323*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_READS.L3_MISS_LOCAL_DRAM.ANY_SNOOP OCR.ALL_READS.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 1324*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 1325*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 1326*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 1327*e0ddfd8dSJin Yao "EventName": "OCR.ALL_READS.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 1328*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 1329*e0ddfd8dSJin Yao "MSRValue": "0x3F840007F7", 13307fcf1b89SHaiyan Song "Offcore": "1", 13317fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 13327fcf1b89SHaiyan Song "SampleAfterValue": "100003", 13337fcf1b89SHaiyan Song "UMask": "0x1" 13347fcf1b89SHaiyan Song }, 13357fcf1b89SHaiyan Song { 1336038d3b53SJin Yao "BriefDescription": "OCR.ALL_READS.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE OCR.ALL_READS.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 13377fcf1b89SHaiyan Song "Counter": "0,1,2,3", 13387fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 13397fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 13407fcf1b89SHaiyan Song "EventName": "OCR.ALL_READS.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 13417fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 13427fcf1b89SHaiyan Song "MSRValue": "0x10040007F7", 13437fcf1b89SHaiyan Song "Offcore": "1", 13447fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 13457fcf1b89SHaiyan Song "SampleAfterValue": "100003", 13467fcf1b89SHaiyan Song "UMask": "0x1" 13477fcf1b89SHaiyan Song }, 13487fcf1b89SHaiyan Song { 1349*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_READS.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD OCR.ALL_READS.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 13507fcf1b89SHaiyan Song "Counter": "0,1,2,3", 13517fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 13527fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 1353*e0ddfd8dSJin Yao "EventName": "OCR.ALL_READS.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 13547fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 1355*e0ddfd8dSJin Yao "MSRValue": "0x08040007F7", 1356*e0ddfd8dSJin Yao "Offcore": "1", 1357*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1358*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 1359*e0ddfd8dSJin Yao "UMask": "0x1" 1360*e0ddfd8dSJin Yao }, 1361*e0ddfd8dSJin Yao { 1362*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_READS.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD OCR.ALL_READS.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 1363*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 1364*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 1365*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 1366*e0ddfd8dSJin Yao "EventName": "OCR.ALL_READS.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 1367*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 1368*e0ddfd8dSJin Yao "MSRValue": "0x04040007F7", 1369*e0ddfd8dSJin Yao "Offcore": "1", 1370*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1371*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 1372*e0ddfd8dSJin Yao "UMask": "0x1" 1373*e0ddfd8dSJin Yao }, 1374*e0ddfd8dSJin Yao { 1375*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_READS.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED OCR.ALL_READS.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 1376*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 1377*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 1378*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 1379*e0ddfd8dSJin Yao "EventName": "OCR.ALL_READS.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 1380*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 1381*e0ddfd8dSJin Yao "MSRValue": "0x01040007F7", 1382*e0ddfd8dSJin Yao "Offcore": "1", 1383*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1384*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 1385*e0ddfd8dSJin Yao "UMask": "0x1" 1386*e0ddfd8dSJin Yao }, 1387*e0ddfd8dSJin Yao { 1388*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_READS.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 1389*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 1390*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 1391*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 1392*e0ddfd8dSJin Yao "EventName": "OCR.ALL_READS.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 1393*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 1394*e0ddfd8dSJin Yao "MSRValue": "0x02040007F7", 1395*e0ddfd8dSJin Yao "Offcore": "1", 1396*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1397*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 1398*e0ddfd8dSJin Yao "UMask": "0x1" 1399*e0ddfd8dSJin Yao }, 1400*e0ddfd8dSJin Yao { 1401*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_READS.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD OCR.ALL_READS.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 1402*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 1403*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 1404*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 1405*e0ddfd8dSJin Yao "EventName": "OCR.ALL_READS.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 1406*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 1407*e0ddfd8dSJin Yao "MSRValue": "0x06040007F7", 1408*e0ddfd8dSJin Yao "Offcore": "1", 1409*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1410*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 1411*e0ddfd8dSJin Yao "UMask": "0x1" 1412*e0ddfd8dSJin Yao }, 1413*e0ddfd8dSJin Yao { 1414*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_READS.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 1415*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 1416*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 1417*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 1418*e0ddfd8dSJin Yao "EventName": "OCR.ALL_READS.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 1419*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 1420*e0ddfd8dSJin Yao "MSRValue": "0x00840007F7", 1421*e0ddfd8dSJin Yao "Offcore": "1", 1422*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1423*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 1424*e0ddfd8dSJin Yao "UMask": "0x1" 1425*e0ddfd8dSJin Yao }, 1426*e0ddfd8dSJin Yao { 1427*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_READS.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD OCR.ALL_READS.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 1428*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 1429*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 1430*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 1431*e0ddfd8dSJin Yao "EventName": "OCR.ALL_READS.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 1432*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 1433*e0ddfd8dSJin Yao "MSRValue": "0x063B8007F7", 1434*e0ddfd8dSJin Yao "Offcore": "1", 1435*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1436*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 1437*e0ddfd8dSJin Yao "UMask": "0x1" 1438*e0ddfd8dSJin Yao }, 1439*e0ddfd8dSJin Yao { 1440*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 1441*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 1442*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 1443*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 1444*e0ddfd8dSJin Yao "EventName": "OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 1445*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 1446*e0ddfd8dSJin Yao "MSRValue": "0x3F900007F7", 1447*e0ddfd8dSJin Yao "Offcore": "1", 1448*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1449*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 1450*e0ddfd8dSJin Yao "UMask": "0x1" 1451*e0ddfd8dSJin Yao }, 1452*e0ddfd8dSJin Yao { 1453*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 1454*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 1455*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 1456*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 1457*e0ddfd8dSJin Yao "EventName": "OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 1458*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 1459*e0ddfd8dSJin Yao "MSRValue": "0x10100007F7", 1460*e0ddfd8dSJin Yao "Offcore": "1", 1461*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1462*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 1463*e0ddfd8dSJin Yao "UMask": "0x1" 1464*e0ddfd8dSJin Yao }, 1465*e0ddfd8dSJin Yao { 1466*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 1467*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 1468*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 1469*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 1470*e0ddfd8dSJin Yao "EventName": "OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 1471*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 1472*e0ddfd8dSJin Yao "MSRValue": "0x08100007F7", 1473*e0ddfd8dSJin Yao "Offcore": "1", 1474*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1475*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 1476*e0ddfd8dSJin Yao "UMask": "0x1" 1477*e0ddfd8dSJin Yao }, 1478*e0ddfd8dSJin Yao { 1479*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 1480*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 1481*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 1482*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 1483*e0ddfd8dSJin Yao "EventName": "OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 1484*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 1485*e0ddfd8dSJin Yao "MSRValue": "0x04100007F7", 1486*e0ddfd8dSJin Yao "Offcore": "1", 1487*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1488*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 1489*e0ddfd8dSJin Yao "UMask": "0x1" 1490*e0ddfd8dSJin Yao }, 1491*e0ddfd8dSJin Yao { 1492*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 1493*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 1494*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 1495*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 1496*e0ddfd8dSJin Yao "EventName": "OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 1497*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 1498*e0ddfd8dSJin Yao "MSRValue": "0x01100007F7", 1499*e0ddfd8dSJin Yao "Offcore": "1", 1500*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1501*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 1502*e0ddfd8dSJin Yao "UMask": "0x1" 1503*e0ddfd8dSJin Yao }, 1504*e0ddfd8dSJin Yao { 1505*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 1506*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 1507*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 1508*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 1509*e0ddfd8dSJin Yao "EventName": "OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 1510*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 1511*e0ddfd8dSJin Yao "MSRValue": "0x02100007F7", 1512*e0ddfd8dSJin Yao "Offcore": "1", 1513*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1514*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 1515*e0ddfd8dSJin Yao "UMask": "0x1" 1516*e0ddfd8dSJin Yao }, 1517*e0ddfd8dSJin Yao { 1518*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 1519*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 1520*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 1521*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 1522*e0ddfd8dSJin Yao "EventName": "OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 1523*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 1524*e0ddfd8dSJin Yao "MSRValue": "0x00900007F7", 1525*e0ddfd8dSJin Yao "Offcore": "1", 1526*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1527*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 1528*e0ddfd8dSJin Yao "UMask": "0x1" 1529*e0ddfd8dSJin Yao }, 1530*e0ddfd8dSJin Yao { 1531*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_RFO.L3_MISS.ANY_SNOOP OCR.ALL_RFO.L3_MISS.ANY_SNOOP OCR.ALL_RFO.L3_MISS.ANY_SNOOP", 1532*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 1533*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 1534*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 1535*e0ddfd8dSJin Yao "EventName": "OCR.ALL_RFO.L3_MISS.ANY_SNOOP", 1536*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 1537*e0ddfd8dSJin Yao "MSRValue": "0x3FBC000122", 1538*e0ddfd8dSJin Yao "Offcore": "1", 1539*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1540*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 1541*e0ddfd8dSJin Yao "UMask": "0x1" 1542*e0ddfd8dSJin Yao }, 1543*e0ddfd8dSJin Yao { 1544*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_RFO.L3_MISS.HITM_OTHER_CORE OCR.ALL_RFO.L3_MISS.HITM_OTHER_CORE OCR.ALL_RFO.L3_MISS.HITM_OTHER_CORE", 1545*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 1546*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 1547*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 1548*e0ddfd8dSJin Yao "EventName": "OCR.ALL_RFO.L3_MISS.HITM_OTHER_CORE", 1549*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 1550*e0ddfd8dSJin Yao "MSRValue": "0x103C000122", 1551*e0ddfd8dSJin Yao "Offcore": "1", 1552*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1553*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 1554*e0ddfd8dSJin Yao "UMask": "0x1" 1555*e0ddfd8dSJin Yao }, 1556*e0ddfd8dSJin Yao { 1557*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_RFO.L3_MISS.HIT_OTHER_CORE_FWD OCR.ALL_RFO.L3_MISS.HIT_OTHER_CORE_FWD OCR.ALL_RFO.L3_MISS.HIT_OTHER_CORE_FWD", 1558*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 1559*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 1560*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 1561*e0ddfd8dSJin Yao "EventName": "OCR.ALL_RFO.L3_MISS.HIT_OTHER_CORE_FWD", 1562*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 1563*e0ddfd8dSJin Yao "MSRValue": "0x083C000122", 1564*e0ddfd8dSJin Yao "Offcore": "1", 1565*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1566*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 1567*e0ddfd8dSJin Yao "UMask": "0x1" 1568*e0ddfd8dSJin Yao }, 1569*e0ddfd8dSJin Yao { 1570*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD OCR.ALL_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD OCR.ALL_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD", 1571*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 1572*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 1573*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 1574*e0ddfd8dSJin Yao "EventName": "OCR.ALL_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD", 1575*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 1576*e0ddfd8dSJin Yao "MSRValue": "0x043C000122", 1577*e0ddfd8dSJin Yao "Offcore": "1", 1578*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1579*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 1580*e0ddfd8dSJin Yao "UMask": "0x1" 1581*e0ddfd8dSJin Yao }, 1582*e0ddfd8dSJin Yao { 1583*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_RFO.L3_MISS.NO_SNOOP_NEEDED OCR.ALL_RFO.L3_MISS.NO_SNOOP_NEEDED OCR.ALL_RFO.L3_MISS.NO_SNOOP_NEEDED", 1584*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 1585*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 1586*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 1587*e0ddfd8dSJin Yao "EventName": "OCR.ALL_RFO.L3_MISS.NO_SNOOP_NEEDED", 1588*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 1589*e0ddfd8dSJin Yao "MSRValue": "0x013C000122", 1590*e0ddfd8dSJin Yao "Offcore": "1", 1591*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1592*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 1593*e0ddfd8dSJin Yao "UMask": "0x1" 1594*e0ddfd8dSJin Yao }, 1595*e0ddfd8dSJin Yao { 1596*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_RFO.L3_MISS.REMOTE_HITM OCR.ALL_RFO.L3_MISS.REMOTE_HITM", 1597*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 1598*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 1599*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 1600*e0ddfd8dSJin Yao "EventName": "OCR.ALL_RFO.L3_MISS.REMOTE_HITM", 1601*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 1602*e0ddfd8dSJin Yao "MSRValue": "0x103FC00122", 1603*e0ddfd8dSJin Yao "Offcore": "1", 1604*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1605*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 1606*e0ddfd8dSJin Yao "UMask": "0x1" 1607*e0ddfd8dSJin Yao }, 1608*e0ddfd8dSJin Yao { 1609*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_RFO.L3_MISS.REMOTE_HIT_FORWARD OCR.ALL_RFO.L3_MISS.REMOTE_HIT_FORWARD", 1610*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 1611*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 1612*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 1613*e0ddfd8dSJin Yao "EventName": "OCR.ALL_RFO.L3_MISS.REMOTE_HIT_FORWARD", 1614*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 1615*e0ddfd8dSJin Yao "MSRValue": "0x083FC00122", 1616*e0ddfd8dSJin Yao "Offcore": "1", 1617*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1618*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 1619*e0ddfd8dSJin Yao "UMask": "0x1" 1620*e0ddfd8dSJin Yao }, 1621*e0ddfd8dSJin Yao { 1622*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_RFO.L3_MISS.SNOOP_MISS OCR.ALL_RFO.L3_MISS.SNOOP_MISS", 1623*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 1624*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 1625*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 1626*e0ddfd8dSJin Yao "EventName": "OCR.ALL_RFO.L3_MISS.SNOOP_MISS", 1627*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 1628*e0ddfd8dSJin Yao "MSRValue": "0x023C000122", 1629*e0ddfd8dSJin Yao "Offcore": "1", 1630*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1631*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 1632*e0ddfd8dSJin Yao "UMask": "0x1" 1633*e0ddfd8dSJin Yao }, 1634*e0ddfd8dSJin Yao { 1635*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_RFO.L3_MISS.SNOOP_NONE OCR.ALL_RFO.L3_MISS.SNOOP_NONE", 1636*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 1637*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 1638*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 1639*e0ddfd8dSJin Yao "EventName": "OCR.ALL_RFO.L3_MISS.SNOOP_NONE", 1640*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 1641*e0ddfd8dSJin Yao "MSRValue": "0x00BC000122", 1642*e0ddfd8dSJin Yao "Offcore": "1", 1643*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1644*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 1645*e0ddfd8dSJin Yao "UMask": "0x1" 1646*e0ddfd8dSJin Yao }, 1647*e0ddfd8dSJin Yao { 1648*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 1649*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 1650*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 1651*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 1652*e0ddfd8dSJin Yao "EventName": "OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 1653*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 1654*e0ddfd8dSJin Yao "MSRValue": "0x3F84000122", 1655*e0ddfd8dSJin Yao "Offcore": "1", 1656*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1657*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 1658*e0ddfd8dSJin Yao "UMask": "0x1" 1659*e0ddfd8dSJin Yao }, 1660*e0ddfd8dSJin Yao { 1661*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 1662*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 1663*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 1664*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 1665*e0ddfd8dSJin Yao "EventName": "OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 1666*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 1667*e0ddfd8dSJin Yao "MSRValue": "0x1004000122", 1668*e0ddfd8dSJin Yao "Offcore": "1", 1669*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1670*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 1671*e0ddfd8dSJin Yao "UMask": "0x1" 1672*e0ddfd8dSJin Yao }, 1673*e0ddfd8dSJin Yao { 1674*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 1675*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 1676*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 1677*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 1678*e0ddfd8dSJin Yao "EventName": "OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 1679*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 1680*e0ddfd8dSJin Yao "MSRValue": "0x0804000122", 1681*e0ddfd8dSJin Yao "Offcore": "1", 1682*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1683*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 1684*e0ddfd8dSJin Yao "UMask": "0x1" 1685*e0ddfd8dSJin Yao }, 1686*e0ddfd8dSJin Yao { 1687*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 1688*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 1689*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 1690*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 1691*e0ddfd8dSJin Yao "EventName": "OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 1692*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 1693*e0ddfd8dSJin Yao "MSRValue": "0x0404000122", 1694*e0ddfd8dSJin Yao "Offcore": "1", 1695*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1696*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 1697*e0ddfd8dSJin Yao "UMask": "0x1" 1698*e0ddfd8dSJin Yao }, 1699*e0ddfd8dSJin Yao { 1700*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 1701*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 1702*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 1703*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 1704*e0ddfd8dSJin Yao "EventName": "OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 1705*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 1706*e0ddfd8dSJin Yao "MSRValue": "0x0104000122", 1707*e0ddfd8dSJin Yao "Offcore": "1", 1708*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1709*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 1710*e0ddfd8dSJin Yao "UMask": "0x1" 1711*e0ddfd8dSJin Yao }, 1712*e0ddfd8dSJin Yao { 1713*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 1714*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 1715*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 1716*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 1717*e0ddfd8dSJin Yao "EventName": "OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 1718*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 1719*e0ddfd8dSJin Yao "MSRValue": "0x0204000122", 1720*e0ddfd8dSJin Yao "Offcore": "1", 1721*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1722*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 1723*e0ddfd8dSJin Yao "UMask": "0x1" 1724*e0ddfd8dSJin Yao }, 1725*e0ddfd8dSJin Yao { 1726*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 1727*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 1728*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 1729*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 1730*e0ddfd8dSJin Yao "EventName": "OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 1731*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 1732*e0ddfd8dSJin Yao "MSRValue": "0x0604000122", 1733*e0ddfd8dSJin Yao "Offcore": "1", 1734*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1735*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 1736*e0ddfd8dSJin Yao "UMask": "0x1" 1737*e0ddfd8dSJin Yao }, 1738*e0ddfd8dSJin Yao { 1739*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 1740*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 1741*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 1742*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 1743*e0ddfd8dSJin Yao "EventName": "OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 1744*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 1745*e0ddfd8dSJin Yao "MSRValue": "0x0084000122", 1746*e0ddfd8dSJin Yao "Offcore": "1", 1747*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1748*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 1749*e0ddfd8dSJin Yao "UMask": "0x1" 1750*e0ddfd8dSJin Yao }, 1751*e0ddfd8dSJin Yao { 1752*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_RFO.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD OCR.ALL_RFO.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 1753*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 1754*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 1755*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 1756*e0ddfd8dSJin Yao "EventName": "OCR.ALL_RFO.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 1757*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 1758*e0ddfd8dSJin Yao "MSRValue": "0x063B800122", 1759*e0ddfd8dSJin Yao "Offcore": "1", 1760*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1761*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 1762*e0ddfd8dSJin Yao "UMask": "0x1" 1763*e0ddfd8dSJin Yao }, 1764*e0ddfd8dSJin Yao { 1765*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 1766*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 1767*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 1768*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 1769*e0ddfd8dSJin Yao "EventName": "OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 1770*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 1771*e0ddfd8dSJin Yao "MSRValue": "0x3F90000122", 1772*e0ddfd8dSJin Yao "Offcore": "1", 1773*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1774*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 1775*e0ddfd8dSJin Yao "UMask": "0x1" 1776*e0ddfd8dSJin Yao }, 1777*e0ddfd8dSJin Yao { 1778*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 1779*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 1780*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 1781*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 1782*e0ddfd8dSJin Yao "EventName": "OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 1783*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 1784*e0ddfd8dSJin Yao "MSRValue": "0x1010000122", 1785*e0ddfd8dSJin Yao "Offcore": "1", 1786*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1787*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 1788*e0ddfd8dSJin Yao "UMask": "0x1" 1789*e0ddfd8dSJin Yao }, 1790*e0ddfd8dSJin Yao { 1791*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 1792*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 1793*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 1794*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 1795*e0ddfd8dSJin Yao "EventName": "OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 1796*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 1797*e0ddfd8dSJin Yao "MSRValue": "0x0810000122", 1798*e0ddfd8dSJin Yao "Offcore": "1", 1799*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1800*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 1801*e0ddfd8dSJin Yao "UMask": "0x1" 1802*e0ddfd8dSJin Yao }, 1803*e0ddfd8dSJin Yao { 1804*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 1805*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 1806*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 1807*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 1808*e0ddfd8dSJin Yao "EventName": "OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 1809*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 1810*e0ddfd8dSJin Yao "MSRValue": "0x0410000122", 1811*e0ddfd8dSJin Yao "Offcore": "1", 1812*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1813*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 1814*e0ddfd8dSJin Yao "UMask": "0x1" 1815*e0ddfd8dSJin Yao }, 1816*e0ddfd8dSJin Yao { 1817*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 1818*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 1819*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 1820*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 1821*e0ddfd8dSJin Yao "EventName": "OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 1822*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 1823*e0ddfd8dSJin Yao "MSRValue": "0x0110000122", 1824*e0ddfd8dSJin Yao "Offcore": "1", 1825*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1826*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 1827*e0ddfd8dSJin Yao "UMask": "0x1" 1828*e0ddfd8dSJin Yao }, 1829*e0ddfd8dSJin Yao { 1830*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 1831*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 1832*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 1833*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 1834*e0ddfd8dSJin Yao "EventName": "OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 1835*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 1836*e0ddfd8dSJin Yao "MSRValue": "0x0210000122", 1837*e0ddfd8dSJin Yao "Offcore": "1", 1838*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1839*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 1840*e0ddfd8dSJin Yao "UMask": "0x1" 1841*e0ddfd8dSJin Yao }, 1842*e0ddfd8dSJin Yao { 1843*e0ddfd8dSJin Yao "BriefDescription": "OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 1844*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 1845*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 1846*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 1847*e0ddfd8dSJin Yao "EventName": "OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 1848*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 1849*e0ddfd8dSJin Yao "MSRValue": "0x0090000122", 1850*e0ddfd8dSJin Yao "Offcore": "1", 1851*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1852*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 1853*e0ddfd8dSJin Yao "UMask": "0x1" 1854*e0ddfd8dSJin Yao }, 1855*e0ddfd8dSJin Yao { 1856*e0ddfd8dSJin Yao "BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_MISS.ANY_SNOOP OCR.DEMAND_CODE_RD.L3_MISS.ANY_SNOOP", 1857*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 1858*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 1859*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 1860*e0ddfd8dSJin Yao "EventName": "OCR.DEMAND_CODE_RD.L3_MISS.ANY_SNOOP", 1861*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 1862*e0ddfd8dSJin Yao "MSRValue": "0x3FBC000004", 1863*e0ddfd8dSJin Yao "Offcore": "1", 1864*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1865*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 1866*e0ddfd8dSJin Yao "UMask": "0x1" 1867*e0ddfd8dSJin Yao }, 1868*e0ddfd8dSJin Yao { 1869*e0ddfd8dSJin Yao "BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_MISS.HITM_OTHER_CORE OCR.DEMAND_CODE_RD.L3_MISS.HITM_OTHER_CORE", 1870*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 1871*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 1872*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 1873*e0ddfd8dSJin Yao "EventName": "OCR.DEMAND_CODE_RD.L3_MISS.HITM_OTHER_CORE", 1874*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 1875*e0ddfd8dSJin Yao "MSRValue": "0x103C000004", 1876*e0ddfd8dSJin Yao "Offcore": "1", 1877*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1878*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 1879*e0ddfd8dSJin Yao "UMask": "0x1" 1880*e0ddfd8dSJin Yao }, 1881*e0ddfd8dSJin Yao { 1882*e0ddfd8dSJin Yao "BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_MISS.HIT_OTHER_CORE_FWD OCR.DEMAND_CODE_RD.L3_MISS.HIT_OTHER_CORE_FWD", 1883*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 1884*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 1885*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 1886*e0ddfd8dSJin Yao "EventName": "OCR.DEMAND_CODE_RD.L3_MISS.HIT_OTHER_CORE_FWD", 1887*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 1888*e0ddfd8dSJin Yao "MSRValue": "0x083C000004", 1889*e0ddfd8dSJin Yao "Offcore": "1", 1890*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1891*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 1892*e0ddfd8dSJin Yao "UMask": "0x1" 1893*e0ddfd8dSJin Yao }, 1894*e0ddfd8dSJin Yao { 1895*e0ddfd8dSJin Yao "BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD OCR.DEMAND_CODE_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD", 1896*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 1897*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 1898*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 1899*e0ddfd8dSJin Yao "EventName": "OCR.DEMAND_CODE_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD", 1900*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 1901*e0ddfd8dSJin Yao "MSRValue": "0x043C000004", 1902*e0ddfd8dSJin Yao "Offcore": "1", 1903*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1904*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 1905*e0ddfd8dSJin Yao "UMask": "0x1" 1906*e0ddfd8dSJin Yao }, 1907*e0ddfd8dSJin Yao { 1908*e0ddfd8dSJin Yao "BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_MISS.NO_SNOOP_NEEDED OCR.DEMAND_CODE_RD.L3_MISS.NO_SNOOP_NEEDED", 1909*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 1910*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 1911*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 1912*e0ddfd8dSJin Yao "EventName": "OCR.DEMAND_CODE_RD.L3_MISS.NO_SNOOP_NEEDED", 1913*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 1914*e0ddfd8dSJin Yao "MSRValue": "0x013C000004", 1915*e0ddfd8dSJin Yao "Offcore": "1", 1916*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1917*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 1918*e0ddfd8dSJin Yao "UMask": "0x1" 1919*e0ddfd8dSJin Yao }, 1920*e0ddfd8dSJin Yao { 1921*e0ddfd8dSJin Yao "BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_MISS.REMOTE_HITM", 1922*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 1923*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 1924*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 1925*e0ddfd8dSJin Yao "EventName": "OCR.DEMAND_CODE_RD.L3_MISS.REMOTE_HITM", 1926*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 1927*e0ddfd8dSJin Yao "MSRValue": "0x103FC00004", 1928*e0ddfd8dSJin Yao "Offcore": "1", 1929*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1930*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 1931*e0ddfd8dSJin Yao "UMask": "0x1" 1932*e0ddfd8dSJin Yao }, 1933*e0ddfd8dSJin Yao { 1934*e0ddfd8dSJin Yao "BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_MISS.REMOTE_HIT_FORWARD", 1935*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 1936*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 1937*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 1938*e0ddfd8dSJin Yao "EventName": "OCR.DEMAND_CODE_RD.L3_MISS.REMOTE_HIT_FORWARD", 1939*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 1940*e0ddfd8dSJin Yao "MSRValue": "0x083FC00004", 1941*e0ddfd8dSJin Yao "Offcore": "1", 1942*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1943*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 1944*e0ddfd8dSJin Yao "UMask": "0x1" 1945*e0ddfd8dSJin Yao }, 1946*e0ddfd8dSJin Yao { 1947*e0ddfd8dSJin Yao "BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_MISS.SNOOP_MISS", 1948*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 1949*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 1950*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 1951*e0ddfd8dSJin Yao "EventName": "OCR.DEMAND_CODE_RD.L3_MISS.SNOOP_MISS", 1952*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 1953*e0ddfd8dSJin Yao "MSRValue": "0x023C000004", 1954*e0ddfd8dSJin Yao "Offcore": "1", 1955*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1956*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 1957*e0ddfd8dSJin Yao "UMask": "0x1" 1958*e0ddfd8dSJin Yao }, 1959*e0ddfd8dSJin Yao { 1960*e0ddfd8dSJin Yao "BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_MISS.SNOOP_NONE", 1961*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 1962*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 1963*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 1964*e0ddfd8dSJin Yao "EventName": "OCR.DEMAND_CODE_RD.L3_MISS.SNOOP_NONE", 1965*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 1966*e0ddfd8dSJin Yao "MSRValue": "0x00BC000004", 1967*e0ddfd8dSJin Yao "Offcore": "1", 1968*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1969*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 1970*e0ddfd8dSJin Yao "UMask": "0x1" 1971*e0ddfd8dSJin Yao }, 1972*e0ddfd8dSJin Yao { 1973*e0ddfd8dSJin Yao "BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 1974*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 1975*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 1976*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 1977*e0ddfd8dSJin Yao "EventName": "OCR.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 1978*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 1979*e0ddfd8dSJin Yao "MSRValue": "0x3F84000004", 1980*e0ddfd8dSJin Yao "Offcore": "1", 1981*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1982*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 1983*e0ddfd8dSJin Yao "UMask": "0x1" 1984*e0ddfd8dSJin Yao }, 1985*e0ddfd8dSJin Yao { 1986*e0ddfd8dSJin Yao "BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 1987*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 1988*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 1989*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 1990*e0ddfd8dSJin Yao "EventName": "OCR.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 1991*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 1992*e0ddfd8dSJin Yao "MSRValue": "0x1004000004", 1993*e0ddfd8dSJin Yao "Offcore": "1", 1994*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1995*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 1996*e0ddfd8dSJin Yao "UMask": "0x1" 1997*e0ddfd8dSJin Yao }, 1998*e0ddfd8dSJin Yao { 1999*e0ddfd8dSJin Yao "BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 2000*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 2001*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 2002*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 2003*e0ddfd8dSJin Yao "EventName": "OCR.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 2004*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 2005*e0ddfd8dSJin Yao "MSRValue": "0x0804000004", 2006*e0ddfd8dSJin Yao "Offcore": "1", 2007*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2008*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 2009*e0ddfd8dSJin Yao "UMask": "0x1" 2010*e0ddfd8dSJin Yao }, 2011*e0ddfd8dSJin Yao { 2012*e0ddfd8dSJin Yao "BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 2013*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 2014*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 2015*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 2016*e0ddfd8dSJin Yao "EventName": "OCR.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 2017*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 2018*e0ddfd8dSJin Yao "MSRValue": "0x0404000004", 2019*e0ddfd8dSJin Yao "Offcore": "1", 2020*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2021*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 2022*e0ddfd8dSJin Yao "UMask": "0x1" 2023*e0ddfd8dSJin Yao }, 2024*e0ddfd8dSJin Yao { 2025*e0ddfd8dSJin Yao "BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 2026*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 2027*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 2028*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 2029*e0ddfd8dSJin Yao "EventName": "OCR.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 2030*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 2031*e0ddfd8dSJin Yao "MSRValue": "0x0104000004", 2032*e0ddfd8dSJin Yao "Offcore": "1", 2033*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2034*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 2035*e0ddfd8dSJin Yao "UMask": "0x1" 2036*e0ddfd8dSJin Yao }, 2037*e0ddfd8dSJin Yao { 2038*e0ddfd8dSJin Yao "BriefDescription": "Counts all demand code reads", 2039*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 2040*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 2041*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 2042*e0ddfd8dSJin Yao "EventName": "OCR.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 2043*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 2044*e0ddfd8dSJin Yao "MSRValue": "0x0204000004", 2045*e0ddfd8dSJin Yao "Offcore": "1", 2046*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2047*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 2048*e0ddfd8dSJin Yao "UMask": "0x1" 2049*e0ddfd8dSJin Yao }, 2050*e0ddfd8dSJin Yao { 2051*e0ddfd8dSJin Yao "BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 2052*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 2053*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 2054*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 2055*e0ddfd8dSJin Yao "EventName": "OCR.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 2056*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 2057*e0ddfd8dSJin Yao "MSRValue": "0x0604000004", 2058*e0ddfd8dSJin Yao "Offcore": "1", 2059*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2060*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 2061*e0ddfd8dSJin Yao "UMask": "0x1" 2062*e0ddfd8dSJin Yao }, 2063*e0ddfd8dSJin Yao { 2064*e0ddfd8dSJin Yao "BriefDescription": "Counts all demand code reads", 2065*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 2066*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 2067*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 2068*e0ddfd8dSJin Yao "EventName": "OCR.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 2069*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 2070*e0ddfd8dSJin Yao "MSRValue": "0x0084000004", 2071*e0ddfd8dSJin Yao "Offcore": "1", 2072*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2073*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 2074*e0ddfd8dSJin Yao "UMask": "0x1" 2075*e0ddfd8dSJin Yao }, 2076*e0ddfd8dSJin Yao { 2077*e0ddfd8dSJin Yao "BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 2078*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 2079*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 2080*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 2081*e0ddfd8dSJin Yao "EventName": "OCR.DEMAND_CODE_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 2082*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 2083*e0ddfd8dSJin Yao "MSRValue": "0x063B800004", 2084*e0ddfd8dSJin Yao "Offcore": "1", 2085*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2086*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 2087*e0ddfd8dSJin Yao "UMask": "0x1" 2088*e0ddfd8dSJin Yao }, 2089*e0ddfd8dSJin Yao { 2090*e0ddfd8dSJin Yao "BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 2091*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 2092*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 2093*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 2094*e0ddfd8dSJin Yao "EventName": "OCR.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 2095*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 2096*e0ddfd8dSJin Yao "MSRValue": "0x3F90000004", 2097*e0ddfd8dSJin Yao "Offcore": "1", 2098*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2099*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 2100*e0ddfd8dSJin Yao "UMask": "0x1" 2101*e0ddfd8dSJin Yao }, 2102*e0ddfd8dSJin Yao { 2103*e0ddfd8dSJin Yao "BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 2104*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 2105*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 2106*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 2107*e0ddfd8dSJin Yao "EventName": "OCR.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 2108*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 2109*e0ddfd8dSJin Yao "MSRValue": "0x1010000004", 2110*e0ddfd8dSJin Yao "Offcore": "1", 2111*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2112*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 2113*e0ddfd8dSJin Yao "UMask": "0x1" 2114*e0ddfd8dSJin Yao }, 2115*e0ddfd8dSJin Yao { 2116*e0ddfd8dSJin Yao "BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 2117*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 2118*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 2119*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 2120*e0ddfd8dSJin Yao "EventName": "OCR.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 2121*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 2122*e0ddfd8dSJin Yao "MSRValue": "0x0810000004", 2123*e0ddfd8dSJin Yao "Offcore": "1", 2124*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2125*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 2126*e0ddfd8dSJin Yao "UMask": "0x1" 2127*e0ddfd8dSJin Yao }, 2128*e0ddfd8dSJin Yao { 2129*e0ddfd8dSJin Yao "BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 2130*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 2131*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 2132*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 2133*e0ddfd8dSJin Yao "EventName": "OCR.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 2134*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 2135*e0ddfd8dSJin Yao "MSRValue": "0x0410000004", 2136*e0ddfd8dSJin Yao "Offcore": "1", 2137*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2138*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 2139*e0ddfd8dSJin Yao "UMask": "0x1" 2140*e0ddfd8dSJin Yao }, 2141*e0ddfd8dSJin Yao { 2142*e0ddfd8dSJin Yao "BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 2143*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 2144*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 2145*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 2146*e0ddfd8dSJin Yao "EventName": "OCR.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 2147*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 2148*e0ddfd8dSJin Yao "MSRValue": "0x0110000004", 2149*e0ddfd8dSJin Yao "Offcore": "1", 2150*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2151*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 2152*e0ddfd8dSJin Yao "UMask": "0x1" 2153*e0ddfd8dSJin Yao }, 2154*e0ddfd8dSJin Yao { 2155*e0ddfd8dSJin Yao "BriefDescription": "Counts all demand code reads", 2156*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 2157*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 2158*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 2159*e0ddfd8dSJin Yao "EventName": "OCR.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 2160*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 2161*e0ddfd8dSJin Yao "MSRValue": "0x0210000004", 2162*e0ddfd8dSJin Yao "Offcore": "1", 2163*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2164*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 2165*e0ddfd8dSJin Yao "UMask": "0x1" 2166*e0ddfd8dSJin Yao }, 2167*e0ddfd8dSJin Yao { 2168*e0ddfd8dSJin Yao "BriefDescription": "Counts all demand code reads", 2169*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 2170*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 2171*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 2172*e0ddfd8dSJin Yao "EventName": "OCR.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 2173*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 2174*e0ddfd8dSJin Yao "MSRValue": "0x0090000004", 2175*e0ddfd8dSJin Yao "Offcore": "1", 2176*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2177*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 2178*e0ddfd8dSJin Yao "UMask": "0x1" 2179*e0ddfd8dSJin Yao }, 2180*e0ddfd8dSJin Yao { 2181*e0ddfd8dSJin Yao "BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_MISS.ANY_SNOOP OCR.DEMAND_DATA_RD.L3_MISS.ANY_SNOOP", 2182*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 2183*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 2184*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 2185*e0ddfd8dSJin Yao "EventName": "OCR.DEMAND_DATA_RD.L3_MISS.ANY_SNOOP", 2186*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 2187*e0ddfd8dSJin Yao "MSRValue": "0x3FBC000001", 2188*e0ddfd8dSJin Yao "Offcore": "1", 2189*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2190*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 2191*e0ddfd8dSJin Yao "UMask": "0x1" 2192*e0ddfd8dSJin Yao }, 2193*e0ddfd8dSJin Yao { 2194*e0ddfd8dSJin Yao "BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_MISS.HITM_OTHER_CORE OCR.DEMAND_DATA_RD.L3_MISS.HITM_OTHER_CORE", 2195*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 2196*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 2197*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 2198*e0ddfd8dSJin Yao "EventName": "OCR.DEMAND_DATA_RD.L3_MISS.HITM_OTHER_CORE", 2199*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 2200*e0ddfd8dSJin Yao "MSRValue": "0x103C000001", 2201*e0ddfd8dSJin Yao "Offcore": "1", 2202*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2203*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 2204*e0ddfd8dSJin Yao "UMask": "0x1" 2205*e0ddfd8dSJin Yao }, 2206*e0ddfd8dSJin Yao { 2207*e0ddfd8dSJin Yao "BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD OCR.DEMAND_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD", 2208*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 2209*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 2210*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 2211*e0ddfd8dSJin Yao "EventName": "OCR.DEMAND_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD", 2212*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 2213*e0ddfd8dSJin Yao "MSRValue": "0x083C000001", 2214*e0ddfd8dSJin Yao "Offcore": "1", 2215*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2216*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 2217*e0ddfd8dSJin Yao "UMask": "0x1" 2218*e0ddfd8dSJin Yao }, 2219*e0ddfd8dSJin Yao { 2220*e0ddfd8dSJin Yao "BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD OCR.DEMAND_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD", 2221*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 2222*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 2223*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 2224*e0ddfd8dSJin Yao "EventName": "OCR.DEMAND_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD", 2225*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 2226*e0ddfd8dSJin Yao "MSRValue": "0x043C000001", 2227*e0ddfd8dSJin Yao "Offcore": "1", 2228*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2229*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 2230*e0ddfd8dSJin Yao "UMask": "0x1" 2231*e0ddfd8dSJin Yao }, 2232*e0ddfd8dSJin Yao { 2233*e0ddfd8dSJin Yao "BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_MISS.NO_SNOOP_NEEDED OCR.DEMAND_DATA_RD.L3_MISS.NO_SNOOP_NEEDED", 2234*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 2235*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 2236*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 2237*e0ddfd8dSJin Yao "EventName": "OCR.DEMAND_DATA_RD.L3_MISS.NO_SNOOP_NEEDED", 2238*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 2239*e0ddfd8dSJin Yao "MSRValue": "0x013C000001", 2240*e0ddfd8dSJin Yao "Offcore": "1", 2241*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2242*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 2243*e0ddfd8dSJin Yao "UMask": "0x1" 2244*e0ddfd8dSJin Yao }, 2245*e0ddfd8dSJin Yao { 2246*e0ddfd8dSJin Yao "BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_MISS.REMOTE_HITM", 2247*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 2248*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 2249*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 2250*e0ddfd8dSJin Yao "EventName": "OCR.DEMAND_DATA_RD.L3_MISS.REMOTE_HITM", 2251*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 2252*e0ddfd8dSJin Yao "MSRValue": "0x103FC00001", 2253*e0ddfd8dSJin Yao "Offcore": "1", 2254*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2255*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 2256*e0ddfd8dSJin Yao "UMask": "0x1" 2257*e0ddfd8dSJin Yao }, 2258*e0ddfd8dSJin Yao { 2259*e0ddfd8dSJin Yao "BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_MISS.REMOTE_HIT_FORWARD", 2260*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 2261*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 2262*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 2263*e0ddfd8dSJin Yao "EventName": "OCR.DEMAND_DATA_RD.L3_MISS.REMOTE_HIT_FORWARD", 2264*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 2265*e0ddfd8dSJin Yao "MSRValue": "0x083FC00001", 2266*e0ddfd8dSJin Yao "Offcore": "1", 2267*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2268*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 2269*e0ddfd8dSJin Yao "UMask": "0x1" 2270*e0ddfd8dSJin Yao }, 2271*e0ddfd8dSJin Yao { 2272*e0ddfd8dSJin Yao "BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_MISS.SNOOP_MISS", 2273*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 2274*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 2275*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 2276*e0ddfd8dSJin Yao "EventName": "OCR.DEMAND_DATA_RD.L3_MISS.SNOOP_MISS", 2277*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 2278*e0ddfd8dSJin Yao "MSRValue": "0x023C000001", 2279*e0ddfd8dSJin Yao "Offcore": "1", 2280*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2281*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 2282*e0ddfd8dSJin Yao "UMask": "0x1" 2283*e0ddfd8dSJin Yao }, 2284*e0ddfd8dSJin Yao { 2285*e0ddfd8dSJin Yao "BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_MISS.SNOOP_NONE", 2286*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 2287*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 2288*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 2289*e0ddfd8dSJin Yao "EventName": "OCR.DEMAND_DATA_RD.L3_MISS.SNOOP_NONE", 2290*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 2291*e0ddfd8dSJin Yao "MSRValue": "0x00BC000001", 2292*e0ddfd8dSJin Yao "Offcore": "1", 2293*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2294*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 2295*e0ddfd8dSJin Yao "UMask": "0x1" 2296*e0ddfd8dSJin Yao }, 2297*e0ddfd8dSJin Yao { 2298*e0ddfd8dSJin Yao "BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 2299*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 2300*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 2301*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 2302*e0ddfd8dSJin Yao "EventName": "OCR.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 2303*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 2304*e0ddfd8dSJin Yao "MSRValue": "0x3F84000001", 2305*e0ddfd8dSJin Yao "Offcore": "1", 2306*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2307*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 2308*e0ddfd8dSJin Yao "UMask": "0x1" 2309*e0ddfd8dSJin Yao }, 2310*e0ddfd8dSJin Yao { 2311*e0ddfd8dSJin Yao "BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 2312*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 2313*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 2314*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 2315*e0ddfd8dSJin Yao "EventName": "OCR.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 2316*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 2317*e0ddfd8dSJin Yao "MSRValue": "0x1004000001", 2318*e0ddfd8dSJin Yao "Offcore": "1", 2319*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2320*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 2321*e0ddfd8dSJin Yao "UMask": "0x1" 2322*e0ddfd8dSJin Yao }, 2323*e0ddfd8dSJin Yao { 2324*e0ddfd8dSJin Yao "BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 2325*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 2326*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 2327*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 2328*e0ddfd8dSJin Yao "EventName": "OCR.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 2329*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 2330*e0ddfd8dSJin Yao "MSRValue": "0x0804000001", 2331*e0ddfd8dSJin Yao "Offcore": "1", 2332*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2333*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 2334*e0ddfd8dSJin Yao "UMask": "0x1" 2335*e0ddfd8dSJin Yao }, 2336*e0ddfd8dSJin Yao { 2337*e0ddfd8dSJin Yao "BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 2338*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 2339*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 2340*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 2341*e0ddfd8dSJin Yao "EventName": "OCR.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 2342*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 2343*e0ddfd8dSJin Yao "MSRValue": "0x0404000001", 2344*e0ddfd8dSJin Yao "Offcore": "1", 2345*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2346*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 2347*e0ddfd8dSJin Yao "UMask": "0x1" 2348*e0ddfd8dSJin Yao }, 2349*e0ddfd8dSJin Yao { 2350*e0ddfd8dSJin Yao "BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 2351*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 2352*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 2353*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 2354*e0ddfd8dSJin Yao "EventName": "OCR.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 2355*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 2356*e0ddfd8dSJin Yao "MSRValue": "0x0104000001", 2357*e0ddfd8dSJin Yao "Offcore": "1", 2358*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2359*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 2360*e0ddfd8dSJin Yao "UMask": "0x1" 2361*e0ddfd8dSJin Yao }, 2362*e0ddfd8dSJin Yao { 2363*e0ddfd8dSJin Yao "BriefDescription": "Counts demand data reads", 2364*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 2365*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 2366*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 2367*e0ddfd8dSJin Yao "EventName": "OCR.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 2368*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 2369*e0ddfd8dSJin Yao "MSRValue": "0x0204000001", 2370*e0ddfd8dSJin Yao "Offcore": "1", 2371*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2372*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 2373*e0ddfd8dSJin Yao "UMask": "0x1" 2374*e0ddfd8dSJin Yao }, 2375*e0ddfd8dSJin Yao { 2376*e0ddfd8dSJin Yao "BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 2377*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 2378*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 2379*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 2380*e0ddfd8dSJin Yao "EventName": "OCR.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 2381*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 2382*e0ddfd8dSJin Yao "MSRValue": "0x0604000001", 2383*e0ddfd8dSJin Yao "Offcore": "1", 2384*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2385*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 2386*e0ddfd8dSJin Yao "UMask": "0x1" 2387*e0ddfd8dSJin Yao }, 2388*e0ddfd8dSJin Yao { 2389*e0ddfd8dSJin Yao "BriefDescription": "Counts demand data reads", 2390*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 2391*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 2392*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 2393*e0ddfd8dSJin Yao "EventName": "OCR.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 2394*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 2395*e0ddfd8dSJin Yao "MSRValue": "0x0084000001", 2396*e0ddfd8dSJin Yao "Offcore": "1", 2397*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2398*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 2399*e0ddfd8dSJin Yao "UMask": "0x1" 2400*e0ddfd8dSJin Yao }, 2401*e0ddfd8dSJin Yao { 2402*e0ddfd8dSJin Yao "BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 2403*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 2404*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 2405*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 2406*e0ddfd8dSJin Yao "EventName": "OCR.DEMAND_DATA_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 2407*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 2408*e0ddfd8dSJin Yao "MSRValue": "0x063B800001", 2409*e0ddfd8dSJin Yao "Offcore": "1", 2410*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2411*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 2412*e0ddfd8dSJin Yao "UMask": "0x1" 2413*e0ddfd8dSJin Yao }, 2414*e0ddfd8dSJin Yao { 2415*e0ddfd8dSJin Yao "BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 2416*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 2417*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 2418*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 2419*e0ddfd8dSJin Yao "EventName": "OCR.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 2420*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 2421*e0ddfd8dSJin Yao "MSRValue": "0x3F90000001", 2422*e0ddfd8dSJin Yao "Offcore": "1", 2423*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2424*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 2425*e0ddfd8dSJin Yao "UMask": "0x1" 2426*e0ddfd8dSJin Yao }, 2427*e0ddfd8dSJin Yao { 2428*e0ddfd8dSJin Yao "BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 2429*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 2430*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 2431*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 2432*e0ddfd8dSJin Yao "EventName": "OCR.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 2433*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 2434*e0ddfd8dSJin Yao "MSRValue": "0x1010000001", 2435*e0ddfd8dSJin Yao "Offcore": "1", 2436*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2437*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 2438*e0ddfd8dSJin Yao "UMask": "0x1" 2439*e0ddfd8dSJin Yao }, 2440*e0ddfd8dSJin Yao { 2441*e0ddfd8dSJin Yao "BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 2442*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 2443*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 2444*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 2445*e0ddfd8dSJin Yao "EventName": "OCR.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 2446*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 2447*e0ddfd8dSJin Yao "MSRValue": "0x0810000001", 2448*e0ddfd8dSJin Yao "Offcore": "1", 2449*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2450*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 2451*e0ddfd8dSJin Yao "UMask": "0x1" 2452*e0ddfd8dSJin Yao }, 2453*e0ddfd8dSJin Yao { 2454*e0ddfd8dSJin Yao "BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 2455*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 2456*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 2457*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 2458*e0ddfd8dSJin Yao "EventName": "OCR.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 2459*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 2460*e0ddfd8dSJin Yao "MSRValue": "0x0410000001", 2461*e0ddfd8dSJin Yao "Offcore": "1", 2462*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2463*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 2464*e0ddfd8dSJin Yao "UMask": "0x1" 2465*e0ddfd8dSJin Yao }, 2466*e0ddfd8dSJin Yao { 2467*e0ddfd8dSJin Yao "BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 2468*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 2469*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 2470*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 2471*e0ddfd8dSJin Yao "EventName": "OCR.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 2472*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 2473*e0ddfd8dSJin Yao "MSRValue": "0x0110000001", 2474*e0ddfd8dSJin Yao "Offcore": "1", 2475*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2476*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 2477*e0ddfd8dSJin Yao "UMask": "0x1" 2478*e0ddfd8dSJin Yao }, 2479*e0ddfd8dSJin Yao { 2480*e0ddfd8dSJin Yao "BriefDescription": "Counts demand data reads", 2481*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 2482*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 2483*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 2484*e0ddfd8dSJin Yao "EventName": "OCR.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 2485*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 2486*e0ddfd8dSJin Yao "MSRValue": "0x0210000001", 2487*e0ddfd8dSJin Yao "Offcore": "1", 2488*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2489*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 2490*e0ddfd8dSJin Yao "UMask": "0x1" 2491*e0ddfd8dSJin Yao }, 2492*e0ddfd8dSJin Yao { 2493*e0ddfd8dSJin Yao "BriefDescription": "Counts demand data reads", 2494*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 2495*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 2496*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 2497*e0ddfd8dSJin Yao "EventName": "OCR.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 2498*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 2499*e0ddfd8dSJin Yao "MSRValue": "0x0090000001", 2500*e0ddfd8dSJin Yao "Offcore": "1", 2501*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2502*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 2503*e0ddfd8dSJin Yao "UMask": "0x1" 2504*e0ddfd8dSJin Yao }, 2505*e0ddfd8dSJin Yao { 2506*e0ddfd8dSJin Yao "BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_MISS.ANY_SNOOP OCR.DEMAND_RFO.L3_MISS.ANY_SNOOP", 2507*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 2508*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 2509*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 2510*e0ddfd8dSJin Yao "EventName": "OCR.DEMAND_RFO.L3_MISS.ANY_SNOOP", 2511*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 2512*e0ddfd8dSJin Yao "MSRValue": "0x3FBC000002", 2513*e0ddfd8dSJin Yao "Offcore": "1", 2514*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2515*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 2516*e0ddfd8dSJin Yao "UMask": "0x1" 2517*e0ddfd8dSJin Yao }, 2518*e0ddfd8dSJin Yao { 2519*e0ddfd8dSJin Yao "BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_MISS.HITM_OTHER_CORE OCR.DEMAND_RFO.L3_MISS.HITM_OTHER_CORE", 2520*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 2521*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 2522*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 2523*e0ddfd8dSJin Yao "EventName": "OCR.DEMAND_RFO.L3_MISS.HITM_OTHER_CORE", 2524*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 2525*e0ddfd8dSJin Yao "MSRValue": "0x103C000002", 2526*e0ddfd8dSJin Yao "Offcore": "1", 2527*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2528*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 2529*e0ddfd8dSJin Yao "UMask": "0x1" 2530*e0ddfd8dSJin Yao }, 2531*e0ddfd8dSJin Yao { 2532*e0ddfd8dSJin Yao "BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_MISS.HIT_OTHER_CORE_FWD OCR.DEMAND_RFO.L3_MISS.HIT_OTHER_CORE_FWD", 2533*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 2534*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 2535*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 2536*e0ddfd8dSJin Yao "EventName": "OCR.DEMAND_RFO.L3_MISS.HIT_OTHER_CORE_FWD", 2537*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 2538*e0ddfd8dSJin Yao "MSRValue": "0x083C000002", 2539*e0ddfd8dSJin Yao "Offcore": "1", 2540*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2541*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 2542*e0ddfd8dSJin Yao "UMask": "0x1" 2543*e0ddfd8dSJin Yao }, 2544*e0ddfd8dSJin Yao { 2545*e0ddfd8dSJin Yao "BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD OCR.DEMAND_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD", 2546*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 2547*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 2548*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 2549*e0ddfd8dSJin Yao "EventName": "OCR.DEMAND_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD", 2550*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 2551*e0ddfd8dSJin Yao "MSRValue": "0x043C000002", 2552*e0ddfd8dSJin Yao "Offcore": "1", 2553*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2554*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 2555*e0ddfd8dSJin Yao "UMask": "0x1" 2556*e0ddfd8dSJin Yao }, 2557*e0ddfd8dSJin Yao { 2558*e0ddfd8dSJin Yao "BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_MISS.NO_SNOOP_NEEDED OCR.DEMAND_RFO.L3_MISS.NO_SNOOP_NEEDED", 2559*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 2560*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 2561*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 2562*e0ddfd8dSJin Yao "EventName": "OCR.DEMAND_RFO.L3_MISS.NO_SNOOP_NEEDED", 2563*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 2564*e0ddfd8dSJin Yao "MSRValue": "0x013C000002", 2565*e0ddfd8dSJin Yao "Offcore": "1", 2566*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2567*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 2568*e0ddfd8dSJin Yao "UMask": "0x1" 2569*e0ddfd8dSJin Yao }, 2570*e0ddfd8dSJin Yao { 2571*e0ddfd8dSJin Yao "BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_MISS.REMOTE_HITM", 2572*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 2573*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 2574*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 2575*e0ddfd8dSJin Yao "EventName": "OCR.DEMAND_RFO.L3_MISS.REMOTE_HITM", 2576*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 2577*e0ddfd8dSJin Yao "MSRValue": "0x103FC00002", 2578*e0ddfd8dSJin Yao "Offcore": "1", 2579*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2580*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 2581*e0ddfd8dSJin Yao "UMask": "0x1" 2582*e0ddfd8dSJin Yao }, 2583*e0ddfd8dSJin Yao { 2584*e0ddfd8dSJin Yao "BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_MISS.REMOTE_HIT_FORWARD", 2585*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 2586*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 2587*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 2588*e0ddfd8dSJin Yao "EventName": "OCR.DEMAND_RFO.L3_MISS.REMOTE_HIT_FORWARD", 2589*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 2590*e0ddfd8dSJin Yao "MSRValue": "0x083FC00002", 2591*e0ddfd8dSJin Yao "Offcore": "1", 2592*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2593*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 2594*e0ddfd8dSJin Yao "UMask": "0x1" 2595*e0ddfd8dSJin Yao }, 2596*e0ddfd8dSJin Yao { 2597*e0ddfd8dSJin Yao "BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_MISS.SNOOP_MISS", 2598*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 2599*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 2600*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 2601*e0ddfd8dSJin Yao "EventName": "OCR.DEMAND_RFO.L3_MISS.SNOOP_MISS", 2602*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 2603*e0ddfd8dSJin Yao "MSRValue": "0x023C000002", 2604*e0ddfd8dSJin Yao "Offcore": "1", 2605*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2606*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 2607*e0ddfd8dSJin Yao "UMask": "0x1" 2608*e0ddfd8dSJin Yao }, 2609*e0ddfd8dSJin Yao { 2610*e0ddfd8dSJin Yao "BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_MISS.SNOOP_NONE", 2611*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 2612*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 2613*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 2614*e0ddfd8dSJin Yao "EventName": "OCR.DEMAND_RFO.L3_MISS.SNOOP_NONE", 2615*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 2616*e0ddfd8dSJin Yao "MSRValue": "0x00BC000002", 2617*e0ddfd8dSJin Yao "Offcore": "1", 2618*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2619*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 2620*e0ddfd8dSJin Yao "UMask": "0x1" 2621*e0ddfd8dSJin Yao }, 2622*e0ddfd8dSJin Yao { 2623*e0ddfd8dSJin Yao "BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 2624*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 2625*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 2626*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 2627*e0ddfd8dSJin Yao "EventName": "OCR.DEMAND_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 2628*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 2629*e0ddfd8dSJin Yao "MSRValue": "0x3F84000002", 2630*e0ddfd8dSJin Yao "Offcore": "1", 2631*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2632*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 2633*e0ddfd8dSJin Yao "UMask": "0x1" 2634*e0ddfd8dSJin Yao }, 2635*e0ddfd8dSJin Yao { 2636*e0ddfd8dSJin Yao "BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 2637*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 2638*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 2639*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 2640*e0ddfd8dSJin Yao "EventName": "OCR.DEMAND_RFO.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 2641*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 2642*e0ddfd8dSJin Yao "MSRValue": "0x1004000002", 2643*e0ddfd8dSJin Yao "Offcore": "1", 2644*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2645*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 2646*e0ddfd8dSJin Yao "UMask": "0x1" 2647*e0ddfd8dSJin Yao }, 2648*e0ddfd8dSJin Yao { 2649*e0ddfd8dSJin Yao "BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 2650*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 2651*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 2652*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 2653*e0ddfd8dSJin Yao "EventName": "OCR.DEMAND_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 2654*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 2655*e0ddfd8dSJin Yao "MSRValue": "0x0804000002", 2656*e0ddfd8dSJin Yao "Offcore": "1", 2657*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2658*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 2659*e0ddfd8dSJin Yao "UMask": "0x1" 2660*e0ddfd8dSJin Yao }, 2661*e0ddfd8dSJin Yao { 2662*e0ddfd8dSJin Yao "BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 2663*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 2664*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 2665*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 2666*e0ddfd8dSJin Yao "EventName": "OCR.DEMAND_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 2667*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 2668*e0ddfd8dSJin Yao "MSRValue": "0x0404000002", 2669*e0ddfd8dSJin Yao "Offcore": "1", 2670*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2671*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 2672*e0ddfd8dSJin Yao "UMask": "0x1" 2673*e0ddfd8dSJin Yao }, 2674*e0ddfd8dSJin Yao { 2675*e0ddfd8dSJin Yao "BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 2676*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 2677*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 2678*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 2679*e0ddfd8dSJin Yao "EventName": "OCR.DEMAND_RFO.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 2680*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 2681*e0ddfd8dSJin Yao "MSRValue": "0x0104000002", 2682*e0ddfd8dSJin Yao "Offcore": "1", 2683*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2684*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 2685*e0ddfd8dSJin Yao "UMask": "0x1" 2686*e0ddfd8dSJin Yao }, 2687*e0ddfd8dSJin Yao { 2688*e0ddfd8dSJin Yao "BriefDescription": "Counts all demand data writes (RFOs)", 2689*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 2690*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 2691*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 2692*e0ddfd8dSJin Yao "EventName": "OCR.DEMAND_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 2693*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 2694*e0ddfd8dSJin Yao "MSRValue": "0x0204000002", 2695*e0ddfd8dSJin Yao "Offcore": "1", 2696*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2697*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 2698*e0ddfd8dSJin Yao "UMask": "0x1" 2699*e0ddfd8dSJin Yao }, 2700*e0ddfd8dSJin Yao { 2701*e0ddfd8dSJin Yao "BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 2702*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 2703*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 2704*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 2705*e0ddfd8dSJin Yao "EventName": "OCR.DEMAND_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 2706*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 2707*e0ddfd8dSJin Yao "MSRValue": "0x0604000002", 2708*e0ddfd8dSJin Yao "Offcore": "1", 2709*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2710*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 2711*e0ddfd8dSJin Yao "UMask": "0x1" 2712*e0ddfd8dSJin Yao }, 2713*e0ddfd8dSJin Yao { 2714*e0ddfd8dSJin Yao "BriefDescription": "Counts all demand data writes (RFOs)", 2715*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 2716*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 2717*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 2718*e0ddfd8dSJin Yao "EventName": "OCR.DEMAND_RFO.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 2719*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 2720*e0ddfd8dSJin Yao "MSRValue": "0x0084000002", 2721*e0ddfd8dSJin Yao "Offcore": "1", 2722*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2723*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 2724*e0ddfd8dSJin Yao "UMask": "0x1" 2725*e0ddfd8dSJin Yao }, 2726*e0ddfd8dSJin Yao { 2727*e0ddfd8dSJin Yao "BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 2728*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 2729*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 2730*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 2731*e0ddfd8dSJin Yao "EventName": "OCR.DEMAND_RFO.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 2732*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 2733*e0ddfd8dSJin Yao "MSRValue": "0x063B800002", 27347fcf1b89SHaiyan Song "Offcore": "1", 27357fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 27367fcf1b89SHaiyan Song "SampleAfterValue": "100003", 27377fcf1b89SHaiyan Song "UMask": "0x1" 27387fcf1b89SHaiyan Song }, 27397fcf1b89SHaiyan Song { 2740038d3b53SJin Yao "BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 27417fcf1b89SHaiyan Song "Counter": "0,1,2,3", 27427fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 27437fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 27447fcf1b89SHaiyan Song "EventName": "OCR.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 27457fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 27467fcf1b89SHaiyan Song "MSRValue": "0x3F90000002", 27477fcf1b89SHaiyan Song "Offcore": "1", 27487fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 27497fcf1b89SHaiyan Song "SampleAfterValue": "100003", 27507fcf1b89SHaiyan Song "UMask": "0x1" 27517fcf1b89SHaiyan Song }, 27527fcf1b89SHaiyan Song { 2753*e0ddfd8dSJin Yao "BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 2754*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 2755*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 2756*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 2757*e0ddfd8dSJin Yao "EventName": "OCR.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 2758*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 2759*e0ddfd8dSJin Yao "MSRValue": "0x1010000002", 2760*e0ddfd8dSJin Yao "Offcore": "1", 2761*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2762*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 2763*e0ddfd8dSJin Yao "UMask": "0x1" 2764*e0ddfd8dSJin Yao }, 2765*e0ddfd8dSJin Yao { 2766*e0ddfd8dSJin Yao "BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 2767*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 2768*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 2769*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 2770*e0ddfd8dSJin Yao "EventName": "OCR.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 2771*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 2772*e0ddfd8dSJin Yao "MSRValue": "0x0810000002", 2773*e0ddfd8dSJin Yao "Offcore": "1", 2774*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2775*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 2776*e0ddfd8dSJin Yao "UMask": "0x1" 2777*e0ddfd8dSJin Yao }, 2778*e0ddfd8dSJin Yao { 2779*e0ddfd8dSJin Yao "BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 2780*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 2781*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 2782*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 2783*e0ddfd8dSJin Yao "EventName": "OCR.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 2784*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 2785*e0ddfd8dSJin Yao "MSRValue": "0x0410000002", 2786*e0ddfd8dSJin Yao "Offcore": "1", 2787*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2788*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 2789*e0ddfd8dSJin Yao "UMask": "0x1" 2790*e0ddfd8dSJin Yao }, 2791*e0ddfd8dSJin Yao { 2792*e0ddfd8dSJin Yao "BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 2793*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 2794*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 2795*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 2796*e0ddfd8dSJin Yao "EventName": "OCR.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 2797*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 2798*e0ddfd8dSJin Yao "MSRValue": "0x0110000002", 2799*e0ddfd8dSJin Yao "Offcore": "1", 2800*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2801*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 2802*e0ddfd8dSJin Yao "UMask": "0x1" 2803*e0ddfd8dSJin Yao }, 2804*e0ddfd8dSJin Yao { 2805*e0ddfd8dSJin Yao "BriefDescription": "Counts all demand data writes (RFOs)", 2806*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 2807*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 2808*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 2809*e0ddfd8dSJin Yao "EventName": "OCR.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 2810*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 2811*e0ddfd8dSJin Yao "MSRValue": "0x0210000002", 2812*e0ddfd8dSJin Yao "Offcore": "1", 2813*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2814*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 2815*e0ddfd8dSJin Yao "UMask": "0x1" 2816*e0ddfd8dSJin Yao }, 2817*e0ddfd8dSJin Yao { 2818*e0ddfd8dSJin Yao "BriefDescription": "Counts all demand data writes (RFOs)", 2819*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 2820*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 2821*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 2822*e0ddfd8dSJin Yao "EventName": "OCR.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 2823*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 2824*e0ddfd8dSJin Yao "MSRValue": "0x0090000002", 2825*e0ddfd8dSJin Yao "Offcore": "1", 2826*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2827*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 2828*e0ddfd8dSJin Yao "UMask": "0x1" 2829*e0ddfd8dSJin Yao }, 2830*e0ddfd8dSJin Yao { 2831*e0ddfd8dSJin Yao "BriefDescription": "Counts any other requests OCR.OTHER.L3_MISS.ANY_SNOOP OCR.OTHER.L3_MISS.ANY_SNOOP", 2832*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 2833*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 2834*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 2835*e0ddfd8dSJin Yao "EventName": "OCR.OTHER.L3_MISS.ANY_SNOOP", 2836*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 2837*e0ddfd8dSJin Yao "MSRValue": "0x3FBC008000", 2838*e0ddfd8dSJin Yao "Offcore": "1", 2839*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2840*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 2841*e0ddfd8dSJin Yao "UMask": "0x1" 2842*e0ddfd8dSJin Yao }, 2843*e0ddfd8dSJin Yao { 2844*e0ddfd8dSJin Yao "BriefDescription": "Counts any other requests OCR.OTHER.L3_MISS.HITM_OTHER_CORE OCR.OTHER.L3_MISS.HITM_OTHER_CORE", 2845*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 2846*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 2847*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 2848*e0ddfd8dSJin Yao "EventName": "OCR.OTHER.L3_MISS.HITM_OTHER_CORE", 2849*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 2850*e0ddfd8dSJin Yao "MSRValue": "0x103C008000", 2851*e0ddfd8dSJin Yao "Offcore": "1", 2852*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2853*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 2854*e0ddfd8dSJin Yao "UMask": "0x1" 2855*e0ddfd8dSJin Yao }, 2856*e0ddfd8dSJin Yao { 2857*e0ddfd8dSJin Yao "BriefDescription": "Counts any other requests OCR.OTHER.L3_MISS.HIT_OTHER_CORE_FWD OCR.OTHER.L3_MISS.HIT_OTHER_CORE_FWD", 2858*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 2859*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 2860*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 2861*e0ddfd8dSJin Yao "EventName": "OCR.OTHER.L3_MISS.HIT_OTHER_CORE_FWD", 2862*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 2863*e0ddfd8dSJin Yao "MSRValue": "0x083C008000", 2864*e0ddfd8dSJin Yao "Offcore": "1", 2865*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2866*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 2867*e0ddfd8dSJin Yao "UMask": "0x1" 2868*e0ddfd8dSJin Yao }, 2869*e0ddfd8dSJin Yao { 2870*e0ddfd8dSJin Yao "BriefDescription": "Counts any other requests OCR.OTHER.L3_MISS.HIT_OTHER_CORE_NO_FWD OCR.OTHER.L3_MISS.HIT_OTHER_CORE_NO_FWD", 2871*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 2872*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 2873*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 2874*e0ddfd8dSJin Yao "EventName": "OCR.OTHER.L3_MISS.HIT_OTHER_CORE_NO_FWD", 2875*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 2876*e0ddfd8dSJin Yao "MSRValue": "0x043C008000", 2877*e0ddfd8dSJin Yao "Offcore": "1", 2878*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2879*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 2880*e0ddfd8dSJin Yao "UMask": "0x1" 2881*e0ddfd8dSJin Yao }, 2882*e0ddfd8dSJin Yao { 2883*e0ddfd8dSJin Yao "BriefDescription": "Counts any other requests OCR.OTHER.L3_MISS.NO_SNOOP_NEEDED OCR.OTHER.L3_MISS.NO_SNOOP_NEEDED", 2884*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 2885*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 2886*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 2887*e0ddfd8dSJin Yao "EventName": "OCR.OTHER.L3_MISS.NO_SNOOP_NEEDED", 2888*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 2889*e0ddfd8dSJin Yao "MSRValue": "0x013C008000", 2890*e0ddfd8dSJin Yao "Offcore": "1", 2891*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2892*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 2893*e0ddfd8dSJin Yao "UMask": "0x1" 2894*e0ddfd8dSJin Yao }, 2895*e0ddfd8dSJin Yao { 2896*e0ddfd8dSJin Yao "BriefDescription": "Counts any other requests OCR.OTHER.L3_MISS.REMOTE_HITM", 2897*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 2898*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 2899*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 2900*e0ddfd8dSJin Yao "EventName": "OCR.OTHER.L3_MISS.REMOTE_HITM", 2901*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 2902*e0ddfd8dSJin Yao "MSRValue": "0x103FC08000", 2903*e0ddfd8dSJin Yao "Offcore": "1", 2904*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2905*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 2906*e0ddfd8dSJin Yao "UMask": "0x1" 2907*e0ddfd8dSJin Yao }, 2908*e0ddfd8dSJin Yao { 2909*e0ddfd8dSJin Yao "BriefDescription": "Counts any other requests OCR.OTHER.L3_MISS.REMOTE_HIT_FORWARD", 2910*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 2911*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 2912*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 2913*e0ddfd8dSJin Yao "EventName": "OCR.OTHER.L3_MISS.REMOTE_HIT_FORWARD", 2914*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 2915*e0ddfd8dSJin Yao "MSRValue": "0x083FC08000", 2916*e0ddfd8dSJin Yao "Offcore": "1", 2917*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2918*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 2919*e0ddfd8dSJin Yao "UMask": "0x1" 2920*e0ddfd8dSJin Yao }, 2921*e0ddfd8dSJin Yao { 2922*e0ddfd8dSJin Yao "BriefDescription": "Counts any other requests OCR.OTHER.L3_MISS.SNOOP_MISS", 2923*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 2924*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 2925*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 2926*e0ddfd8dSJin Yao "EventName": "OCR.OTHER.L3_MISS.SNOOP_MISS", 2927*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 2928*e0ddfd8dSJin Yao "MSRValue": "0x023C008000", 2929*e0ddfd8dSJin Yao "Offcore": "1", 2930*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2931*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 2932*e0ddfd8dSJin Yao "UMask": "0x1" 2933*e0ddfd8dSJin Yao }, 2934*e0ddfd8dSJin Yao { 2935*e0ddfd8dSJin Yao "BriefDescription": "Counts any other requests OCR.OTHER.L3_MISS.SNOOP_NONE", 2936*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 2937*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 2938*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 2939*e0ddfd8dSJin Yao "EventName": "OCR.OTHER.L3_MISS.SNOOP_NONE", 2940*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 2941*e0ddfd8dSJin Yao "MSRValue": "0x00BC008000", 2942*e0ddfd8dSJin Yao "Offcore": "1", 2943*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2944*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 2945*e0ddfd8dSJin Yao "UMask": "0x1" 2946*e0ddfd8dSJin Yao }, 2947*e0ddfd8dSJin Yao { 2948*e0ddfd8dSJin Yao "BriefDescription": "Counts any other requests OCR.OTHER.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 2949*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 2950*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 2951*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 2952*e0ddfd8dSJin Yao "EventName": "OCR.OTHER.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 2953*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 2954*e0ddfd8dSJin Yao "MSRValue": "0x3F84008000", 2955*e0ddfd8dSJin Yao "Offcore": "1", 2956*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2957*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 2958*e0ddfd8dSJin Yao "UMask": "0x1" 2959*e0ddfd8dSJin Yao }, 2960*e0ddfd8dSJin Yao { 2961038d3b53SJin Yao "BriefDescription": "Counts any other requests OCR.OTHER.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 29627fcf1b89SHaiyan Song "Counter": "0,1,2,3", 29637fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 29647fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 29657fcf1b89SHaiyan Song "EventName": "OCR.OTHER.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 29667fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 29677fcf1b89SHaiyan Song "MSRValue": "0x1004008000", 29687fcf1b89SHaiyan Song "Offcore": "1", 29697fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 29707fcf1b89SHaiyan Song "SampleAfterValue": "100003", 29717fcf1b89SHaiyan Song "UMask": "0x1" 29727fcf1b89SHaiyan Song }, 29737fcf1b89SHaiyan Song { 2974*e0ddfd8dSJin Yao "BriefDescription": "Counts any other requests OCR.OTHER.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 29757fcf1b89SHaiyan Song "Counter": "0,1,2,3", 29767fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 29777fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 2978*e0ddfd8dSJin Yao "EventName": "OCR.OTHER.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 29797fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 2980*e0ddfd8dSJin Yao "MSRValue": "0x0804008000", 29817fcf1b89SHaiyan Song "Offcore": "1", 29827fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 29837fcf1b89SHaiyan Song "SampleAfterValue": "100003", 29847fcf1b89SHaiyan Song "UMask": "0x1" 29857fcf1b89SHaiyan Song }, 29867fcf1b89SHaiyan Song { 2987*e0ddfd8dSJin Yao "BriefDescription": "Counts any other requests OCR.OTHER.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 29887fcf1b89SHaiyan Song "Counter": "0,1,2,3", 29897fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 29907fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 2991*e0ddfd8dSJin Yao "EventName": "OCR.OTHER.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 2992*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 2993*e0ddfd8dSJin Yao "MSRValue": "0x0404008000", 2994*e0ddfd8dSJin Yao "Offcore": "1", 2995*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2996*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 2997*e0ddfd8dSJin Yao "UMask": "0x1" 2998*e0ddfd8dSJin Yao }, 2999*e0ddfd8dSJin Yao { 3000*e0ddfd8dSJin Yao "BriefDescription": "Counts any other requests OCR.OTHER.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 3001*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 3002*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 3003*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 3004*e0ddfd8dSJin Yao "EventName": "OCR.OTHER.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 3005*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 3006*e0ddfd8dSJin Yao "MSRValue": "0x0104008000", 3007*e0ddfd8dSJin Yao "Offcore": "1", 3008*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3009*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 3010*e0ddfd8dSJin Yao "UMask": "0x1" 3011*e0ddfd8dSJin Yao }, 3012*e0ddfd8dSJin Yao { 3013*e0ddfd8dSJin Yao "BriefDescription": "Counts any other requests", 3014*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 3015*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 3016*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 3017*e0ddfd8dSJin Yao "EventName": "OCR.OTHER.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 30187fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 30197fcf1b89SHaiyan Song "MSRValue": "0x0204008000", 30207fcf1b89SHaiyan Song "Offcore": "1", 30217fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 30227fcf1b89SHaiyan Song "SampleAfterValue": "100003", 30237fcf1b89SHaiyan Song "UMask": "0x1" 30247fcf1b89SHaiyan Song }, 30257fcf1b89SHaiyan Song { 3026*e0ddfd8dSJin Yao "BriefDescription": "Counts any other requests OCR.OTHER.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 30277fcf1b89SHaiyan Song "Counter": "0,1,2,3", 30287fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 30297fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 3030*e0ddfd8dSJin Yao "EventName": "OCR.OTHER.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 30317fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 3032*e0ddfd8dSJin Yao "MSRValue": "0x0604008000", 30337fcf1b89SHaiyan Song "Offcore": "1", 30347fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 30357fcf1b89SHaiyan Song "SampleAfterValue": "100003", 30367fcf1b89SHaiyan Song "UMask": "0x1" 30377fcf1b89SHaiyan Song }, 30387fcf1b89SHaiyan Song { 3039*e0ddfd8dSJin Yao "BriefDescription": "Counts any other requests", 30407fcf1b89SHaiyan Song "Counter": "0,1,2,3", 30417fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 30427fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 3043*e0ddfd8dSJin Yao "EventName": "OCR.OTHER.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 30447fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 3045*e0ddfd8dSJin Yao "MSRValue": "0x0084008000", 30467fcf1b89SHaiyan Song "Offcore": "1", 30477fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 30487fcf1b89SHaiyan Song "SampleAfterValue": "100003", 30497fcf1b89SHaiyan Song "UMask": "0x1" 30507fcf1b89SHaiyan Song }, 30517fcf1b89SHaiyan Song { 3052*e0ddfd8dSJin Yao "BriefDescription": "Counts any other requests OCR.OTHER.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 30537fcf1b89SHaiyan Song "Counter": "0,1,2,3", 30547fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 30557fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 3056*e0ddfd8dSJin Yao "EventName": "OCR.OTHER.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 30577fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 3058*e0ddfd8dSJin Yao "MSRValue": "0x063B808000", 30597fcf1b89SHaiyan Song "Offcore": "1", 30607fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 30617fcf1b89SHaiyan Song "SampleAfterValue": "100003", 30627fcf1b89SHaiyan Song "UMask": "0x1" 30637fcf1b89SHaiyan Song }, 30647fcf1b89SHaiyan Song { 3065*e0ddfd8dSJin Yao "BriefDescription": "Counts any other requests OCR.OTHER.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 30667fcf1b89SHaiyan Song "Counter": "0,1,2,3", 30677fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 30687fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 3069*e0ddfd8dSJin Yao "EventName": "OCR.OTHER.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 30707fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 3071*e0ddfd8dSJin Yao "MSRValue": "0x3F90008000", 3072*e0ddfd8dSJin Yao "Offcore": "1", 3073*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3074*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 3075*e0ddfd8dSJin Yao "UMask": "0x1" 3076*e0ddfd8dSJin Yao }, 3077*e0ddfd8dSJin Yao { 3078*e0ddfd8dSJin Yao "BriefDescription": "Counts any other requests OCR.OTHER.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 3079*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 3080*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 3081*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 3082*e0ddfd8dSJin Yao "EventName": "OCR.OTHER.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 3083*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 3084*e0ddfd8dSJin Yao "MSRValue": "0x1010008000", 3085*e0ddfd8dSJin Yao "Offcore": "1", 3086*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3087*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 3088*e0ddfd8dSJin Yao "UMask": "0x1" 3089*e0ddfd8dSJin Yao }, 3090*e0ddfd8dSJin Yao { 3091*e0ddfd8dSJin Yao "BriefDescription": "Counts any other requests OCR.OTHER.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 3092*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 3093*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 3094*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 3095*e0ddfd8dSJin Yao "EventName": "OCR.OTHER.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 3096*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 3097*e0ddfd8dSJin Yao "MSRValue": "0x0810008000", 3098*e0ddfd8dSJin Yao "Offcore": "1", 3099*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3100*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 3101*e0ddfd8dSJin Yao "UMask": "0x1" 3102*e0ddfd8dSJin Yao }, 3103*e0ddfd8dSJin Yao { 3104*e0ddfd8dSJin Yao "BriefDescription": "Counts any other requests OCR.OTHER.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 3105*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 3106*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 3107*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 3108*e0ddfd8dSJin Yao "EventName": "OCR.OTHER.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 3109*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 3110*e0ddfd8dSJin Yao "MSRValue": "0x0410008000", 3111*e0ddfd8dSJin Yao "Offcore": "1", 3112*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3113*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 3114*e0ddfd8dSJin Yao "UMask": "0x1" 3115*e0ddfd8dSJin Yao }, 3116*e0ddfd8dSJin Yao { 3117*e0ddfd8dSJin Yao "BriefDescription": "Counts any other requests OCR.OTHER.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 3118*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 3119*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 3120*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 3121*e0ddfd8dSJin Yao "EventName": "OCR.OTHER.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 3122*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 3123*e0ddfd8dSJin Yao "MSRValue": "0x0110008000", 3124*e0ddfd8dSJin Yao "Offcore": "1", 3125*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3126*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 3127*e0ddfd8dSJin Yao "UMask": "0x1" 3128*e0ddfd8dSJin Yao }, 3129*e0ddfd8dSJin Yao { 3130*e0ddfd8dSJin Yao "BriefDescription": "Counts any other requests", 3131*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 3132*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 3133*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 3134*e0ddfd8dSJin Yao "EventName": "OCR.OTHER.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 3135*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 3136*e0ddfd8dSJin Yao "MSRValue": "0x0210008000", 3137*e0ddfd8dSJin Yao "Offcore": "1", 3138*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3139*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 3140*e0ddfd8dSJin Yao "UMask": "0x1" 3141*e0ddfd8dSJin Yao }, 3142*e0ddfd8dSJin Yao { 3143*e0ddfd8dSJin Yao "BriefDescription": "Counts any other requests", 3144*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 3145*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 3146*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 3147*e0ddfd8dSJin Yao "EventName": "OCR.OTHER.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 3148*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 3149*e0ddfd8dSJin Yao "MSRValue": "0x0090008000", 3150*e0ddfd8dSJin Yao "Offcore": "1", 3151*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3152*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 3153*e0ddfd8dSJin Yao "UMask": "0x1" 3154*e0ddfd8dSJin Yao }, 3155*e0ddfd8dSJin Yao { 3156*e0ddfd8dSJin Yao "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_MISS.ANY_SNOOP OCR.PF_L1D_AND_SW.L3_MISS.ANY_SNOOP", 3157*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 3158*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 3159*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 3160*e0ddfd8dSJin Yao "EventName": "OCR.PF_L1D_AND_SW.L3_MISS.ANY_SNOOP", 3161*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 3162*e0ddfd8dSJin Yao "MSRValue": "0x3FBC000400", 3163*e0ddfd8dSJin Yao "Offcore": "1", 3164*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3165*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 3166*e0ddfd8dSJin Yao "UMask": "0x1" 3167*e0ddfd8dSJin Yao }, 3168*e0ddfd8dSJin Yao { 3169*e0ddfd8dSJin Yao "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_MISS.HITM_OTHER_CORE OCR.PF_L1D_AND_SW.L3_MISS.HITM_OTHER_CORE", 3170*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 3171*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 3172*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 3173*e0ddfd8dSJin Yao "EventName": "OCR.PF_L1D_AND_SW.L3_MISS.HITM_OTHER_CORE", 3174*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 3175*e0ddfd8dSJin Yao "MSRValue": "0x103C000400", 3176*e0ddfd8dSJin Yao "Offcore": "1", 3177*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3178*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 3179*e0ddfd8dSJin Yao "UMask": "0x1" 3180*e0ddfd8dSJin Yao }, 3181*e0ddfd8dSJin Yao { 3182*e0ddfd8dSJin Yao "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_MISS.HIT_OTHER_CORE_FWD OCR.PF_L1D_AND_SW.L3_MISS.HIT_OTHER_CORE_FWD", 3183*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 3184*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 3185*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 3186*e0ddfd8dSJin Yao "EventName": "OCR.PF_L1D_AND_SW.L3_MISS.HIT_OTHER_CORE_FWD", 3187*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 3188*e0ddfd8dSJin Yao "MSRValue": "0x083C000400", 3189*e0ddfd8dSJin Yao "Offcore": "1", 3190*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3191*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 3192*e0ddfd8dSJin Yao "UMask": "0x1" 3193*e0ddfd8dSJin Yao }, 3194*e0ddfd8dSJin Yao { 3195*e0ddfd8dSJin Yao "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_MISS.HIT_OTHER_CORE_NO_FWD OCR.PF_L1D_AND_SW.L3_MISS.HIT_OTHER_CORE_NO_FWD", 3196*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 3197*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 3198*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 3199*e0ddfd8dSJin Yao "EventName": "OCR.PF_L1D_AND_SW.L3_MISS.HIT_OTHER_CORE_NO_FWD", 3200*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 3201*e0ddfd8dSJin Yao "MSRValue": "0x043C000400", 3202*e0ddfd8dSJin Yao "Offcore": "1", 3203*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3204*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 3205*e0ddfd8dSJin Yao "UMask": "0x1" 3206*e0ddfd8dSJin Yao }, 3207*e0ddfd8dSJin Yao { 3208*e0ddfd8dSJin Yao "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_MISS.NO_SNOOP_NEEDED OCR.PF_L1D_AND_SW.L3_MISS.NO_SNOOP_NEEDED", 3209*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 3210*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 3211*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 3212*e0ddfd8dSJin Yao "EventName": "OCR.PF_L1D_AND_SW.L3_MISS.NO_SNOOP_NEEDED", 3213*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 3214*e0ddfd8dSJin Yao "MSRValue": "0x013C000400", 3215*e0ddfd8dSJin Yao "Offcore": "1", 3216*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3217*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 3218*e0ddfd8dSJin Yao "UMask": "0x1" 3219*e0ddfd8dSJin Yao }, 3220*e0ddfd8dSJin Yao { 3221*e0ddfd8dSJin Yao "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_MISS.REMOTE_HITM", 3222*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 3223*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 3224*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 3225*e0ddfd8dSJin Yao "EventName": "OCR.PF_L1D_AND_SW.L3_MISS.REMOTE_HITM", 3226*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 3227*e0ddfd8dSJin Yao "MSRValue": "0x103FC00400", 3228*e0ddfd8dSJin Yao "Offcore": "1", 3229*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3230*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 3231*e0ddfd8dSJin Yao "UMask": "0x1" 3232*e0ddfd8dSJin Yao }, 3233*e0ddfd8dSJin Yao { 3234*e0ddfd8dSJin Yao "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_MISS.REMOTE_HIT_FORWARD", 3235*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 3236*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 3237*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 3238*e0ddfd8dSJin Yao "EventName": "OCR.PF_L1D_AND_SW.L3_MISS.REMOTE_HIT_FORWARD", 3239*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 3240*e0ddfd8dSJin Yao "MSRValue": "0x083FC00400", 3241*e0ddfd8dSJin Yao "Offcore": "1", 3242*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3243*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 3244*e0ddfd8dSJin Yao "UMask": "0x1" 3245*e0ddfd8dSJin Yao }, 3246*e0ddfd8dSJin Yao { 3247*e0ddfd8dSJin Yao "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_MISS.SNOOP_MISS", 3248*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 3249*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 3250*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 3251*e0ddfd8dSJin Yao "EventName": "OCR.PF_L1D_AND_SW.L3_MISS.SNOOP_MISS", 3252*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 3253*e0ddfd8dSJin Yao "MSRValue": "0x023C000400", 3254*e0ddfd8dSJin Yao "Offcore": "1", 3255*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3256*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 3257*e0ddfd8dSJin Yao "UMask": "0x1" 3258*e0ddfd8dSJin Yao }, 3259*e0ddfd8dSJin Yao { 3260*e0ddfd8dSJin Yao "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_MISS.SNOOP_NONE", 3261*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 3262*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 3263*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 3264*e0ddfd8dSJin Yao "EventName": "OCR.PF_L1D_AND_SW.L3_MISS.SNOOP_NONE", 3265*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 3266*e0ddfd8dSJin Yao "MSRValue": "0x00BC000400", 3267*e0ddfd8dSJin Yao "Offcore": "1", 3268*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3269*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 3270*e0ddfd8dSJin Yao "UMask": "0x1" 3271*e0ddfd8dSJin Yao }, 3272*e0ddfd8dSJin Yao { 3273*e0ddfd8dSJin Yao "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 3274*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 3275*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 3276*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 3277*e0ddfd8dSJin Yao "EventName": "OCR.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 3278*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 3279*e0ddfd8dSJin Yao "MSRValue": "0x3F84000400", 3280*e0ddfd8dSJin Yao "Offcore": "1", 3281*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3282*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 3283*e0ddfd8dSJin Yao "UMask": "0x1" 3284*e0ddfd8dSJin Yao }, 3285*e0ddfd8dSJin Yao { 3286*e0ddfd8dSJin Yao "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 3287*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 3288*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 3289*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 3290*e0ddfd8dSJin Yao "EventName": "OCR.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 3291*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 3292*e0ddfd8dSJin Yao "MSRValue": "0x1004000400", 3293*e0ddfd8dSJin Yao "Offcore": "1", 3294*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3295*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 3296*e0ddfd8dSJin Yao "UMask": "0x1" 3297*e0ddfd8dSJin Yao }, 3298*e0ddfd8dSJin Yao { 3299*e0ddfd8dSJin Yao "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 3300*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 3301*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 3302*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 3303*e0ddfd8dSJin Yao "EventName": "OCR.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 3304*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 3305*e0ddfd8dSJin Yao "MSRValue": "0x0804000400", 3306*e0ddfd8dSJin Yao "Offcore": "1", 3307*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3308*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 3309*e0ddfd8dSJin Yao "UMask": "0x1" 3310*e0ddfd8dSJin Yao }, 3311*e0ddfd8dSJin Yao { 3312*e0ddfd8dSJin Yao "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 3313*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 3314*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 3315*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 3316*e0ddfd8dSJin Yao "EventName": "OCR.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 3317*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 3318*e0ddfd8dSJin Yao "MSRValue": "0x0404000400", 3319*e0ddfd8dSJin Yao "Offcore": "1", 3320*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3321*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 3322*e0ddfd8dSJin Yao "UMask": "0x1" 3323*e0ddfd8dSJin Yao }, 3324*e0ddfd8dSJin Yao { 3325*e0ddfd8dSJin Yao "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 3326*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 3327*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 3328*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 3329*e0ddfd8dSJin Yao "EventName": "OCR.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 3330*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 3331*e0ddfd8dSJin Yao "MSRValue": "0x0104000400", 3332*e0ddfd8dSJin Yao "Offcore": "1", 3333*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3334*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 3335*e0ddfd8dSJin Yao "UMask": "0x1" 3336*e0ddfd8dSJin Yao }, 3337*e0ddfd8dSJin Yao { 3338*e0ddfd8dSJin Yao "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests", 3339*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 3340*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 3341*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 3342*e0ddfd8dSJin Yao "EventName": "OCR.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 3343*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 3344*e0ddfd8dSJin Yao "MSRValue": "0x0204000400", 3345*e0ddfd8dSJin Yao "Offcore": "1", 3346*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3347*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 3348*e0ddfd8dSJin Yao "UMask": "0x1" 3349*e0ddfd8dSJin Yao }, 3350*e0ddfd8dSJin Yao { 3351*e0ddfd8dSJin Yao "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 3352*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 3353*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 3354*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 3355*e0ddfd8dSJin Yao "EventName": "OCR.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 3356*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 3357*e0ddfd8dSJin Yao "MSRValue": "0x0604000400", 3358*e0ddfd8dSJin Yao "Offcore": "1", 3359*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3360*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 3361*e0ddfd8dSJin Yao "UMask": "0x1" 3362*e0ddfd8dSJin Yao }, 3363*e0ddfd8dSJin Yao { 3364*e0ddfd8dSJin Yao "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests", 3365*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 3366*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 3367*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 3368*e0ddfd8dSJin Yao "EventName": "OCR.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 3369*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 3370*e0ddfd8dSJin Yao "MSRValue": "0x0084000400", 3371*e0ddfd8dSJin Yao "Offcore": "1", 3372*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3373*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 3374*e0ddfd8dSJin Yao "UMask": "0x1" 3375*e0ddfd8dSJin Yao }, 3376*e0ddfd8dSJin Yao { 3377*e0ddfd8dSJin Yao "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 3378*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 3379*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 3380*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 3381*e0ddfd8dSJin Yao "EventName": "OCR.PF_L1D_AND_SW.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 3382*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 3383*e0ddfd8dSJin Yao "MSRValue": "0x063B800400", 3384*e0ddfd8dSJin Yao "Offcore": "1", 3385*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3386*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 3387*e0ddfd8dSJin Yao "UMask": "0x1" 3388*e0ddfd8dSJin Yao }, 3389*e0ddfd8dSJin Yao { 3390*e0ddfd8dSJin Yao "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 3391*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 3392*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 3393*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 3394*e0ddfd8dSJin Yao "EventName": "OCR.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 3395*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 3396*e0ddfd8dSJin Yao "MSRValue": "0x3F90000400", 3397*e0ddfd8dSJin Yao "Offcore": "1", 3398*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3399*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 3400*e0ddfd8dSJin Yao "UMask": "0x1" 3401*e0ddfd8dSJin Yao }, 3402*e0ddfd8dSJin Yao { 3403*e0ddfd8dSJin Yao "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 3404*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 3405*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 3406*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 3407*e0ddfd8dSJin Yao "EventName": "OCR.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 3408*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 3409*e0ddfd8dSJin Yao "MSRValue": "0x1010000400", 3410*e0ddfd8dSJin Yao "Offcore": "1", 3411*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3412*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 3413*e0ddfd8dSJin Yao "UMask": "0x1" 3414*e0ddfd8dSJin Yao }, 3415*e0ddfd8dSJin Yao { 3416*e0ddfd8dSJin Yao "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 3417*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 3418*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 3419*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 3420*e0ddfd8dSJin Yao "EventName": "OCR.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 3421*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 3422*e0ddfd8dSJin Yao "MSRValue": "0x0810000400", 34237fcf1b89SHaiyan Song "Offcore": "1", 34247fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 34257fcf1b89SHaiyan Song "SampleAfterValue": "100003", 34267fcf1b89SHaiyan Song "UMask": "0x1" 34277fcf1b89SHaiyan Song }, 34287fcf1b89SHaiyan Song { 3429038d3b53SJin Yao "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 34307fcf1b89SHaiyan Song "Counter": "0,1,2,3", 34317fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 34327fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 34337fcf1b89SHaiyan Song "EventName": "OCR.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 34347fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 34357fcf1b89SHaiyan Song "MSRValue": "0x0410000400", 34367fcf1b89SHaiyan Song "Offcore": "1", 34377fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 34387fcf1b89SHaiyan Song "SampleAfterValue": "100003", 34397fcf1b89SHaiyan Song "UMask": "0x1" 34407fcf1b89SHaiyan Song }, 34417fcf1b89SHaiyan Song { 3442*e0ddfd8dSJin Yao "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 3443*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 3444*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 3445*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 3446*e0ddfd8dSJin Yao "EventName": "OCR.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 3447*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 3448*e0ddfd8dSJin Yao "MSRValue": "0x0110000400", 3449*e0ddfd8dSJin Yao "Offcore": "1", 3450*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3451*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 3452*e0ddfd8dSJin Yao "UMask": "0x1" 3453*e0ddfd8dSJin Yao }, 3454*e0ddfd8dSJin Yao { 3455*e0ddfd8dSJin Yao "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests", 3456*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 3457*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 3458*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 3459*e0ddfd8dSJin Yao "EventName": "OCR.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 3460*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 3461*e0ddfd8dSJin Yao "MSRValue": "0x0210000400", 3462*e0ddfd8dSJin Yao "Offcore": "1", 3463*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3464*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 3465*e0ddfd8dSJin Yao "UMask": "0x1" 3466*e0ddfd8dSJin Yao }, 3467*e0ddfd8dSJin Yao { 3468*e0ddfd8dSJin Yao "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests", 3469*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 3470*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 3471*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 3472*e0ddfd8dSJin Yao "EventName": "OCR.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 3473*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 3474*e0ddfd8dSJin Yao "MSRValue": "0x0090000400", 3475*e0ddfd8dSJin Yao "Offcore": "1", 3476*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3477*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 3478*e0ddfd8dSJin Yao "UMask": "0x1" 3479*e0ddfd8dSJin Yao }, 3480*e0ddfd8dSJin Yao { 3481*e0ddfd8dSJin Yao "BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_MISS.ANY_SNOOP OCR.PF_L2_DATA_RD.L3_MISS.ANY_SNOOP", 3482*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 3483*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 3484*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 3485*e0ddfd8dSJin Yao "EventName": "OCR.PF_L2_DATA_RD.L3_MISS.ANY_SNOOP", 3486*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 3487*e0ddfd8dSJin Yao "MSRValue": "0x3FBC000010", 3488*e0ddfd8dSJin Yao "Offcore": "1", 3489*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3490*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 3491*e0ddfd8dSJin Yao "UMask": "0x1" 3492*e0ddfd8dSJin Yao }, 3493*e0ddfd8dSJin Yao { 3494*e0ddfd8dSJin Yao "BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_MISS.HITM_OTHER_CORE OCR.PF_L2_DATA_RD.L3_MISS.HITM_OTHER_CORE", 3495*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 3496*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 3497*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 3498*e0ddfd8dSJin Yao "EventName": "OCR.PF_L2_DATA_RD.L3_MISS.HITM_OTHER_CORE", 3499*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 3500*e0ddfd8dSJin Yao "MSRValue": "0x103C000010", 3501*e0ddfd8dSJin Yao "Offcore": "1", 3502*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3503*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 3504*e0ddfd8dSJin Yao "UMask": "0x1" 3505*e0ddfd8dSJin Yao }, 3506*e0ddfd8dSJin Yao { 3507*e0ddfd8dSJin Yao "BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD OCR.PF_L2_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD", 3508*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 3509*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 3510*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 3511*e0ddfd8dSJin Yao "EventName": "OCR.PF_L2_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD", 3512*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 3513*e0ddfd8dSJin Yao "MSRValue": "0x083C000010", 3514*e0ddfd8dSJin Yao "Offcore": "1", 3515*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3516*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 3517*e0ddfd8dSJin Yao "UMask": "0x1" 3518*e0ddfd8dSJin Yao }, 3519*e0ddfd8dSJin Yao { 3520*e0ddfd8dSJin Yao "BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD OCR.PF_L2_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD", 3521*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 3522*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 3523*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 3524*e0ddfd8dSJin Yao "EventName": "OCR.PF_L2_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD", 3525*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 3526*e0ddfd8dSJin Yao "MSRValue": "0x043C000010", 3527*e0ddfd8dSJin Yao "Offcore": "1", 3528*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3529*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 3530*e0ddfd8dSJin Yao "UMask": "0x1" 3531*e0ddfd8dSJin Yao }, 3532*e0ddfd8dSJin Yao { 3533*e0ddfd8dSJin Yao "BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_MISS.NO_SNOOP_NEEDED OCR.PF_L2_DATA_RD.L3_MISS.NO_SNOOP_NEEDED", 3534*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 3535*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 3536*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 3537*e0ddfd8dSJin Yao "EventName": "OCR.PF_L2_DATA_RD.L3_MISS.NO_SNOOP_NEEDED", 3538*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 3539*e0ddfd8dSJin Yao "MSRValue": "0x013C000010", 3540*e0ddfd8dSJin Yao "Offcore": "1", 3541*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3542*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 3543*e0ddfd8dSJin Yao "UMask": "0x1" 3544*e0ddfd8dSJin Yao }, 3545*e0ddfd8dSJin Yao { 3546*e0ddfd8dSJin Yao "BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_MISS.REMOTE_HITM", 3547*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 3548*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 3549*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 3550*e0ddfd8dSJin Yao "EventName": "OCR.PF_L2_DATA_RD.L3_MISS.REMOTE_HITM", 3551*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 3552*e0ddfd8dSJin Yao "MSRValue": "0x103FC00010", 3553*e0ddfd8dSJin Yao "Offcore": "1", 3554*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3555*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 3556*e0ddfd8dSJin Yao "UMask": "0x1" 3557*e0ddfd8dSJin Yao }, 3558*e0ddfd8dSJin Yao { 3559*e0ddfd8dSJin Yao "BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_MISS.REMOTE_HIT_FORWARD", 3560*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 3561*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 3562*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 3563*e0ddfd8dSJin Yao "EventName": "OCR.PF_L2_DATA_RD.L3_MISS.REMOTE_HIT_FORWARD", 3564*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 3565*e0ddfd8dSJin Yao "MSRValue": "0x083FC00010", 3566*e0ddfd8dSJin Yao "Offcore": "1", 3567*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3568*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 3569*e0ddfd8dSJin Yao "UMask": "0x1" 3570*e0ddfd8dSJin Yao }, 3571*e0ddfd8dSJin Yao { 3572*e0ddfd8dSJin Yao "BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_MISS.SNOOP_MISS", 3573*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 3574*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 3575*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 3576*e0ddfd8dSJin Yao "EventName": "OCR.PF_L2_DATA_RD.L3_MISS.SNOOP_MISS", 3577*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 3578*e0ddfd8dSJin Yao "MSRValue": "0x023C000010", 3579*e0ddfd8dSJin Yao "Offcore": "1", 3580*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3581*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 3582*e0ddfd8dSJin Yao "UMask": "0x1" 3583*e0ddfd8dSJin Yao }, 3584*e0ddfd8dSJin Yao { 3585*e0ddfd8dSJin Yao "BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_MISS.SNOOP_NONE", 3586*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 3587*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 3588*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 3589*e0ddfd8dSJin Yao "EventName": "OCR.PF_L2_DATA_RD.L3_MISS.SNOOP_NONE", 3590*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 3591*e0ddfd8dSJin Yao "MSRValue": "0x00BC000010", 3592*e0ddfd8dSJin Yao "Offcore": "1", 3593*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3594*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 3595*e0ddfd8dSJin Yao "UMask": "0x1" 3596*e0ddfd8dSJin Yao }, 3597*e0ddfd8dSJin Yao { 3598*e0ddfd8dSJin Yao "BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 3599*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 3600*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 3601*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 3602*e0ddfd8dSJin Yao "EventName": "OCR.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 3603*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 3604*e0ddfd8dSJin Yao "MSRValue": "0x3F84000010", 3605*e0ddfd8dSJin Yao "Offcore": "1", 3606*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3607*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 3608*e0ddfd8dSJin Yao "UMask": "0x1" 3609*e0ddfd8dSJin Yao }, 3610*e0ddfd8dSJin Yao { 3611*e0ddfd8dSJin Yao "BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 3612*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 3613*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 3614*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 3615*e0ddfd8dSJin Yao "EventName": "OCR.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 3616*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 3617*e0ddfd8dSJin Yao "MSRValue": "0x1004000010", 3618*e0ddfd8dSJin Yao "Offcore": "1", 3619*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3620*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 3621*e0ddfd8dSJin Yao "UMask": "0x1" 3622*e0ddfd8dSJin Yao }, 3623*e0ddfd8dSJin Yao { 3624*e0ddfd8dSJin Yao "BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 3625*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 3626*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 3627*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 3628*e0ddfd8dSJin Yao "EventName": "OCR.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 3629*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 3630*e0ddfd8dSJin Yao "MSRValue": "0x0804000010", 3631*e0ddfd8dSJin Yao "Offcore": "1", 3632*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3633*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 3634*e0ddfd8dSJin Yao "UMask": "0x1" 3635*e0ddfd8dSJin Yao }, 3636*e0ddfd8dSJin Yao { 3637*e0ddfd8dSJin Yao "BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 3638*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 3639*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 3640*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 3641*e0ddfd8dSJin Yao "EventName": "OCR.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 3642*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 3643*e0ddfd8dSJin Yao "MSRValue": "0x0404000010", 3644*e0ddfd8dSJin Yao "Offcore": "1", 3645*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3646*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 3647*e0ddfd8dSJin Yao "UMask": "0x1" 3648*e0ddfd8dSJin Yao }, 3649*e0ddfd8dSJin Yao { 3650*e0ddfd8dSJin Yao "BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 3651*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 3652*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 3653*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 3654*e0ddfd8dSJin Yao "EventName": "OCR.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 3655*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 3656*e0ddfd8dSJin Yao "MSRValue": "0x0104000010", 3657*e0ddfd8dSJin Yao "Offcore": "1", 3658*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3659*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 3660*e0ddfd8dSJin Yao "UMask": "0x1" 3661*e0ddfd8dSJin Yao }, 3662*e0ddfd8dSJin Yao { 3663*e0ddfd8dSJin Yao "BriefDescription": "Counts prefetch (that bring data to L2) data reads", 3664*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 3665*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 3666*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 3667*e0ddfd8dSJin Yao "EventName": "OCR.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 3668*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 3669*e0ddfd8dSJin Yao "MSRValue": "0x0204000010", 3670*e0ddfd8dSJin Yao "Offcore": "1", 3671*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3672*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 3673*e0ddfd8dSJin Yao "UMask": "0x1" 3674*e0ddfd8dSJin Yao }, 3675*e0ddfd8dSJin Yao { 3676*e0ddfd8dSJin Yao "BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 3677*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 3678*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 3679*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 3680*e0ddfd8dSJin Yao "EventName": "OCR.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 3681*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 3682*e0ddfd8dSJin Yao "MSRValue": "0x0604000010", 3683*e0ddfd8dSJin Yao "Offcore": "1", 3684*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3685*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 3686*e0ddfd8dSJin Yao "UMask": "0x1" 3687*e0ddfd8dSJin Yao }, 3688*e0ddfd8dSJin Yao { 3689*e0ddfd8dSJin Yao "BriefDescription": "Counts prefetch (that bring data to L2) data reads", 3690*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 3691*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 3692*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 3693*e0ddfd8dSJin Yao "EventName": "OCR.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 3694*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 3695*e0ddfd8dSJin Yao "MSRValue": "0x0084000010", 3696*e0ddfd8dSJin Yao "Offcore": "1", 3697*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3698*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 3699*e0ddfd8dSJin Yao "UMask": "0x1" 3700*e0ddfd8dSJin Yao }, 3701*e0ddfd8dSJin Yao { 3702*e0ddfd8dSJin Yao "BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 3703*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 3704*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 3705*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 3706*e0ddfd8dSJin Yao "EventName": "OCR.PF_L2_DATA_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 3707*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 3708*e0ddfd8dSJin Yao "MSRValue": "0x063B800010", 3709*e0ddfd8dSJin Yao "Offcore": "1", 3710*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3711*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 3712*e0ddfd8dSJin Yao "UMask": "0x1" 3713*e0ddfd8dSJin Yao }, 3714*e0ddfd8dSJin Yao { 3715*e0ddfd8dSJin Yao "BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 3716*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 3717*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 3718*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 3719*e0ddfd8dSJin Yao "EventName": "OCR.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 3720*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 3721*e0ddfd8dSJin Yao "MSRValue": "0x3F90000010", 3722*e0ddfd8dSJin Yao "Offcore": "1", 3723*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3724*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 3725*e0ddfd8dSJin Yao "UMask": "0x1" 3726*e0ddfd8dSJin Yao }, 3727*e0ddfd8dSJin Yao { 3728*e0ddfd8dSJin Yao "BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 3729*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 3730*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 3731*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 3732*e0ddfd8dSJin Yao "EventName": "OCR.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 3733*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 3734*e0ddfd8dSJin Yao "MSRValue": "0x1010000010", 3735*e0ddfd8dSJin Yao "Offcore": "1", 3736*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3737*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 3738*e0ddfd8dSJin Yao "UMask": "0x1" 3739*e0ddfd8dSJin Yao }, 3740*e0ddfd8dSJin Yao { 3741*e0ddfd8dSJin Yao "BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 3742*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 3743*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 3744*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 3745*e0ddfd8dSJin Yao "EventName": "OCR.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 3746*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 3747*e0ddfd8dSJin Yao "MSRValue": "0x0810000010", 3748*e0ddfd8dSJin Yao "Offcore": "1", 3749*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3750*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 3751*e0ddfd8dSJin Yao "UMask": "0x1" 3752*e0ddfd8dSJin Yao }, 3753*e0ddfd8dSJin Yao { 3754*e0ddfd8dSJin Yao "BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 3755*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 3756*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 3757*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 3758*e0ddfd8dSJin Yao "EventName": "OCR.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 3759*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 3760*e0ddfd8dSJin Yao "MSRValue": "0x0410000010", 3761*e0ddfd8dSJin Yao "Offcore": "1", 3762*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3763*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 3764*e0ddfd8dSJin Yao "UMask": "0x1" 3765*e0ddfd8dSJin Yao }, 3766*e0ddfd8dSJin Yao { 3767*e0ddfd8dSJin Yao "BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 3768*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 3769*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 3770*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 3771*e0ddfd8dSJin Yao "EventName": "OCR.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 3772*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 3773*e0ddfd8dSJin Yao "MSRValue": "0x0110000010", 3774*e0ddfd8dSJin Yao "Offcore": "1", 3775*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3776*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 3777*e0ddfd8dSJin Yao "UMask": "0x1" 3778*e0ddfd8dSJin Yao }, 3779*e0ddfd8dSJin Yao { 3780*e0ddfd8dSJin Yao "BriefDescription": "Counts prefetch (that bring data to L2) data reads", 3781*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 3782*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 3783*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 3784*e0ddfd8dSJin Yao "EventName": "OCR.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 3785*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 3786*e0ddfd8dSJin Yao "MSRValue": "0x0210000010", 3787*e0ddfd8dSJin Yao "Offcore": "1", 3788*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3789*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 3790*e0ddfd8dSJin Yao "UMask": "0x1" 3791*e0ddfd8dSJin Yao }, 3792*e0ddfd8dSJin Yao { 3793*e0ddfd8dSJin Yao "BriefDescription": "Counts prefetch (that bring data to L2) data reads", 3794*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 3795*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 3796*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 3797*e0ddfd8dSJin Yao "EventName": "OCR.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 3798*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 3799*e0ddfd8dSJin Yao "MSRValue": "0x0090000010", 3800*e0ddfd8dSJin Yao "Offcore": "1", 3801*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3802*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 3803*e0ddfd8dSJin Yao "UMask": "0x1" 3804*e0ddfd8dSJin Yao }, 3805*e0ddfd8dSJin Yao { 3806*e0ddfd8dSJin Yao "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_MISS.ANY_SNOOP OCR.PF_L2_RFO.L3_MISS.ANY_SNOOP", 3807*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 3808*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 3809*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 3810*e0ddfd8dSJin Yao "EventName": "OCR.PF_L2_RFO.L3_MISS.ANY_SNOOP", 3811*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 3812*e0ddfd8dSJin Yao "MSRValue": "0x3FBC000020", 3813*e0ddfd8dSJin Yao "Offcore": "1", 3814*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3815*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 3816*e0ddfd8dSJin Yao "UMask": "0x1" 3817*e0ddfd8dSJin Yao }, 3818*e0ddfd8dSJin Yao { 3819*e0ddfd8dSJin Yao "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_MISS.HITM_OTHER_CORE OCR.PF_L2_RFO.L3_MISS.HITM_OTHER_CORE", 3820*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 3821*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 3822*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 3823*e0ddfd8dSJin Yao "EventName": "OCR.PF_L2_RFO.L3_MISS.HITM_OTHER_CORE", 3824*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 3825*e0ddfd8dSJin Yao "MSRValue": "0x103C000020", 3826*e0ddfd8dSJin Yao "Offcore": "1", 3827*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3828*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 3829*e0ddfd8dSJin Yao "UMask": "0x1" 3830*e0ddfd8dSJin Yao }, 3831*e0ddfd8dSJin Yao { 3832*e0ddfd8dSJin Yao "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_MISS.HIT_OTHER_CORE_FWD OCR.PF_L2_RFO.L3_MISS.HIT_OTHER_CORE_FWD", 3833*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 3834*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 3835*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 3836*e0ddfd8dSJin Yao "EventName": "OCR.PF_L2_RFO.L3_MISS.HIT_OTHER_CORE_FWD", 3837*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 3838*e0ddfd8dSJin Yao "MSRValue": "0x083C000020", 3839*e0ddfd8dSJin Yao "Offcore": "1", 3840*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3841*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 3842*e0ddfd8dSJin Yao "UMask": "0x1" 3843*e0ddfd8dSJin Yao }, 3844*e0ddfd8dSJin Yao { 3845*e0ddfd8dSJin Yao "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD OCR.PF_L2_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD", 3846*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 3847*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 3848*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 3849*e0ddfd8dSJin Yao "EventName": "OCR.PF_L2_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD", 3850*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 3851*e0ddfd8dSJin Yao "MSRValue": "0x043C000020", 3852*e0ddfd8dSJin Yao "Offcore": "1", 3853*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3854*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 3855*e0ddfd8dSJin Yao "UMask": "0x1" 3856*e0ddfd8dSJin Yao }, 3857*e0ddfd8dSJin Yao { 3858*e0ddfd8dSJin Yao "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_MISS.NO_SNOOP_NEEDED OCR.PF_L2_RFO.L3_MISS.NO_SNOOP_NEEDED", 3859*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 3860*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 3861*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 3862*e0ddfd8dSJin Yao "EventName": "OCR.PF_L2_RFO.L3_MISS.NO_SNOOP_NEEDED", 3863*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 3864*e0ddfd8dSJin Yao "MSRValue": "0x013C000020", 3865*e0ddfd8dSJin Yao "Offcore": "1", 3866*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3867*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 3868*e0ddfd8dSJin Yao "UMask": "0x1" 3869*e0ddfd8dSJin Yao }, 3870*e0ddfd8dSJin Yao { 3871*e0ddfd8dSJin Yao "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_MISS.REMOTE_HITM", 3872*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 3873*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 3874*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 3875*e0ddfd8dSJin Yao "EventName": "OCR.PF_L2_RFO.L3_MISS.REMOTE_HITM", 3876*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 3877*e0ddfd8dSJin Yao "MSRValue": "0x103FC00020", 3878*e0ddfd8dSJin Yao "Offcore": "1", 3879*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3880*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 3881*e0ddfd8dSJin Yao "UMask": "0x1" 3882*e0ddfd8dSJin Yao }, 3883*e0ddfd8dSJin Yao { 3884*e0ddfd8dSJin Yao "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_MISS.REMOTE_HIT_FORWARD", 3885*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 3886*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 3887*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 3888*e0ddfd8dSJin Yao "EventName": "OCR.PF_L2_RFO.L3_MISS.REMOTE_HIT_FORWARD", 3889*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 3890*e0ddfd8dSJin Yao "MSRValue": "0x083FC00020", 3891*e0ddfd8dSJin Yao "Offcore": "1", 3892*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3893*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 3894*e0ddfd8dSJin Yao "UMask": "0x1" 3895*e0ddfd8dSJin Yao }, 3896*e0ddfd8dSJin Yao { 3897*e0ddfd8dSJin Yao "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_MISS.SNOOP_MISS", 3898*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 3899*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 3900*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 3901*e0ddfd8dSJin Yao "EventName": "OCR.PF_L2_RFO.L3_MISS.SNOOP_MISS", 3902*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 3903*e0ddfd8dSJin Yao "MSRValue": "0x023C000020", 3904*e0ddfd8dSJin Yao "Offcore": "1", 3905*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3906*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 3907*e0ddfd8dSJin Yao "UMask": "0x1" 3908*e0ddfd8dSJin Yao }, 3909*e0ddfd8dSJin Yao { 3910*e0ddfd8dSJin Yao "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_MISS.SNOOP_NONE", 3911*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 3912*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 3913*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 3914*e0ddfd8dSJin Yao "EventName": "OCR.PF_L2_RFO.L3_MISS.SNOOP_NONE", 3915*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 3916*e0ddfd8dSJin Yao "MSRValue": "0x00BC000020", 3917*e0ddfd8dSJin Yao "Offcore": "1", 3918*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3919*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 3920*e0ddfd8dSJin Yao "UMask": "0x1" 3921*e0ddfd8dSJin Yao }, 3922*e0ddfd8dSJin Yao { 3923*e0ddfd8dSJin Yao "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 3924*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 3925*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 3926*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 3927*e0ddfd8dSJin Yao "EventName": "OCR.PF_L2_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 3928*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 3929*e0ddfd8dSJin Yao "MSRValue": "0x3F84000020", 3930*e0ddfd8dSJin Yao "Offcore": "1", 3931*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3932*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 3933*e0ddfd8dSJin Yao "UMask": "0x1" 3934*e0ddfd8dSJin Yao }, 3935*e0ddfd8dSJin Yao { 3936*e0ddfd8dSJin Yao "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 3937*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 3938*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 3939*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 3940*e0ddfd8dSJin Yao "EventName": "OCR.PF_L2_RFO.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 3941*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 3942*e0ddfd8dSJin Yao "MSRValue": "0x1004000020", 3943*e0ddfd8dSJin Yao "Offcore": "1", 3944*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3945*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 3946*e0ddfd8dSJin Yao "UMask": "0x1" 3947*e0ddfd8dSJin Yao }, 3948*e0ddfd8dSJin Yao { 3949*e0ddfd8dSJin Yao "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 3950*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 3951*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 3952*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 3953*e0ddfd8dSJin Yao "EventName": "OCR.PF_L2_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 3954*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 3955*e0ddfd8dSJin Yao "MSRValue": "0x0804000020", 3956*e0ddfd8dSJin Yao "Offcore": "1", 3957*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3958*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 3959*e0ddfd8dSJin Yao "UMask": "0x1" 3960*e0ddfd8dSJin Yao }, 3961*e0ddfd8dSJin Yao { 3962*e0ddfd8dSJin Yao "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 3963*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 3964*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 3965*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 3966*e0ddfd8dSJin Yao "EventName": "OCR.PF_L2_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 3967*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 3968*e0ddfd8dSJin Yao "MSRValue": "0x0404000020", 3969*e0ddfd8dSJin Yao "Offcore": "1", 3970*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3971*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 3972*e0ddfd8dSJin Yao "UMask": "0x1" 3973*e0ddfd8dSJin Yao }, 3974*e0ddfd8dSJin Yao { 3975*e0ddfd8dSJin Yao "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 3976*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 3977*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 3978*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 3979*e0ddfd8dSJin Yao "EventName": "OCR.PF_L2_RFO.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 3980*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 3981*e0ddfd8dSJin Yao "MSRValue": "0x0104000020", 3982*e0ddfd8dSJin Yao "Offcore": "1", 3983*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3984*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 3985*e0ddfd8dSJin Yao "UMask": "0x1" 3986*e0ddfd8dSJin Yao }, 3987*e0ddfd8dSJin Yao { 3988*e0ddfd8dSJin Yao "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs", 3989*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 3990*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 3991*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 3992*e0ddfd8dSJin Yao "EventName": "OCR.PF_L2_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 3993*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 3994*e0ddfd8dSJin Yao "MSRValue": "0x0204000020", 3995*e0ddfd8dSJin Yao "Offcore": "1", 3996*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3997*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 3998*e0ddfd8dSJin Yao "UMask": "0x1" 3999*e0ddfd8dSJin Yao }, 4000*e0ddfd8dSJin Yao { 4001*e0ddfd8dSJin Yao "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 4002*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 4003*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 4004*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 4005*e0ddfd8dSJin Yao "EventName": "OCR.PF_L2_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 4006*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 4007*e0ddfd8dSJin Yao "MSRValue": "0x0604000020", 4008*e0ddfd8dSJin Yao "Offcore": "1", 4009*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4010*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 4011*e0ddfd8dSJin Yao "UMask": "0x1" 4012*e0ddfd8dSJin Yao }, 4013*e0ddfd8dSJin Yao { 4014*e0ddfd8dSJin Yao "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs", 4015*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 4016*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 4017*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 4018*e0ddfd8dSJin Yao "EventName": "OCR.PF_L2_RFO.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 4019*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 4020*e0ddfd8dSJin Yao "MSRValue": "0x0084000020", 4021*e0ddfd8dSJin Yao "Offcore": "1", 4022*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4023*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 4024*e0ddfd8dSJin Yao "UMask": "0x1" 4025*e0ddfd8dSJin Yao }, 4026*e0ddfd8dSJin Yao { 4027*e0ddfd8dSJin Yao "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 4028*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 4029*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 4030*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 4031*e0ddfd8dSJin Yao "EventName": "OCR.PF_L2_RFO.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 4032*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 4033*e0ddfd8dSJin Yao "MSRValue": "0x063B800020", 4034*e0ddfd8dSJin Yao "Offcore": "1", 4035*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4036*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 4037*e0ddfd8dSJin Yao "UMask": "0x1" 4038*e0ddfd8dSJin Yao }, 4039*e0ddfd8dSJin Yao { 4040*e0ddfd8dSJin Yao "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 4041*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 4042*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 4043*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 4044*e0ddfd8dSJin Yao "EventName": "OCR.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 4045*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 4046*e0ddfd8dSJin Yao "MSRValue": "0x3F90000020", 4047*e0ddfd8dSJin Yao "Offcore": "1", 4048*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4049*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 4050*e0ddfd8dSJin Yao "UMask": "0x1" 4051*e0ddfd8dSJin Yao }, 4052*e0ddfd8dSJin Yao { 4053*e0ddfd8dSJin Yao "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 4054*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 4055*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 4056*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 4057*e0ddfd8dSJin Yao "EventName": "OCR.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 4058*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 4059*e0ddfd8dSJin Yao "MSRValue": "0x1010000020", 4060*e0ddfd8dSJin Yao "Offcore": "1", 4061*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4062*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 4063*e0ddfd8dSJin Yao "UMask": "0x1" 4064*e0ddfd8dSJin Yao }, 4065*e0ddfd8dSJin Yao { 4066*e0ddfd8dSJin Yao "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 4067*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 4068*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 4069*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 4070*e0ddfd8dSJin Yao "EventName": "OCR.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 4071*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 4072*e0ddfd8dSJin Yao "MSRValue": "0x0810000020", 4073*e0ddfd8dSJin Yao "Offcore": "1", 4074*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4075*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 4076*e0ddfd8dSJin Yao "UMask": "0x1" 4077*e0ddfd8dSJin Yao }, 4078*e0ddfd8dSJin Yao { 4079*e0ddfd8dSJin Yao "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 4080*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 4081*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 4082*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 4083*e0ddfd8dSJin Yao "EventName": "OCR.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 4084*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 4085*e0ddfd8dSJin Yao "MSRValue": "0x0410000020", 4086*e0ddfd8dSJin Yao "Offcore": "1", 4087*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4088*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 4089*e0ddfd8dSJin Yao "UMask": "0x1" 4090*e0ddfd8dSJin Yao }, 4091*e0ddfd8dSJin Yao { 4092*e0ddfd8dSJin Yao "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 4093*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 4094*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 4095*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 4096*e0ddfd8dSJin Yao "EventName": "OCR.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 4097*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 4098*e0ddfd8dSJin Yao "MSRValue": "0x0110000020", 4099*e0ddfd8dSJin Yao "Offcore": "1", 4100*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4101*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 4102*e0ddfd8dSJin Yao "UMask": "0x1" 4103*e0ddfd8dSJin Yao }, 4104*e0ddfd8dSJin Yao { 4105*e0ddfd8dSJin Yao "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs", 4106*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 4107*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 4108*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 4109*e0ddfd8dSJin Yao "EventName": "OCR.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 4110*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 4111*e0ddfd8dSJin Yao "MSRValue": "0x0210000020", 4112*e0ddfd8dSJin Yao "Offcore": "1", 4113*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4114*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 4115*e0ddfd8dSJin Yao "UMask": "0x1" 4116*e0ddfd8dSJin Yao }, 4117*e0ddfd8dSJin Yao { 4118*e0ddfd8dSJin Yao "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs", 4119*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 4120*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 4121*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 4122*e0ddfd8dSJin Yao "EventName": "OCR.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 4123*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 4124*e0ddfd8dSJin Yao "MSRValue": "0x0090000020", 4125*e0ddfd8dSJin Yao "Offcore": "1", 4126*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4127*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 4128*e0ddfd8dSJin Yao "UMask": "0x1" 4129*e0ddfd8dSJin Yao }, 4130*e0ddfd8dSJin Yao { 4131*e0ddfd8dSJin Yao "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_MISS.ANY_SNOOP OCR.PF_L3_DATA_RD.L3_MISS.ANY_SNOOP", 4132*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 4133*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 4134*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 4135*e0ddfd8dSJin Yao "EventName": "OCR.PF_L3_DATA_RD.L3_MISS.ANY_SNOOP", 4136*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 4137*e0ddfd8dSJin Yao "MSRValue": "0x3FBC000080", 4138*e0ddfd8dSJin Yao "Offcore": "1", 4139*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4140*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 4141*e0ddfd8dSJin Yao "UMask": "0x1" 4142*e0ddfd8dSJin Yao }, 4143*e0ddfd8dSJin Yao { 4144*e0ddfd8dSJin Yao "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_MISS.HITM_OTHER_CORE OCR.PF_L3_DATA_RD.L3_MISS.HITM_OTHER_CORE", 4145*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 4146*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 4147*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 4148*e0ddfd8dSJin Yao "EventName": "OCR.PF_L3_DATA_RD.L3_MISS.HITM_OTHER_CORE", 4149*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 4150*e0ddfd8dSJin Yao "MSRValue": "0x103C000080", 4151*e0ddfd8dSJin Yao "Offcore": "1", 4152*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4153*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 4154*e0ddfd8dSJin Yao "UMask": "0x1" 4155*e0ddfd8dSJin Yao }, 4156*e0ddfd8dSJin Yao { 4157*e0ddfd8dSJin Yao "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD OCR.PF_L3_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD", 4158*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 4159*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 4160*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 4161*e0ddfd8dSJin Yao "EventName": "OCR.PF_L3_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD", 4162*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 4163*e0ddfd8dSJin Yao "MSRValue": "0x083C000080", 4164*e0ddfd8dSJin Yao "Offcore": "1", 4165*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4166*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 4167*e0ddfd8dSJin Yao "UMask": "0x1" 4168*e0ddfd8dSJin Yao }, 4169*e0ddfd8dSJin Yao { 4170*e0ddfd8dSJin Yao "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD OCR.PF_L3_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD", 4171*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 4172*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 4173*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 4174*e0ddfd8dSJin Yao "EventName": "OCR.PF_L3_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD", 4175*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 4176*e0ddfd8dSJin Yao "MSRValue": "0x043C000080", 4177*e0ddfd8dSJin Yao "Offcore": "1", 4178*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4179*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 4180*e0ddfd8dSJin Yao "UMask": "0x1" 4181*e0ddfd8dSJin Yao }, 4182*e0ddfd8dSJin Yao { 4183*e0ddfd8dSJin Yao "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_MISS.NO_SNOOP_NEEDED OCR.PF_L3_DATA_RD.L3_MISS.NO_SNOOP_NEEDED", 4184*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 4185*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 4186*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 4187*e0ddfd8dSJin Yao "EventName": "OCR.PF_L3_DATA_RD.L3_MISS.NO_SNOOP_NEEDED", 4188*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 4189*e0ddfd8dSJin Yao "MSRValue": "0x013C000080", 4190*e0ddfd8dSJin Yao "Offcore": "1", 4191*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4192*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 4193*e0ddfd8dSJin Yao "UMask": "0x1" 4194*e0ddfd8dSJin Yao }, 4195*e0ddfd8dSJin Yao { 4196*e0ddfd8dSJin Yao "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_MISS.REMOTE_HITM", 4197*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 4198*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 4199*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 4200*e0ddfd8dSJin Yao "EventName": "OCR.PF_L3_DATA_RD.L3_MISS.REMOTE_HITM", 4201*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 4202*e0ddfd8dSJin Yao "MSRValue": "0x103FC00080", 4203*e0ddfd8dSJin Yao "Offcore": "1", 4204*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4205*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 4206*e0ddfd8dSJin Yao "UMask": "0x1" 4207*e0ddfd8dSJin Yao }, 4208*e0ddfd8dSJin Yao { 4209*e0ddfd8dSJin Yao "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_MISS.REMOTE_HIT_FORWARD", 4210*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 4211*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 4212*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 4213*e0ddfd8dSJin Yao "EventName": "OCR.PF_L3_DATA_RD.L3_MISS.REMOTE_HIT_FORWARD", 4214*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 4215*e0ddfd8dSJin Yao "MSRValue": "0x083FC00080", 4216*e0ddfd8dSJin Yao "Offcore": "1", 4217*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4218*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 4219*e0ddfd8dSJin Yao "UMask": "0x1" 4220*e0ddfd8dSJin Yao }, 4221*e0ddfd8dSJin Yao { 4222*e0ddfd8dSJin Yao "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_MISS.SNOOP_MISS", 4223*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 4224*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 4225*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 4226*e0ddfd8dSJin Yao "EventName": "OCR.PF_L3_DATA_RD.L3_MISS.SNOOP_MISS", 4227*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 4228*e0ddfd8dSJin Yao "MSRValue": "0x023C000080", 4229*e0ddfd8dSJin Yao "Offcore": "1", 4230*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4231*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 4232*e0ddfd8dSJin Yao "UMask": "0x1" 4233*e0ddfd8dSJin Yao }, 4234*e0ddfd8dSJin Yao { 4235*e0ddfd8dSJin Yao "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_MISS.SNOOP_NONE", 4236*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 4237*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 4238*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 4239*e0ddfd8dSJin Yao "EventName": "OCR.PF_L3_DATA_RD.L3_MISS.SNOOP_NONE", 4240*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 4241*e0ddfd8dSJin Yao "MSRValue": "0x00BC000080", 4242*e0ddfd8dSJin Yao "Offcore": "1", 4243*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4244*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 4245*e0ddfd8dSJin Yao "UMask": "0x1" 4246*e0ddfd8dSJin Yao }, 4247*e0ddfd8dSJin Yao { 4248*e0ddfd8dSJin Yao "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 4249*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 4250*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 4251*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 4252*e0ddfd8dSJin Yao "EventName": "OCR.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 4253*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 4254*e0ddfd8dSJin Yao "MSRValue": "0x3F84000080", 4255*e0ddfd8dSJin Yao "Offcore": "1", 4256*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4257*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 4258*e0ddfd8dSJin Yao "UMask": "0x1" 4259*e0ddfd8dSJin Yao }, 4260*e0ddfd8dSJin Yao { 4261*e0ddfd8dSJin Yao "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 4262*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 4263*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 4264*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 4265*e0ddfd8dSJin Yao "EventName": "OCR.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 4266*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 4267*e0ddfd8dSJin Yao "MSRValue": "0x1004000080", 4268*e0ddfd8dSJin Yao "Offcore": "1", 4269*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4270*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 4271*e0ddfd8dSJin Yao "UMask": "0x1" 4272*e0ddfd8dSJin Yao }, 4273*e0ddfd8dSJin Yao { 4274*e0ddfd8dSJin Yao "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 4275*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 4276*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 4277*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 4278*e0ddfd8dSJin Yao "EventName": "OCR.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 4279*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 4280*e0ddfd8dSJin Yao "MSRValue": "0x0804000080", 4281*e0ddfd8dSJin Yao "Offcore": "1", 4282*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4283*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 4284*e0ddfd8dSJin Yao "UMask": "0x1" 4285*e0ddfd8dSJin Yao }, 4286*e0ddfd8dSJin Yao { 4287*e0ddfd8dSJin Yao "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 4288*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 4289*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 4290*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 4291*e0ddfd8dSJin Yao "EventName": "OCR.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 4292*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 4293*e0ddfd8dSJin Yao "MSRValue": "0x0404000080", 4294*e0ddfd8dSJin Yao "Offcore": "1", 4295*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4296*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 4297*e0ddfd8dSJin Yao "UMask": "0x1" 4298*e0ddfd8dSJin Yao }, 4299*e0ddfd8dSJin Yao { 4300*e0ddfd8dSJin Yao "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 4301*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 4302*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 4303*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 4304*e0ddfd8dSJin Yao "EventName": "OCR.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 4305*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 4306*e0ddfd8dSJin Yao "MSRValue": "0x0104000080", 4307*e0ddfd8dSJin Yao "Offcore": "1", 4308*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4309*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 4310*e0ddfd8dSJin Yao "UMask": "0x1" 4311*e0ddfd8dSJin Yao }, 4312*e0ddfd8dSJin Yao { 4313*e0ddfd8dSJin Yao "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads", 4314*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 4315*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 4316*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 4317*e0ddfd8dSJin Yao "EventName": "OCR.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 4318*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 4319*e0ddfd8dSJin Yao "MSRValue": "0x0204000080", 4320*e0ddfd8dSJin Yao "Offcore": "1", 4321*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4322*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 4323*e0ddfd8dSJin Yao "UMask": "0x1" 4324*e0ddfd8dSJin Yao }, 4325*e0ddfd8dSJin Yao { 4326*e0ddfd8dSJin Yao "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 4327*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 4328*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 4329*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 4330*e0ddfd8dSJin Yao "EventName": "OCR.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 4331*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 4332*e0ddfd8dSJin Yao "MSRValue": "0x0604000080", 4333*e0ddfd8dSJin Yao "Offcore": "1", 4334*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4335*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 4336*e0ddfd8dSJin Yao "UMask": "0x1" 4337*e0ddfd8dSJin Yao }, 4338*e0ddfd8dSJin Yao { 4339*e0ddfd8dSJin Yao "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads", 4340*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 4341*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 4342*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 4343*e0ddfd8dSJin Yao "EventName": "OCR.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 4344*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 4345*e0ddfd8dSJin Yao "MSRValue": "0x0084000080", 4346*e0ddfd8dSJin Yao "Offcore": "1", 4347*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4348*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 4349*e0ddfd8dSJin Yao "UMask": "0x1" 4350*e0ddfd8dSJin Yao }, 4351*e0ddfd8dSJin Yao { 4352*e0ddfd8dSJin Yao "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 4353*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 4354*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 4355*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 4356*e0ddfd8dSJin Yao "EventName": "OCR.PF_L3_DATA_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 4357*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 4358*e0ddfd8dSJin Yao "MSRValue": "0x063B800080", 4359*e0ddfd8dSJin Yao "Offcore": "1", 4360*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4361*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 4362*e0ddfd8dSJin Yao "UMask": "0x1" 4363*e0ddfd8dSJin Yao }, 4364*e0ddfd8dSJin Yao { 4365*e0ddfd8dSJin Yao "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 4366*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 4367*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 4368*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 4369*e0ddfd8dSJin Yao "EventName": "OCR.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 4370*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 4371*e0ddfd8dSJin Yao "MSRValue": "0x3F90000080", 4372*e0ddfd8dSJin Yao "Offcore": "1", 4373*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4374*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 4375*e0ddfd8dSJin Yao "UMask": "0x1" 4376*e0ddfd8dSJin Yao }, 4377*e0ddfd8dSJin Yao { 4378*e0ddfd8dSJin Yao "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 4379*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 4380*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 4381*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 4382*e0ddfd8dSJin Yao "EventName": "OCR.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 4383*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 4384*e0ddfd8dSJin Yao "MSRValue": "0x1010000080", 4385*e0ddfd8dSJin Yao "Offcore": "1", 4386*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4387*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 4388*e0ddfd8dSJin Yao "UMask": "0x1" 4389*e0ddfd8dSJin Yao }, 4390*e0ddfd8dSJin Yao { 4391*e0ddfd8dSJin Yao "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 4392*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 4393*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 4394*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 4395*e0ddfd8dSJin Yao "EventName": "OCR.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 4396*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 4397*e0ddfd8dSJin Yao "MSRValue": "0x0810000080", 4398*e0ddfd8dSJin Yao "Offcore": "1", 4399*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4400*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 4401*e0ddfd8dSJin Yao "UMask": "0x1" 4402*e0ddfd8dSJin Yao }, 4403*e0ddfd8dSJin Yao { 4404*e0ddfd8dSJin Yao "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 4405*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 4406*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 4407*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 4408*e0ddfd8dSJin Yao "EventName": "OCR.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 4409*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 4410*e0ddfd8dSJin Yao "MSRValue": "0x0410000080", 4411*e0ddfd8dSJin Yao "Offcore": "1", 4412*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4413*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 4414*e0ddfd8dSJin Yao "UMask": "0x1" 4415*e0ddfd8dSJin Yao }, 4416*e0ddfd8dSJin Yao { 4417*e0ddfd8dSJin Yao "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 4418*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 4419*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 4420*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 4421*e0ddfd8dSJin Yao "EventName": "OCR.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 4422*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 4423*e0ddfd8dSJin Yao "MSRValue": "0x0110000080", 4424*e0ddfd8dSJin Yao "Offcore": "1", 4425*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4426*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 4427*e0ddfd8dSJin Yao "UMask": "0x1" 4428*e0ddfd8dSJin Yao }, 4429*e0ddfd8dSJin Yao { 4430*e0ddfd8dSJin Yao "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads", 4431*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 4432*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 4433*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 4434*e0ddfd8dSJin Yao "EventName": "OCR.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 4435*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 4436*e0ddfd8dSJin Yao "MSRValue": "0x0210000080", 4437*e0ddfd8dSJin Yao "Offcore": "1", 4438*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4439*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 4440*e0ddfd8dSJin Yao "UMask": "0x1" 4441*e0ddfd8dSJin Yao }, 4442*e0ddfd8dSJin Yao { 4443*e0ddfd8dSJin Yao "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads", 4444*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 4445*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 4446*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 4447*e0ddfd8dSJin Yao "EventName": "OCR.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 4448*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 4449*e0ddfd8dSJin Yao "MSRValue": "0x0090000080", 4450*e0ddfd8dSJin Yao "Offcore": "1", 4451*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4452*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 4453*e0ddfd8dSJin Yao "UMask": "0x1" 4454*e0ddfd8dSJin Yao }, 4455*e0ddfd8dSJin Yao { 4456*e0ddfd8dSJin Yao "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_MISS.ANY_SNOOP OCR.PF_L3_RFO.L3_MISS.ANY_SNOOP", 4457*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 4458*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 4459*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 4460*e0ddfd8dSJin Yao "EventName": "OCR.PF_L3_RFO.L3_MISS.ANY_SNOOP", 4461*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 4462*e0ddfd8dSJin Yao "MSRValue": "0x3FBC000100", 4463*e0ddfd8dSJin Yao "Offcore": "1", 4464*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4465*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 4466*e0ddfd8dSJin Yao "UMask": "0x1" 4467*e0ddfd8dSJin Yao }, 4468*e0ddfd8dSJin Yao { 4469*e0ddfd8dSJin Yao "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_MISS.HITM_OTHER_CORE OCR.PF_L3_RFO.L3_MISS.HITM_OTHER_CORE", 4470*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 4471*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 4472*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 4473*e0ddfd8dSJin Yao "EventName": "OCR.PF_L3_RFO.L3_MISS.HITM_OTHER_CORE", 4474*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 4475*e0ddfd8dSJin Yao "MSRValue": "0x103C000100", 4476*e0ddfd8dSJin Yao "Offcore": "1", 4477*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4478*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 4479*e0ddfd8dSJin Yao "UMask": "0x1" 4480*e0ddfd8dSJin Yao }, 4481*e0ddfd8dSJin Yao { 4482*e0ddfd8dSJin Yao "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_MISS.HIT_OTHER_CORE_FWD OCR.PF_L3_RFO.L3_MISS.HIT_OTHER_CORE_FWD", 4483*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 4484*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 4485*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 4486*e0ddfd8dSJin Yao "EventName": "OCR.PF_L3_RFO.L3_MISS.HIT_OTHER_CORE_FWD", 4487*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 4488*e0ddfd8dSJin Yao "MSRValue": "0x083C000100", 4489*e0ddfd8dSJin Yao "Offcore": "1", 4490*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4491*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 4492*e0ddfd8dSJin Yao "UMask": "0x1" 4493*e0ddfd8dSJin Yao }, 4494*e0ddfd8dSJin Yao { 4495*e0ddfd8dSJin Yao "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD OCR.PF_L3_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD", 4496*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 4497*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 4498*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 4499*e0ddfd8dSJin Yao "EventName": "OCR.PF_L3_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD", 4500*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 4501*e0ddfd8dSJin Yao "MSRValue": "0x043C000100", 4502*e0ddfd8dSJin Yao "Offcore": "1", 4503*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4504*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 4505*e0ddfd8dSJin Yao "UMask": "0x1" 4506*e0ddfd8dSJin Yao }, 4507*e0ddfd8dSJin Yao { 4508*e0ddfd8dSJin Yao "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_MISS.NO_SNOOP_NEEDED OCR.PF_L3_RFO.L3_MISS.NO_SNOOP_NEEDED", 4509*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 4510*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 4511*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 4512*e0ddfd8dSJin Yao "EventName": "OCR.PF_L3_RFO.L3_MISS.NO_SNOOP_NEEDED", 4513*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 4514*e0ddfd8dSJin Yao "MSRValue": "0x013C000100", 4515*e0ddfd8dSJin Yao "Offcore": "1", 4516*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4517*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 4518*e0ddfd8dSJin Yao "UMask": "0x1" 4519*e0ddfd8dSJin Yao }, 4520*e0ddfd8dSJin Yao { 4521*e0ddfd8dSJin Yao "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_MISS.REMOTE_HITM", 4522*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 4523*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 4524*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 4525*e0ddfd8dSJin Yao "EventName": "OCR.PF_L3_RFO.L3_MISS.REMOTE_HITM", 4526*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 4527*e0ddfd8dSJin Yao "MSRValue": "0x103FC00100", 4528*e0ddfd8dSJin Yao "Offcore": "1", 4529*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4530*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 4531*e0ddfd8dSJin Yao "UMask": "0x1" 4532*e0ddfd8dSJin Yao }, 4533*e0ddfd8dSJin Yao { 4534*e0ddfd8dSJin Yao "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_MISS.REMOTE_HIT_FORWARD", 4535*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 4536*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 4537*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 4538*e0ddfd8dSJin Yao "EventName": "OCR.PF_L3_RFO.L3_MISS.REMOTE_HIT_FORWARD", 4539*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 4540*e0ddfd8dSJin Yao "MSRValue": "0x083FC00100", 4541*e0ddfd8dSJin Yao "Offcore": "1", 4542*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4543*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 4544*e0ddfd8dSJin Yao "UMask": "0x1" 4545*e0ddfd8dSJin Yao }, 4546*e0ddfd8dSJin Yao { 4547*e0ddfd8dSJin Yao "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_MISS.SNOOP_MISS", 4548*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 4549*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 4550*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 4551*e0ddfd8dSJin Yao "EventName": "OCR.PF_L3_RFO.L3_MISS.SNOOP_MISS", 4552*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 4553*e0ddfd8dSJin Yao "MSRValue": "0x023C000100", 4554*e0ddfd8dSJin Yao "Offcore": "1", 4555*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4556*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 4557*e0ddfd8dSJin Yao "UMask": "0x1" 4558*e0ddfd8dSJin Yao }, 4559*e0ddfd8dSJin Yao { 4560*e0ddfd8dSJin Yao "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_MISS.SNOOP_NONE", 4561*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 4562*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 4563*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 4564*e0ddfd8dSJin Yao "EventName": "OCR.PF_L3_RFO.L3_MISS.SNOOP_NONE", 4565*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 4566*e0ddfd8dSJin Yao "MSRValue": "0x00BC000100", 4567*e0ddfd8dSJin Yao "Offcore": "1", 4568*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4569*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 4570*e0ddfd8dSJin Yao "UMask": "0x1" 4571*e0ddfd8dSJin Yao }, 4572*e0ddfd8dSJin Yao { 4573*e0ddfd8dSJin Yao "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 4574*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 4575*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 4576*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 4577*e0ddfd8dSJin Yao "EventName": "OCR.PF_L3_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 4578*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 4579*e0ddfd8dSJin Yao "MSRValue": "0x3F84000100", 4580*e0ddfd8dSJin Yao "Offcore": "1", 4581*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4582*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 4583*e0ddfd8dSJin Yao "UMask": "0x1" 4584*e0ddfd8dSJin Yao }, 4585*e0ddfd8dSJin Yao { 4586*e0ddfd8dSJin Yao "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 4587*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 4588*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 4589*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 4590*e0ddfd8dSJin Yao "EventName": "OCR.PF_L3_RFO.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 4591*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 4592*e0ddfd8dSJin Yao "MSRValue": "0x1004000100", 4593*e0ddfd8dSJin Yao "Offcore": "1", 4594*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4595*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 4596*e0ddfd8dSJin Yao "UMask": "0x1" 4597*e0ddfd8dSJin Yao }, 4598*e0ddfd8dSJin Yao { 4599*e0ddfd8dSJin Yao "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 4600*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 4601*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 4602*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 4603*e0ddfd8dSJin Yao "EventName": "OCR.PF_L3_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 4604*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 4605*e0ddfd8dSJin Yao "MSRValue": "0x0804000100", 4606*e0ddfd8dSJin Yao "Offcore": "1", 4607*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4608*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 4609*e0ddfd8dSJin Yao "UMask": "0x1" 4610*e0ddfd8dSJin Yao }, 4611*e0ddfd8dSJin Yao { 4612*e0ddfd8dSJin Yao "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 4613*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 4614*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 4615*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 4616*e0ddfd8dSJin Yao "EventName": "OCR.PF_L3_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 4617*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 4618*e0ddfd8dSJin Yao "MSRValue": "0x0404000100", 4619*e0ddfd8dSJin Yao "Offcore": "1", 4620*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4621*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 4622*e0ddfd8dSJin Yao "UMask": "0x1" 4623*e0ddfd8dSJin Yao }, 4624*e0ddfd8dSJin Yao { 4625*e0ddfd8dSJin Yao "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 4626*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 4627*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 4628*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 4629*e0ddfd8dSJin Yao "EventName": "OCR.PF_L3_RFO.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 4630*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 4631*e0ddfd8dSJin Yao "MSRValue": "0x0104000100", 4632*e0ddfd8dSJin Yao "Offcore": "1", 4633*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4634*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 4635*e0ddfd8dSJin Yao "UMask": "0x1" 4636*e0ddfd8dSJin Yao }, 4637*e0ddfd8dSJin Yao { 4638*e0ddfd8dSJin Yao "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs", 4639*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 4640*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 4641*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 4642*e0ddfd8dSJin Yao "EventName": "OCR.PF_L3_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 4643*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 4644*e0ddfd8dSJin Yao "MSRValue": "0x0204000100", 4645*e0ddfd8dSJin Yao "Offcore": "1", 4646*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4647*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 4648*e0ddfd8dSJin Yao "UMask": "0x1" 4649*e0ddfd8dSJin Yao }, 4650*e0ddfd8dSJin Yao { 4651*e0ddfd8dSJin Yao "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 4652*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 4653*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 4654*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 4655*e0ddfd8dSJin Yao "EventName": "OCR.PF_L3_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 4656*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 4657*e0ddfd8dSJin Yao "MSRValue": "0x0604000100", 4658*e0ddfd8dSJin Yao "Offcore": "1", 4659*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4660*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 4661*e0ddfd8dSJin Yao "UMask": "0x1" 4662*e0ddfd8dSJin Yao }, 4663*e0ddfd8dSJin Yao { 4664*e0ddfd8dSJin Yao "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs", 4665*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 4666*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 4667*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 4668*e0ddfd8dSJin Yao "EventName": "OCR.PF_L3_RFO.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 4669*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 4670*e0ddfd8dSJin Yao "MSRValue": "0x0084000100", 4671*e0ddfd8dSJin Yao "Offcore": "1", 4672*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4673*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 4674*e0ddfd8dSJin Yao "UMask": "0x1" 4675*e0ddfd8dSJin Yao }, 4676*e0ddfd8dSJin Yao { 4677*e0ddfd8dSJin Yao "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 4678*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 4679*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 4680*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 4681*e0ddfd8dSJin Yao "EventName": "OCR.PF_L3_RFO.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 4682*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 4683*e0ddfd8dSJin Yao "MSRValue": "0x063B800100", 4684*e0ddfd8dSJin Yao "Offcore": "1", 4685*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4686*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 4687*e0ddfd8dSJin Yao "UMask": "0x1" 4688*e0ddfd8dSJin Yao }, 4689*e0ddfd8dSJin Yao { 4690*e0ddfd8dSJin Yao "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 4691*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 4692*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 4693*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 4694*e0ddfd8dSJin Yao "EventName": "OCR.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 4695*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 4696*e0ddfd8dSJin Yao "MSRValue": "0x3F90000100", 4697*e0ddfd8dSJin Yao "Offcore": "1", 4698*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4699*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 4700*e0ddfd8dSJin Yao "UMask": "0x1" 4701*e0ddfd8dSJin Yao }, 4702*e0ddfd8dSJin Yao { 4703*e0ddfd8dSJin Yao "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 4704*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 4705*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 4706*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 4707*e0ddfd8dSJin Yao "EventName": "OCR.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 4708*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 4709*e0ddfd8dSJin Yao "MSRValue": "0x1010000100", 4710*e0ddfd8dSJin Yao "Offcore": "1", 4711*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4712*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 4713*e0ddfd8dSJin Yao "UMask": "0x1" 4714*e0ddfd8dSJin Yao }, 4715*e0ddfd8dSJin Yao { 4716*e0ddfd8dSJin Yao "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 4717*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 4718*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 4719*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 4720*e0ddfd8dSJin Yao "EventName": "OCR.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 4721*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 4722*e0ddfd8dSJin Yao "MSRValue": "0x0810000100", 4723*e0ddfd8dSJin Yao "Offcore": "1", 4724*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4725*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 4726*e0ddfd8dSJin Yao "UMask": "0x1" 4727*e0ddfd8dSJin Yao }, 4728*e0ddfd8dSJin Yao { 4729*e0ddfd8dSJin Yao "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 4730*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 4731*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 4732*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 4733*e0ddfd8dSJin Yao "EventName": "OCR.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 4734*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 4735*e0ddfd8dSJin Yao "MSRValue": "0x0410000100", 4736*e0ddfd8dSJin Yao "Offcore": "1", 4737*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4738*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 4739*e0ddfd8dSJin Yao "UMask": "0x1" 4740*e0ddfd8dSJin Yao }, 4741*e0ddfd8dSJin Yao { 4742*e0ddfd8dSJin Yao "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 4743*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 4744*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 4745*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 4746*e0ddfd8dSJin Yao "EventName": "OCR.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 4747*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 4748*e0ddfd8dSJin Yao "MSRValue": "0x0110000100", 4749*e0ddfd8dSJin Yao "Offcore": "1", 4750*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4751*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 4752*e0ddfd8dSJin Yao "UMask": "0x1" 4753*e0ddfd8dSJin Yao }, 4754*e0ddfd8dSJin Yao { 4755*e0ddfd8dSJin Yao "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs", 4756*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 4757*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 4758*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 4759*e0ddfd8dSJin Yao "EventName": "OCR.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 4760*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 4761*e0ddfd8dSJin Yao "MSRValue": "0x0210000100", 4762*e0ddfd8dSJin Yao "Offcore": "1", 4763*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4764*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 4765*e0ddfd8dSJin Yao "UMask": "0x1" 4766*e0ddfd8dSJin Yao }, 4767*e0ddfd8dSJin Yao { 4768*e0ddfd8dSJin Yao "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs", 4769*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 4770*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 4771*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 4772*e0ddfd8dSJin Yao "EventName": "OCR.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 4773*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 4774*e0ddfd8dSJin Yao "MSRValue": "0x0090000100", 4775*e0ddfd8dSJin Yao "Offcore": "1", 4776*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4777*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 4778*e0ddfd8dSJin Yao "UMask": "0x1" 4779*e0ddfd8dSJin Yao }, 4780*e0ddfd8dSJin Yao { 4781*e0ddfd8dSJin Yao "BriefDescription": "Demand Data Read requests who miss L3 cache", 4782*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 4783*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3,4,5,6,7", 4784*e0ddfd8dSJin Yao "EventCode": "0xB0", 4785*e0ddfd8dSJin Yao "EventName": "OFFCORE_REQUESTS.L3_MISS_DEMAND_DATA_RD", 4786*e0ddfd8dSJin Yao "PublicDescription": "Demand Data Read requests who miss L3 cache.", 4787*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 4788*e0ddfd8dSJin Yao "UMask": "0x10" 4789*e0ddfd8dSJin Yao }, 4790*e0ddfd8dSJin Yao { 4791*e0ddfd8dSJin Yao "BriefDescription": "Cycles with at least 1 Demand Data Read requests who miss L3 cache in the superQ.", 4792*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 4793*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3,4,5,6,7", 4794*e0ddfd8dSJin Yao "CounterMask": "1", 4795*e0ddfd8dSJin Yao "EventCode": "0x60", 4796*e0ddfd8dSJin Yao "EventName": "OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_L3_MISS_DEMAND_DATA_RD", 4797*e0ddfd8dSJin Yao "SampleAfterValue": "2000003", 4798*e0ddfd8dSJin Yao "UMask": "0x10" 4799*e0ddfd8dSJin Yao }, 4800*e0ddfd8dSJin Yao { 4801*e0ddfd8dSJin Yao "BriefDescription": "Counts number of Offcore outstanding Demand Data Read requests that miss L3 cache in the superQ every cycle.", 4802*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 4803*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3,4,5,6,7", 4804*e0ddfd8dSJin Yao "EventCode": "0x60", 4805*e0ddfd8dSJin Yao "EventName": "OFFCORE_REQUESTS_OUTSTANDING.L3_MISS_DEMAND_DATA_RD", 4806*e0ddfd8dSJin Yao "SampleAfterValue": "2000003", 4807*e0ddfd8dSJin Yao "UMask": "0x10" 4808*e0ddfd8dSJin Yao }, 4809*e0ddfd8dSJin Yao { 4810*e0ddfd8dSJin Yao "BriefDescription": "Cycles with at least 6 Demand Data Read requests that miss L3 cache in the superQ.", 4811*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 4812*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3,4,5,6,7", 4813*e0ddfd8dSJin Yao "CounterMask": "6", 4814*e0ddfd8dSJin Yao "EventCode": "0x60", 4815*e0ddfd8dSJin Yao "EventName": "OFFCORE_REQUESTS_OUTSTANDING.L3_MISS_DEMAND_DATA_RD_GE_6", 4816*e0ddfd8dSJin Yao "SampleAfterValue": "2000003", 4817*e0ddfd8dSJin Yao "UMask": "0x10" 4818*e0ddfd8dSJin Yao }, 4819*e0ddfd8dSJin Yao { 4820*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS.ANY_SNOOP", 48217fcf1b89SHaiyan Song "Counter": "0,1,2,3", 48227fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 48237fcf1b89SHaiyan Song "Deprecated": "1", 48247fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 4825*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS.ANY_SNOOP", 48267fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 4827*e0ddfd8dSJin Yao "MSRValue": "0x3FBC000491", 4828*e0ddfd8dSJin Yao "Offcore": "1", 4829*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4830*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 4831*e0ddfd8dSJin Yao "UMask": "0x1" 4832*e0ddfd8dSJin Yao }, 4833*e0ddfd8dSJin Yao { 4834*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS.HITM_OTHER_CORE", 4835*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 4836*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 4837*e0ddfd8dSJin Yao "Deprecated": "1", 4838*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 4839*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS.HITM_OTHER_CORE", 4840*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 4841*e0ddfd8dSJin Yao "MSRValue": "0x103C000491", 48427fcf1b89SHaiyan Song "Offcore": "1", 48437fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 48447fcf1b89SHaiyan Song "SampleAfterValue": "100003", 48457fcf1b89SHaiyan Song "UMask": "0x1" 48467fcf1b89SHaiyan Song }, 48477fcf1b89SHaiyan Song { 48487fcf1b89SHaiyan Song "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD", 48497fcf1b89SHaiyan Song "Counter": "0,1,2,3", 48507fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 48517fcf1b89SHaiyan Song "Deprecated": "1", 48527fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 48537fcf1b89SHaiyan Song "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD", 48547fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 48557fcf1b89SHaiyan Song "MSRValue": "0x083C000491", 48567fcf1b89SHaiyan Song "Offcore": "1", 48577fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 48587fcf1b89SHaiyan Song "SampleAfterValue": "100003", 48597fcf1b89SHaiyan Song "UMask": "0x1" 48607fcf1b89SHaiyan Song }, 48617fcf1b89SHaiyan Song { 4862*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD", 48637fcf1b89SHaiyan Song "Counter": "0,1,2,3", 48647fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 48657fcf1b89SHaiyan Song "Deprecated": "1", 48667fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 4867*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD", 48687fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 4869*e0ddfd8dSJin Yao "MSRValue": "0x043C000491", 48707fcf1b89SHaiyan Song "Offcore": "1", 48717fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 48727fcf1b89SHaiyan Song "SampleAfterValue": "100003", 48737fcf1b89SHaiyan Song "UMask": "0x1" 48747fcf1b89SHaiyan Song }, 48757fcf1b89SHaiyan Song { 4876*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS.NO_SNOOP_NEEDED", 48777fcf1b89SHaiyan Song "Counter": "0,1,2,3", 48787fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 48797fcf1b89SHaiyan Song "Deprecated": "1", 48807fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 4881*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS.NO_SNOOP_NEEDED", 48827fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 4883*e0ddfd8dSJin Yao "MSRValue": "0x013C000491", 48847fcf1b89SHaiyan Song "Offcore": "1", 48857fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 48867fcf1b89SHaiyan Song "SampleAfterValue": "100003", 48877fcf1b89SHaiyan Song "UMask": "0x1" 48887fcf1b89SHaiyan Song }, 48897fcf1b89SHaiyan Song { 48907fcf1b89SHaiyan Song "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS.REMOTE_HITM", 48917fcf1b89SHaiyan Song "Counter": "0,1,2,3", 48927fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 48937fcf1b89SHaiyan Song "Deprecated": "1", 48947fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 48957fcf1b89SHaiyan Song "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS.REMOTE_HITM", 48967fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 48977fcf1b89SHaiyan Song "MSRValue": "0x103FC00491", 48987fcf1b89SHaiyan Song "Offcore": "1", 48997fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 49007fcf1b89SHaiyan Song "SampleAfterValue": "100003", 49017fcf1b89SHaiyan Song "UMask": "0x1" 49027fcf1b89SHaiyan Song }, 49037fcf1b89SHaiyan Song { 4904*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS.REMOTE_HIT_FORWARD", 49057fcf1b89SHaiyan Song "Counter": "0,1,2,3", 49067fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 49077fcf1b89SHaiyan Song "Deprecated": "1", 49087fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 4909*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS.REMOTE_HIT_FORWARD", 49107fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 4911*e0ddfd8dSJin Yao "MSRValue": "0x083FC00491", 49127fcf1b89SHaiyan Song "Offcore": "1", 49137fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 49147fcf1b89SHaiyan Song "SampleAfterValue": "100003", 49157fcf1b89SHaiyan Song "UMask": "0x1" 49167fcf1b89SHaiyan Song }, 49177fcf1b89SHaiyan Song { 4918*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS.SNOOP_MISS", 49197fcf1b89SHaiyan Song "Counter": "0,1,2,3", 49207fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 49217fcf1b89SHaiyan Song "Deprecated": "1", 49227fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 4923*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS.SNOOP_MISS", 49247fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 49257fcf1b89SHaiyan Song "MSRValue": "0x023C000491", 49267fcf1b89SHaiyan Song "Offcore": "1", 49277fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 49287fcf1b89SHaiyan Song "SampleAfterValue": "100003", 49297fcf1b89SHaiyan Song "UMask": "0x1" 49307fcf1b89SHaiyan Song }, 49317fcf1b89SHaiyan Song { 49327fcf1b89SHaiyan Song "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS.SNOOP_NONE", 49337fcf1b89SHaiyan Song "Counter": "0,1,2,3", 49347fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 49357fcf1b89SHaiyan Song "Deprecated": "1", 49367fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 49377fcf1b89SHaiyan Song "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS.SNOOP_NONE", 49387fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 49397fcf1b89SHaiyan Song "MSRValue": "0x00BC000491", 49407fcf1b89SHaiyan Song "Offcore": "1", 49417fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 49427fcf1b89SHaiyan Song "SampleAfterValue": "100003", 49437fcf1b89SHaiyan Song "UMask": "0x1" 49447fcf1b89SHaiyan Song }, 49457fcf1b89SHaiyan Song { 4946*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 49477fcf1b89SHaiyan Song "Counter": "0,1,2,3", 49487fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 49497fcf1b89SHaiyan Song "Deprecated": "1", 49507fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 4951*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 49527fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 4953*e0ddfd8dSJin Yao "MSRValue": "0x3F84000491", 49547fcf1b89SHaiyan Song "Offcore": "1", 49557fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 49567fcf1b89SHaiyan Song "SampleAfterValue": "100003", 49577fcf1b89SHaiyan Song "UMask": "0x1" 49587fcf1b89SHaiyan Song }, 49597fcf1b89SHaiyan Song { 4960*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 49617fcf1b89SHaiyan Song "Counter": "0,1,2,3", 49627fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 49637fcf1b89SHaiyan Song "Deprecated": "1", 49647fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 4965*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 49667fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 4967*e0ddfd8dSJin Yao "MSRValue": "0x1004000491", 49687fcf1b89SHaiyan Song "Offcore": "1", 49697fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 49707fcf1b89SHaiyan Song "SampleAfterValue": "100003", 49717fcf1b89SHaiyan Song "UMask": "0x1" 49727fcf1b89SHaiyan Song }, 49737fcf1b89SHaiyan Song { 4974*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 49757fcf1b89SHaiyan Song "Counter": "0,1,2,3", 49767fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 49777fcf1b89SHaiyan Song "Deprecated": "1", 49787fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 4979*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 49807fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 4981*e0ddfd8dSJin Yao "MSRValue": "0x0804000491", 49827fcf1b89SHaiyan Song "Offcore": "1", 49837fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 49847fcf1b89SHaiyan Song "SampleAfterValue": "100003", 49857fcf1b89SHaiyan Song "UMask": "0x1" 49867fcf1b89SHaiyan Song }, 49877fcf1b89SHaiyan Song { 4988*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 49897fcf1b89SHaiyan Song "Counter": "0,1,2,3", 49907fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 49917fcf1b89SHaiyan Song "Deprecated": "1", 49927fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 4993*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 49947fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 4995*e0ddfd8dSJin Yao "MSRValue": "0x0404000491", 49967fcf1b89SHaiyan Song "Offcore": "1", 49977fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 49987fcf1b89SHaiyan Song "SampleAfterValue": "100003", 49997fcf1b89SHaiyan Song "UMask": "0x1" 50007fcf1b89SHaiyan Song }, 50017fcf1b89SHaiyan Song { 5002*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 50037fcf1b89SHaiyan Song "Counter": "0,1,2,3", 50047fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 50057fcf1b89SHaiyan Song "Deprecated": "1", 50067fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 5007*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 50087fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 5009*e0ddfd8dSJin Yao "MSRValue": "0x0104000491", 50107fcf1b89SHaiyan Song "Offcore": "1", 50117fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 50127fcf1b89SHaiyan Song "SampleAfterValue": "100003", 50137fcf1b89SHaiyan Song "UMask": "0x1" 50147fcf1b89SHaiyan Song }, 50157fcf1b89SHaiyan Song { 5016*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 50177fcf1b89SHaiyan Song "Counter": "0,1,2,3", 50187fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 50197fcf1b89SHaiyan Song "Deprecated": "1", 50207fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 5021*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 50227fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 5023*e0ddfd8dSJin Yao "MSRValue": "0x0204000491", 50247fcf1b89SHaiyan Song "Offcore": "1", 50257fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 50267fcf1b89SHaiyan Song "SampleAfterValue": "100003", 50277fcf1b89SHaiyan Song "UMask": "0x1" 50287fcf1b89SHaiyan Song }, 50297fcf1b89SHaiyan Song { 5030*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 50317fcf1b89SHaiyan Song "Counter": "0,1,2,3", 50327fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 50337fcf1b89SHaiyan Song "Deprecated": "1", 50347fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 5035*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 50367fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 5037*e0ddfd8dSJin Yao "MSRValue": "0x0604000491", 50387fcf1b89SHaiyan Song "Offcore": "1", 50397fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 50407fcf1b89SHaiyan Song "SampleAfterValue": "100003", 50417fcf1b89SHaiyan Song "UMask": "0x1" 50427fcf1b89SHaiyan Song }, 50437fcf1b89SHaiyan Song { 5044*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 50457fcf1b89SHaiyan Song "Counter": "0,1,2,3", 50467fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 50477fcf1b89SHaiyan Song "Deprecated": "1", 50487fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 5049*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 50507fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 5051*e0ddfd8dSJin Yao "MSRValue": "0x0084000491", 50527fcf1b89SHaiyan Song "Offcore": "1", 50537fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 50547fcf1b89SHaiyan Song "SampleAfterValue": "100003", 50557fcf1b89SHaiyan Song "UMask": "0x1" 50567fcf1b89SHaiyan Song }, 50577fcf1b89SHaiyan Song { 5058*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 50597fcf1b89SHaiyan Song "Counter": "0,1,2,3", 50607fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 50617fcf1b89SHaiyan Song "Deprecated": "1", 50627fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 5063*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 50647fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 5065*e0ddfd8dSJin Yao "MSRValue": "0x063B800491", 50667fcf1b89SHaiyan Song "Offcore": "1", 50677fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 50687fcf1b89SHaiyan Song "SampleAfterValue": "100003", 50697fcf1b89SHaiyan Song "UMask": "0x1" 50707fcf1b89SHaiyan Song }, 50717fcf1b89SHaiyan Song { 5072*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 50737fcf1b89SHaiyan Song "Counter": "0,1,2,3", 50747fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 50757fcf1b89SHaiyan Song "Deprecated": "1", 50767fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 5077*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 50787fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 50797fcf1b89SHaiyan Song "MSRValue": "0x3F90000491", 50807fcf1b89SHaiyan Song "Offcore": "1", 50817fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 50827fcf1b89SHaiyan Song "SampleAfterValue": "100003", 50837fcf1b89SHaiyan Song "UMask": "0x1" 50847fcf1b89SHaiyan Song }, 50857fcf1b89SHaiyan Song { 5086*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 50877fcf1b89SHaiyan Song "Counter": "0,1,2,3", 50887fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 50897fcf1b89SHaiyan Song "Deprecated": "1", 50907fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 5091*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 50927fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 5093*e0ddfd8dSJin Yao "MSRValue": "0x1010000491", 50947fcf1b89SHaiyan Song "Offcore": "1", 50957fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 50967fcf1b89SHaiyan Song "SampleAfterValue": "100003", 50977fcf1b89SHaiyan Song "UMask": "0x1" 50987fcf1b89SHaiyan Song }, 50997fcf1b89SHaiyan Song { 5100*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 51017fcf1b89SHaiyan Song "Counter": "0,1,2,3", 51027fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 51037fcf1b89SHaiyan Song "Deprecated": "1", 51047fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 5105*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 51067fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 5107*e0ddfd8dSJin Yao "MSRValue": "0x0810000491", 51087fcf1b89SHaiyan Song "Offcore": "1", 51097fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 51107fcf1b89SHaiyan Song "SampleAfterValue": "100003", 51117fcf1b89SHaiyan Song "UMask": "0x1" 51127fcf1b89SHaiyan Song }, 51137fcf1b89SHaiyan Song { 5114*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 51157fcf1b89SHaiyan Song "Counter": "0,1,2,3", 51167fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 51177fcf1b89SHaiyan Song "Deprecated": "1", 51187fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 5119*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 51207fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 5121*e0ddfd8dSJin Yao "MSRValue": "0x0410000491", 51227fcf1b89SHaiyan Song "Offcore": "1", 51237fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 51247fcf1b89SHaiyan Song "SampleAfterValue": "100003", 51257fcf1b89SHaiyan Song "UMask": "0x1" 51267fcf1b89SHaiyan Song }, 51277fcf1b89SHaiyan Song { 5128*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 51297fcf1b89SHaiyan Song "Counter": "0,1,2,3", 51307fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 51317fcf1b89SHaiyan Song "Deprecated": "1", 51327fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 5133*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 51347fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 5135*e0ddfd8dSJin Yao "MSRValue": "0x0110000491", 51367fcf1b89SHaiyan Song "Offcore": "1", 51377fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 51387fcf1b89SHaiyan Song "SampleAfterValue": "100003", 51397fcf1b89SHaiyan Song "UMask": "0x1" 51407fcf1b89SHaiyan Song }, 51417fcf1b89SHaiyan Song { 5142*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 51437fcf1b89SHaiyan Song "Counter": "0,1,2,3", 51447fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 51457fcf1b89SHaiyan Song "Deprecated": "1", 51467fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 5147*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 51487fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 5149*e0ddfd8dSJin Yao "MSRValue": "0x0210000491", 51507fcf1b89SHaiyan Song "Offcore": "1", 51517fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 51527fcf1b89SHaiyan Song "SampleAfterValue": "100003", 51537fcf1b89SHaiyan Song "UMask": "0x1" 51547fcf1b89SHaiyan Song }, 51557fcf1b89SHaiyan Song { 51567fcf1b89SHaiyan Song "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 51577fcf1b89SHaiyan Song "Counter": "0,1,2,3", 51587fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 51597fcf1b89SHaiyan Song "Deprecated": "1", 51607fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 51617fcf1b89SHaiyan Song "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 51627fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 51637fcf1b89SHaiyan Song "MSRValue": "0x0090000491", 51647fcf1b89SHaiyan Song "Offcore": "1", 51657fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 51667fcf1b89SHaiyan Song "SampleAfterValue": "100003", 51677fcf1b89SHaiyan Song "UMask": "0x1" 51687fcf1b89SHaiyan Song }, 51697fcf1b89SHaiyan Song { 5170*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS.ANY_SNOOP", 51717fcf1b89SHaiyan Song "Counter": "0,1,2,3", 51727fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 51737fcf1b89SHaiyan Song "Deprecated": "1", 51747fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 5175*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS.ANY_SNOOP", 51767fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 5177*e0ddfd8dSJin Yao "MSRValue": "0x3FBC000490", 51787fcf1b89SHaiyan Song "Offcore": "1", 51797fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 51807fcf1b89SHaiyan Song "SampleAfterValue": "100003", 51817fcf1b89SHaiyan Song "UMask": "0x1" 51827fcf1b89SHaiyan Song }, 51837fcf1b89SHaiyan Song { 5184*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS.HITM_OTHER_CORE", 51857fcf1b89SHaiyan Song "Counter": "0,1,2,3", 51867fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 51877fcf1b89SHaiyan Song "Deprecated": "1", 51887fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 5189*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS.HITM_OTHER_CORE", 51907fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 5191*e0ddfd8dSJin Yao "MSRValue": "0x103C000490", 51927fcf1b89SHaiyan Song "Offcore": "1", 51937fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 51947fcf1b89SHaiyan Song "SampleAfterValue": "100003", 51957fcf1b89SHaiyan Song "UMask": "0x1" 51967fcf1b89SHaiyan Song }, 51977fcf1b89SHaiyan Song { 5198*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD", 51997fcf1b89SHaiyan Song "Counter": "0,1,2,3", 52007fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 52017fcf1b89SHaiyan Song "Deprecated": "1", 52027fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 5203*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD", 52047fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 5205*e0ddfd8dSJin Yao "MSRValue": "0x083C000490", 52067fcf1b89SHaiyan Song "Offcore": "1", 52077fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 52087fcf1b89SHaiyan Song "SampleAfterValue": "100003", 52097fcf1b89SHaiyan Song "UMask": "0x1" 52107fcf1b89SHaiyan Song }, 52117fcf1b89SHaiyan Song { 5212*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD", 52137fcf1b89SHaiyan Song "Counter": "0,1,2,3", 52147fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 5215*e0ddfd8dSJin Yao "Deprecated": "1", 52167fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 5217*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD", 52187fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 5219*e0ddfd8dSJin Yao "MSRValue": "0x043C000490", 5220*e0ddfd8dSJin Yao "Offcore": "1", 5221*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5222*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 5223*e0ddfd8dSJin Yao "UMask": "0x1" 5224*e0ddfd8dSJin Yao }, 5225*e0ddfd8dSJin Yao { 5226*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS.NO_SNOOP_NEEDED", 5227*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 5228*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 5229*e0ddfd8dSJin Yao "Deprecated": "1", 5230*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 5231*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS.NO_SNOOP_NEEDED", 5232*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 5233*e0ddfd8dSJin Yao "MSRValue": "0x013C000490", 5234*e0ddfd8dSJin Yao "Offcore": "1", 5235*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5236*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 5237*e0ddfd8dSJin Yao "UMask": "0x1" 5238*e0ddfd8dSJin Yao }, 5239*e0ddfd8dSJin Yao { 5240*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS.REMOTE_HITM", 5241*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 5242*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 5243*e0ddfd8dSJin Yao "Deprecated": "1", 5244*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 5245*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS.REMOTE_HITM", 5246*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 5247*e0ddfd8dSJin Yao "MSRValue": "0x103FC00490", 5248*e0ddfd8dSJin Yao "Offcore": "1", 5249*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5250*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 5251*e0ddfd8dSJin Yao "UMask": "0x1" 5252*e0ddfd8dSJin Yao }, 5253*e0ddfd8dSJin Yao { 5254*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS.REMOTE_HIT_FORWARD", 5255*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 5256*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 5257*e0ddfd8dSJin Yao "Deprecated": "1", 5258*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 5259*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS.REMOTE_HIT_FORWARD", 5260*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 5261*e0ddfd8dSJin Yao "MSRValue": "0x083FC00490", 5262*e0ddfd8dSJin Yao "Offcore": "1", 5263*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5264*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 5265*e0ddfd8dSJin Yao "UMask": "0x1" 5266*e0ddfd8dSJin Yao }, 5267*e0ddfd8dSJin Yao { 5268*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS.SNOOP_MISS", 5269*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 5270*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 5271*e0ddfd8dSJin Yao "Deprecated": "1", 5272*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 5273*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS.SNOOP_MISS", 5274*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 5275*e0ddfd8dSJin Yao "MSRValue": "0x023C000490", 52767fcf1b89SHaiyan Song "Offcore": "1", 52777fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 52787fcf1b89SHaiyan Song "SampleAfterValue": "100003", 52797fcf1b89SHaiyan Song "UMask": "0x1" 52807fcf1b89SHaiyan Song }, 52817fcf1b89SHaiyan Song { 52827fcf1b89SHaiyan Song "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS.SNOOP_NONE", 52837fcf1b89SHaiyan Song "Counter": "0,1,2,3", 52847fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 52857fcf1b89SHaiyan Song "Deprecated": "1", 52867fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 52877fcf1b89SHaiyan Song "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS.SNOOP_NONE", 52887fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 52897fcf1b89SHaiyan Song "MSRValue": "0x00BC000490", 52907fcf1b89SHaiyan Song "Offcore": "1", 52917fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 52927fcf1b89SHaiyan Song "SampleAfterValue": "100003", 52937fcf1b89SHaiyan Song "UMask": "0x1" 52947fcf1b89SHaiyan Song }, 52957fcf1b89SHaiyan Song { 52967fcf1b89SHaiyan Song "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 52977fcf1b89SHaiyan Song "Counter": "0,1,2,3", 52987fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 52997fcf1b89SHaiyan Song "Deprecated": "1", 53007fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 53017fcf1b89SHaiyan Song "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 53027fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 53037fcf1b89SHaiyan Song "MSRValue": "0x3F84000490", 53047fcf1b89SHaiyan Song "Offcore": "1", 53057fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 53067fcf1b89SHaiyan Song "SampleAfterValue": "100003", 53077fcf1b89SHaiyan Song "UMask": "0x1" 53087fcf1b89SHaiyan Song }, 53097fcf1b89SHaiyan Song { 5310*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 53117fcf1b89SHaiyan Song "Counter": "0,1,2,3", 53127fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 53137fcf1b89SHaiyan Song "Deprecated": "1", 53147fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 5315*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 53167fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 5317*e0ddfd8dSJin Yao "MSRValue": "0x1004000490", 53187fcf1b89SHaiyan Song "Offcore": "1", 53197fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 53207fcf1b89SHaiyan Song "SampleAfterValue": "100003", 53217fcf1b89SHaiyan Song "UMask": "0x1" 53227fcf1b89SHaiyan Song }, 53237fcf1b89SHaiyan Song { 5324*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 53257fcf1b89SHaiyan Song "Counter": "0,1,2,3", 53267fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 53277fcf1b89SHaiyan Song "Deprecated": "1", 53287fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 5329*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 53307fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 5331*e0ddfd8dSJin Yao "MSRValue": "0x0804000490", 53327fcf1b89SHaiyan Song "Offcore": "1", 53337fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 53347fcf1b89SHaiyan Song "SampleAfterValue": "100003", 53357fcf1b89SHaiyan Song "UMask": "0x1" 53367fcf1b89SHaiyan Song }, 53377fcf1b89SHaiyan Song { 5338*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 53397fcf1b89SHaiyan Song "Counter": "0,1,2,3", 53407fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 53417fcf1b89SHaiyan Song "Deprecated": "1", 53427fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 5343*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 53447fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 5345*e0ddfd8dSJin Yao "MSRValue": "0x0404000490", 53467fcf1b89SHaiyan Song "Offcore": "1", 53477fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 53487fcf1b89SHaiyan Song "SampleAfterValue": "100003", 53497fcf1b89SHaiyan Song "UMask": "0x1" 53507fcf1b89SHaiyan Song }, 53517fcf1b89SHaiyan Song { 5352*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 53537fcf1b89SHaiyan Song "Counter": "0,1,2,3", 53547fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 53557fcf1b89SHaiyan Song "Deprecated": "1", 53567fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 5357*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 53587fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 5359*e0ddfd8dSJin Yao "MSRValue": "0x0104000490", 53607fcf1b89SHaiyan Song "Offcore": "1", 53617fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 53627fcf1b89SHaiyan Song "SampleAfterValue": "100003", 53637fcf1b89SHaiyan Song "UMask": "0x1" 53647fcf1b89SHaiyan Song }, 53657fcf1b89SHaiyan Song { 5366*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 53677fcf1b89SHaiyan Song "Counter": "0,1,2,3", 53687fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 53697fcf1b89SHaiyan Song "Deprecated": "1", 53707fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 5371*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 53727fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 5373*e0ddfd8dSJin Yao "MSRValue": "0x0204000490", 53747fcf1b89SHaiyan Song "Offcore": "1", 53757fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 53767fcf1b89SHaiyan Song "SampleAfterValue": "100003", 53777fcf1b89SHaiyan Song "UMask": "0x1" 53787fcf1b89SHaiyan Song }, 53797fcf1b89SHaiyan Song { 5380*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 53817fcf1b89SHaiyan Song "Counter": "0,1,2,3", 53827fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 5383*e0ddfd8dSJin Yao "Deprecated": "1", 53847fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 5385*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 53867fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 5387*e0ddfd8dSJin Yao "MSRValue": "0x0604000490", 53887fcf1b89SHaiyan Song "Offcore": "1", 53897fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 53907fcf1b89SHaiyan Song "SampleAfterValue": "100003", 53917fcf1b89SHaiyan Song "UMask": "0x1" 53927fcf1b89SHaiyan Song }, 53937fcf1b89SHaiyan Song { 5394*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 53957fcf1b89SHaiyan Song "Counter": "0,1,2,3", 53967fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 5397*e0ddfd8dSJin Yao "Deprecated": "1", 53987fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 5399*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 54007fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 5401*e0ddfd8dSJin Yao "MSRValue": "0x0084000490", 54027fcf1b89SHaiyan Song "Offcore": "1", 54037fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 54047fcf1b89SHaiyan Song "SampleAfterValue": "100003", 54057fcf1b89SHaiyan Song "UMask": "0x1" 54067fcf1b89SHaiyan Song }, 54077fcf1b89SHaiyan Song { 5408*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 54097fcf1b89SHaiyan Song "Counter": "0,1,2,3", 54107fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 5411*e0ddfd8dSJin Yao "Deprecated": "1", 54127fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 5413*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 5414*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 5415*e0ddfd8dSJin Yao "MSRValue": "0x063B800490", 5416*e0ddfd8dSJin Yao "Offcore": "1", 5417*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5418*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 5419*e0ddfd8dSJin Yao "UMask": "0x1" 5420*e0ddfd8dSJin Yao }, 5421*e0ddfd8dSJin Yao { 5422*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 5423*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 5424*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 5425*e0ddfd8dSJin Yao "Deprecated": "1", 5426*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 5427*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 54287fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 54297fcf1b89SHaiyan Song "MSRValue": "0x3F90000490", 54307fcf1b89SHaiyan Song "Offcore": "1", 54317fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 54327fcf1b89SHaiyan Song "SampleAfterValue": "100003", 54337fcf1b89SHaiyan Song "UMask": "0x1" 54347fcf1b89SHaiyan Song }, 54357fcf1b89SHaiyan Song { 54367fcf1b89SHaiyan Song "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 54377fcf1b89SHaiyan Song "Counter": "0,1,2,3", 54387fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 54397fcf1b89SHaiyan Song "Deprecated": "1", 54407fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 54417fcf1b89SHaiyan Song "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 54427fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 54437fcf1b89SHaiyan Song "MSRValue": "0x1010000490", 54447fcf1b89SHaiyan Song "Offcore": "1", 54457fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 54467fcf1b89SHaiyan Song "SampleAfterValue": "100003", 54477fcf1b89SHaiyan Song "UMask": "0x1" 54487fcf1b89SHaiyan Song }, 54497fcf1b89SHaiyan Song { 5450*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 54517fcf1b89SHaiyan Song "Counter": "0,1,2,3", 54527fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 54537fcf1b89SHaiyan Song "Deprecated": "1", 54547fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 5455*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 54567fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 5457*e0ddfd8dSJin Yao "MSRValue": "0x0810000490", 54587fcf1b89SHaiyan Song "Offcore": "1", 54597fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 54607fcf1b89SHaiyan Song "SampleAfterValue": "100003", 54617fcf1b89SHaiyan Song "UMask": "0x1" 54627fcf1b89SHaiyan Song }, 54637fcf1b89SHaiyan Song { 5464*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 54657fcf1b89SHaiyan Song "Counter": "0,1,2,3", 54667fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 54677fcf1b89SHaiyan Song "Deprecated": "1", 54687fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 5469*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 54707fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 5471*e0ddfd8dSJin Yao "MSRValue": "0x0410000490", 54727fcf1b89SHaiyan Song "Offcore": "1", 54737fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 54747fcf1b89SHaiyan Song "SampleAfterValue": "100003", 54757fcf1b89SHaiyan Song "UMask": "0x1" 54767fcf1b89SHaiyan Song }, 54777fcf1b89SHaiyan Song { 5478*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 54797fcf1b89SHaiyan Song "Counter": "0,1,2,3", 54807fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 54817fcf1b89SHaiyan Song "Deprecated": "1", 54827fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 5483*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 54847fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 5485*e0ddfd8dSJin Yao "MSRValue": "0x0110000490", 54867fcf1b89SHaiyan Song "Offcore": "1", 54877fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 54887fcf1b89SHaiyan Song "SampleAfterValue": "100003", 54897fcf1b89SHaiyan Song "UMask": "0x1" 54907fcf1b89SHaiyan Song }, 54917fcf1b89SHaiyan Song { 5492*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 54937fcf1b89SHaiyan Song "Counter": "0,1,2,3", 54947fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 54957fcf1b89SHaiyan Song "Deprecated": "1", 54967fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 5497*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 54987fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 5499*e0ddfd8dSJin Yao "MSRValue": "0x0210000490", 55007fcf1b89SHaiyan Song "Offcore": "1", 55017fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 55027fcf1b89SHaiyan Song "SampleAfterValue": "100003", 55037fcf1b89SHaiyan Song "UMask": "0x1" 55047fcf1b89SHaiyan Song }, 55057fcf1b89SHaiyan Song { 5506*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 55077fcf1b89SHaiyan Song "Counter": "0,1,2,3", 55087fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 55097fcf1b89SHaiyan Song "Deprecated": "1", 55107fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 5511*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 55127fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 5513*e0ddfd8dSJin Yao "MSRValue": "0x0090000490", 55147fcf1b89SHaiyan Song "Offcore": "1", 55157fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 55167fcf1b89SHaiyan Song "SampleAfterValue": "100003", 55177fcf1b89SHaiyan Song "UMask": "0x1" 55187fcf1b89SHaiyan Song }, 55197fcf1b89SHaiyan Song { 5520*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS.ANY_SNOOP", 55217fcf1b89SHaiyan Song "Counter": "0,1,2,3", 55227fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 55237fcf1b89SHaiyan Song "Deprecated": "1", 55247fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 5525*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS.ANY_SNOOP", 55267fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 5527*e0ddfd8dSJin Yao "MSRValue": "0x3FBC000120", 55287fcf1b89SHaiyan Song "Offcore": "1", 55297fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 55307fcf1b89SHaiyan Song "SampleAfterValue": "100003", 55317fcf1b89SHaiyan Song "UMask": "0x1" 55327fcf1b89SHaiyan Song }, 55337fcf1b89SHaiyan Song { 5534*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS.HITM_OTHER_CORE", 55357fcf1b89SHaiyan Song "Counter": "0,1,2,3", 55367fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 55377fcf1b89SHaiyan Song "Deprecated": "1", 55387fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 5539*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS.HITM_OTHER_CORE", 55407fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 5541*e0ddfd8dSJin Yao "MSRValue": "0x103C000120", 55427fcf1b89SHaiyan Song "Offcore": "1", 55437fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 55447fcf1b89SHaiyan Song "SampleAfterValue": "100003", 55457fcf1b89SHaiyan Song "UMask": "0x1" 55467fcf1b89SHaiyan Song }, 55477fcf1b89SHaiyan Song { 55487fcf1b89SHaiyan Song "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS.HIT_OTHER_CORE_FWD", 55497fcf1b89SHaiyan Song "Counter": "0,1,2,3", 55507fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 55517fcf1b89SHaiyan Song "Deprecated": "1", 55527fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 55537fcf1b89SHaiyan Song "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS.HIT_OTHER_CORE_FWD", 55547fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 55557fcf1b89SHaiyan Song "MSRValue": "0x083C000120", 55567fcf1b89SHaiyan Song "Offcore": "1", 55577fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 55587fcf1b89SHaiyan Song "SampleAfterValue": "100003", 55597fcf1b89SHaiyan Song "UMask": "0x1" 55607fcf1b89SHaiyan Song }, 55617fcf1b89SHaiyan Song { 5562*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD", 55637fcf1b89SHaiyan Song "Counter": "0,1,2,3", 55647fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 55657fcf1b89SHaiyan Song "Deprecated": "1", 55667fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 5567*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD", 55687fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 5569*e0ddfd8dSJin Yao "MSRValue": "0x043C000120", 55707fcf1b89SHaiyan Song "Offcore": "1", 55717fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 55727fcf1b89SHaiyan Song "SampleAfterValue": "100003", 55737fcf1b89SHaiyan Song "UMask": "0x1" 55747fcf1b89SHaiyan Song }, 55757fcf1b89SHaiyan Song { 5576*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS.NO_SNOOP_NEEDED", 55777fcf1b89SHaiyan Song "Counter": "0,1,2,3", 55787fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 55797fcf1b89SHaiyan Song "Deprecated": "1", 55807fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 5581*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS.NO_SNOOP_NEEDED", 55827fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 5583*e0ddfd8dSJin Yao "MSRValue": "0x013C000120", 55847fcf1b89SHaiyan Song "Offcore": "1", 55857fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 55867fcf1b89SHaiyan Song "SampleAfterValue": "100003", 55877fcf1b89SHaiyan Song "UMask": "0x1" 55887fcf1b89SHaiyan Song }, 55897fcf1b89SHaiyan Song { 5590*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS.REMOTE_HITM", 55917fcf1b89SHaiyan Song "Counter": "0,1,2,3", 55927fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 55937fcf1b89SHaiyan Song "Deprecated": "1", 55947fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 5595*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS.REMOTE_HITM", 55967fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 5597*e0ddfd8dSJin Yao "MSRValue": "0x103FC00120", 55987fcf1b89SHaiyan Song "Offcore": "1", 55997fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 56007fcf1b89SHaiyan Song "SampleAfterValue": "100003", 56017fcf1b89SHaiyan Song "UMask": "0x1" 56027fcf1b89SHaiyan Song }, 56037fcf1b89SHaiyan Song { 5604*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS.REMOTE_HIT_FORWARD", 56057fcf1b89SHaiyan Song "Counter": "0,1,2,3", 56067fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 56077fcf1b89SHaiyan Song "Deprecated": "1", 56087fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 5609*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS.REMOTE_HIT_FORWARD", 56107fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 5611*e0ddfd8dSJin Yao "MSRValue": "0x083FC00120", 56127fcf1b89SHaiyan Song "Offcore": "1", 56137fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 56147fcf1b89SHaiyan Song "SampleAfterValue": "100003", 56157fcf1b89SHaiyan Song "UMask": "0x1" 56167fcf1b89SHaiyan Song }, 56177fcf1b89SHaiyan Song { 56187fcf1b89SHaiyan Song "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS.SNOOP_MISS", 56197fcf1b89SHaiyan Song "Counter": "0,1,2,3", 56207fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 56217fcf1b89SHaiyan Song "Deprecated": "1", 56227fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 56237fcf1b89SHaiyan Song "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS.SNOOP_MISS", 56247fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 56257fcf1b89SHaiyan Song "MSRValue": "0x023C000120", 56267fcf1b89SHaiyan Song "Offcore": "1", 56277fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 56287fcf1b89SHaiyan Song "SampleAfterValue": "100003", 56297fcf1b89SHaiyan Song "UMask": "0x1" 56307fcf1b89SHaiyan Song }, 56317fcf1b89SHaiyan Song { 5632*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS.SNOOP_NONE", 56337fcf1b89SHaiyan Song "Counter": "0,1,2,3", 56347fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 56357fcf1b89SHaiyan Song "Deprecated": "1", 56367fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 5637*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS.SNOOP_NONE", 56387fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 5639*e0ddfd8dSJin Yao "MSRValue": "0x00BC000120", 56407fcf1b89SHaiyan Song "Offcore": "1", 56417fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 56427fcf1b89SHaiyan Song "SampleAfterValue": "100003", 56437fcf1b89SHaiyan Song "UMask": "0x1" 56447fcf1b89SHaiyan Song }, 56457fcf1b89SHaiyan Song { 56467fcf1b89SHaiyan Song "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 56477fcf1b89SHaiyan Song "Counter": "0,1,2,3", 56487fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 56497fcf1b89SHaiyan Song "Deprecated": "1", 56507fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 56517fcf1b89SHaiyan Song "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 56527fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 56537fcf1b89SHaiyan Song "MSRValue": "0x3F84000120", 56547fcf1b89SHaiyan Song "Offcore": "1", 56557fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 56567fcf1b89SHaiyan Song "SampleAfterValue": "100003", 56577fcf1b89SHaiyan Song "UMask": "0x1" 56587fcf1b89SHaiyan Song }, 56597fcf1b89SHaiyan Song { 5660*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 56617fcf1b89SHaiyan Song "Counter": "0,1,2,3", 56627fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 56637fcf1b89SHaiyan Song "Deprecated": "1", 56647fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 5665*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 56667fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 5667*e0ddfd8dSJin Yao "MSRValue": "0x1004000120", 56687fcf1b89SHaiyan Song "Offcore": "1", 56697fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 56707fcf1b89SHaiyan Song "SampleAfterValue": "100003", 56717fcf1b89SHaiyan Song "UMask": "0x1" 56727fcf1b89SHaiyan Song }, 56737fcf1b89SHaiyan Song { 5674*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 56757fcf1b89SHaiyan Song "Counter": "0,1,2,3", 56767fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 56777fcf1b89SHaiyan Song "Deprecated": "1", 56787fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 5679*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 56807fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 5681*e0ddfd8dSJin Yao "MSRValue": "0x0804000120", 56827fcf1b89SHaiyan Song "Offcore": "1", 56837fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 56847fcf1b89SHaiyan Song "SampleAfterValue": "100003", 56857fcf1b89SHaiyan Song "UMask": "0x1" 56867fcf1b89SHaiyan Song }, 56877fcf1b89SHaiyan Song { 5688*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 56897fcf1b89SHaiyan Song "Counter": "0,1,2,3", 56907fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 56917fcf1b89SHaiyan Song "Deprecated": "1", 56927fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 5693*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 56947fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 5695*e0ddfd8dSJin Yao "MSRValue": "0x0404000120", 56967fcf1b89SHaiyan Song "Offcore": "1", 56977fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 56987fcf1b89SHaiyan Song "SampleAfterValue": "100003", 56997fcf1b89SHaiyan Song "UMask": "0x1" 57007fcf1b89SHaiyan Song }, 57017fcf1b89SHaiyan Song { 57027fcf1b89SHaiyan Song "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 57037fcf1b89SHaiyan Song "Counter": "0,1,2,3", 57047fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 57057fcf1b89SHaiyan Song "Deprecated": "1", 57067fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 57077fcf1b89SHaiyan Song "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 57087fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 57097fcf1b89SHaiyan Song "MSRValue": "0x0104000120", 57107fcf1b89SHaiyan Song "Offcore": "1", 57117fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 57127fcf1b89SHaiyan Song "SampleAfterValue": "100003", 57137fcf1b89SHaiyan Song "UMask": "0x1" 57147fcf1b89SHaiyan Song }, 57157fcf1b89SHaiyan Song { 5716*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 57177fcf1b89SHaiyan Song "Counter": "0,1,2,3", 57187fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 57197fcf1b89SHaiyan Song "Deprecated": "1", 57207fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 5721*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 57227fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 5723*e0ddfd8dSJin Yao "MSRValue": "0x0204000120", 57247fcf1b89SHaiyan Song "Offcore": "1", 57257fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 57267fcf1b89SHaiyan Song "SampleAfterValue": "100003", 57277fcf1b89SHaiyan Song "UMask": "0x1" 57287fcf1b89SHaiyan Song }, 57297fcf1b89SHaiyan Song { 57307fcf1b89SHaiyan Song "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 57317fcf1b89SHaiyan Song "Counter": "0,1,2,3", 57327fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 57337fcf1b89SHaiyan Song "Deprecated": "1", 57347fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 57357fcf1b89SHaiyan Song "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 57367fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 57377fcf1b89SHaiyan Song "MSRValue": "0x0604000120", 57387fcf1b89SHaiyan Song "Offcore": "1", 57397fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 57407fcf1b89SHaiyan Song "SampleAfterValue": "100003", 57417fcf1b89SHaiyan Song "UMask": "0x1" 57427fcf1b89SHaiyan Song }, 57437fcf1b89SHaiyan Song { 5744*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 57457fcf1b89SHaiyan Song "Counter": "0,1,2,3", 57467fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 57477fcf1b89SHaiyan Song "Deprecated": "1", 57487fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 5749*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 57507fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 5751*e0ddfd8dSJin Yao "MSRValue": "0x0084000120", 57527fcf1b89SHaiyan Song "Offcore": "1", 57537fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 57547fcf1b89SHaiyan Song "SampleAfterValue": "100003", 57557fcf1b89SHaiyan Song "UMask": "0x1" 57567fcf1b89SHaiyan Song }, 57577fcf1b89SHaiyan Song { 57587fcf1b89SHaiyan Song "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 57597fcf1b89SHaiyan Song "Counter": "0,1,2,3", 57607fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 57617fcf1b89SHaiyan Song "Deprecated": "1", 57627fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 57637fcf1b89SHaiyan Song "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 57647fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 57657fcf1b89SHaiyan Song "MSRValue": "0x063B800120", 57667fcf1b89SHaiyan Song "Offcore": "1", 57677fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 57687fcf1b89SHaiyan Song "SampleAfterValue": "100003", 57697fcf1b89SHaiyan Song "UMask": "0x1" 57707fcf1b89SHaiyan Song }, 57717fcf1b89SHaiyan Song { 5772*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 57737fcf1b89SHaiyan Song "Counter": "0,1,2,3", 57747fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 57757fcf1b89SHaiyan Song "Deprecated": "1", 57767fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 5777*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 57787fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 5779*e0ddfd8dSJin Yao "MSRValue": "0x3F90000120", 57807fcf1b89SHaiyan Song "Offcore": "1", 57817fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 57827fcf1b89SHaiyan Song "SampleAfterValue": "100003", 57837fcf1b89SHaiyan Song "UMask": "0x1" 57847fcf1b89SHaiyan Song }, 57857fcf1b89SHaiyan Song { 5786*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 57877fcf1b89SHaiyan Song "Counter": "0,1,2,3", 57887fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 57897fcf1b89SHaiyan Song "Deprecated": "1", 57907fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 5791*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 57927fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 5793*e0ddfd8dSJin Yao "MSRValue": "0x1010000120", 57947fcf1b89SHaiyan Song "Offcore": "1", 57957fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 57967fcf1b89SHaiyan Song "SampleAfterValue": "100003", 57977fcf1b89SHaiyan Song "UMask": "0x1" 57987fcf1b89SHaiyan Song }, 57997fcf1b89SHaiyan Song { 5800*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 58017fcf1b89SHaiyan Song "Counter": "0,1,2,3", 58027fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 58037fcf1b89SHaiyan Song "Deprecated": "1", 58047fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 5805*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 58067fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 5807*e0ddfd8dSJin Yao "MSRValue": "0x0810000120", 58087fcf1b89SHaiyan Song "Offcore": "1", 58097fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 58107fcf1b89SHaiyan Song "SampleAfterValue": "100003", 58117fcf1b89SHaiyan Song "UMask": "0x1" 58127fcf1b89SHaiyan Song }, 58137fcf1b89SHaiyan Song { 5814*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 58157fcf1b89SHaiyan Song "Counter": "0,1,2,3", 58167fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 58177fcf1b89SHaiyan Song "Deprecated": "1", 58187fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 5819*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 58207fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 5821*e0ddfd8dSJin Yao "MSRValue": "0x0410000120", 58227fcf1b89SHaiyan Song "Offcore": "1", 58237fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 58247fcf1b89SHaiyan Song "SampleAfterValue": "100003", 58257fcf1b89SHaiyan Song "UMask": "0x1" 58267fcf1b89SHaiyan Song }, 58277fcf1b89SHaiyan Song { 58287fcf1b89SHaiyan Song "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 58297fcf1b89SHaiyan Song "Counter": "0,1,2,3", 58307fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 58317fcf1b89SHaiyan Song "Deprecated": "1", 58327fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 58337fcf1b89SHaiyan Song "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 58347fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 58357fcf1b89SHaiyan Song "MSRValue": "0x0110000120", 58367fcf1b89SHaiyan Song "Offcore": "1", 58377fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 58387fcf1b89SHaiyan Song "SampleAfterValue": "100003", 58397fcf1b89SHaiyan Song "UMask": "0x1" 58407fcf1b89SHaiyan Song }, 58417fcf1b89SHaiyan Song { 5842*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 58437fcf1b89SHaiyan Song "Counter": "0,1,2,3", 58447fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 58457fcf1b89SHaiyan Song "Deprecated": "1", 58467fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 5847*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 58487fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 5849*e0ddfd8dSJin Yao "MSRValue": "0x0210000120", 58507fcf1b89SHaiyan Song "Offcore": "1", 58517fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 58527fcf1b89SHaiyan Song "SampleAfterValue": "100003", 58537fcf1b89SHaiyan Song "UMask": "0x1" 58547fcf1b89SHaiyan Song }, 58557fcf1b89SHaiyan Song { 5856*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 58577fcf1b89SHaiyan Song "Counter": "0,1,2,3", 58587fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 5859*e0ddfd8dSJin Yao "Deprecated": "1", 58607fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 5861*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 58627fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 5863*e0ddfd8dSJin Yao "MSRValue": "0x0090000120", 5864*e0ddfd8dSJin Yao "Offcore": "1", 5865*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5866*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 5867*e0ddfd8dSJin Yao "UMask": "0x1" 5868*e0ddfd8dSJin Yao }, 5869*e0ddfd8dSJin Yao { 5870*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS.ANY_SNOOP", 5871*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 5872*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 5873*e0ddfd8dSJin Yao "Deprecated": "1", 5874*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 5875*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS.ANY_SNOOP", 5876*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 5877*e0ddfd8dSJin Yao "MSRValue": "0x3FBC0007F7", 5878*e0ddfd8dSJin Yao "Offcore": "1", 5879*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5880*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 5881*e0ddfd8dSJin Yao "UMask": "0x1" 5882*e0ddfd8dSJin Yao }, 5883*e0ddfd8dSJin Yao { 5884*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS.HITM_OTHER_CORE", 5885*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 5886*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 5887*e0ddfd8dSJin Yao "Deprecated": "1", 5888*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 5889*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS.HITM_OTHER_CORE", 5890*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 5891*e0ddfd8dSJin Yao "MSRValue": "0x103C0007F7", 5892*e0ddfd8dSJin Yao "Offcore": "1", 5893*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5894*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 5895*e0ddfd8dSJin Yao "UMask": "0x1" 5896*e0ddfd8dSJin Yao }, 5897*e0ddfd8dSJin Yao { 5898*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS.HIT_OTHER_CORE_FWD", 5899*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 5900*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 5901*e0ddfd8dSJin Yao "Deprecated": "1", 5902*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 5903*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS.HIT_OTHER_CORE_FWD", 5904*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 5905*e0ddfd8dSJin Yao "MSRValue": "0x083C0007F7", 5906*e0ddfd8dSJin Yao "Offcore": "1", 5907*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5908*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 5909*e0ddfd8dSJin Yao "UMask": "0x1" 5910*e0ddfd8dSJin Yao }, 5911*e0ddfd8dSJin Yao { 5912*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS.HIT_OTHER_CORE_NO_FWD", 5913*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 5914*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 5915*e0ddfd8dSJin Yao "Deprecated": "1", 5916*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 5917*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS.HIT_OTHER_CORE_NO_FWD", 5918*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 5919*e0ddfd8dSJin Yao "MSRValue": "0x043C0007F7", 5920*e0ddfd8dSJin Yao "Offcore": "1", 5921*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5922*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 5923*e0ddfd8dSJin Yao "UMask": "0x1" 5924*e0ddfd8dSJin Yao }, 5925*e0ddfd8dSJin Yao { 5926*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS.NO_SNOOP_NEEDED", 5927*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 5928*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 5929*e0ddfd8dSJin Yao "Deprecated": "1", 5930*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 5931*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS.NO_SNOOP_NEEDED", 5932*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 5933*e0ddfd8dSJin Yao "MSRValue": "0x013C0007F7", 5934*e0ddfd8dSJin Yao "Offcore": "1", 5935*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5936*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 5937*e0ddfd8dSJin Yao "UMask": "0x1" 5938*e0ddfd8dSJin Yao }, 5939*e0ddfd8dSJin Yao { 5940*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS.REMOTE_HITM", 5941*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 5942*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 5943*e0ddfd8dSJin Yao "Deprecated": "1", 5944*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 5945*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS.REMOTE_HITM", 5946*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 5947*e0ddfd8dSJin Yao "MSRValue": "0x103FC007F7", 5948*e0ddfd8dSJin Yao "Offcore": "1", 5949*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5950*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 5951*e0ddfd8dSJin Yao "UMask": "0x1" 5952*e0ddfd8dSJin Yao }, 5953*e0ddfd8dSJin Yao { 5954*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS.REMOTE_HIT_FORWARD", 5955*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 5956*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 5957*e0ddfd8dSJin Yao "Deprecated": "1", 5958*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 5959*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS.REMOTE_HIT_FORWARD", 5960*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 5961*e0ddfd8dSJin Yao "MSRValue": "0x083FC007F7", 5962*e0ddfd8dSJin Yao "Offcore": "1", 5963*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5964*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 5965*e0ddfd8dSJin Yao "UMask": "0x1" 5966*e0ddfd8dSJin Yao }, 5967*e0ddfd8dSJin Yao { 5968*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS.SNOOP_MISS", 5969*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 5970*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 5971*e0ddfd8dSJin Yao "Deprecated": "1", 5972*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 5973*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS.SNOOP_MISS", 5974*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 5975*e0ddfd8dSJin Yao "MSRValue": "0x023C0007F7", 5976*e0ddfd8dSJin Yao "Offcore": "1", 5977*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5978*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 5979*e0ddfd8dSJin Yao "UMask": "0x1" 5980*e0ddfd8dSJin Yao }, 5981*e0ddfd8dSJin Yao { 5982*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS.SNOOP_NONE", 5983*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 5984*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 5985*e0ddfd8dSJin Yao "Deprecated": "1", 5986*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 5987*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS.SNOOP_NONE", 5988*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 5989*e0ddfd8dSJin Yao "MSRValue": "0x00BC0007F7", 5990*e0ddfd8dSJin Yao "Offcore": "1", 5991*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5992*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 5993*e0ddfd8dSJin Yao "UMask": "0x1" 5994*e0ddfd8dSJin Yao }, 5995*e0ddfd8dSJin Yao { 5996*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 5997*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 5998*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 5999*e0ddfd8dSJin Yao "Deprecated": "1", 6000*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 6001*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 6002*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 6003*e0ddfd8dSJin Yao "MSRValue": "0x3F840007F7", 6004*e0ddfd8dSJin Yao "Offcore": "1", 6005*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6006*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 6007*e0ddfd8dSJin Yao "UMask": "0x1" 6008*e0ddfd8dSJin Yao }, 6009*e0ddfd8dSJin Yao { 6010*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 6011*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 6012*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 6013*e0ddfd8dSJin Yao "Deprecated": "1", 6014*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 6015*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 6016*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 6017*e0ddfd8dSJin Yao "MSRValue": "0x10040007F7", 6018*e0ddfd8dSJin Yao "Offcore": "1", 6019*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6020*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 6021*e0ddfd8dSJin Yao "UMask": "0x1" 6022*e0ddfd8dSJin Yao }, 6023*e0ddfd8dSJin Yao { 6024*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 6025*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 6026*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 6027*e0ddfd8dSJin Yao "Deprecated": "1", 6028*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 6029*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 6030*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 6031*e0ddfd8dSJin Yao "MSRValue": "0x08040007F7", 6032*e0ddfd8dSJin Yao "Offcore": "1", 6033*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6034*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 6035*e0ddfd8dSJin Yao "UMask": "0x1" 6036*e0ddfd8dSJin Yao }, 6037*e0ddfd8dSJin Yao { 6038*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 6039*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 6040*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 6041*e0ddfd8dSJin Yao "Deprecated": "1", 6042*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 6043*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 6044*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 6045*e0ddfd8dSJin Yao "MSRValue": "0x04040007F7", 6046*e0ddfd8dSJin Yao "Offcore": "1", 6047*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6048*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 6049*e0ddfd8dSJin Yao "UMask": "0x1" 6050*e0ddfd8dSJin Yao }, 6051*e0ddfd8dSJin Yao { 6052*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 6053*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 6054*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 6055*e0ddfd8dSJin Yao "Deprecated": "1", 6056*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 6057*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 6058*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 6059*e0ddfd8dSJin Yao "MSRValue": "0x01040007F7", 6060*e0ddfd8dSJin Yao "Offcore": "1", 6061*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6062*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 6063*e0ddfd8dSJin Yao "UMask": "0x1" 6064*e0ddfd8dSJin Yao }, 6065*e0ddfd8dSJin Yao { 6066*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 6067*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 6068*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 6069*e0ddfd8dSJin Yao "Deprecated": "1", 6070*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 6071*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 6072*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 6073*e0ddfd8dSJin Yao "MSRValue": "0x02040007F7", 6074*e0ddfd8dSJin Yao "Offcore": "1", 6075*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6076*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 6077*e0ddfd8dSJin Yao "UMask": "0x1" 6078*e0ddfd8dSJin Yao }, 6079*e0ddfd8dSJin Yao { 6080*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 6081*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 6082*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 6083*e0ddfd8dSJin Yao "Deprecated": "1", 6084*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 6085*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 6086*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 6087*e0ddfd8dSJin Yao "MSRValue": "0x06040007F7", 6088*e0ddfd8dSJin Yao "Offcore": "1", 6089*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6090*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 6091*e0ddfd8dSJin Yao "UMask": "0x1" 6092*e0ddfd8dSJin Yao }, 6093*e0ddfd8dSJin Yao { 6094*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 6095*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 6096*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 6097*e0ddfd8dSJin Yao "Deprecated": "1", 6098*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 6099*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 6100*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 6101*e0ddfd8dSJin Yao "MSRValue": "0x00840007F7", 6102*e0ddfd8dSJin Yao "Offcore": "1", 6103*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6104*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 6105*e0ddfd8dSJin Yao "UMask": "0x1" 6106*e0ddfd8dSJin Yao }, 6107*e0ddfd8dSJin Yao { 6108*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 6109*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 6110*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 6111*e0ddfd8dSJin Yao "Deprecated": "1", 6112*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 6113*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 6114*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 6115*e0ddfd8dSJin Yao "MSRValue": "0x063B8007F7", 6116*e0ddfd8dSJin Yao "Offcore": "1", 6117*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6118*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 6119*e0ddfd8dSJin Yao "UMask": "0x1" 6120*e0ddfd8dSJin Yao }, 6121*e0ddfd8dSJin Yao { 6122*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 6123*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 6124*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 6125*e0ddfd8dSJin Yao "Deprecated": "1", 6126*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 6127*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 6128*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 6129*e0ddfd8dSJin Yao "MSRValue": "0x3F900007F7", 6130*e0ddfd8dSJin Yao "Offcore": "1", 6131*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6132*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 6133*e0ddfd8dSJin Yao "UMask": "0x1" 6134*e0ddfd8dSJin Yao }, 6135*e0ddfd8dSJin Yao { 6136*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 6137*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 6138*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 6139*e0ddfd8dSJin Yao "Deprecated": "1", 6140*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 6141*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 6142*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 6143*e0ddfd8dSJin Yao "MSRValue": "0x10100007F7", 6144*e0ddfd8dSJin Yao "Offcore": "1", 6145*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6146*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 6147*e0ddfd8dSJin Yao "UMask": "0x1" 6148*e0ddfd8dSJin Yao }, 6149*e0ddfd8dSJin Yao { 6150*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 6151*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 6152*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 6153*e0ddfd8dSJin Yao "Deprecated": "1", 6154*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 6155*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 6156*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 6157*e0ddfd8dSJin Yao "MSRValue": "0x08100007F7", 6158*e0ddfd8dSJin Yao "Offcore": "1", 6159*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6160*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 6161*e0ddfd8dSJin Yao "UMask": "0x1" 6162*e0ddfd8dSJin Yao }, 6163*e0ddfd8dSJin Yao { 6164*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 6165*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 6166*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 6167*e0ddfd8dSJin Yao "Deprecated": "1", 6168*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 6169*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 6170*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 6171*e0ddfd8dSJin Yao "MSRValue": "0x04100007F7", 6172*e0ddfd8dSJin Yao "Offcore": "1", 6173*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6174*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 6175*e0ddfd8dSJin Yao "UMask": "0x1" 6176*e0ddfd8dSJin Yao }, 6177*e0ddfd8dSJin Yao { 6178*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 6179*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 6180*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 6181*e0ddfd8dSJin Yao "Deprecated": "1", 6182*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 6183*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 6184*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 6185*e0ddfd8dSJin Yao "MSRValue": "0x01100007F7", 6186*e0ddfd8dSJin Yao "Offcore": "1", 6187*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6188*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 6189*e0ddfd8dSJin Yao "UMask": "0x1" 6190*e0ddfd8dSJin Yao }, 6191*e0ddfd8dSJin Yao { 6192*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 6193*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 6194*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 6195*e0ddfd8dSJin Yao "Deprecated": "1", 6196*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 6197*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 6198*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 6199*e0ddfd8dSJin Yao "MSRValue": "0x02100007F7", 6200*e0ddfd8dSJin Yao "Offcore": "1", 6201*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6202*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 6203*e0ddfd8dSJin Yao "UMask": "0x1" 6204*e0ddfd8dSJin Yao }, 6205*e0ddfd8dSJin Yao { 6206*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 6207*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 6208*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 6209*e0ddfd8dSJin Yao "Deprecated": "1", 6210*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 6211*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 6212*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 6213*e0ddfd8dSJin Yao "MSRValue": "0x00900007F7", 6214*e0ddfd8dSJin Yao "Offcore": "1", 6215*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6216*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 6217*e0ddfd8dSJin Yao "UMask": "0x1" 6218*e0ddfd8dSJin Yao }, 6219*e0ddfd8dSJin Yao { 6220*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS.ANY_SNOOP", 6221*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 6222*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 6223*e0ddfd8dSJin Yao "Deprecated": "1", 6224*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 6225*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS.ANY_SNOOP", 6226*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 6227*e0ddfd8dSJin Yao "MSRValue": "0x3FBC000122", 6228*e0ddfd8dSJin Yao "Offcore": "1", 6229*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6230*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 6231*e0ddfd8dSJin Yao "UMask": "0x1" 6232*e0ddfd8dSJin Yao }, 6233*e0ddfd8dSJin Yao { 6234*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS.HITM_OTHER_CORE", 6235*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 6236*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 6237*e0ddfd8dSJin Yao "Deprecated": "1", 6238*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 6239*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS.HITM_OTHER_CORE", 6240*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 6241*e0ddfd8dSJin Yao "MSRValue": "0x103C000122", 6242*e0ddfd8dSJin Yao "Offcore": "1", 6243*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6244*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 6245*e0ddfd8dSJin Yao "UMask": "0x1" 6246*e0ddfd8dSJin Yao }, 6247*e0ddfd8dSJin Yao { 6248*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS.HIT_OTHER_CORE_FWD", 6249*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 6250*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 6251*e0ddfd8dSJin Yao "Deprecated": "1", 6252*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 6253*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS.HIT_OTHER_CORE_FWD", 6254*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 6255*e0ddfd8dSJin Yao "MSRValue": "0x083C000122", 6256*e0ddfd8dSJin Yao "Offcore": "1", 6257*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6258*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 6259*e0ddfd8dSJin Yao "UMask": "0x1" 6260*e0ddfd8dSJin Yao }, 6261*e0ddfd8dSJin Yao { 6262*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD", 6263*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 6264*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 6265*e0ddfd8dSJin Yao "Deprecated": "1", 6266*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 6267*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD", 6268*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 6269*e0ddfd8dSJin Yao "MSRValue": "0x043C000122", 6270*e0ddfd8dSJin Yao "Offcore": "1", 6271*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6272*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 6273*e0ddfd8dSJin Yao "UMask": "0x1" 6274*e0ddfd8dSJin Yao }, 6275*e0ddfd8dSJin Yao { 6276*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS.NO_SNOOP_NEEDED", 6277*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 6278*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 6279*e0ddfd8dSJin Yao "Deprecated": "1", 6280*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 6281*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS.NO_SNOOP_NEEDED", 6282*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 6283*e0ddfd8dSJin Yao "MSRValue": "0x013C000122", 6284*e0ddfd8dSJin Yao "Offcore": "1", 6285*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6286*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 6287*e0ddfd8dSJin Yao "UMask": "0x1" 6288*e0ddfd8dSJin Yao }, 6289*e0ddfd8dSJin Yao { 6290*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS.REMOTE_HITM", 6291*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 6292*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 6293*e0ddfd8dSJin Yao "Deprecated": "1", 6294*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 6295*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS.REMOTE_HITM", 6296*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 6297*e0ddfd8dSJin Yao "MSRValue": "0x103FC00122", 6298*e0ddfd8dSJin Yao "Offcore": "1", 6299*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6300*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 6301*e0ddfd8dSJin Yao "UMask": "0x1" 6302*e0ddfd8dSJin Yao }, 6303*e0ddfd8dSJin Yao { 6304*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS.REMOTE_HIT_FORWARD", 6305*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 6306*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 6307*e0ddfd8dSJin Yao "Deprecated": "1", 6308*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 6309*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS.REMOTE_HIT_FORWARD", 6310*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 6311*e0ddfd8dSJin Yao "MSRValue": "0x083FC00122", 6312*e0ddfd8dSJin Yao "Offcore": "1", 6313*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6314*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 6315*e0ddfd8dSJin Yao "UMask": "0x1" 6316*e0ddfd8dSJin Yao }, 6317*e0ddfd8dSJin Yao { 6318*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS.SNOOP_MISS", 6319*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 6320*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 6321*e0ddfd8dSJin Yao "Deprecated": "1", 6322*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 6323*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS.SNOOP_MISS", 6324*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 6325*e0ddfd8dSJin Yao "MSRValue": "0x023C000122", 6326*e0ddfd8dSJin Yao "Offcore": "1", 6327*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6328*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 6329*e0ddfd8dSJin Yao "UMask": "0x1" 6330*e0ddfd8dSJin Yao }, 6331*e0ddfd8dSJin Yao { 6332*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS.SNOOP_NONE", 6333*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 6334*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 6335*e0ddfd8dSJin Yao "Deprecated": "1", 6336*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 6337*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS.SNOOP_NONE", 6338*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 6339*e0ddfd8dSJin Yao "MSRValue": "0x00BC000122", 6340*e0ddfd8dSJin Yao "Offcore": "1", 6341*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6342*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 6343*e0ddfd8dSJin Yao "UMask": "0x1" 6344*e0ddfd8dSJin Yao }, 6345*e0ddfd8dSJin Yao { 6346*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 6347*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 6348*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 6349*e0ddfd8dSJin Yao "Deprecated": "1", 6350*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 6351*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 6352*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 6353*e0ddfd8dSJin Yao "MSRValue": "0x3F84000122", 6354*e0ddfd8dSJin Yao "Offcore": "1", 6355*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6356*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 6357*e0ddfd8dSJin Yao "UMask": "0x1" 6358*e0ddfd8dSJin Yao }, 6359*e0ddfd8dSJin Yao { 6360*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 6361*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 6362*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 6363*e0ddfd8dSJin Yao "Deprecated": "1", 6364*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 6365*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 6366*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 6367*e0ddfd8dSJin Yao "MSRValue": "0x1004000122", 6368*e0ddfd8dSJin Yao "Offcore": "1", 6369*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6370*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 6371*e0ddfd8dSJin Yao "UMask": "0x1" 6372*e0ddfd8dSJin Yao }, 6373*e0ddfd8dSJin Yao { 6374*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 6375*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 6376*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 6377*e0ddfd8dSJin Yao "Deprecated": "1", 6378*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 6379*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 6380*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 6381*e0ddfd8dSJin Yao "MSRValue": "0x0804000122", 6382*e0ddfd8dSJin Yao "Offcore": "1", 6383*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6384*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 6385*e0ddfd8dSJin Yao "UMask": "0x1" 6386*e0ddfd8dSJin Yao }, 6387*e0ddfd8dSJin Yao { 6388*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 6389*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 6390*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 6391*e0ddfd8dSJin Yao "Deprecated": "1", 6392*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 6393*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 6394*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 6395*e0ddfd8dSJin Yao "MSRValue": "0x0404000122", 6396*e0ddfd8dSJin Yao "Offcore": "1", 6397*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6398*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 6399*e0ddfd8dSJin Yao "UMask": "0x1" 6400*e0ddfd8dSJin Yao }, 6401*e0ddfd8dSJin Yao { 6402*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 6403*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 6404*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 6405*e0ddfd8dSJin Yao "Deprecated": "1", 6406*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 6407*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 6408*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 6409*e0ddfd8dSJin Yao "MSRValue": "0x0104000122", 6410*e0ddfd8dSJin Yao "Offcore": "1", 6411*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6412*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 6413*e0ddfd8dSJin Yao "UMask": "0x1" 6414*e0ddfd8dSJin Yao }, 6415*e0ddfd8dSJin Yao { 6416*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 6417*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 6418*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 6419*e0ddfd8dSJin Yao "Deprecated": "1", 6420*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 6421*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 6422*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 6423*e0ddfd8dSJin Yao "MSRValue": "0x0204000122", 6424*e0ddfd8dSJin Yao "Offcore": "1", 6425*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6426*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 6427*e0ddfd8dSJin Yao "UMask": "0x1" 6428*e0ddfd8dSJin Yao }, 6429*e0ddfd8dSJin Yao { 6430*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 6431*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 6432*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 6433*e0ddfd8dSJin Yao "Deprecated": "1", 6434*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 6435*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 6436*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 6437*e0ddfd8dSJin Yao "MSRValue": "0x0604000122", 6438*e0ddfd8dSJin Yao "Offcore": "1", 6439*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6440*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 6441*e0ddfd8dSJin Yao "UMask": "0x1" 6442*e0ddfd8dSJin Yao }, 6443*e0ddfd8dSJin Yao { 6444*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 6445*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 6446*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 6447*e0ddfd8dSJin Yao "Deprecated": "1", 6448*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 6449*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 6450*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 6451*e0ddfd8dSJin Yao "MSRValue": "0x0084000122", 6452*e0ddfd8dSJin Yao "Offcore": "1", 6453*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6454*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 6455*e0ddfd8dSJin Yao "UMask": "0x1" 6456*e0ddfd8dSJin Yao }, 6457*e0ddfd8dSJin Yao { 6458*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 6459*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 6460*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 6461*e0ddfd8dSJin Yao "Deprecated": "1", 6462*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 6463*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 6464*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 6465*e0ddfd8dSJin Yao "MSRValue": "0x063B800122", 6466*e0ddfd8dSJin Yao "Offcore": "1", 6467*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6468*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 6469*e0ddfd8dSJin Yao "UMask": "0x1" 6470*e0ddfd8dSJin Yao }, 6471*e0ddfd8dSJin Yao { 6472*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 6473*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 6474*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 6475*e0ddfd8dSJin Yao "Deprecated": "1", 6476*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 6477*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 6478*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 6479*e0ddfd8dSJin Yao "MSRValue": "0x3F90000122", 6480*e0ddfd8dSJin Yao "Offcore": "1", 6481*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6482*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 6483*e0ddfd8dSJin Yao "UMask": "0x1" 6484*e0ddfd8dSJin Yao }, 6485*e0ddfd8dSJin Yao { 6486*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 6487*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 6488*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 6489*e0ddfd8dSJin Yao "Deprecated": "1", 6490*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 6491*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 6492*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 6493*e0ddfd8dSJin Yao "MSRValue": "0x1010000122", 6494*e0ddfd8dSJin Yao "Offcore": "1", 6495*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6496*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 6497*e0ddfd8dSJin Yao "UMask": "0x1" 6498*e0ddfd8dSJin Yao }, 6499*e0ddfd8dSJin Yao { 6500*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 6501*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 6502*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 6503*e0ddfd8dSJin Yao "Deprecated": "1", 6504*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 6505*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 6506*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 6507*e0ddfd8dSJin Yao "MSRValue": "0x0810000122", 6508*e0ddfd8dSJin Yao "Offcore": "1", 6509*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6510*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 6511*e0ddfd8dSJin Yao "UMask": "0x1" 6512*e0ddfd8dSJin Yao }, 6513*e0ddfd8dSJin Yao { 6514*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 6515*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 6516*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 6517*e0ddfd8dSJin Yao "Deprecated": "1", 6518*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 6519*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 6520*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 6521*e0ddfd8dSJin Yao "MSRValue": "0x0410000122", 6522*e0ddfd8dSJin Yao "Offcore": "1", 6523*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6524*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 6525*e0ddfd8dSJin Yao "UMask": "0x1" 6526*e0ddfd8dSJin Yao }, 6527*e0ddfd8dSJin Yao { 6528*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 6529*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 6530*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 6531*e0ddfd8dSJin Yao "Deprecated": "1", 6532*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 6533*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 6534*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 6535*e0ddfd8dSJin Yao "MSRValue": "0x0110000122", 6536*e0ddfd8dSJin Yao "Offcore": "1", 6537*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6538*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 6539*e0ddfd8dSJin Yao "UMask": "0x1" 6540*e0ddfd8dSJin Yao }, 6541*e0ddfd8dSJin Yao { 6542*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 6543*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 6544*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 6545*e0ddfd8dSJin Yao "Deprecated": "1", 6546*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 6547*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 6548*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 6549*e0ddfd8dSJin Yao "MSRValue": "0x0210000122", 6550*e0ddfd8dSJin Yao "Offcore": "1", 6551*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6552*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 6553*e0ddfd8dSJin Yao "UMask": "0x1" 6554*e0ddfd8dSJin Yao }, 6555*e0ddfd8dSJin Yao { 6556*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 6557*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 6558*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 6559*e0ddfd8dSJin Yao "Deprecated": "1", 6560*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 6561*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 6562*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 6563*e0ddfd8dSJin Yao "MSRValue": "0x0090000122", 6564*e0ddfd8dSJin Yao "Offcore": "1", 6565*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6566*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 6567*e0ddfd8dSJin Yao "UMask": "0x1" 6568*e0ddfd8dSJin Yao }, 6569*e0ddfd8dSJin Yao { 6570*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS.ANY_SNOOP", 6571*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 6572*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 6573*e0ddfd8dSJin Yao "Deprecated": "1", 6574*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 6575*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS.ANY_SNOOP", 6576*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 6577*e0ddfd8dSJin Yao "MSRValue": "0x3FBC000004", 6578*e0ddfd8dSJin Yao "Offcore": "1", 6579*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6580*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 6581*e0ddfd8dSJin Yao "UMask": "0x1" 6582*e0ddfd8dSJin Yao }, 6583*e0ddfd8dSJin Yao { 6584*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS.HITM_OTHER_CORE", 6585*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 6586*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 6587*e0ddfd8dSJin Yao "Deprecated": "1", 6588*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 6589*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS.HITM_OTHER_CORE", 6590*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 6591*e0ddfd8dSJin Yao "MSRValue": "0x103C000004", 6592*e0ddfd8dSJin Yao "Offcore": "1", 6593*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6594*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 6595*e0ddfd8dSJin Yao "UMask": "0x1" 6596*e0ddfd8dSJin Yao }, 6597*e0ddfd8dSJin Yao { 6598*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS.HIT_OTHER_CORE_FWD", 6599*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 6600*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 6601*e0ddfd8dSJin Yao "Deprecated": "1", 6602*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 6603*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS.HIT_OTHER_CORE_FWD", 6604*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 6605*e0ddfd8dSJin Yao "MSRValue": "0x083C000004", 6606*e0ddfd8dSJin Yao "Offcore": "1", 6607*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6608*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 6609*e0ddfd8dSJin Yao "UMask": "0x1" 6610*e0ddfd8dSJin Yao }, 6611*e0ddfd8dSJin Yao { 6612*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD", 6613*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 6614*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 6615*e0ddfd8dSJin Yao "Deprecated": "1", 6616*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 6617*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD", 6618*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 6619*e0ddfd8dSJin Yao "MSRValue": "0x043C000004", 6620*e0ddfd8dSJin Yao "Offcore": "1", 6621*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6622*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 6623*e0ddfd8dSJin Yao "UMask": "0x1" 6624*e0ddfd8dSJin Yao }, 6625*e0ddfd8dSJin Yao { 6626*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS.NO_SNOOP_NEEDED", 6627*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 6628*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 6629*e0ddfd8dSJin Yao "Deprecated": "1", 6630*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 6631*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS.NO_SNOOP_NEEDED", 6632*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 6633*e0ddfd8dSJin Yao "MSRValue": "0x013C000004", 6634*e0ddfd8dSJin Yao "Offcore": "1", 6635*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6636*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 6637*e0ddfd8dSJin Yao "UMask": "0x1" 6638*e0ddfd8dSJin Yao }, 6639*e0ddfd8dSJin Yao { 6640*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS.REMOTE_HITM", 6641*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 6642*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 6643*e0ddfd8dSJin Yao "Deprecated": "1", 6644*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 6645*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS.REMOTE_HITM", 6646*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 6647*e0ddfd8dSJin Yao "MSRValue": "0x103FC00004", 66487fcf1b89SHaiyan Song "Offcore": "1", 66497fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 66507fcf1b89SHaiyan Song "SampleAfterValue": "100003", 66517fcf1b89SHaiyan Song "UMask": "0x1" 66527fcf1b89SHaiyan Song }, 66537fcf1b89SHaiyan Song { 66547fcf1b89SHaiyan Song "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS.REMOTE_HIT_FORWARD", 66557fcf1b89SHaiyan Song "Counter": "0,1,2,3", 66567fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 66577fcf1b89SHaiyan Song "Deprecated": "1", 66587fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 66597fcf1b89SHaiyan Song "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS.REMOTE_HIT_FORWARD", 66607fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 66617fcf1b89SHaiyan Song "MSRValue": "0x083FC00004", 66627fcf1b89SHaiyan Song "Offcore": "1", 66637fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 66647fcf1b89SHaiyan Song "SampleAfterValue": "100003", 66657fcf1b89SHaiyan Song "UMask": "0x1" 66667fcf1b89SHaiyan Song }, 66677fcf1b89SHaiyan Song { 6668*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS.SNOOP_MISS", 66697fcf1b89SHaiyan Song "Counter": "0,1,2,3", 66707fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 66717fcf1b89SHaiyan Song "Deprecated": "1", 66727fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 6673*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS.SNOOP_MISS", 66747fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 6675*e0ddfd8dSJin Yao "MSRValue": "0x023C000004", 66767fcf1b89SHaiyan Song "Offcore": "1", 66777fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 66787fcf1b89SHaiyan Song "SampleAfterValue": "100003", 66797fcf1b89SHaiyan Song "UMask": "0x1" 66807fcf1b89SHaiyan Song }, 66817fcf1b89SHaiyan Song { 6682*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS.SNOOP_NONE", 66837fcf1b89SHaiyan Song "Counter": "0,1,2,3", 66847fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 66857fcf1b89SHaiyan Song "Deprecated": "1", 66867fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 6687*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS.SNOOP_NONE", 66887fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 6689*e0ddfd8dSJin Yao "MSRValue": "0x00BC000004", 66907fcf1b89SHaiyan Song "Offcore": "1", 66917fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 66927fcf1b89SHaiyan Song "SampleAfterValue": "100003", 66937fcf1b89SHaiyan Song "UMask": "0x1" 66947fcf1b89SHaiyan Song }, 66957fcf1b89SHaiyan Song { 6696*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 66977fcf1b89SHaiyan Song "Counter": "0,1,2,3", 66987fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 6699*e0ddfd8dSJin Yao "Deprecated": "1", 67007fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 6701*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 67027fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 6703*e0ddfd8dSJin Yao "MSRValue": "0x3F84000004", 67047fcf1b89SHaiyan Song "Offcore": "1", 67057fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 67067fcf1b89SHaiyan Song "SampleAfterValue": "100003", 67077fcf1b89SHaiyan Song "UMask": "0x1" 67087fcf1b89SHaiyan Song }, 67097fcf1b89SHaiyan Song { 6710*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 67117fcf1b89SHaiyan Song "Counter": "0,1,2,3", 67127fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 6713*e0ddfd8dSJin Yao "Deprecated": "1", 67147fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 6715*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 6716*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 6717*e0ddfd8dSJin Yao "MSRValue": "0x1004000004", 6718*e0ddfd8dSJin Yao "Offcore": "1", 6719*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6720*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 6721*e0ddfd8dSJin Yao "UMask": "0x1" 6722*e0ddfd8dSJin Yao }, 6723*e0ddfd8dSJin Yao { 6724*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 6725*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 6726*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 6727*e0ddfd8dSJin Yao "Deprecated": "1", 6728*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 6729*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 6730*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 6731*e0ddfd8dSJin Yao "MSRValue": "0x0804000004", 6732*e0ddfd8dSJin Yao "Offcore": "1", 6733*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6734*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 6735*e0ddfd8dSJin Yao "UMask": "0x1" 6736*e0ddfd8dSJin Yao }, 6737*e0ddfd8dSJin Yao { 6738*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 6739*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 6740*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 6741*e0ddfd8dSJin Yao "Deprecated": "1", 6742*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 6743*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 6744*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 6745*e0ddfd8dSJin Yao "MSRValue": "0x0404000004", 6746*e0ddfd8dSJin Yao "Offcore": "1", 6747*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6748*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 6749*e0ddfd8dSJin Yao "UMask": "0x1" 6750*e0ddfd8dSJin Yao }, 6751*e0ddfd8dSJin Yao { 6752*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 6753*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 6754*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 6755*e0ddfd8dSJin Yao "Deprecated": "1", 6756*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 6757*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 6758*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 6759*e0ddfd8dSJin Yao "MSRValue": "0x0104000004", 6760*e0ddfd8dSJin Yao "Offcore": "1", 6761*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6762*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 6763*e0ddfd8dSJin Yao "UMask": "0x1" 6764*e0ddfd8dSJin Yao }, 6765*e0ddfd8dSJin Yao { 6766*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 6767*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 6768*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 6769*e0ddfd8dSJin Yao "Deprecated": "1", 6770*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 6771*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 6772*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 6773*e0ddfd8dSJin Yao "MSRValue": "0x0204000004", 6774*e0ddfd8dSJin Yao "Offcore": "1", 6775*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6776*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 6777*e0ddfd8dSJin Yao "UMask": "0x1" 6778*e0ddfd8dSJin Yao }, 6779*e0ddfd8dSJin Yao { 6780*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 6781*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 6782*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 6783*e0ddfd8dSJin Yao "Deprecated": "1", 6784*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 6785*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 6786*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 6787*e0ddfd8dSJin Yao "MSRValue": "0x0604000004", 6788*e0ddfd8dSJin Yao "Offcore": "1", 6789*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6790*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 6791*e0ddfd8dSJin Yao "UMask": "0x1" 6792*e0ddfd8dSJin Yao }, 6793*e0ddfd8dSJin Yao { 6794*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 6795*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 6796*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 6797*e0ddfd8dSJin Yao "Deprecated": "1", 6798*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 6799*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 6800*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 6801*e0ddfd8dSJin Yao "MSRValue": "0x0084000004", 6802*e0ddfd8dSJin Yao "Offcore": "1", 6803*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6804*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 6805*e0ddfd8dSJin Yao "UMask": "0x1" 6806*e0ddfd8dSJin Yao }, 6807*e0ddfd8dSJin Yao { 6808*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 6809*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 6810*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 6811*e0ddfd8dSJin Yao "Deprecated": "1", 6812*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 6813*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 6814*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 6815*e0ddfd8dSJin Yao "MSRValue": "0x063B800004", 6816*e0ddfd8dSJin Yao "Offcore": "1", 6817*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6818*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 6819*e0ddfd8dSJin Yao "UMask": "0x1" 6820*e0ddfd8dSJin Yao }, 6821*e0ddfd8dSJin Yao { 6822*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 6823*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 6824*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 6825*e0ddfd8dSJin Yao "Deprecated": "1", 6826*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 6827*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 6828*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 6829*e0ddfd8dSJin Yao "MSRValue": "0x3F90000004", 6830*e0ddfd8dSJin Yao "Offcore": "1", 6831*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6832*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 6833*e0ddfd8dSJin Yao "UMask": "0x1" 6834*e0ddfd8dSJin Yao }, 6835*e0ddfd8dSJin Yao { 6836*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 6837*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 6838*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 6839*e0ddfd8dSJin Yao "Deprecated": "1", 6840*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 6841*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 6842*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 6843*e0ddfd8dSJin Yao "MSRValue": "0x1010000004", 6844*e0ddfd8dSJin Yao "Offcore": "1", 6845*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6846*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 6847*e0ddfd8dSJin Yao "UMask": "0x1" 6848*e0ddfd8dSJin Yao }, 6849*e0ddfd8dSJin Yao { 6850*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 6851*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 6852*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 6853*e0ddfd8dSJin Yao "Deprecated": "1", 6854*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 6855*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 6856*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 6857*e0ddfd8dSJin Yao "MSRValue": "0x0810000004", 6858*e0ddfd8dSJin Yao "Offcore": "1", 6859*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6860*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 6861*e0ddfd8dSJin Yao "UMask": "0x1" 6862*e0ddfd8dSJin Yao }, 6863*e0ddfd8dSJin Yao { 6864*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 6865*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 6866*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 6867*e0ddfd8dSJin Yao "Deprecated": "1", 6868*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 6869*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 6870*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 6871*e0ddfd8dSJin Yao "MSRValue": "0x0410000004", 6872*e0ddfd8dSJin Yao "Offcore": "1", 6873*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6874*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 6875*e0ddfd8dSJin Yao "UMask": "0x1" 6876*e0ddfd8dSJin Yao }, 6877*e0ddfd8dSJin Yao { 6878*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 6879*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 6880*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 6881*e0ddfd8dSJin Yao "Deprecated": "1", 6882*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 6883*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 6884*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 6885*e0ddfd8dSJin Yao "MSRValue": "0x0110000004", 6886*e0ddfd8dSJin Yao "Offcore": "1", 6887*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6888*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 6889*e0ddfd8dSJin Yao "UMask": "0x1" 6890*e0ddfd8dSJin Yao }, 6891*e0ddfd8dSJin Yao { 6892*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 6893*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 6894*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 6895*e0ddfd8dSJin Yao "Deprecated": "1", 6896*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 6897*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 6898*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 6899*e0ddfd8dSJin Yao "MSRValue": "0x0210000004", 6900*e0ddfd8dSJin Yao "Offcore": "1", 6901*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6902*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 6903*e0ddfd8dSJin Yao "UMask": "0x1" 6904*e0ddfd8dSJin Yao }, 6905*e0ddfd8dSJin Yao { 6906*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 6907*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 6908*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 6909*e0ddfd8dSJin Yao "Deprecated": "1", 6910*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 6911*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 6912*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 6913*e0ddfd8dSJin Yao "MSRValue": "0x0090000004", 6914*e0ddfd8dSJin Yao "Offcore": "1", 6915*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6916*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 6917*e0ddfd8dSJin Yao "UMask": "0x1" 6918*e0ddfd8dSJin Yao }, 6919*e0ddfd8dSJin Yao { 6920*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS.ANY_SNOOP", 6921*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 6922*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 6923*e0ddfd8dSJin Yao "Deprecated": "1", 6924*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 6925*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS.ANY_SNOOP", 6926*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 6927*e0ddfd8dSJin Yao "MSRValue": "0x3FBC000001", 6928*e0ddfd8dSJin Yao "Offcore": "1", 6929*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6930*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 6931*e0ddfd8dSJin Yao "UMask": "0x1" 6932*e0ddfd8dSJin Yao }, 6933*e0ddfd8dSJin Yao { 6934*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS.HITM_OTHER_CORE", 6935*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 6936*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 6937*e0ddfd8dSJin Yao "Deprecated": "1", 6938*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 6939*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS.HITM_OTHER_CORE", 6940*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 6941*e0ddfd8dSJin Yao "MSRValue": "0x103C000001", 6942*e0ddfd8dSJin Yao "Offcore": "1", 6943*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6944*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 6945*e0ddfd8dSJin Yao "UMask": "0x1" 6946*e0ddfd8dSJin Yao }, 6947*e0ddfd8dSJin Yao { 6948*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD", 6949*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 6950*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 6951*e0ddfd8dSJin Yao "Deprecated": "1", 6952*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 6953*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD", 6954*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 6955*e0ddfd8dSJin Yao "MSRValue": "0x083C000001", 6956*e0ddfd8dSJin Yao "Offcore": "1", 6957*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6958*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 6959*e0ddfd8dSJin Yao "UMask": "0x1" 6960*e0ddfd8dSJin Yao }, 6961*e0ddfd8dSJin Yao { 6962*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD", 6963*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 6964*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 6965*e0ddfd8dSJin Yao "Deprecated": "1", 6966*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 6967*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD", 6968*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 6969*e0ddfd8dSJin Yao "MSRValue": "0x043C000001", 6970*e0ddfd8dSJin Yao "Offcore": "1", 6971*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6972*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 6973*e0ddfd8dSJin Yao "UMask": "0x1" 6974*e0ddfd8dSJin Yao }, 6975*e0ddfd8dSJin Yao { 6976*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS.NO_SNOOP_NEEDED", 6977*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 6978*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 6979*e0ddfd8dSJin Yao "Deprecated": "1", 6980*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 6981*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS.NO_SNOOP_NEEDED", 6982*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 6983*e0ddfd8dSJin Yao "MSRValue": "0x013C000001", 6984*e0ddfd8dSJin Yao "Offcore": "1", 6985*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6986*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 6987*e0ddfd8dSJin Yao "UMask": "0x1" 6988*e0ddfd8dSJin Yao }, 6989*e0ddfd8dSJin Yao { 6990*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS.REMOTE_HITM", 6991*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 6992*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 6993*e0ddfd8dSJin Yao "Deprecated": "1", 6994*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 6995*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS.REMOTE_HITM", 6996*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 6997*e0ddfd8dSJin Yao "MSRValue": "0x103FC00001", 6998*e0ddfd8dSJin Yao "Offcore": "1", 6999*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7000*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 7001*e0ddfd8dSJin Yao "UMask": "0x1" 7002*e0ddfd8dSJin Yao }, 7003*e0ddfd8dSJin Yao { 7004*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS.REMOTE_HIT_FORWARD", 7005*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 7006*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 7007*e0ddfd8dSJin Yao "Deprecated": "1", 7008*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 7009*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS.REMOTE_HIT_FORWARD", 7010*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 7011*e0ddfd8dSJin Yao "MSRValue": "0x083FC00001", 7012*e0ddfd8dSJin Yao "Offcore": "1", 7013*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7014*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 7015*e0ddfd8dSJin Yao "UMask": "0x1" 7016*e0ddfd8dSJin Yao }, 7017*e0ddfd8dSJin Yao { 7018*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS.SNOOP_MISS", 7019*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 7020*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 7021*e0ddfd8dSJin Yao "Deprecated": "1", 7022*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 7023*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS.SNOOP_MISS", 7024*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 7025*e0ddfd8dSJin Yao "MSRValue": "0x023C000001", 7026*e0ddfd8dSJin Yao "Offcore": "1", 7027*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7028*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 7029*e0ddfd8dSJin Yao "UMask": "0x1" 7030*e0ddfd8dSJin Yao }, 7031*e0ddfd8dSJin Yao { 7032*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS.SNOOP_NONE", 7033*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 7034*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 7035*e0ddfd8dSJin Yao "Deprecated": "1", 7036*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 7037*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS.SNOOP_NONE", 7038*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 7039*e0ddfd8dSJin Yao "MSRValue": "0x00BC000001", 7040*e0ddfd8dSJin Yao "Offcore": "1", 7041*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7042*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 7043*e0ddfd8dSJin Yao "UMask": "0x1" 7044*e0ddfd8dSJin Yao }, 7045*e0ddfd8dSJin Yao { 7046*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 7047*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 7048*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 7049*e0ddfd8dSJin Yao "Deprecated": "1", 7050*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 7051*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 7052*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 7053*e0ddfd8dSJin Yao "MSRValue": "0x3F84000001", 7054*e0ddfd8dSJin Yao "Offcore": "1", 7055*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7056*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 7057*e0ddfd8dSJin Yao "UMask": "0x1" 7058*e0ddfd8dSJin Yao }, 7059*e0ddfd8dSJin Yao { 7060*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 7061*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 7062*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 7063*e0ddfd8dSJin Yao "Deprecated": "1", 7064*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 7065*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 7066*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 7067*e0ddfd8dSJin Yao "MSRValue": "0x1004000001", 7068*e0ddfd8dSJin Yao "Offcore": "1", 7069*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7070*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 7071*e0ddfd8dSJin Yao "UMask": "0x1" 7072*e0ddfd8dSJin Yao }, 7073*e0ddfd8dSJin Yao { 7074*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 7075*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 7076*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 7077*e0ddfd8dSJin Yao "Deprecated": "1", 7078*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 7079*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 7080*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 7081*e0ddfd8dSJin Yao "MSRValue": "0x0804000001", 7082*e0ddfd8dSJin Yao "Offcore": "1", 7083*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7084*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 7085*e0ddfd8dSJin Yao "UMask": "0x1" 7086*e0ddfd8dSJin Yao }, 7087*e0ddfd8dSJin Yao { 7088*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 7089*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 7090*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 7091*e0ddfd8dSJin Yao "Deprecated": "1", 7092*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 7093*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 7094*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 7095*e0ddfd8dSJin Yao "MSRValue": "0x0404000001", 7096*e0ddfd8dSJin Yao "Offcore": "1", 7097*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7098*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 7099*e0ddfd8dSJin Yao "UMask": "0x1" 7100*e0ddfd8dSJin Yao }, 7101*e0ddfd8dSJin Yao { 7102*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 7103*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 7104*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 7105*e0ddfd8dSJin Yao "Deprecated": "1", 7106*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 7107*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 7108*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 7109*e0ddfd8dSJin Yao "MSRValue": "0x0104000001", 7110*e0ddfd8dSJin Yao "Offcore": "1", 7111*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7112*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 7113*e0ddfd8dSJin Yao "UMask": "0x1" 7114*e0ddfd8dSJin Yao }, 7115*e0ddfd8dSJin Yao { 7116*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 7117*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 7118*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 7119*e0ddfd8dSJin Yao "Deprecated": "1", 7120*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 7121*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 7122*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 7123*e0ddfd8dSJin Yao "MSRValue": "0x0204000001", 7124*e0ddfd8dSJin Yao "Offcore": "1", 7125*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7126*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 7127*e0ddfd8dSJin Yao "UMask": "0x1" 7128*e0ddfd8dSJin Yao }, 7129*e0ddfd8dSJin Yao { 7130*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 7131*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 7132*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 7133*e0ddfd8dSJin Yao "Deprecated": "1", 7134*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 7135*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 7136*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 7137*e0ddfd8dSJin Yao "MSRValue": "0x0604000001", 7138*e0ddfd8dSJin Yao "Offcore": "1", 7139*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7140*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 7141*e0ddfd8dSJin Yao "UMask": "0x1" 7142*e0ddfd8dSJin Yao }, 7143*e0ddfd8dSJin Yao { 7144*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 7145*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 7146*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 7147*e0ddfd8dSJin Yao "Deprecated": "1", 7148*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 7149*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 7150*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 7151*e0ddfd8dSJin Yao "MSRValue": "0x0084000001", 7152*e0ddfd8dSJin Yao "Offcore": "1", 7153*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7154*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 7155*e0ddfd8dSJin Yao "UMask": "0x1" 7156*e0ddfd8dSJin Yao }, 7157*e0ddfd8dSJin Yao { 7158*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 7159*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 7160*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 7161*e0ddfd8dSJin Yao "Deprecated": "1", 7162*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 7163*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 7164*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 7165*e0ddfd8dSJin Yao "MSRValue": "0x063B800001", 7166*e0ddfd8dSJin Yao "Offcore": "1", 7167*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7168*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 7169*e0ddfd8dSJin Yao "UMask": "0x1" 7170*e0ddfd8dSJin Yao }, 7171*e0ddfd8dSJin Yao { 7172*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 7173*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 7174*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 7175*e0ddfd8dSJin Yao "Deprecated": "1", 7176*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 7177*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 7178*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 7179*e0ddfd8dSJin Yao "MSRValue": "0x3F90000001", 7180*e0ddfd8dSJin Yao "Offcore": "1", 7181*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7182*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 7183*e0ddfd8dSJin Yao "UMask": "0x1" 7184*e0ddfd8dSJin Yao }, 7185*e0ddfd8dSJin Yao { 7186*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 7187*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 7188*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 7189*e0ddfd8dSJin Yao "Deprecated": "1", 7190*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 7191*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 7192*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 7193*e0ddfd8dSJin Yao "MSRValue": "0x1010000001", 7194*e0ddfd8dSJin Yao "Offcore": "1", 7195*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7196*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 7197*e0ddfd8dSJin Yao "UMask": "0x1" 7198*e0ddfd8dSJin Yao }, 7199*e0ddfd8dSJin Yao { 7200*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 7201*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 7202*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 7203*e0ddfd8dSJin Yao "Deprecated": "1", 7204*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 7205*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 7206*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 7207*e0ddfd8dSJin Yao "MSRValue": "0x0810000001", 7208*e0ddfd8dSJin Yao "Offcore": "1", 7209*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7210*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 7211*e0ddfd8dSJin Yao "UMask": "0x1" 7212*e0ddfd8dSJin Yao }, 7213*e0ddfd8dSJin Yao { 7214*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 7215*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 7216*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 7217*e0ddfd8dSJin Yao "Deprecated": "1", 7218*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 7219*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 7220*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 7221*e0ddfd8dSJin Yao "MSRValue": "0x0410000001", 7222*e0ddfd8dSJin Yao "Offcore": "1", 7223*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7224*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 7225*e0ddfd8dSJin Yao "UMask": "0x1" 7226*e0ddfd8dSJin Yao }, 7227*e0ddfd8dSJin Yao { 7228*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 7229*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 7230*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 7231*e0ddfd8dSJin Yao "Deprecated": "1", 7232*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 7233*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 7234*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 7235*e0ddfd8dSJin Yao "MSRValue": "0x0110000001", 7236*e0ddfd8dSJin Yao "Offcore": "1", 7237*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7238*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 7239*e0ddfd8dSJin Yao "UMask": "0x1" 7240*e0ddfd8dSJin Yao }, 7241*e0ddfd8dSJin Yao { 7242*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 7243*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 7244*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 7245*e0ddfd8dSJin Yao "Deprecated": "1", 7246*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 7247*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 7248*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 7249*e0ddfd8dSJin Yao "MSRValue": "0x0210000001", 7250*e0ddfd8dSJin Yao "Offcore": "1", 7251*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7252*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 7253*e0ddfd8dSJin Yao "UMask": "0x1" 7254*e0ddfd8dSJin Yao }, 7255*e0ddfd8dSJin Yao { 7256*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 7257*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 7258*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 7259*e0ddfd8dSJin Yao "Deprecated": "1", 7260*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 7261*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 7262*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 7263*e0ddfd8dSJin Yao "MSRValue": "0x0090000001", 7264*e0ddfd8dSJin Yao "Offcore": "1", 7265*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7266*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 7267*e0ddfd8dSJin Yao "UMask": "0x1" 7268*e0ddfd8dSJin Yao }, 7269*e0ddfd8dSJin Yao { 7270*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS.ANY_SNOOP", 7271*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 7272*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 7273*e0ddfd8dSJin Yao "Deprecated": "1", 7274*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 7275*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS.ANY_SNOOP", 7276*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 7277*e0ddfd8dSJin Yao "MSRValue": "0x3FBC000002", 7278*e0ddfd8dSJin Yao "Offcore": "1", 7279*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7280*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 7281*e0ddfd8dSJin Yao "UMask": "0x1" 7282*e0ddfd8dSJin Yao }, 7283*e0ddfd8dSJin Yao { 7284*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS.HITM_OTHER_CORE", 7285*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 7286*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 7287*e0ddfd8dSJin Yao "Deprecated": "1", 7288*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 7289*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS.HITM_OTHER_CORE", 7290*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 7291*e0ddfd8dSJin Yao "MSRValue": "0x103C000002", 7292*e0ddfd8dSJin Yao "Offcore": "1", 7293*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7294*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 7295*e0ddfd8dSJin Yao "UMask": "0x1" 7296*e0ddfd8dSJin Yao }, 7297*e0ddfd8dSJin Yao { 7298*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS.HIT_OTHER_CORE_FWD", 7299*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 7300*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 7301*e0ddfd8dSJin Yao "Deprecated": "1", 7302*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 7303*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS.HIT_OTHER_CORE_FWD", 7304*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 7305*e0ddfd8dSJin Yao "MSRValue": "0x083C000002", 7306*e0ddfd8dSJin Yao "Offcore": "1", 7307*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7308*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 7309*e0ddfd8dSJin Yao "UMask": "0x1" 7310*e0ddfd8dSJin Yao }, 7311*e0ddfd8dSJin Yao { 7312*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD", 7313*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 7314*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 7315*e0ddfd8dSJin Yao "Deprecated": "1", 7316*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 7317*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD", 7318*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 7319*e0ddfd8dSJin Yao "MSRValue": "0x043C000002", 7320*e0ddfd8dSJin Yao "Offcore": "1", 7321*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7322*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 7323*e0ddfd8dSJin Yao "UMask": "0x1" 7324*e0ddfd8dSJin Yao }, 7325*e0ddfd8dSJin Yao { 7326*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS.NO_SNOOP_NEEDED", 7327*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 7328*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 7329*e0ddfd8dSJin Yao "Deprecated": "1", 7330*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 7331*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS.NO_SNOOP_NEEDED", 7332*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 7333*e0ddfd8dSJin Yao "MSRValue": "0x013C000002", 7334*e0ddfd8dSJin Yao "Offcore": "1", 7335*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7336*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 7337*e0ddfd8dSJin Yao "UMask": "0x1" 7338*e0ddfd8dSJin Yao }, 7339*e0ddfd8dSJin Yao { 7340*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS.REMOTE_HITM", 7341*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 7342*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 7343*e0ddfd8dSJin Yao "Deprecated": "1", 7344*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 7345*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS.REMOTE_HITM", 7346*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 7347*e0ddfd8dSJin Yao "MSRValue": "0x103FC00002", 7348*e0ddfd8dSJin Yao "Offcore": "1", 7349*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7350*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 7351*e0ddfd8dSJin Yao "UMask": "0x1" 7352*e0ddfd8dSJin Yao }, 7353*e0ddfd8dSJin Yao { 7354*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS.REMOTE_HIT_FORWARD", 7355*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 7356*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 7357*e0ddfd8dSJin Yao "Deprecated": "1", 7358*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 7359*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS.REMOTE_HIT_FORWARD", 7360*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 7361*e0ddfd8dSJin Yao "MSRValue": "0x083FC00002", 7362*e0ddfd8dSJin Yao "Offcore": "1", 7363*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7364*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 7365*e0ddfd8dSJin Yao "UMask": "0x1" 7366*e0ddfd8dSJin Yao }, 7367*e0ddfd8dSJin Yao { 7368*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS.SNOOP_MISS", 7369*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 7370*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 7371*e0ddfd8dSJin Yao "Deprecated": "1", 7372*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 7373*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS.SNOOP_MISS", 7374*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 7375*e0ddfd8dSJin Yao "MSRValue": "0x023C000002", 7376*e0ddfd8dSJin Yao "Offcore": "1", 7377*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7378*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 7379*e0ddfd8dSJin Yao "UMask": "0x1" 7380*e0ddfd8dSJin Yao }, 7381*e0ddfd8dSJin Yao { 7382*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS.SNOOP_NONE", 7383*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 7384*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 7385*e0ddfd8dSJin Yao "Deprecated": "1", 7386*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 7387*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS.SNOOP_NONE", 7388*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 7389*e0ddfd8dSJin Yao "MSRValue": "0x00BC000002", 7390*e0ddfd8dSJin Yao "Offcore": "1", 7391*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7392*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 7393*e0ddfd8dSJin Yao "UMask": "0x1" 7394*e0ddfd8dSJin Yao }, 7395*e0ddfd8dSJin Yao { 7396*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 7397*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 7398*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 7399*e0ddfd8dSJin Yao "Deprecated": "1", 7400*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 7401*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 7402*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 7403*e0ddfd8dSJin Yao "MSRValue": "0x3F84000002", 7404*e0ddfd8dSJin Yao "Offcore": "1", 7405*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7406*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 7407*e0ddfd8dSJin Yao "UMask": "0x1" 7408*e0ddfd8dSJin Yao }, 7409*e0ddfd8dSJin Yao { 7410*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 7411*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 7412*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 7413*e0ddfd8dSJin Yao "Deprecated": "1", 7414*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 7415*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 7416*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 7417*e0ddfd8dSJin Yao "MSRValue": "0x1004000002", 7418*e0ddfd8dSJin Yao "Offcore": "1", 7419*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7420*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 7421*e0ddfd8dSJin Yao "UMask": "0x1" 7422*e0ddfd8dSJin Yao }, 7423*e0ddfd8dSJin Yao { 7424*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 7425*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 7426*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 7427*e0ddfd8dSJin Yao "Deprecated": "1", 7428*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 7429*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 7430*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 7431*e0ddfd8dSJin Yao "MSRValue": "0x0804000002", 7432*e0ddfd8dSJin Yao "Offcore": "1", 7433*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7434*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 7435*e0ddfd8dSJin Yao "UMask": "0x1" 7436*e0ddfd8dSJin Yao }, 7437*e0ddfd8dSJin Yao { 7438*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 7439*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 7440*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 7441*e0ddfd8dSJin Yao "Deprecated": "1", 7442*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 7443*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 7444*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 7445*e0ddfd8dSJin Yao "MSRValue": "0x0404000002", 7446*e0ddfd8dSJin Yao "Offcore": "1", 7447*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7448*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 7449*e0ddfd8dSJin Yao "UMask": "0x1" 7450*e0ddfd8dSJin Yao }, 7451*e0ddfd8dSJin Yao { 7452*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 7453*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 7454*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 7455*e0ddfd8dSJin Yao "Deprecated": "1", 7456*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 7457*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 7458*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 7459*e0ddfd8dSJin Yao "MSRValue": "0x0104000002", 7460*e0ddfd8dSJin Yao "Offcore": "1", 7461*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7462*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 7463*e0ddfd8dSJin Yao "UMask": "0x1" 7464*e0ddfd8dSJin Yao }, 7465*e0ddfd8dSJin Yao { 7466*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 7467*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 7468*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 7469*e0ddfd8dSJin Yao "Deprecated": "1", 7470*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 7471*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 7472*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 7473*e0ddfd8dSJin Yao "MSRValue": "0x0204000002", 7474*e0ddfd8dSJin Yao "Offcore": "1", 7475*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7476*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 7477*e0ddfd8dSJin Yao "UMask": "0x1" 7478*e0ddfd8dSJin Yao }, 7479*e0ddfd8dSJin Yao { 7480*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 7481*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 7482*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 7483*e0ddfd8dSJin Yao "Deprecated": "1", 7484*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 7485*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 7486*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 7487*e0ddfd8dSJin Yao "MSRValue": "0x0604000002", 7488*e0ddfd8dSJin Yao "Offcore": "1", 7489*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7490*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 7491*e0ddfd8dSJin Yao "UMask": "0x1" 7492*e0ddfd8dSJin Yao }, 7493*e0ddfd8dSJin Yao { 7494*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 7495*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 7496*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 7497*e0ddfd8dSJin Yao "Deprecated": "1", 7498*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 7499*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 7500*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 7501*e0ddfd8dSJin Yao "MSRValue": "0x0084000002", 7502*e0ddfd8dSJin Yao "Offcore": "1", 7503*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7504*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 7505*e0ddfd8dSJin Yao "UMask": "0x1" 7506*e0ddfd8dSJin Yao }, 7507*e0ddfd8dSJin Yao { 7508*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 7509*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 7510*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 7511*e0ddfd8dSJin Yao "Deprecated": "1", 7512*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 7513*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 7514*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 7515*e0ddfd8dSJin Yao "MSRValue": "0x063B800002", 7516*e0ddfd8dSJin Yao "Offcore": "1", 7517*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7518*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 7519*e0ddfd8dSJin Yao "UMask": "0x1" 7520*e0ddfd8dSJin Yao }, 7521*e0ddfd8dSJin Yao { 7522*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 7523*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 7524*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 7525*e0ddfd8dSJin Yao "Deprecated": "1", 7526*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 7527*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 7528*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 7529*e0ddfd8dSJin Yao "MSRValue": "0x3F90000002", 7530*e0ddfd8dSJin Yao "Offcore": "1", 7531*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7532*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 7533*e0ddfd8dSJin Yao "UMask": "0x1" 7534*e0ddfd8dSJin Yao }, 7535*e0ddfd8dSJin Yao { 7536*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 7537*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 7538*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 7539*e0ddfd8dSJin Yao "Deprecated": "1", 7540*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 7541*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 7542*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 7543*e0ddfd8dSJin Yao "MSRValue": "0x1010000002", 7544*e0ddfd8dSJin Yao "Offcore": "1", 7545*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7546*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 7547*e0ddfd8dSJin Yao "UMask": "0x1" 7548*e0ddfd8dSJin Yao }, 7549*e0ddfd8dSJin Yao { 7550*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 7551*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 7552*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 7553*e0ddfd8dSJin Yao "Deprecated": "1", 7554*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 7555*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 7556*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 7557*e0ddfd8dSJin Yao "MSRValue": "0x0810000002", 7558*e0ddfd8dSJin Yao "Offcore": "1", 7559*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7560*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 7561*e0ddfd8dSJin Yao "UMask": "0x1" 7562*e0ddfd8dSJin Yao }, 7563*e0ddfd8dSJin Yao { 7564*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 7565*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 7566*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 7567*e0ddfd8dSJin Yao "Deprecated": "1", 7568*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 7569*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 7570*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 7571*e0ddfd8dSJin Yao "MSRValue": "0x0410000002", 7572*e0ddfd8dSJin Yao "Offcore": "1", 7573*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7574*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 7575*e0ddfd8dSJin Yao "UMask": "0x1" 7576*e0ddfd8dSJin Yao }, 7577*e0ddfd8dSJin Yao { 7578*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 7579*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 7580*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 7581*e0ddfd8dSJin Yao "Deprecated": "1", 7582*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 7583*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 7584*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 7585*e0ddfd8dSJin Yao "MSRValue": "0x0110000002", 7586*e0ddfd8dSJin Yao "Offcore": "1", 7587*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7588*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 7589*e0ddfd8dSJin Yao "UMask": "0x1" 7590*e0ddfd8dSJin Yao }, 7591*e0ddfd8dSJin Yao { 7592*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 7593*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 7594*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 7595*e0ddfd8dSJin Yao "Deprecated": "1", 7596*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 7597*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 7598*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 7599*e0ddfd8dSJin Yao "MSRValue": "0x0210000002", 7600*e0ddfd8dSJin Yao "Offcore": "1", 7601*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7602*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 7603*e0ddfd8dSJin Yao "UMask": "0x1" 7604*e0ddfd8dSJin Yao }, 7605*e0ddfd8dSJin Yao { 7606*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 7607*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 7608*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 7609*e0ddfd8dSJin Yao "Deprecated": "1", 7610*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 7611*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 7612*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 7613*e0ddfd8dSJin Yao "MSRValue": "0x0090000002", 7614*e0ddfd8dSJin Yao "Offcore": "1", 7615*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7616*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 7617*e0ddfd8dSJin Yao "UMask": "0x1" 7618*e0ddfd8dSJin Yao }, 7619*e0ddfd8dSJin Yao { 7620*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS.ANY_SNOOP", 7621*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 7622*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 7623*e0ddfd8dSJin Yao "Deprecated": "1", 7624*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 7625*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS.ANY_SNOOP", 7626*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 7627*e0ddfd8dSJin Yao "MSRValue": "0x3FBC008000", 7628*e0ddfd8dSJin Yao "Offcore": "1", 7629*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7630*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 7631*e0ddfd8dSJin Yao "UMask": "0x1" 7632*e0ddfd8dSJin Yao }, 7633*e0ddfd8dSJin Yao { 7634*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS.HITM_OTHER_CORE", 7635*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 7636*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 7637*e0ddfd8dSJin Yao "Deprecated": "1", 7638*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 7639*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS.HITM_OTHER_CORE", 7640*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 7641*e0ddfd8dSJin Yao "MSRValue": "0x103C008000", 7642*e0ddfd8dSJin Yao "Offcore": "1", 7643*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7644*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 7645*e0ddfd8dSJin Yao "UMask": "0x1" 7646*e0ddfd8dSJin Yao }, 7647*e0ddfd8dSJin Yao { 7648*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS.HIT_OTHER_CORE_FWD", 7649*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 7650*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 7651*e0ddfd8dSJin Yao "Deprecated": "1", 7652*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 7653*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS.HIT_OTHER_CORE_FWD", 76547fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 76557fcf1b89SHaiyan Song "MSRValue": "0x083C008000", 76567fcf1b89SHaiyan Song "Offcore": "1", 76577fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 76587fcf1b89SHaiyan Song "SampleAfterValue": "100003", 76597fcf1b89SHaiyan Song "UMask": "0x1" 76607fcf1b89SHaiyan Song }, 76617fcf1b89SHaiyan Song { 7662*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS.HIT_OTHER_CORE_NO_FWD", 7663*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 7664*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 7665*e0ddfd8dSJin Yao "Deprecated": "1", 7666*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 7667*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS.HIT_OTHER_CORE_NO_FWD", 7668*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 7669*e0ddfd8dSJin Yao "MSRValue": "0x043C008000", 7670*e0ddfd8dSJin Yao "Offcore": "1", 7671*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7672*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 7673*e0ddfd8dSJin Yao "UMask": "0x1" 7674*e0ddfd8dSJin Yao }, 7675*e0ddfd8dSJin Yao { 7676*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS.NO_SNOOP_NEEDED", 7677*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 7678*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 7679*e0ddfd8dSJin Yao "Deprecated": "1", 7680*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 7681*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS.NO_SNOOP_NEEDED", 7682*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 7683*e0ddfd8dSJin Yao "MSRValue": "0x013C008000", 7684*e0ddfd8dSJin Yao "Offcore": "1", 7685*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7686*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 7687*e0ddfd8dSJin Yao "UMask": "0x1" 7688*e0ddfd8dSJin Yao }, 7689*e0ddfd8dSJin Yao { 7690*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS.REMOTE_HITM", 7691*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 7692*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 7693*e0ddfd8dSJin Yao "Deprecated": "1", 7694*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 7695*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS.REMOTE_HITM", 7696*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 7697*e0ddfd8dSJin Yao "MSRValue": "0x103FC08000", 7698*e0ddfd8dSJin Yao "Offcore": "1", 7699*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7700*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 7701*e0ddfd8dSJin Yao "UMask": "0x1" 7702*e0ddfd8dSJin Yao }, 7703*e0ddfd8dSJin Yao { 7704*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS.REMOTE_HIT_FORWARD", 7705*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 7706*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 7707*e0ddfd8dSJin Yao "Deprecated": "1", 7708*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 7709*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS.REMOTE_HIT_FORWARD", 7710*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 7711*e0ddfd8dSJin Yao "MSRValue": "0x083FC08000", 7712*e0ddfd8dSJin Yao "Offcore": "1", 7713*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7714*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 7715*e0ddfd8dSJin Yao "UMask": "0x1" 7716*e0ddfd8dSJin Yao }, 7717*e0ddfd8dSJin Yao { 7718*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS.SNOOP_MISS", 7719*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 7720*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 7721*e0ddfd8dSJin Yao "Deprecated": "1", 7722*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 7723*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS.SNOOP_MISS", 7724*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 7725*e0ddfd8dSJin Yao "MSRValue": "0x023C008000", 7726*e0ddfd8dSJin Yao "Offcore": "1", 7727*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7728*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 7729*e0ddfd8dSJin Yao "UMask": "0x1" 7730*e0ddfd8dSJin Yao }, 7731*e0ddfd8dSJin Yao { 7732*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS.SNOOP_NONE", 7733*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 7734*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 7735*e0ddfd8dSJin Yao "Deprecated": "1", 7736*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 7737*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS.SNOOP_NONE", 7738*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 7739*e0ddfd8dSJin Yao "MSRValue": "0x00BC008000", 7740*e0ddfd8dSJin Yao "Offcore": "1", 7741*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7742*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 7743*e0ddfd8dSJin Yao "UMask": "0x1" 7744*e0ddfd8dSJin Yao }, 7745*e0ddfd8dSJin Yao { 7746*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 7747*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 7748*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 7749*e0ddfd8dSJin Yao "Deprecated": "1", 7750*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 7751*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 7752*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 7753*e0ddfd8dSJin Yao "MSRValue": "0x3F84008000", 7754*e0ddfd8dSJin Yao "Offcore": "1", 7755*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7756*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 7757*e0ddfd8dSJin Yao "UMask": "0x1" 7758*e0ddfd8dSJin Yao }, 7759*e0ddfd8dSJin Yao { 7760*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 7761*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 7762*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 7763*e0ddfd8dSJin Yao "Deprecated": "1", 7764*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 7765*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 7766*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 7767*e0ddfd8dSJin Yao "MSRValue": "0x1004008000", 7768*e0ddfd8dSJin Yao "Offcore": "1", 7769*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7770*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 7771*e0ddfd8dSJin Yao "UMask": "0x1" 7772*e0ddfd8dSJin Yao }, 7773*e0ddfd8dSJin Yao { 7774*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 7775*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 7776*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 7777*e0ddfd8dSJin Yao "Deprecated": "1", 7778*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 7779*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 7780*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 7781*e0ddfd8dSJin Yao "MSRValue": "0x0804008000", 7782*e0ddfd8dSJin Yao "Offcore": "1", 7783*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7784*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 7785*e0ddfd8dSJin Yao "UMask": "0x1" 7786*e0ddfd8dSJin Yao }, 7787*e0ddfd8dSJin Yao { 7788*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 7789*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 7790*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 7791*e0ddfd8dSJin Yao "Deprecated": "1", 7792*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 7793*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 7794*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 7795*e0ddfd8dSJin Yao "MSRValue": "0x0404008000", 7796*e0ddfd8dSJin Yao "Offcore": "1", 7797*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7798*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 7799*e0ddfd8dSJin Yao "UMask": "0x1" 7800*e0ddfd8dSJin Yao }, 7801*e0ddfd8dSJin Yao { 7802*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 7803*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 7804*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 7805*e0ddfd8dSJin Yao "Deprecated": "1", 7806*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 7807*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 7808*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 7809*e0ddfd8dSJin Yao "MSRValue": "0x0104008000", 7810*e0ddfd8dSJin Yao "Offcore": "1", 7811*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7812*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 7813*e0ddfd8dSJin Yao "UMask": "0x1" 7814*e0ddfd8dSJin Yao }, 7815*e0ddfd8dSJin Yao { 7816*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 7817*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 7818*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 7819*e0ddfd8dSJin Yao "Deprecated": "1", 7820*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 7821*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 7822*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 7823*e0ddfd8dSJin Yao "MSRValue": "0x0204008000", 7824*e0ddfd8dSJin Yao "Offcore": "1", 7825*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7826*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 7827*e0ddfd8dSJin Yao "UMask": "0x1" 7828*e0ddfd8dSJin Yao }, 7829*e0ddfd8dSJin Yao { 7830*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 7831*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 7832*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 7833*e0ddfd8dSJin Yao "Deprecated": "1", 7834*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 7835*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 7836*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 7837*e0ddfd8dSJin Yao "MSRValue": "0x0604008000", 7838*e0ddfd8dSJin Yao "Offcore": "1", 7839*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7840*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 7841*e0ddfd8dSJin Yao "UMask": "0x1" 7842*e0ddfd8dSJin Yao }, 7843*e0ddfd8dSJin Yao { 7844*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 7845*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 7846*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 7847*e0ddfd8dSJin Yao "Deprecated": "1", 7848*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 7849*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 7850*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 7851*e0ddfd8dSJin Yao "MSRValue": "0x0084008000", 7852*e0ddfd8dSJin Yao "Offcore": "1", 7853*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7854*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 7855*e0ddfd8dSJin Yao "UMask": "0x1" 7856*e0ddfd8dSJin Yao }, 7857*e0ddfd8dSJin Yao { 7858*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 7859*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 7860*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 7861*e0ddfd8dSJin Yao "Deprecated": "1", 7862*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 7863*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 7864*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 7865*e0ddfd8dSJin Yao "MSRValue": "0x063B808000", 7866*e0ddfd8dSJin Yao "Offcore": "1", 7867*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7868*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 7869*e0ddfd8dSJin Yao "UMask": "0x1" 7870*e0ddfd8dSJin Yao }, 7871*e0ddfd8dSJin Yao { 7872*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 7873*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 7874*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 7875*e0ddfd8dSJin Yao "Deprecated": "1", 7876*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 7877*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 7878*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 7879*e0ddfd8dSJin Yao "MSRValue": "0x3F90008000", 7880*e0ddfd8dSJin Yao "Offcore": "1", 7881*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7882*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 7883*e0ddfd8dSJin Yao "UMask": "0x1" 7884*e0ddfd8dSJin Yao }, 7885*e0ddfd8dSJin Yao { 7886*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 7887*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 7888*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 7889*e0ddfd8dSJin Yao "Deprecated": "1", 7890*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 7891*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 7892*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 7893*e0ddfd8dSJin Yao "MSRValue": "0x1010008000", 7894*e0ddfd8dSJin Yao "Offcore": "1", 7895*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7896*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 7897*e0ddfd8dSJin Yao "UMask": "0x1" 7898*e0ddfd8dSJin Yao }, 7899*e0ddfd8dSJin Yao { 79007fcf1b89SHaiyan Song "BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 79017fcf1b89SHaiyan Song "Counter": "0,1,2,3", 79027fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 79037fcf1b89SHaiyan Song "Deprecated": "1", 79047fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 79057fcf1b89SHaiyan Song "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 79067fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 79077fcf1b89SHaiyan Song "MSRValue": "0x0810008000", 79087fcf1b89SHaiyan Song "Offcore": "1", 79097fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 79107fcf1b89SHaiyan Song "SampleAfterValue": "100003", 79117fcf1b89SHaiyan Song "UMask": "0x1" 79127fcf1b89SHaiyan Song }, 79137fcf1b89SHaiyan Song { 7914*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 79157fcf1b89SHaiyan Song "Counter": "0,1,2,3", 79167fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 7917*e0ddfd8dSJin Yao "Deprecated": "1", 79187fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 7919*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 79207fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 7921*e0ddfd8dSJin Yao "MSRValue": "0x0410008000", 7922*e0ddfd8dSJin Yao "Offcore": "1", 7923*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7924*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 7925*e0ddfd8dSJin Yao "UMask": "0x1" 7926*e0ddfd8dSJin Yao }, 7927*e0ddfd8dSJin Yao { 7928*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 7929*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 7930*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 7931*e0ddfd8dSJin Yao "Deprecated": "1", 7932*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 7933*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 7934*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 7935*e0ddfd8dSJin Yao "MSRValue": "0x0110008000", 7936*e0ddfd8dSJin Yao "Offcore": "1", 7937*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7938*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 7939*e0ddfd8dSJin Yao "UMask": "0x1" 7940*e0ddfd8dSJin Yao }, 7941*e0ddfd8dSJin Yao { 7942*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 7943*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 7944*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 7945*e0ddfd8dSJin Yao "Deprecated": "1", 7946*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 7947*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 7948*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 7949*e0ddfd8dSJin Yao "MSRValue": "0x0210008000", 7950*e0ddfd8dSJin Yao "Offcore": "1", 7951*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7952*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 7953*e0ddfd8dSJin Yao "UMask": "0x1" 7954*e0ddfd8dSJin Yao }, 7955*e0ddfd8dSJin Yao { 7956*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 7957*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 7958*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 7959*e0ddfd8dSJin Yao "Deprecated": "1", 7960*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 7961*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 7962*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 7963*e0ddfd8dSJin Yao "MSRValue": "0x0090008000", 7964*e0ddfd8dSJin Yao "Offcore": "1", 7965*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7966*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 7967*e0ddfd8dSJin Yao "UMask": "0x1" 7968*e0ddfd8dSJin Yao }, 7969*e0ddfd8dSJin Yao { 7970*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS.ANY_SNOOP", 7971*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 7972*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 7973*e0ddfd8dSJin Yao "Deprecated": "1", 7974*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 7975*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS.ANY_SNOOP", 7976*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 7977*e0ddfd8dSJin Yao "MSRValue": "0x3FBC000400", 7978*e0ddfd8dSJin Yao "Offcore": "1", 7979*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7980*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 7981*e0ddfd8dSJin Yao "UMask": "0x1" 7982*e0ddfd8dSJin Yao }, 7983*e0ddfd8dSJin Yao { 7984*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS.HITM_OTHER_CORE", 7985*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 7986*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 7987*e0ddfd8dSJin Yao "Deprecated": "1", 7988*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 7989*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS.HITM_OTHER_CORE", 7990*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 7991*e0ddfd8dSJin Yao "MSRValue": "0x103C000400", 7992*e0ddfd8dSJin Yao "Offcore": "1", 7993*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7994*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 7995*e0ddfd8dSJin Yao "UMask": "0x1" 7996*e0ddfd8dSJin Yao }, 7997*e0ddfd8dSJin Yao { 7998*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS.HIT_OTHER_CORE_FWD", 7999*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 8000*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 8001*e0ddfd8dSJin Yao "Deprecated": "1", 8002*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 8003*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS.HIT_OTHER_CORE_FWD", 8004*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 8005*e0ddfd8dSJin Yao "MSRValue": "0x083C000400", 8006*e0ddfd8dSJin Yao "Offcore": "1", 8007*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8008*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 8009*e0ddfd8dSJin Yao "UMask": "0x1" 8010*e0ddfd8dSJin Yao }, 8011*e0ddfd8dSJin Yao { 8012*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS.HIT_OTHER_CORE_NO_FWD", 8013*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 8014*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 8015*e0ddfd8dSJin Yao "Deprecated": "1", 8016*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 8017*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS.HIT_OTHER_CORE_NO_FWD", 8018*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 8019*e0ddfd8dSJin Yao "MSRValue": "0x043C000400", 8020*e0ddfd8dSJin Yao "Offcore": "1", 8021*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8022*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 8023*e0ddfd8dSJin Yao "UMask": "0x1" 8024*e0ddfd8dSJin Yao }, 8025*e0ddfd8dSJin Yao { 8026*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS.NO_SNOOP_NEEDED", 8027*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 8028*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 8029*e0ddfd8dSJin Yao "Deprecated": "1", 8030*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 8031*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS.NO_SNOOP_NEEDED", 8032*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 8033*e0ddfd8dSJin Yao "MSRValue": "0x013C000400", 8034*e0ddfd8dSJin Yao "Offcore": "1", 8035*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8036*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 8037*e0ddfd8dSJin Yao "UMask": "0x1" 8038*e0ddfd8dSJin Yao }, 8039*e0ddfd8dSJin Yao { 8040*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS.REMOTE_HITM", 8041*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 8042*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 8043*e0ddfd8dSJin Yao "Deprecated": "1", 8044*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 8045*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS.REMOTE_HITM", 8046*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 8047*e0ddfd8dSJin Yao "MSRValue": "0x103FC00400", 8048*e0ddfd8dSJin Yao "Offcore": "1", 8049*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8050*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 8051*e0ddfd8dSJin Yao "UMask": "0x1" 8052*e0ddfd8dSJin Yao }, 8053*e0ddfd8dSJin Yao { 8054*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS.REMOTE_HIT_FORWARD", 8055*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 8056*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 8057*e0ddfd8dSJin Yao "Deprecated": "1", 8058*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 8059*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS.REMOTE_HIT_FORWARD", 8060*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 8061*e0ddfd8dSJin Yao "MSRValue": "0x083FC00400", 8062*e0ddfd8dSJin Yao "Offcore": "1", 8063*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8064*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 8065*e0ddfd8dSJin Yao "UMask": "0x1" 8066*e0ddfd8dSJin Yao }, 8067*e0ddfd8dSJin Yao { 8068*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS.SNOOP_MISS", 8069*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 8070*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 8071*e0ddfd8dSJin Yao "Deprecated": "1", 8072*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 8073*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS.SNOOP_MISS", 8074*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 8075*e0ddfd8dSJin Yao "MSRValue": "0x023C000400", 8076*e0ddfd8dSJin Yao "Offcore": "1", 8077*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8078*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 8079*e0ddfd8dSJin Yao "UMask": "0x1" 8080*e0ddfd8dSJin Yao }, 8081*e0ddfd8dSJin Yao { 8082*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS.SNOOP_NONE", 8083*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 8084*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 8085*e0ddfd8dSJin Yao "Deprecated": "1", 8086*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 8087*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS.SNOOP_NONE", 8088*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 8089*e0ddfd8dSJin Yao "MSRValue": "0x00BC000400", 8090*e0ddfd8dSJin Yao "Offcore": "1", 8091*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8092*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 8093*e0ddfd8dSJin Yao "UMask": "0x1" 8094*e0ddfd8dSJin Yao }, 8095*e0ddfd8dSJin Yao { 8096*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 8097*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 8098*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 8099*e0ddfd8dSJin Yao "Deprecated": "1", 8100*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 8101*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 8102*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 8103*e0ddfd8dSJin Yao "MSRValue": "0x3F84000400", 8104*e0ddfd8dSJin Yao "Offcore": "1", 8105*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8106*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 8107*e0ddfd8dSJin Yao "UMask": "0x1" 8108*e0ddfd8dSJin Yao }, 8109*e0ddfd8dSJin Yao { 8110*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 8111*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 8112*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 8113*e0ddfd8dSJin Yao "Deprecated": "1", 8114*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 8115*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 8116*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 8117*e0ddfd8dSJin Yao "MSRValue": "0x1004000400", 8118*e0ddfd8dSJin Yao "Offcore": "1", 8119*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8120*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 8121*e0ddfd8dSJin Yao "UMask": "0x1" 8122*e0ddfd8dSJin Yao }, 8123*e0ddfd8dSJin Yao { 8124*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 8125*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 8126*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 8127*e0ddfd8dSJin Yao "Deprecated": "1", 8128*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 8129*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 8130*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 8131*e0ddfd8dSJin Yao "MSRValue": "0x0804000400", 8132*e0ddfd8dSJin Yao "Offcore": "1", 8133*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8134*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 8135*e0ddfd8dSJin Yao "UMask": "0x1" 8136*e0ddfd8dSJin Yao }, 8137*e0ddfd8dSJin Yao { 8138*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 8139*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 8140*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 8141*e0ddfd8dSJin Yao "Deprecated": "1", 8142*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 8143*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 8144*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 8145*e0ddfd8dSJin Yao "MSRValue": "0x0404000400", 8146*e0ddfd8dSJin Yao "Offcore": "1", 8147*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8148*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 8149*e0ddfd8dSJin Yao "UMask": "0x1" 8150*e0ddfd8dSJin Yao }, 8151*e0ddfd8dSJin Yao { 8152*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 8153*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 8154*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 8155*e0ddfd8dSJin Yao "Deprecated": "1", 8156*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 8157*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 8158*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 8159*e0ddfd8dSJin Yao "MSRValue": "0x0104000400", 8160*e0ddfd8dSJin Yao "Offcore": "1", 8161*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8162*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 8163*e0ddfd8dSJin Yao "UMask": "0x1" 8164*e0ddfd8dSJin Yao }, 8165*e0ddfd8dSJin Yao { 8166*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 8167*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 8168*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 8169*e0ddfd8dSJin Yao "Deprecated": "1", 8170*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 8171*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 8172*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 8173*e0ddfd8dSJin Yao "MSRValue": "0x0204000400", 8174*e0ddfd8dSJin Yao "Offcore": "1", 8175*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8176*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 8177*e0ddfd8dSJin Yao "UMask": "0x1" 8178*e0ddfd8dSJin Yao }, 8179*e0ddfd8dSJin Yao { 8180*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 8181*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 8182*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 8183*e0ddfd8dSJin Yao "Deprecated": "1", 8184*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 8185*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 8186*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 8187*e0ddfd8dSJin Yao "MSRValue": "0x0604000400", 8188*e0ddfd8dSJin Yao "Offcore": "1", 8189*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8190*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 8191*e0ddfd8dSJin Yao "UMask": "0x1" 8192*e0ddfd8dSJin Yao }, 8193*e0ddfd8dSJin Yao { 8194*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 8195*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 8196*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 8197*e0ddfd8dSJin Yao "Deprecated": "1", 8198*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 8199*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 8200*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 8201*e0ddfd8dSJin Yao "MSRValue": "0x0084000400", 8202*e0ddfd8dSJin Yao "Offcore": "1", 8203*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8204*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 8205*e0ddfd8dSJin Yao "UMask": "0x1" 8206*e0ddfd8dSJin Yao }, 8207*e0ddfd8dSJin Yao { 8208*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 8209*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 8210*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 8211*e0ddfd8dSJin Yao "Deprecated": "1", 8212*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 8213*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 8214*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 8215*e0ddfd8dSJin Yao "MSRValue": "0x063B800400", 8216*e0ddfd8dSJin Yao "Offcore": "1", 8217*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8218*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 8219*e0ddfd8dSJin Yao "UMask": "0x1" 8220*e0ddfd8dSJin Yao }, 8221*e0ddfd8dSJin Yao { 8222*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 8223*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 8224*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 8225*e0ddfd8dSJin Yao "Deprecated": "1", 8226*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 8227*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 8228*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 8229*e0ddfd8dSJin Yao "MSRValue": "0x3F90000400", 8230*e0ddfd8dSJin Yao "Offcore": "1", 8231*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8232*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 8233*e0ddfd8dSJin Yao "UMask": "0x1" 8234*e0ddfd8dSJin Yao }, 8235*e0ddfd8dSJin Yao { 8236*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 8237*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 8238*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 8239*e0ddfd8dSJin Yao "Deprecated": "1", 8240*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 8241*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 8242*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 8243*e0ddfd8dSJin Yao "MSRValue": "0x1010000400", 8244*e0ddfd8dSJin Yao "Offcore": "1", 8245*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8246*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 8247*e0ddfd8dSJin Yao "UMask": "0x1" 8248*e0ddfd8dSJin Yao }, 8249*e0ddfd8dSJin Yao { 8250*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 8251*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 8252*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 8253*e0ddfd8dSJin Yao "Deprecated": "1", 8254*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 8255*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 8256*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 8257*e0ddfd8dSJin Yao "MSRValue": "0x0810000400", 8258*e0ddfd8dSJin Yao "Offcore": "1", 8259*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8260*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 8261*e0ddfd8dSJin Yao "UMask": "0x1" 8262*e0ddfd8dSJin Yao }, 8263*e0ddfd8dSJin Yao { 8264*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 8265*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 8266*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 8267*e0ddfd8dSJin Yao "Deprecated": "1", 8268*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 8269*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 8270*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 8271*e0ddfd8dSJin Yao "MSRValue": "0x0410000400", 8272*e0ddfd8dSJin Yao "Offcore": "1", 8273*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8274*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 8275*e0ddfd8dSJin Yao "UMask": "0x1" 8276*e0ddfd8dSJin Yao }, 8277*e0ddfd8dSJin Yao { 8278*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 8279*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 8280*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 8281*e0ddfd8dSJin Yao "Deprecated": "1", 8282*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 8283*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 8284*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 8285*e0ddfd8dSJin Yao "MSRValue": "0x0110000400", 8286*e0ddfd8dSJin Yao "Offcore": "1", 8287*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8288*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 8289*e0ddfd8dSJin Yao "UMask": "0x1" 8290*e0ddfd8dSJin Yao }, 8291*e0ddfd8dSJin Yao { 8292*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 8293*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 8294*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 8295*e0ddfd8dSJin Yao "Deprecated": "1", 8296*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 8297*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 8298*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 8299*e0ddfd8dSJin Yao "MSRValue": "0x0210000400", 8300*e0ddfd8dSJin Yao "Offcore": "1", 8301*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8302*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 8303*e0ddfd8dSJin Yao "UMask": "0x1" 8304*e0ddfd8dSJin Yao }, 8305*e0ddfd8dSJin Yao { 8306*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 8307*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 8308*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 8309*e0ddfd8dSJin Yao "Deprecated": "1", 8310*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 8311*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 8312*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 8313*e0ddfd8dSJin Yao "MSRValue": "0x0090000400", 8314*e0ddfd8dSJin Yao "Offcore": "1", 8315*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8316*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 8317*e0ddfd8dSJin Yao "UMask": "0x1" 8318*e0ddfd8dSJin Yao }, 8319*e0ddfd8dSJin Yao { 8320*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS.ANY_SNOOP", 8321*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 8322*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 8323*e0ddfd8dSJin Yao "Deprecated": "1", 8324*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 8325*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS.ANY_SNOOP", 8326*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 8327*e0ddfd8dSJin Yao "MSRValue": "0x3FBC000010", 8328*e0ddfd8dSJin Yao "Offcore": "1", 8329*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8330*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 8331*e0ddfd8dSJin Yao "UMask": "0x1" 8332*e0ddfd8dSJin Yao }, 8333*e0ddfd8dSJin Yao { 8334*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS.HITM_OTHER_CORE", 8335*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 8336*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 8337*e0ddfd8dSJin Yao "Deprecated": "1", 8338*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 8339*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS.HITM_OTHER_CORE", 8340*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 8341*e0ddfd8dSJin Yao "MSRValue": "0x103C000010", 8342*e0ddfd8dSJin Yao "Offcore": "1", 8343*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8344*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 8345*e0ddfd8dSJin Yao "UMask": "0x1" 8346*e0ddfd8dSJin Yao }, 8347*e0ddfd8dSJin Yao { 8348*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD", 8349*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 8350*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 8351*e0ddfd8dSJin Yao "Deprecated": "1", 8352*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 8353*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD", 8354*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 8355*e0ddfd8dSJin Yao "MSRValue": "0x083C000010", 8356*e0ddfd8dSJin Yao "Offcore": "1", 8357*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8358*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 8359*e0ddfd8dSJin Yao "UMask": "0x1" 8360*e0ddfd8dSJin Yao }, 8361*e0ddfd8dSJin Yao { 8362*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD", 8363*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 8364*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 8365*e0ddfd8dSJin Yao "Deprecated": "1", 8366*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 8367*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD", 8368*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 8369*e0ddfd8dSJin Yao "MSRValue": "0x043C000010", 8370*e0ddfd8dSJin Yao "Offcore": "1", 8371*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8372*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 8373*e0ddfd8dSJin Yao "UMask": "0x1" 8374*e0ddfd8dSJin Yao }, 8375*e0ddfd8dSJin Yao { 8376*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS.NO_SNOOP_NEEDED", 8377*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 8378*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 8379*e0ddfd8dSJin Yao "Deprecated": "1", 8380*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 8381*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS.NO_SNOOP_NEEDED", 8382*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 8383*e0ddfd8dSJin Yao "MSRValue": "0x013C000010", 8384*e0ddfd8dSJin Yao "Offcore": "1", 8385*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8386*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 8387*e0ddfd8dSJin Yao "UMask": "0x1" 8388*e0ddfd8dSJin Yao }, 8389*e0ddfd8dSJin Yao { 8390*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS.REMOTE_HITM", 8391*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 8392*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 8393*e0ddfd8dSJin Yao "Deprecated": "1", 8394*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 8395*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS.REMOTE_HITM", 8396*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 8397*e0ddfd8dSJin Yao "MSRValue": "0x103FC00010", 8398*e0ddfd8dSJin Yao "Offcore": "1", 8399*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8400*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 8401*e0ddfd8dSJin Yao "UMask": "0x1" 8402*e0ddfd8dSJin Yao }, 8403*e0ddfd8dSJin Yao { 8404*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS.REMOTE_HIT_FORWARD", 8405*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 8406*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 8407*e0ddfd8dSJin Yao "Deprecated": "1", 8408*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 8409*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS.REMOTE_HIT_FORWARD", 8410*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 8411*e0ddfd8dSJin Yao "MSRValue": "0x083FC00010", 8412*e0ddfd8dSJin Yao "Offcore": "1", 8413*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8414*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 8415*e0ddfd8dSJin Yao "UMask": "0x1" 8416*e0ddfd8dSJin Yao }, 8417*e0ddfd8dSJin Yao { 8418*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS.SNOOP_MISS", 8419*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 8420*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 8421*e0ddfd8dSJin Yao "Deprecated": "1", 8422*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 8423*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS.SNOOP_MISS", 8424*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 8425*e0ddfd8dSJin Yao "MSRValue": "0x023C000010", 8426*e0ddfd8dSJin Yao "Offcore": "1", 8427*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8428*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 8429*e0ddfd8dSJin Yao "UMask": "0x1" 8430*e0ddfd8dSJin Yao }, 8431*e0ddfd8dSJin Yao { 8432*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS.SNOOP_NONE", 8433*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 8434*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 8435*e0ddfd8dSJin Yao "Deprecated": "1", 8436*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 8437*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS.SNOOP_NONE", 8438*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 8439*e0ddfd8dSJin Yao "MSRValue": "0x00BC000010", 8440*e0ddfd8dSJin Yao "Offcore": "1", 8441*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8442*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 8443*e0ddfd8dSJin Yao "UMask": "0x1" 8444*e0ddfd8dSJin Yao }, 8445*e0ddfd8dSJin Yao { 8446*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 8447*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 8448*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 8449*e0ddfd8dSJin Yao "Deprecated": "1", 8450*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 8451*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 8452*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 8453*e0ddfd8dSJin Yao "MSRValue": "0x3F84000010", 8454*e0ddfd8dSJin Yao "Offcore": "1", 8455*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8456*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 8457*e0ddfd8dSJin Yao "UMask": "0x1" 8458*e0ddfd8dSJin Yao }, 8459*e0ddfd8dSJin Yao { 8460*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 8461*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 8462*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 8463*e0ddfd8dSJin Yao "Deprecated": "1", 8464*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 8465*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 8466*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 8467*e0ddfd8dSJin Yao "MSRValue": "0x1004000010", 8468*e0ddfd8dSJin Yao "Offcore": "1", 8469*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8470*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 8471*e0ddfd8dSJin Yao "UMask": "0x1" 8472*e0ddfd8dSJin Yao }, 8473*e0ddfd8dSJin Yao { 8474*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 8475*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 8476*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 8477*e0ddfd8dSJin Yao "Deprecated": "1", 8478*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 8479*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 8480*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 8481*e0ddfd8dSJin Yao "MSRValue": "0x0804000010", 8482*e0ddfd8dSJin Yao "Offcore": "1", 8483*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8484*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 8485*e0ddfd8dSJin Yao "UMask": "0x1" 8486*e0ddfd8dSJin Yao }, 8487*e0ddfd8dSJin Yao { 8488*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 8489*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 8490*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 8491*e0ddfd8dSJin Yao "Deprecated": "1", 8492*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 8493*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 8494*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 8495*e0ddfd8dSJin Yao "MSRValue": "0x0404000010", 8496*e0ddfd8dSJin Yao "Offcore": "1", 8497*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8498*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 8499*e0ddfd8dSJin Yao "UMask": "0x1" 8500*e0ddfd8dSJin Yao }, 8501*e0ddfd8dSJin Yao { 8502*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 8503*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 8504*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 8505*e0ddfd8dSJin Yao "Deprecated": "1", 8506*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 8507*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 8508*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 8509*e0ddfd8dSJin Yao "MSRValue": "0x0104000010", 85107fcf1b89SHaiyan Song "Offcore": "1", 85117fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 85127fcf1b89SHaiyan Song "SampleAfterValue": "100003", 85137fcf1b89SHaiyan Song "UMask": "0x1" 85147fcf1b89SHaiyan Song }, 85157fcf1b89SHaiyan Song { 85167fcf1b89SHaiyan Song "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 85177fcf1b89SHaiyan Song "Counter": "0,1,2,3", 85187fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 85197fcf1b89SHaiyan Song "Deprecated": "1", 85207fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 85217fcf1b89SHaiyan Song "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 85227fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 85237fcf1b89SHaiyan Song "MSRValue": "0x0204000010", 85247fcf1b89SHaiyan Song "Offcore": "1", 85257fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 85267fcf1b89SHaiyan Song "SampleAfterValue": "100003", 85277fcf1b89SHaiyan Song "UMask": "0x1" 85287fcf1b89SHaiyan Song }, 85297fcf1b89SHaiyan Song { 8530*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 85317fcf1b89SHaiyan Song "Counter": "0,1,2,3", 85327fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 8533*e0ddfd8dSJin Yao "Deprecated": "1", 85347fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 8535*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 85367fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 8537*e0ddfd8dSJin Yao "MSRValue": "0x0604000010", 85387fcf1b89SHaiyan Song "Offcore": "1", 85397fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 85407fcf1b89SHaiyan Song "SampleAfterValue": "100003", 85417fcf1b89SHaiyan Song "UMask": "0x1" 85427fcf1b89SHaiyan Song }, 85437fcf1b89SHaiyan Song { 8544*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 85457fcf1b89SHaiyan Song "Counter": "0,1,2,3", 85467fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 8547*e0ddfd8dSJin Yao "Deprecated": "1", 8548*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 8549*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 8550*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 8551*e0ddfd8dSJin Yao "MSRValue": "0x0084000010", 8552*e0ddfd8dSJin Yao "Offcore": "1", 8553*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 85547fcf1b89SHaiyan Song "SampleAfterValue": "100003", 8555*e0ddfd8dSJin Yao "UMask": "0x1" 8556*e0ddfd8dSJin Yao }, 8557*e0ddfd8dSJin Yao { 8558*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 8559*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 8560*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 8561*e0ddfd8dSJin Yao "Deprecated": "1", 8562*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 8563*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 8564*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 8565*e0ddfd8dSJin Yao "MSRValue": "0x063B800010", 8566*e0ddfd8dSJin Yao "Offcore": "1", 8567*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8568*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 8569*e0ddfd8dSJin Yao "UMask": "0x1" 8570*e0ddfd8dSJin Yao }, 8571*e0ddfd8dSJin Yao { 8572*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 8573*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 8574*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 8575*e0ddfd8dSJin Yao "Deprecated": "1", 8576*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 8577*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 8578*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 8579*e0ddfd8dSJin Yao "MSRValue": "0x3F90000010", 8580*e0ddfd8dSJin Yao "Offcore": "1", 8581*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8582*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 8583*e0ddfd8dSJin Yao "UMask": "0x1" 8584*e0ddfd8dSJin Yao }, 8585*e0ddfd8dSJin Yao { 8586*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 8587*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 8588*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 8589*e0ddfd8dSJin Yao "Deprecated": "1", 8590*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 8591*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 8592*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 8593*e0ddfd8dSJin Yao "MSRValue": "0x1010000010", 8594*e0ddfd8dSJin Yao "Offcore": "1", 8595*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8596*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 8597*e0ddfd8dSJin Yao "UMask": "0x1" 8598*e0ddfd8dSJin Yao }, 8599*e0ddfd8dSJin Yao { 8600*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 8601*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 8602*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 8603*e0ddfd8dSJin Yao "Deprecated": "1", 8604*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 8605*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 8606*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 8607*e0ddfd8dSJin Yao "MSRValue": "0x0810000010", 8608*e0ddfd8dSJin Yao "Offcore": "1", 8609*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8610*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 8611*e0ddfd8dSJin Yao "UMask": "0x1" 8612*e0ddfd8dSJin Yao }, 8613*e0ddfd8dSJin Yao { 8614*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 8615*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 8616*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 8617*e0ddfd8dSJin Yao "Deprecated": "1", 8618*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 8619*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 8620*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 8621*e0ddfd8dSJin Yao "MSRValue": "0x0410000010", 8622*e0ddfd8dSJin Yao "Offcore": "1", 8623*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8624*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 8625*e0ddfd8dSJin Yao "UMask": "0x1" 8626*e0ddfd8dSJin Yao }, 8627*e0ddfd8dSJin Yao { 8628*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 8629*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 8630*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 8631*e0ddfd8dSJin Yao "Deprecated": "1", 8632*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 8633*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 8634*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 8635*e0ddfd8dSJin Yao "MSRValue": "0x0110000010", 8636*e0ddfd8dSJin Yao "Offcore": "1", 8637*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8638*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 8639*e0ddfd8dSJin Yao "UMask": "0x1" 8640*e0ddfd8dSJin Yao }, 8641*e0ddfd8dSJin Yao { 8642*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 8643*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 8644*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 8645*e0ddfd8dSJin Yao "Deprecated": "1", 8646*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 8647*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 8648*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 8649*e0ddfd8dSJin Yao "MSRValue": "0x0210000010", 8650*e0ddfd8dSJin Yao "Offcore": "1", 8651*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8652*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 8653*e0ddfd8dSJin Yao "UMask": "0x1" 8654*e0ddfd8dSJin Yao }, 8655*e0ddfd8dSJin Yao { 8656*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 8657*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 8658*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 8659*e0ddfd8dSJin Yao "Deprecated": "1", 8660*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 8661*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 8662*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 8663*e0ddfd8dSJin Yao "MSRValue": "0x0090000010", 8664*e0ddfd8dSJin Yao "Offcore": "1", 8665*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8666*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 8667*e0ddfd8dSJin Yao "UMask": "0x1" 8668*e0ddfd8dSJin Yao }, 8669*e0ddfd8dSJin Yao { 8670*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS.ANY_SNOOP", 8671*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 8672*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 8673*e0ddfd8dSJin Yao "Deprecated": "1", 8674*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 8675*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS.ANY_SNOOP", 8676*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 8677*e0ddfd8dSJin Yao "MSRValue": "0x3FBC000020", 8678*e0ddfd8dSJin Yao "Offcore": "1", 8679*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8680*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 8681*e0ddfd8dSJin Yao "UMask": "0x1" 8682*e0ddfd8dSJin Yao }, 8683*e0ddfd8dSJin Yao { 8684*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS.HITM_OTHER_CORE", 8685*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 8686*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 8687*e0ddfd8dSJin Yao "Deprecated": "1", 8688*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 8689*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS.HITM_OTHER_CORE", 8690*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 8691*e0ddfd8dSJin Yao "MSRValue": "0x103C000020", 8692*e0ddfd8dSJin Yao "Offcore": "1", 8693*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8694*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 8695*e0ddfd8dSJin Yao "UMask": "0x1" 8696*e0ddfd8dSJin Yao }, 8697*e0ddfd8dSJin Yao { 8698*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS.HIT_OTHER_CORE_FWD", 8699*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 8700*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 8701*e0ddfd8dSJin Yao "Deprecated": "1", 8702*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 8703*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS.HIT_OTHER_CORE_FWD", 8704*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 8705*e0ddfd8dSJin Yao "MSRValue": "0x083C000020", 8706*e0ddfd8dSJin Yao "Offcore": "1", 8707*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8708*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 8709*e0ddfd8dSJin Yao "UMask": "0x1" 8710*e0ddfd8dSJin Yao }, 8711*e0ddfd8dSJin Yao { 8712*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD", 8713*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 8714*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 8715*e0ddfd8dSJin Yao "Deprecated": "1", 8716*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 8717*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD", 8718*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 8719*e0ddfd8dSJin Yao "MSRValue": "0x043C000020", 8720*e0ddfd8dSJin Yao "Offcore": "1", 8721*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8722*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 8723*e0ddfd8dSJin Yao "UMask": "0x1" 8724*e0ddfd8dSJin Yao }, 8725*e0ddfd8dSJin Yao { 8726*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS.NO_SNOOP_NEEDED", 8727*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 8728*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 8729*e0ddfd8dSJin Yao "Deprecated": "1", 8730*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 8731*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS.NO_SNOOP_NEEDED", 8732*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 8733*e0ddfd8dSJin Yao "MSRValue": "0x013C000020", 8734*e0ddfd8dSJin Yao "Offcore": "1", 8735*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8736*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 8737*e0ddfd8dSJin Yao "UMask": "0x1" 8738*e0ddfd8dSJin Yao }, 8739*e0ddfd8dSJin Yao { 8740*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS.REMOTE_HITM", 8741*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 8742*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 8743*e0ddfd8dSJin Yao "Deprecated": "1", 8744*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 8745*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS.REMOTE_HITM", 8746*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 8747*e0ddfd8dSJin Yao "MSRValue": "0x103FC00020", 8748*e0ddfd8dSJin Yao "Offcore": "1", 8749*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8750*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 8751*e0ddfd8dSJin Yao "UMask": "0x1" 8752*e0ddfd8dSJin Yao }, 8753*e0ddfd8dSJin Yao { 8754*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS.REMOTE_HIT_FORWARD", 8755*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 8756*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 8757*e0ddfd8dSJin Yao "Deprecated": "1", 8758*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 8759*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS.REMOTE_HIT_FORWARD", 8760*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 8761*e0ddfd8dSJin Yao "MSRValue": "0x083FC00020", 8762*e0ddfd8dSJin Yao "Offcore": "1", 8763*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8764*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 8765*e0ddfd8dSJin Yao "UMask": "0x1" 8766*e0ddfd8dSJin Yao }, 8767*e0ddfd8dSJin Yao { 8768*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS.SNOOP_MISS", 8769*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 8770*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 8771*e0ddfd8dSJin Yao "Deprecated": "1", 8772*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 8773*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS.SNOOP_MISS", 8774*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 8775*e0ddfd8dSJin Yao "MSRValue": "0x023C000020", 8776*e0ddfd8dSJin Yao "Offcore": "1", 8777*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8778*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 8779*e0ddfd8dSJin Yao "UMask": "0x1" 8780*e0ddfd8dSJin Yao }, 8781*e0ddfd8dSJin Yao { 8782*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS.SNOOP_NONE", 8783*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 8784*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 8785*e0ddfd8dSJin Yao "Deprecated": "1", 8786*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 8787*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS.SNOOP_NONE", 8788*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 8789*e0ddfd8dSJin Yao "MSRValue": "0x00BC000020", 8790*e0ddfd8dSJin Yao "Offcore": "1", 8791*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8792*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 8793*e0ddfd8dSJin Yao "UMask": "0x1" 8794*e0ddfd8dSJin Yao }, 8795*e0ddfd8dSJin Yao { 8796*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 8797*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 8798*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 8799*e0ddfd8dSJin Yao "Deprecated": "1", 8800*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 8801*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 8802*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 8803*e0ddfd8dSJin Yao "MSRValue": "0x3F84000020", 8804*e0ddfd8dSJin Yao "Offcore": "1", 8805*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8806*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 8807*e0ddfd8dSJin Yao "UMask": "0x1" 8808*e0ddfd8dSJin Yao }, 8809*e0ddfd8dSJin Yao { 8810*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 8811*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 8812*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 8813*e0ddfd8dSJin Yao "Deprecated": "1", 8814*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 8815*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 8816*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 8817*e0ddfd8dSJin Yao "MSRValue": "0x1004000020", 8818*e0ddfd8dSJin Yao "Offcore": "1", 8819*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8820*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 8821*e0ddfd8dSJin Yao "UMask": "0x1" 8822*e0ddfd8dSJin Yao }, 8823*e0ddfd8dSJin Yao { 8824*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 8825*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 8826*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 8827*e0ddfd8dSJin Yao "Deprecated": "1", 8828*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 8829*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 8830*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 8831*e0ddfd8dSJin Yao "MSRValue": "0x0804000020", 8832*e0ddfd8dSJin Yao "Offcore": "1", 8833*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8834*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 8835*e0ddfd8dSJin Yao "UMask": "0x1" 8836*e0ddfd8dSJin Yao }, 8837*e0ddfd8dSJin Yao { 8838*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 8839*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 8840*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 8841*e0ddfd8dSJin Yao "Deprecated": "1", 8842*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 8843*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 8844*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 8845*e0ddfd8dSJin Yao "MSRValue": "0x0404000020", 8846*e0ddfd8dSJin Yao "Offcore": "1", 8847*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8848*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 8849*e0ddfd8dSJin Yao "UMask": "0x1" 8850*e0ddfd8dSJin Yao }, 8851*e0ddfd8dSJin Yao { 8852*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 8853*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 8854*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 8855*e0ddfd8dSJin Yao "Deprecated": "1", 8856*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 8857*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 8858*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 8859*e0ddfd8dSJin Yao "MSRValue": "0x0104000020", 8860*e0ddfd8dSJin Yao "Offcore": "1", 8861*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8862*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 8863*e0ddfd8dSJin Yao "UMask": "0x1" 8864*e0ddfd8dSJin Yao }, 8865*e0ddfd8dSJin Yao { 8866*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 8867*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 8868*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 8869*e0ddfd8dSJin Yao "Deprecated": "1", 8870*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 8871*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 8872*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 8873*e0ddfd8dSJin Yao "MSRValue": "0x0204000020", 8874*e0ddfd8dSJin Yao "Offcore": "1", 8875*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8876*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 8877*e0ddfd8dSJin Yao "UMask": "0x1" 8878*e0ddfd8dSJin Yao }, 8879*e0ddfd8dSJin Yao { 8880*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 8881*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 8882*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 8883*e0ddfd8dSJin Yao "Deprecated": "1", 8884*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 8885*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 8886*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 8887*e0ddfd8dSJin Yao "MSRValue": "0x0604000020", 8888*e0ddfd8dSJin Yao "Offcore": "1", 8889*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8890*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 8891*e0ddfd8dSJin Yao "UMask": "0x1" 8892*e0ddfd8dSJin Yao }, 8893*e0ddfd8dSJin Yao { 8894*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 8895*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 8896*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 8897*e0ddfd8dSJin Yao "Deprecated": "1", 8898*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 8899*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 8900*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 8901*e0ddfd8dSJin Yao "MSRValue": "0x0084000020", 8902*e0ddfd8dSJin Yao "Offcore": "1", 8903*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8904*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 8905*e0ddfd8dSJin Yao "UMask": "0x1" 8906*e0ddfd8dSJin Yao }, 8907*e0ddfd8dSJin Yao { 8908*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 8909*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 8910*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 8911*e0ddfd8dSJin Yao "Deprecated": "1", 8912*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 8913*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 8914*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 8915*e0ddfd8dSJin Yao "MSRValue": "0x063B800020", 8916*e0ddfd8dSJin Yao "Offcore": "1", 8917*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8918*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 8919*e0ddfd8dSJin Yao "UMask": "0x1" 8920*e0ddfd8dSJin Yao }, 8921*e0ddfd8dSJin Yao { 8922*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 8923*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 8924*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 8925*e0ddfd8dSJin Yao "Deprecated": "1", 8926*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 8927*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 8928*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 8929*e0ddfd8dSJin Yao "MSRValue": "0x3F90000020", 8930*e0ddfd8dSJin Yao "Offcore": "1", 8931*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8932*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 8933*e0ddfd8dSJin Yao "UMask": "0x1" 8934*e0ddfd8dSJin Yao }, 8935*e0ddfd8dSJin Yao { 8936*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 8937*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 8938*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 8939*e0ddfd8dSJin Yao "Deprecated": "1", 8940*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 8941*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 8942*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 8943*e0ddfd8dSJin Yao "MSRValue": "0x1010000020", 8944*e0ddfd8dSJin Yao "Offcore": "1", 8945*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8946*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 8947*e0ddfd8dSJin Yao "UMask": "0x1" 8948*e0ddfd8dSJin Yao }, 8949*e0ddfd8dSJin Yao { 8950*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 8951*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 8952*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 8953*e0ddfd8dSJin Yao "Deprecated": "1", 8954*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 8955*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 8956*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 8957*e0ddfd8dSJin Yao "MSRValue": "0x0810000020", 8958*e0ddfd8dSJin Yao "Offcore": "1", 8959*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8960*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 8961*e0ddfd8dSJin Yao "UMask": "0x1" 8962*e0ddfd8dSJin Yao }, 8963*e0ddfd8dSJin Yao { 8964*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 8965*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 8966*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 8967*e0ddfd8dSJin Yao "Deprecated": "1", 8968*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 8969*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 8970*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 8971*e0ddfd8dSJin Yao "MSRValue": "0x0410000020", 8972*e0ddfd8dSJin Yao "Offcore": "1", 8973*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8974*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 8975*e0ddfd8dSJin Yao "UMask": "0x1" 8976*e0ddfd8dSJin Yao }, 8977*e0ddfd8dSJin Yao { 8978*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 8979*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 8980*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 8981*e0ddfd8dSJin Yao "Deprecated": "1", 8982*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 8983*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 8984*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 8985*e0ddfd8dSJin Yao "MSRValue": "0x0110000020", 8986*e0ddfd8dSJin Yao "Offcore": "1", 8987*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8988*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 8989*e0ddfd8dSJin Yao "UMask": "0x1" 8990*e0ddfd8dSJin Yao }, 8991*e0ddfd8dSJin Yao { 8992*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 8993*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 8994*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 8995*e0ddfd8dSJin Yao "Deprecated": "1", 8996*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 8997*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 8998*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 8999*e0ddfd8dSJin Yao "MSRValue": "0x0210000020", 9000*e0ddfd8dSJin Yao "Offcore": "1", 9001*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9002*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 9003*e0ddfd8dSJin Yao "UMask": "0x1" 9004*e0ddfd8dSJin Yao }, 9005*e0ddfd8dSJin Yao { 9006*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 9007*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 9008*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 9009*e0ddfd8dSJin Yao "Deprecated": "1", 9010*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 9011*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 9012*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 9013*e0ddfd8dSJin Yao "MSRValue": "0x0090000020", 9014*e0ddfd8dSJin Yao "Offcore": "1", 9015*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9016*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 9017*e0ddfd8dSJin Yao "UMask": "0x1" 9018*e0ddfd8dSJin Yao }, 9019*e0ddfd8dSJin Yao { 9020*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS.ANY_SNOOP", 9021*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 9022*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 9023*e0ddfd8dSJin Yao "Deprecated": "1", 9024*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 9025*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS.ANY_SNOOP", 9026*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 9027*e0ddfd8dSJin Yao "MSRValue": "0x3FBC000080", 9028*e0ddfd8dSJin Yao "Offcore": "1", 9029*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9030*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 9031*e0ddfd8dSJin Yao "UMask": "0x1" 9032*e0ddfd8dSJin Yao }, 9033*e0ddfd8dSJin Yao { 9034*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS.HITM_OTHER_CORE", 9035*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 9036*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 9037*e0ddfd8dSJin Yao "Deprecated": "1", 9038*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 9039*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS.HITM_OTHER_CORE", 9040*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 9041*e0ddfd8dSJin Yao "MSRValue": "0x103C000080", 9042*e0ddfd8dSJin Yao "Offcore": "1", 9043*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9044*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 9045*e0ddfd8dSJin Yao "UMask": "0x1" 9046*e0ddfd8dSJin Yao }, 9047*e0ddfd8dSJin Yao { 9048*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD", 9049*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 9050*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 9051*e0ddfd8dSJin Yao "Deprecated": "1", 9052*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 9053*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD", 9054*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 9055*e0ddfd8dSJin Yao "MSRValue": "0x083C000080", 9056*e0ddfd8dSJin Yao "Offcore": "1", 9057*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9058*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 9059*e0ddfd8dSJin Yao "UMask": "0x1" 9060*e0ddfd8dSJin Yao }, 9061*e0ddfd8dSJin Yao { 9062*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD", 9063*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 9064*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 9065*e0ddfd8dSJin Yao "Deprecated": "1", 9066*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 9067*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD", 9068*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 9069*e0ddfd8dSJin Yao "MSRValue": "0x043C000080", 9070*e0ddfd8dSJin Yao "Offcore": "1", 9071*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9072*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 9073*e0ddfd8dSJin Yao "UMask": "0x1" 9074*e0ddfd8dSJin Yao }, 9075*e0ddfd8dSJin Yao { 9076*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS.NO_SNOOP_NEEDED", 9077*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 9078*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 9079*e0ddfd8dSJin Yao "Deprecated": "1", 9080*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 9081*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS.NO_SNOOP_NEEDED", 9082*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 9083*e0ddfd8dSJin Yao "MSRValue": "0x013C000080", 9084*e0ddfd8dSJin Yao "Offcore": "1", 9085*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9086*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 9087*e0ddfd8dSJin Yao "UMask": "0x1" 9088*e0ddfd8dSJin Yao }, 9089*e0ddfd8dSJin Yao { 9090*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS.REMOTE_HITM", 9091*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 9092*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 9093*e0ddfd8dSJin Yao "Deprecated": "1", 9094*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 9095*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS.REMOTE_HITM", 9096*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 9097*e0ddfd8dSJin Yao "MSRValue": "0x103FC00080", 9098*e0ddfd8dSJin Yao "Offcore": "1", 9099*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9100*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 9101*e0ddfd8dSJin Yao "UMask": "0x1" 9102*e0ddfd8dSJin Yao }, 9103*e0ddfd8dSJin Yao { 9104*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS.REMOTE_HIT_FORWARD", 9105*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 9106*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 9107*e0ddfd8dSJin Yao "Deprecated": "1", 9108*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 9109*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS.REMOTE_HIT_FORWARD", 9110*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 9111*e0ddfd8dSJin Yao "MSRValue": "0x083FC00080", 9112*e0ddfd8dSJin Yao "Offcore": "1", 9113*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9114*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 9115*e0ddfd8dSJin Yao "UMask": "0x1" 9116*e0ddfd8dSJin Yao }, 9117*e0ddfd8dSJin Yao { 9118*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS.SNOOP_MISS", 9119*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 9120*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 9121*e0ddfd8dSJin Yao "Deprecated": "1", 9122*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 9123*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS.SNOOP_MISS", 9124*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 9125*e0ddfd8dSJin Yao "MSRValue": "0x023C000080", 9126*e0ddfd8dSJin Yao "Offcore": "1", 9127*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9128*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 9129*e0ddfd8dSJin Yao "UMask": "0x1" 9130*e0ddfd8dSJin Yao }, 9131*e0ddfd8dSJin Yao { 9132*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS.SNOOP_NONE", 9133*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 9134*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 9135*e0ddfd8dSJin Yao "Deprecated": "1", 9136*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 9137*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS.SNOOP_NONE", 9138*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 9139*e0ddfd8dSJin Yao "MSRValue": "0x00BC000080", 9140*e0ddfd8dSJin Yao "Offcore": "1", 9141*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9142*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 9143*e0ddfd8dSJin Yao "UMask": "0x1" 9144*e0ddfd8dSJin Yao }, 9145*e0ddfd8dSJin Yao { 9146*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 9147*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 9148*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 9149*e0ddfd8dSJin Yao "Deprecated": "1", 9150*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 9151*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 9152*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 9153*e0ddfd8dSJin Yao "MSRValue": "0x3F84000080", 9154*e0ddfd8dSJin Yao "Offcore": "1", 9155*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9156*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 9157*e0ddfd8dSJin Yao "UMask": "0x1" 9158*e0ddfd8dSJin Yao }, 9159*e0ddfd8dSJin Yao { 9160*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 9161*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 9162*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 9163*e0ddfd8dSJin Yao "Deprecated": "1", 9164*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 9165*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 9166*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 9167*e0ddfd8dSJin Yao "MSRValue": "0x1004000080", 9168*e0ddfd8dSJin Yao "Offcore": "1", 9169*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9170*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 9171*e0ddfd8dSJin Yao "UMask": "0x1" 9172*e0ddfd8dSJin Yao }, 9173*e0ddfd8dSJin Yao { 9174*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 9175*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 9176*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 9177*e0ddfd8dSJin Yao "Deprecated": "1", 9178*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 9179*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 9180*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 9181*e0ddfd8dSJin Yao "MSRValue": "0x0804000080", 9182*e0ddfd8dSJin Yao "Offcore": "1", 9183*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9184*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 9185*e0ddfd8dSJin Yao "UMask": "0x1" 9186*e0ddfd8dSJin Yao }, 9187*e0ddfd8dSJin Yao { 9188*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 9189*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 9190*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 9191*e0ddfd8dSJin Yao "Deprecated": "1", 9192*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 9193*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 9194*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 9195*e0ddfd8dSJin Yao "MSRValue": "0x0404000080", 9196*e0ddfd8dSJin Yao "Offcore": "1", 9197*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9198*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 9199*e0ddfd8dSJin Yao "UMask": "0x1" 9200*e0ddfd8dSJin Yao }, 9201*e0ddfd8dSJin Yao { 9202*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 9203*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 9204*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 9205*e0ddfd8dSJin Yao "Deprecated": "1", 9206*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 9207*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 9208*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 9209*e0ddfd8dSJin Yao "MSRValue": "0x0104000080", 9210*e0ddfd8dSJin Yao "Offcore": "1", 9211*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9212*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 9213*e0ddfd8dSJin Yao "UMask": "0x1" 9214*e0ddfd8dSJin Yao }, 9215*e0ddfd8dSJin Yao { 9216*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 9217*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 9218*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 9219*e0ddfd8dSJin Yao "Deprecated": "1", 9220*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 9221*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 9222*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 9223*e0ddfd8dSJin Yao "MSRValue": "0x0204000080", 9224*e0ddfd8dSJin Yao "Offcore": "1", 9225*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9226*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 9227*e0ddfd8dSJin Yao "UMask": "0x1" 9228*e0ddfd8dSJin Yao }, 9229*e0ddfd8dSJin Yao { 9230*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 9231*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 9232*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 9233*e0ddfd8dSJin Yao "Deprecated": "1", 9234*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 9235*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 9236*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 9237*e0ddfd8dSJin Yao "MSRValue": "0x0604000080", 9238*e0ddfd8dSJin Yao "Offcore": "1", 9239*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9240*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 9241*e0ddfd8dSJin Yao "UMask": "0x1" 9242*e0ddfd8dSJin Yao }, 9243*e0ddfd8dSJin Yao { 9244*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 9245*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 9246*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 9247*e0ddfd8dSJin Yao "Deprecated": "1", 9248*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 9249*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 9250*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 9251*e0ddfd8dSJin Yao "MSRValue": "0x0084000080", 9252*e0ddfd8dSJin Yao "Offcore": "1", 9253*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9254*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 9255*e0ddfd8dSJin Yao "UMask": "0x1" 9256*e0ddfd8dSJin Yao }, 9257*e0ddfd8dSJin Yao { 9258*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 9259*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 9260*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 9261*e0ddfd8dSJin Yao "Deprecated": "1", 9262*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 9263*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 9264*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 9265*e0ddfd8dSJin Yao "MSRValue": "0x063B800080", 9266*e0ddfd8dSJin Yao "Offcore": "1", 9267*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9268*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 9269*e0ddfd8dSJin Yao "UMask": "0x1" 9270*e0ddfd8dSJin Yao }, 9271*e0ddfd8dSJin Yao { 9272*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 9273*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 9274*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 9275*e0ddfd8dSJin Yao "Deprecated": "1", 9276*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 9277*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 9278*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 9279*e0ddfd8dSJin Yao "MSRValue": "0x3F90000080", 9280*e0ddfd8dSJin Yao "Offcore": "1", 9281*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9282*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 9283*e0ddfd8dSJin Yao "UMask": "0x1" 9284*e0ddfd8dSJin Yao }, 9285*e0ddfd8dSJin Yao { 9286*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 9287*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 9288*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 9289*e0ddfd8dSJin Yao "Deprecated": "1", 9290*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 9291*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 9292*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 9293*e0ddfd8dSJin Yao "MSRValue": "0x1010000080", 9294*e0ddfd8dSJin Yao "Offcore": "1", 9295*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9296*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 9297*e0ddfd8dSJin Yao "UMask": "0x1" 9298*e0ddfd8dSJin Yao }, 9299*e0ddfd8dSJin Yao { 9300*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 9301*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 9302*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 9303*e0ddfd8dSJin Yao "Deprecated": "1", 9304*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 9305*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 9306*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 9307*e0ddfd8dSJin Yao "MSRValue": "0x0810000080", 9308*e0ddfd8dSJin Yao "Offcore": "1", 9309*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9310*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 9311*e0ddfd8dSJin Yao "UMask": "0x1" 9312*e0ddfd8dSJin Yao }, 9313*e0ddfd8dSJin Yao { 9314*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 9315*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 9316*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 9317*e0ddfd8dSJin Yao "Deprecated": "1", 9318*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 9319*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 9320*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 9321*e0ddfd8dSJin Yao "MSRValue": "0x0410000080", 9322*e0ddfd8dSJin Yao "Offcore": "1", 9323*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9324*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 9325*e0ddfd8dSJin Yao "UMask": "0x1" 9326*e0ddfd8dSJin Yao }, 9327*e0ddfd8dSJin Yao { 9328*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 9329*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 9330*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 9331*e0ddfd8dSJin Yao "Deprecated": "1", 9332*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 9333*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 9334*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 9335*e0ddfd8dSJin Yao "MSRValue": "0x0110000080", 9336*e0ddfd8dSJin Yao "Offcore": "1", 9337*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9338*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 9339*e0ddfd8dSJin Yao "UMask": "0x1" 9340*e0ddfd8dSJin Yao }, 9341*e0ddfd8dSJin Yao { 9342*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 9343*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 9344*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 9345*e0ddfd8dSJin Yao "Deprecated": "1", 9346*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 9347*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 9348*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 9349*e0ddfd8dSJin Yao "MSRValue": "0x0210000080", 9350*e0ddfd8dSJin Yao "Offcore": "1", 9351*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9352*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 9353*e0ddfd8dSJin Yao "UMask": "0x1" 9354*e0ddfd8dSJin Yao }, 9355*e0ddfd8dSJin Yao { 9356*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 9357*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 9358*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 9359*e0ddfd8dSJin Yao "Deprecated": "1", 9360*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 9361*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 9362*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 9363*e0ddfd8dSJin Yao "MSRValue": "0x0090000080", 9364*e0ddfd8dSJin Yao "Offcore": "1", 9365*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9366*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 9367*e0ddfd8dSJin Yao "UMask": "0x1" 9368*e0ddfd8dSJin Yao }, 9369*e0ddfd8dSJin Yao { 9370*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS.ANY_SNOOP", 9371*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 9372*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 9373*e0ddfd8dSJin Yao "Deprecated": "1", 9374*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 9375*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS.ANY_SNOOP", 9376*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 9377*e0ddfd8dSJin Yao "MSRValue": "0x3FBC000100", 9378*e0ddfd8dSJin Yao "Offcore": "1", 9379*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9380*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 9381*e0ddfd8dSJin Yao "UMask": "0x1" 9382*e0ddfd8dSJin Yao }, 9383*e0ddfd8dSJin Yao { 9384*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS.HITM_OTHER_CORE", 9385*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 9386*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 9387*e0ddfd8dSJin Yao "Deprecated": "1", 9388*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 9389*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS.HITM_OTHER_CORE", 9390*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 9391*e0ddfd8dSJin Yao "MSRValue": "0x103C000100", 9392*e0ddfd8dSJin Yao "Offcore": "1", 9393*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9394*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 9395*e0ddfd8dSJin Yao "UMask": "0x1" 9396*e0ddfd8dSJin Yao }, 9397*e0ddfd8dSJin Yao { 9398*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS.HIT_OTHER_CORE_FWD", 9399*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 9400*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 9401*e0ddfd8dSJin Yao "Deprecated": "1", 9402*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 9403*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS.HIT_OTHER_CORE_FWD", 9404*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 9405*e0ddfd8dSJin Yao "MSRValue": "0x083C000100", 9406*e0ddfd8dSJin Yao "Offcore": "1", 9407*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9408*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 9409*e0ddfd8dSJin Yao "UMask": "0x1" 9410*e0ddfd8dSJin Yao }, 9411*e0ddfd8dSJin Yao { 9412*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD", 9413*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 9414*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 9415*e0ddfd8dSJin Yao "Deprecated": "1", 9416*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 9417*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD", 9418*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 9419*e0ddfd8dSJin Yao "MSRValue": "0x043C000100", 9420*e0ddfd8dSJin Yao "Offcore": "1", 9421*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9422*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 9423*e0ddfd8dSJin Yao "UMask": "0x1" 9424*e0ddfd8dSJin Yao }, 9425*e0ddfd8dSJin Yao { 9426*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS.NO_SNOOP_NEEDED", 9427*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 9428*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 9429*e0ddfd8dSJin Yao "Deprecated": "1", 9430*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 9431*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS.NO_SNOOP_NEEDED", 9432*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 9433*e0ddfd8dSJin Yao "MSRValue": "0x013C000100", 9434*e0ddfd8dSJin Yao "Offcore": "1", 9435*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9436*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 9437*e0ddfd8dSJin Yao "UMask": "0x1" 9438*e0ddfd8dSJin Yao }, 9439*e0ddfd8dSJin Yao { 9440*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS.REMOTE_HITM", 9441*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 9442*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 9443*e0ddfd8dSJin Yao "Deprecated": "1", 9444*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 9445*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS.REMOTE_HITM", 9446*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 9447*e0ddfd8dSJin Yao "MSRValue": "0x103FC00100", 9448*e0ddfd8dSJin Yao "Offcore": "1", 9449*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9450*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 9451*e0ddfd8dSJin Yao "UMask": "0x1" 9452*e0ddfd8dSJin Yao }, 9453*e0ddfd8dSJin Yao { 9454*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS.REMOTE_HIT_FORWARD", 9455*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 9456*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 9457*e0ddfd8dSJin Yao "Deprecated": "1", 9458*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 9459*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS.REMOTE_HIT_FORWARD", 9460*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 9461*e0ddfd8dSJin Yao "MSRValue": "0x083FC00100", 9462*e0ddfd8dSJin Yao "Offcore": "1", 9463*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9464*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 94657fcf1b89SHaiyan Song "UMask": "0x1" 94667fcf1b89SHaiyan Song }, 94677fcf1b89SHaiyan Song { 94687fcf1b89SHaiyan Song "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS.SNOOP_MISS", 94697fcf1b89SHaiyan Song "Counter": "0,1,2,3", 94707fcf1b89SHaiyan Song "CounterHTOff": "0,1,2,3", 94717fcf1b89SHaiyan Song "Deprecated": "1", 94727fcf1b89SHaiyan Song "EventCode": "0xB7, 0xBB", 94737fcf1b89SHaiyan Song "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS.SNOOP_MISS", 94747fcf1b89SHaiyan Song "MSRIndex": "0x1a6,0x1a7", 94757fcf1b89SHaiyan Song "MSRValue": "0x023C000100", 94767fcf1b89SHaiyan Song "Offcore": "1", 94777fcf1b89SHaiyan Song "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 94787fcf1b89SHaiyan Song "SampleAfterValue": "100003", 94797fcf1b89SHaiyan Song "UMask": "0x1" 94807fcf1b89SHaiyan Song }, 94817fcf1b89SHaiyan Song { 9482*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS.SNOOP_NONE", 9483038d3b53SJin Yao "Counter": "0,1,2,3", 9484038d3b53SJin Yao "CounterHTOff": "0,1,2,3", 9485038d3b53SJin Yao "Deprecated": "1", 9486038d3b53SJin Yao "EventCode": "0xB7, 0xBB", 9487*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS.SNOOP_NONE", 9488038d3b53SJin Yao "MSRIndex": "0x1a6,0x1a7", 9489*e0ddfd8dSJin Yao "MSRValue": "0x00BC000100", 9490038d3b53SJin Yao "Offcore": "1", 9491038d3b53SJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9492038d3b53SJin Yao "SampleAfterValue": "100003", 9493038d3b53SJin Yao "UMask": "0x1" 9494*e0ddfd8dSJin Yao }, 9495*e0ddfd8dSJin Yao { 9496*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 9497*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 9498*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 9499*e0ddfd8dSJin Yao "Deprecated": "1", 9500*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 9501*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 9502*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 9503*e0ddfd8dSJin Yao "MSRValue": "0x3F84000100", 9504*e0ddfd8dSJin Yao "Offcore": "1", 9505*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9506*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 9507*e0ddfd8dSJin Yao "UMask": "0x1" 9508*e0ddfd8dSJin Yao }, 9509*e0ddfd8dSJin Yao { 9510*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 9511*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 9512*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 9513*e0ddfd8dSJin Yao "Deprecated": "1", 9514*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 9515*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 9516*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 9517*e0ddfd8dSJin Yao "MSRValue": "0x1004000100", 9518*e0ddfd8dSJin Yao "Offcore": "1", 9519*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9520*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 9521*e0ddfd8dSJin Yao "UMask": "0x1" 9522*e0ddfd8dSJin Yao }, 9523*e0ddfd8dSJin Yao { 9524*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 9525*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 9526*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 9527*e0ddfd8dSJin Yao "Deprecated": "1", 9528*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 9529*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 9530*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 9531*e0ddfd8dSJin Yao "MSRValue": "0x0804000100", 9532*e0ddfd8dSJin Yao "Offcore": "1", 9533*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9534*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 9535*e0ddfd8dSJin Yao "UMask": "0x1" 9536*e0ddfd8dSJin Yao }, 9537*e0ddfd8dSJin Yao { 9538*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 9539*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 9540*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 9541*e0ddfd8dSJin Yao "Deprecated": "1", 9542*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 9543*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 9544*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 9545*e0ddfd8dSJin Yao "MSRValue": "0x0404000100", 9546*e0ddfd8dSJin Yao "Offcore": "1", 9547*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9548*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 9549*e0ddfd8dSJin Yao "UMask": "0x1" 9550*e0ddfd8dSJin Yao }, 9551*e0ddfd8dSJin Yao { 9552*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 9553*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 9554*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 9555*e0ddfd8dSJin Yao "Deprecated": "1", 9556*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 9557*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 9558*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 9559*e0ddfd8dSJin Yao "MSRValue": "0x0104000100", 9560*e0ddfd8dSJin Yao "Offcore": "1", 9561*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9562*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 9563*e0ddfd8dSJin Yao "UMask": "0x1" 9564*e0ddfd8dSJin Yao }, 9565*e0ddfd8dSJin Yao { 9566*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 9567*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 9568*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 9569*e0ddfd8dSJin Yao "Deprecated": "1", 9570*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 9571*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 9572*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 9573*e0ddfd8dSJin Yao "MSRValue": "0x0204000100", 9574*e0ddfd8dSJin Yao "Offcore": "1", 9575*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9576*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 9577*e0ddfd8dSJin Yao "UMask": "0x1" 9578*e0ddfd8dSJin Yao }, 9579*e0ddfd8dSJin Yao { 9580*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 9581*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 9582*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 9583*e0ddfd8dSJin Yao "Deprecated": "1", 9584*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 9585*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 9586*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 9587*e0ddfd8dSJin Yao "MSRValue": "0x0604000100", 9588*e0ddfd8dSJin Yao "Offcore": "1", 9589*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9590*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 9591*e0ddfd8dSJin Yao "UMask": "0x1" 9592*e0ddfd8dSJin Yao }, 9593*e0ddfd8dSJin Yao { 9594*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 9595*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 9596*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 9597*e0ddfd8dSJin Yao "Deprecated": "1", 9598*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 9599*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 9600*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 9601*e0ddfd8dSJin Yao "MSRValue": "0x0084000100", 9602*e0ddfd8dSJin Yao "Offcore": "1", 9603*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9604*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 9605*e0ddfd8dSJin Yao "UMask": "0x1" 9606*e0ddfd8dSJin Yao }, 9607*e0ddfd8dSJin Yao { 9608*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 9609*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 9610*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 9611*e0ddfd8dSJin Yao "Deprecated": "1", 9612*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 9613*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 9614*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 9615*e0ddfd8dSJin Yao "MSRValue": "0x063B800100", 9616*e0ddfd8dSJin Yao "Offcore": "1", 9617*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9618*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 9619*e0ddfd8dSJin Yao "UMask": "0x1" 9620*e0ddfd8dSJin Yao }, 9621*e0ddfd8dSJin Yao { 9622*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 9623*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 9624*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 9625*e0ddfd8dSJin Yao "Deprecated": "1", 9626*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 9627*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 9628*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 9629*e0ddfd8dSJin Yao "MSRValue": "0x3F90000100", 9630*e0ddfd8dSJin Yao "Offcore": "1", 9631*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9632*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 9633*e0ddfd8dSJin Yao "UMask": "0x1" 9634*e0ddfd8dSJin Yao }, 9635*e0ddfd8dSJin Yao { 9636*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 9637*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 9638*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 9639*e0ddfd8dSJin Yao "Deprecated": "1", 9640*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 9641*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 9642*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 9643*e0ddfd8dSJin Yao "MSRValue": "0x1010000100", 9644*e0ddfd8dSJin Yao "Offcore": "1", 9645*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9646*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 9647*e0ddfd8dSJin Yao "UMask": "0x1" 9648*e0ddfd8dSJin Yao }, 9649*e0ddfd8dSJin Yao { 9650*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 9651*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 9652*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 9653*e0ddfd8dSJin Yao "Deprecated": "1", 9654*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 9655*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 9656*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 9657*e0ddfd8dSJin Yao "MSRValue": "0x0810000100", 9658*e0ddfd8dSJin Yao "Offcore": "1", 9659*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9660*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 9661*e0ddfd8dSJin Yao "UMask": "0x1" 9662*e0ddfd8dSJin Yao }, 9663*e0ddfd8dSJin Yao { 9664*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 9665*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 9666*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 9667*e0ddfd8dSJin Yao "Deprecated": "1", 9668*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 9669*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 9670*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 9671*e0ddfd8dSJin Yao "MSRValue": "0x0410000100", 9672*e0ddfd8dSJin Yao "Offcore": "1", 9673*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9674*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 9675*e0ddfd8dSJin Yao "UMask": "0x1" 9676*e0ddfd8dSJin Yao }, 9677*e0ddfd8dSJin Yao { 9678*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 9679*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 9680*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 9681*e0ddfd8dSJin Yao "Deprecated": "1", 9682*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 9683*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 9684*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 9685*e0ddfd8dSJin Yao "MSRValue": "0x0110000100", 9686*e0ddfd8dSJin Yao "Offcore": "1", 9687*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9688*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 9689*e0ddfd8dSJin Yao "UMask": "0x1" 9690*e0ddfd8dSJin Yao }, 9691*e0ddfd8dSJin Yao { 9692*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 9693*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 9694*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 9695*e0ddfd8dSJin Yao "Deprecated": "1", 9696*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 9697*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 9698*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 9699*e0ddfd8dSJin Yao "MSRValue": "0x0210000100", 9700*e0ddfd8dSJin Yao "Offcore": "1", 9701*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9702*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 9703*e0ddfd8dSJin Yao "UMask": "0x1" 9704*e0ddfd8dSJin Yao }, 9705*e0ddfd8dSJin Yao { 9706*e0ddfd8dSJin Yao "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 9707*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 9708*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3", 9709*e0ddfd8dSJin Yao "Deprecated": "1", 9710*e0ddfd8dSJin Yao "EventCode": "0xB7, 0xBB", 9711*e0ddfd8dSJin Yao "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 9712*e0ddfd8dSJin Yao "MSRIndex": "0x1a6,0x1a7", 9713*e0ddfd8dSJin Yao "MSRValue": "0x0090000100", 9714*e0ddfd8dSJin Yao "Offcore": "1", 9715*e0ddfd8dSJin Yao "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9716*e0ddfd8dSJin Yao "SampleAfterValue": "100003", 9717*e0ddfd8dSJin Yao "UMask": "0x1" 9718*e0ddfd8dSJin Yao }, 9719*e0ddfd8dSJin Yao { 9720*e0ddfd8dSJin Yao "BriefDescription": "Number of times an RTM execution aborted due to any reasons (multiple categories may count as one).", 9721*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 9722*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3,4,5,6,7", 9723*e0ddfd8dSJin Yao "EventCode": "0xC9", 9724*e0ddfd8dSJin Yao "EventName": "RTM_RETIRED.ABORTED", 9725*e0ddfd8dSJin Yao "PEBS": "1", 9726*e0ddfd8dSJin Yao "PublicDescription": "Number of times RTM abort was triggered.", 9727*e0ddfd8dSJin Yao "SampleAfterValue": "2000003", 9728*e0ddfd8dSJin Yao "UMask": "0x4" 9729*e0ddfd8dSJin Yao }, 9730*e0ddfd8dSJin Yao { 9731*e0ddfd8dSJin Yao "BriefDescription": "Number of times an RTM execution aborted due to none of the previous 4 categories (e.g. interrupt)", 9732*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 9733*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3,4,5,6,7", 9734*e0ddfd8dSJin Yao "EventCode": "0xC9", 9735*e0ddfd8dSJin Yao "EventName": "RTM_RETIRED.ABORTED_EVENTS", 9736*e0ddfd8dSJin Yao "PublicDescription": "Number of times an RTM execution aborted due to none of the previous 4 categories (e.g. interrupt).", 9737*e0ddfd8dSJin Yao "SampleAfterValue": "2000003", 9738*e0ddfd8dSJin Yao "UMask": "0x80" 9739*e0ddfd8dSJin Yao }, 9740*e0ddfd8dSJin Yao { 9741*e0ddfd8dSJin Yao "BriefDescription": "Number of times an RTM execution aborted due to various memory events (e.g. read/write capacity and conflicts)", 9742*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 9743*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3,4,5,6,7", 9744*e0ddfd8dSJin Yao "EventCode": "0xC9", 9745*e0ddfd8dSJin Yao "EventName": "RTM_RETIRED.ABORTED_MEM", 9746*e0ddfd8dSJin Yao "PublicDescription": "Number of times an RTM execution aborted due to various memory events (e.g. read/write capacity and conflicts).", 9747*e0ddfd8dSJin Yao "SampleAfterValue": "2000003", 9748*e0ddfd8dSJin Yao "UMask": "0x8" 9749*e0ddfd8dSJin Yao }, 9750*e0ddfd8dSJin Yao { 9751*e0ddfd8dSJin Yao "BriefDescription": "Number of times an RTM execution aborted due to incompatible memory type", 9752*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 9753*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3,4,5,6,7", 9754*e0ddfd8dSJin Yao "EventCode": "0xC9", 9755*e0ddfd8dSJin Yao "EventName": "RTM_RETIRED.ABORTED_MEMTYPE", 9756*e0ddfd8dSJin Yao "PublicDescription": "Number of times an RTM execution aborted due to incompatible memory type.", 9757*e0ddfd8dSJin Yao "SampleAfterValue": "2000003", 9758*e0ddfd8dSJin Yao "UMask": "0x40" 9759*e0ddfd8dSJin Yao }, 9760*e0ddfd8dSJin Yao { 9761*e0ddfd8dSJin Yao "BriefDescription": "Number of times an RTM execution aborted due to uncommon conditions.", 9762*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 9763*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3,4,5,6,7", 9764*e0ddfd8dSJin Yao "EventCode": "0xC9", 9765*e0ddfd8dSJin Yao "EventName": "RTM_RETIRED.ABORTED_TIMER", 9766*e0ddfd8dSJin Yao "SampleAfterValue": "2000003", 9767*e0ddfd8dSJin Yao "UMask": "0x10" 9768*e0ddfd8dSJin Yao }, 9769*e0ddfd8dSJin Yao { 9770*e0ddfd8dSJin Yao "BriefDescription": "Number of times an RTM execution aborted due to HLE-unfriendly instructions", 9771*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 9772*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3,4,5,6,7", 9773*e0ddfd8dSJin Yao "EventCode": "0xC9", 9774*e0ddfd8dSJin Yao "EventName": "RTM_RETIRED.ABORTED_UNFRIENDLY", 9775*e0ddfd8dSJin Yao "PublicDescription": "Number of times an RTM execution aborted due to HLE-unfriendly instructions.", 9776*e0ddfd8dSJin Yao "SampleAfterValue": "2000003", 9777*e0ddfd8dSJin Yao "UMask": "0x20" 9778*e0ddfd8dSJin Yao }, 9779*e0ddfd8dSJin Yao { 9780*e0ddfd8dSJin Yao "BriefDescription": "Number of times an RTM execution successfully committed", 9781*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 9782*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3,4,5,6,7", 9783*e0ddfd8dSJin Yao "EventCode": "0xC9", 9784*e0ddfd8dSJin Yao "EventName": "RTM_RETIRED.COMMIT", 9785*e0ddfd8dSJin Yao "PublicDescription": "Number of times RTM commit succeeded.", 9786*e0ddfd8dSJin Yao "SampleAfterValue": "2000003", 9787*e0ddfd8dSJin Yao "UMask": "0x2" 9788*e0ddfd8dSJin Yao }, 9789*e0ddfd8dSJin Yao { 9790*e0ddfd8dSJin Yao "BriefDescription": "Number of times an RTM execution started.", 9791*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 9792*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3,4,5,6,7", 9793*e0ddfd8dSJin Yao "EventCode": "0xC9", 9794*e0ddfd8dSJin Yao "EventName": "RTM_RETIRED.START", 9795*e0ddfd8dSJin Yao "PublicDescription": "Number of times we entered an RTM region. Does not count nested transactions.", 9796*e0ddfd8dSJin Yao "SampleAfterValue": "2000003", 9797*e0ddfd8dSJin Yao "UMask": "0x1" 9798*e0ddfd8dSJin Yao }, 9799*e0ddfd8dSJin Yao { 9800*e0ddfd8dSJin Yao "BriefDescription": "Counts the number of times a class of instructions that may cause a transactional abort was executed. Since this is the count of execution, it may not always cause a transactional abort.", 9801*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 9802*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3,4,5,6,7", 9803*e0ddfd8dSJin Yao "EventCode": "0x5d", 9804*e0ddfd8dSJin Yao "EventName": "TX_EXEC.MISC1", 9805*e0ddfd8dSJin Yao "SampleAfterValue": "2000003", 9806*e0ddfd8dSJin Yao "UMask": "0x1" 9807*e0ddfd8dSJin Yao }, 9808*e0ddfd8dSJin Yao { 9809*e0ddfd8dSJin Yao "BriefDescription": "Counts the number of times a class of instructions (e.g., vzeroupper) that may cause a transactional abort was executed inside a transactional region", 9810*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 9811*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3,4,5,6,7", 9812*e0ddfd8dSJin Yao "EventCode": "0x5d", 9813*e0ddfd8dSJin Yao "EventName": "TX_EXEC.MISC2", 9814*e0ddfd8dSJin Yao "PublicDescription": "Unfriendly TSX abort triggered by a vzeroupper instruction.", 9815*e0ddfd8dSJin Yao "SampleAfterValue": "2000003", 9816*e0ddfd8dSJin Yao "UMask": "0x2" 9817*e0ddfd8dSJin Yao }, 9818*e0ddfd8dSJin Yao { 9819*e0ddfd8dSJin Yao "BriefDescription": "Counts the number of times an instruction execution caused the transactional nest count supported to be exceeded", 9820*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 9821*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3,4,5,6,7", 9822*e0ddfd8dSJin Yao "EventCode": "0x5d", 9823*e0ddfd8dSJin Yao "EventName": "TX_EXEC.MISC3", 9824*e0ddfd8dSJin Yao "PublicDescription": "Unfriendly TSX abort triggered by a nest count that is too deep.", 9825*e0ddfd8dSJin Yao "SampleAfterValue": "2000003", 9826*e0ddfd8dSJin Yao "UMask": "0x4" 9827*e0ddfd8dSJin Yao }, 9828*e0ddfd8dSJin Yao { 9829*e0ddfd8dSJin Yao "BriefDescription": "Counts the number of times a XBEGIN instruction was executed inside an HLE transactional region.", 9830*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 9831*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3,4,5,6,7", 9832*e0ddfd8dSJin Yao "EventCode": "0x5d", 9833*e0ddfd8dSJin Yao "EventName": "TX_EXEC.MISC4", 9834*e0ddfd8dSJin Yao "PublicDescription": "RTM region detected inside HLE.", 9835*e0ddfd8dSJin Yao "SampleAfterValue": "2000003", 9836*e0ddfd8dSJin Yao "UMask": "0x8" 9837*e0ddfd8dSJin Yao }, 9838*e0ddfd8dSJin Yao { 9839*e0ddfd8dSJin Yao "BriefDescription": "Counts the number of times an HLE XACQUIRE instruction was executed inside an RTM transactional region", 9840*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 9841*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3,4,5,6,7", 9842*e0ddfd8dSJin Yao "EventCode": "0x5d", 9843*e0ddfd8dSJin Yao "EventName": "TX_EXEC.MISC5", 9844*e0ddfd8dSJin Yao "PublicDescription": "Counts the number of times an HLE XACQUIRE instruction was executed inside an RTM transactional region.", 9845*e0ddfd8dSJin Yao "SampleAfterValue": "2000003", 9846*e0ddfd8dSJin Yao "UMask": "0x10" 9847*e0ddfd8dSJin Yao }, 9848*e0ddfd8dSJin Yao { 9849*e0ddfd8dSJin Yao "BriefDescription": "Number of times a transactional abort was signaled due to a data capacity limitation for transactional reads or writes.", 9850*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 9851*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3,4,5,6,7", 9852*e0ddfd8dSJin Yao "EventCode": "0x54", 9853*e0ddfd8dSJin Yao "EventName": "TX_MEM.ABORT_CAPACITY", 9854*e0ddfd8dSJin Yao "SampleAfterValue": "2000003", 9855*e0ddfd8dSJin Yao "UMask": "0x2" 9856*e0ddfd8dSJin Yao }, 9857*e0ddfd8dSJin Yao { 9858*e0ddfd8dSJin Yao "BriefDescription": "Number of times a transactional abort was signaled due to a data conflict on a transactionally accessed address", 9859*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 9860*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3,4,5,6,7", 9861*e0ddfd8dSJin Yao "EventCode": "0x54", 9862*e0ddfd8dSJin Yao "EventName": "TX_MEM.ABORT_CONFLICT", 9863*e0ddfd8dSJin Yao "PublicDescription": "Number of times a TSX line had a cache conflict.", 9864*e0ddfd8dSJin Yao "SampleAfterValue": "2000003", 9865*e0ddfd8dSJin Yao "UMask": "0x1" 9866*e0ddfd8dSJin Yao }, 9867*e0ddfd8dSJin Yao { 9868*e0ddfd8dSJin Yao "BriefDescription": "Number of times an HLE transactional execution aborted due to XRELEASE lock not satisfying the address and value requirements in the elision buffer", 9869*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 9870*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3,4,5,6,7", 9871*e0ddfd8dSJin Yao "EventCode": "0x54", 9872*e0ddfd8dSJin Yao "EventName": "TX_MEM.ABORT_HLE_ELISION_BUFFER_MISMATCH", 9873*e0ddfd8dSJin Yao "PublicDescription": "Number of times a TSX Abort was triggered due to release/commit but data and address mismatch.", 9874*e0ddfd8dSJin Yao "SampleAfterValue": "2000003", 9875*e0ddfd8dSJin Yao "UMask": "0x10" 9876*e0ddfd8dSJin Yao }, 9877*e0ddfd8dSJin Yao { 9878*e0ddfd8dSJin Yao "BriefDescription": "Number of times an HLE transactional execution aborted due to NoAllocatedElisionBuffer being non-zero.", 9879*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 9880*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3,4,5,6,7", 9881*e0ddfd8dSJin Yao "EventCode": "0x54", 9882*e0ddfd8dSJin Yao "EventName": "TX_MEM.ABORT_HLE_ELISION_BUFFER_NOT_EMPTY", 9883*e0ddfd8dSJin Yao "PublicDescription": "Number of times a TSX Abort was triggered due to commit but Lock Buffer not empty.", 9884*e0ddfd8dSJin Yao "SampleAfterValue": "2000003", 9885*e0ddfd8dSJin Yao "UMask": "0x8" 9886*e0ddfd8dSJin Yao }, 9887*e0ddfd8dSJin Yao { 9888*e0ddfd8dSJin Yao "BriefDescription": "Number of times an HLE transactional execution aborted due to an unsupported read alignment from the elision buffer.", 9889*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 9890*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3,4,5,6,7", 9891*e0ddfd8dSJin Yao "EventCode": "0x54", 9892*e0ddfd8dSJin Yao "EventName": "TX_MEM.ABORT_HLE_ELISION_BUFFER_UNSUPPORTED_ALIGNMENT", 9893*e0ddfd8dSJin Yao "PublicDescription": "Number of times a TSX Abort was triggered due to attempting an unsupported alignment from Lock Buffer.", 9894*e0ddfd8dSJin Yao "SampleAfterValue": "2000003", 9895*e0ddfd8dSJin Yao "UMask": "0x20" 9896*e0ddfd8dSJin Yao }, 9897*e0ddfd8dSJin Yao { 9898*e0ddfd8dSJin Yao "BriefDescription": "Number of times a HLE transactional region aborted due to a non XRELEASE prefixed instruction writing to an elided lock in the elision buffer", 9899*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 9900*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3,4,5,6,7", 9901*e0ddfd8dSJin Yao "EventCode": "0x54", 9902*e0ddfd8dSJin Yao "EventName": "TX_MEM.ABORT_HLE_STORE_TO_ELIDED_LOCK", 9903*e0ddfd8dSJin Yao "PublicDescription": "Number of times a TSX Abort was triggered due to a non-release/commit store to lock.", 9904*e0ddfd8dSJin Yao "SampleAfterValue": "2000003", 9905*e0ddfd8dSJin Yao "UMask": "0x4" 9906*e0ddfd8dSJin Yao }, 9907*e0ddfd8dSJin Yao { 9908*e0ddfd8dSJin Yao "BriefDescription": "Number of times HLE lock could not be elided due to ElisionBufferAvailable being zero.", 9909*e0ddfd8dSJin Yao "Counter": "0,1,2,3", 9910*e0ddfd8dSJin Yao "CounterHTOff": "0,1,2,3,4,5,6,7", 9911*e0ddfd8dSJin Yao "EventCode": "0x54", 9912*e0ddfd8dSJin Yao "EventName": "TX_MEM.HLE_ELISION_BUFFER_FULL", 9913*e0ddfd8dSJin Yao "PublicDescription": "Number of times we could not allocate Lock Buffer.", 9914*e0ddfd8dSJin Yao "SampleAfterValue": "2000003", 9915*e0ddfd8dSJin Yao "UMask": "0x40" 9916ecd94f1bSKan Liang } 9917ecd94f1bSKan Liang]