1f9900dd0SZhengjun Xing[ 2f9900dd0SZhengjun Xing { 3*4c12f41aSZhengjun Xing "BriefDescription": "ASSISTS.HARDWARE", 4*4c12f41aSZhengjun Xing "EventCode": "0xc1", 5*4c12f41aSZhengjun Xing "EventName": "ASSISTS.HARDWARE", 6*4c12f41aSZhengjun Xing "SampleAfterValue": "100003", 7*4c12f41aSZhengjun Xing "UMask": "0x4", 8*4c12f41aSZhengjun Xing "Unit": "cpu_core" 9*4c12f41aSZhengjun Xing }, 10*4c12f41aSZhengjun Xing { 11*4c12f41aSZhengjun Xing "BriefDescription": "ASSISTS.PAGE_FAULT", 12*4c12f41aSZhengjun Xing "EventCode": "0xc1", 13*4c12f41aSZhengjun Xing "EventName": "ASSISTS.PAGE_FAULT", 14*4c12f41aSZhengjun Xing "SampleAfterValue": "1000003", 15*4c12f41aSZhengjun Xing "UMask": "0x8", 16*4c12f41aSZhengjun Xing "Unit": "cpu_core" 17*4c12f41aSZhengjun Xing }, 18*4c12f41aSZhengjun Xing { 19*4c12f41aSZhengjun Xing "BriefDescription": "CORE_POWER.LICENSE_1", 20*4c12f41aSZhengjun Xing "EventCode": "0x28", 21*4c12f41aSZhengjun Xing "EventName": "CORE_POWER.LICENSE_1", 22*4c12f41aSZhengjun Xing "SampleAfterValue": "200003", 23*4c12f41aSZhengjun Xing "UMask": "0x2", 24*4c12f41aSZhengjun Xing "Unit": "cpu_core" 25*4c12f41aSZhengjun Xing }, 26*4c12f41aSZhengjun Xing { 27*4c12f41aSZhengjun Xing "BriefDescription": "CORE_POWER.LICENSE_2", 28*4c12f41aSZhengjun Xing "EventCode": "0x28", 29*4c12f41aSZhengjun Xing "EventName": "CORE_POWER.LICENSE_2", 30*4c12f41aSZhengjun Xing "SampleAfterValue": "200003", 31*4c12f41aSZhengjun Xing "UMask": "0x4", 32*4c12f41aSZhengjun Xing "Unit": "cpu_core" 33*4c12f41aSZhengjun Xing }, 34*4c12f41aSZhengjun Xing { 35*4c12f41aSZhengjun Xing "BriefDescription": "CORE_POWER.LICENSE_3", 36*4c12f41aSZhengjun Xing "EventCode": "0x28", 37*4c12f41aSZhengjun Xing "EventName": "CORE_POWER.LICENSE_3", 38*4c12f41aSZhengjun Xing "SampleAfterValue": "200003", 39*4c12f41aSZhengjun Xing "UMask": "0x8", 40*4c12f41aSZhengjun Xing "Unit": "cpu_core" 41*4c12f41aSZhengjun Xing }, 42*4c12f41aSZhengjun Xing { 43a80de066SIan Rogers "BriefDescription": "Counts modified writebacks from L1 cache and L2 cache that have any type of response.", 44a80de066SIan Rogers "EventCode": "0xB7", 45a80de066SIan Rogers "EventName": "OCR.COREWB_M.ANY_RESPONSE", 46a80de066SIan Rogers "MSRIndex": "0x1a6,0x1a7", 47a80de066SIan Rogers "MSRValue": "0x10008", 48a80de066SIan Rogers "SampleAfterValue": "100003", 49a80de066SIan Rogers "UMask": "0x1", 50a80de066SIan Rogers "Unit": "cpu_atom" 51a80de066SIan Rogers }, 52a80de066SIan Rogers { 53f9900dd0SZhengjun Xing "BriefDescription": "Counts demand data reads that have any type of response.", 54f9900dd0SZhengjun Xing "EventCode": "0xB7", 55f9900dd0SZhengjun Xing "EventName": "OCR.DEMAND_DATA_RD.ANY_RESPONSE", 56f9900dd0SZhengjun Xing "MSRIndex": "0x1a6,0x1a7", 57f9900dd0SZhengjun Xing "MSRValue": "0x10001", 58f9900dd0SZhengjun Xing "SampleAfterValue": "100003", 59f9900dd0SZhengjun Xing "UMask": "0x1", 60f9900dd0SZhengjun Xing "Unit": "cpu_atom" 61f9900dd0SZhengjun Xing }, 62f9900dd0SZhengjun Xing { 63f9900dd0SZhengjun Xing "BriefDescription": "Counts demand data reads that have any type of response.", 64f9900dd0SZhengjun Xing "EventCode": "0x2A,0x2B", 65f9900dd0SZhengjun Xing "EventName": "OCR.DEMAND_DATA_RD.ANY_RESPONSE", 66f9900dd0SZhengjun Xing "MSRIndex": "0x1a6,0x1a7", 67f9900dd0SZhengjun Xing "MSRValue": "0x10001", 68f9900dd0SZhengjun Xing "SampleAfterValue": "100003", 69f9900dd0SZhengjun Xing "UMask": "0x1", 70f9900dd0SZhengjun Xing "Unit": "cpu_core" 71f9900dd0SZhengjun Xing }, 72f9900dd0SZhengjun Xing { 73a80de066SIan Rogers "BriefDescription": "Counts demand data reads that were supplied by DRAM.", 74a80de066SIan Rogers "EventCode": "0x2A,0x2B", 75a80de066SIan Rogers "EventName": "OCR.DEMAND_DATA_RD.DRAM", 76a80de066SIan Rogers "MSRIndex": "0x1a6,0x1a7", 77a80de066SIan Rogers "MSRValue": "0x184000001", 78a80de066SIan Rogers "SampleAfterValue": "100003", 79a80de066SIan Rogers "UMask": "0x1", 80a80de066SIan Rogers "Unit": "cpu_core" 81a80de066SIan Rogers }, 82a80de066SIan Rogers { 83*4c12f41aSZhengjun Xing "BriefDescription": "Counts demand reads for ownership (RFO) and software prefetches for exclusive ownership (PREFETCHW) that have any type of response.", 84*4c12f41aSZhengjun Xing "EventCode": "0xB7", 85*4c12f41aSZhengjun Xing "EventName": "OCR.DEMAND_RFO.ANY_RESPONSE", 86*4c12f41aSZhengjun Xing "MSRIndex": "0x1a6,0x1a7", 87*4c12f41aSZhengjun Xing "MSRValue": "0x10002", 88*4c12f41aSZhengjun Xing "SampleAfterValue": "100003", 89*4c12f41aSZhengjun Xing "UMask": "0x1", 90*4c12f41aSZhengjun Xing "Unit": "cpu_atom" 91*4c12f41aSZhengjun Xing }, 92*4c12f41aSZhengjun Xing { 93f9900dd0SZhengjun Xing "BriefDescription": "Counts demand read for ownership (RFO) requests and software prefetches for exclusive ownership (PREFETCHW) that have any type of response.", 94f9900dd0SZhengjun Xing "EventCode": "0x2A,0x2B", 95f9900dd0SZhengjun Xing "EventName": "OCR.DEMAND_RFO.ANY_RESPONSE", 96f9900dd0SZhengjun Xing "MSRIndex": "0x1a6,0x1a7", 97f9900dd0SZhengjun Xing "MSRValue": "0x10002", 98f9900dd0SZhengjun Xing "SampleAfterValue": "100003", 99f9900dd0SZhengjun Xing "UMask": "0x1", 100f9900dd0SZhengjun Xing "Unit": "cpu_core" 101f9900dd0SZhengjun Xing }, 102f9900dd0SZhengjun Xing { 103f9900dd0SZhengjun Xing "BriefDescription": "Counts streaming stores that have any type of response.", 104*4c12f41aSZhengjun Xing "EventCode": "0xB7", 105*4c12f41aSZhengjun Xing "EventName": "OCR.STREAMING_WR.ANY_RESPONSE", 106*4c12f41aSZhengjun Xing "MSRIndex": "0x1a6,0x1a7", 107*4c12f41aSZhengjun Xing "MSRValue": "0x10800", 108*4c12f41aSZhengjun Xing "SampleAfterValue": "100003", 109*4c12f41aSZhengjun Xing "UMask": "0x1", 110*4c12f41aSZhengjun Xing "Unit": "cpu_atom" 111*4c12f41aSZhengjun Xing }, 112*4c12f41aSZhengjun Xing { 113*4c12f41aSZhengjun Xing "BriefDescription": "Counts streaming stores that have any type of response.", 114f9900dd0SZhengjun Xing "EventCode": "0x2A,0x2B", 115f9900dd0SZhengjun Xing "EventName": "OCR.STREAMING_WR.ANY_RESPONSE", 116f9900dd0SZhengjun Xing "MSRIndex": "0x1a6,0x1a7", 117f9900dd0SZhengjun Xing "MSRValue": "0x10800", 118f9900dd0SZhengjun Xing "SampleAfterValue": "100003", 119f9900dd0SZhengjun Xing "UMask": "0x1", 120f9900dd0SZhengjun Xing "Unit": "cpu_core" 121f9900dd0SZhengjun Xing }, 122f9900dd0SZhengjun Xing { 123a95ab294SIan Rogers "BriefDescription": "Cycles when Reservation Station (RS) is empty for the thread.", 124a95ab294SIan Rogers "EventCode": "0xa5", 125a95ab294SIan Rogers "EventName": "RS.EMPTY", 126*4c12f41aSZhengjun Xing "PublicDescription": "Counts cycles during which the reservation station (RS) is empty for this logical processor. This is usually caused when the front-end pipeline runs into starvation periods (e.g. branch mispredictions or i-cache misses)", 127a95ab294SIan Rogers "SampleAfterValue": "1000003", 128a95ab294SIan Rogers "UMask": "0x7", 129a95ab294SIan Rogers "Unit": "cpu_core" 130a95ab294SIan Rogers }, 131a95ab294SIan Rogers { 132a95ab294SIan Rogers "BriefDescription": "Counts end of periods where the Reservation Station (RS) was empty.", 133a95ab294SIan Rogers "CounterMask": "1", 134a95ab294SIan Rogers "EdgeDetect": "1", 135a95ab294SIan Rogers "EventCode": "0xa5", 136a95ab294SIan Rogers "EventName": "RS.EMPTY_COUNT", 137a95ab294SIan Rogers "Invert": "1", 138*4c12f41aSZhengjun Xing "PublicDescription": "Counts end of periods where the Reservation Station (RS) was empty. Could be useful to closely sample on front-end latency issues (see the FRONTEND_RETIRED event of designated precise events)", 139a95ab294SIan Rogers "SampleAfterValue": "100003", 140a95ab294SIan Rogers "UMask": "0x7", 141a95ab294SIan Rogers "Unit": "cpu_core" 142a95ab294SIan Rogers }, 143a95ab294SIan Rogers { 144a95ab294SIan Rogers "BriefDescription": "This event is deprecated. Refer to new event RS.EMPTY_COUNT", 145a95ab294SIan Rogers "CounterMask": "1", 146*4c12f41aSZhengjun Xing "Deprecated": "1", 147a95ab294SIan Rogers "EdgeDetect": "1", 148a95ab294SIan Rogers "EventCode": "0xa5", 149a95ab294SIan Rogers "EventName": "RS_EMPTY.COUNT", 150a95ab294SIan Rogers "Invert": "1", 151a95ab294SIan Rogers "SampleAfterValue": "100003", 152a95ab294SIan Rogers "UMask": "0x7", 153a95ab294SIan Rogers "Unit": "cpu_core" 154a95ab294SIan Rogers }, 155a95ab294SIan Rogers { 156a95ab294SIan Rogers "BriefDescription": "This event is deprecated. Refer to new event RS.EMPTY", 157*4c12f41aSZhengjun Xing "Deprecated": "1", 158a95ab294SIan Rogers "EventCode": "0xa5", 159a95ab294SIan Rogers "EventName": "RS_EMPTY.CYCLES", 160a95ab294SIan Rogers "SampleAfterValue": "1000003", 161a95ab294SIan Rogers "UMask": "0x7", 162a95ab294SIan Rogers "Unit": "cpu_core" 163a95ab294SIan Rogers }, 164a95ab294SIan Rogers { 1655fa2481cSZhengjun Xing "BriefDescription": "XQ.FULL_CYCLES", 166f9900dd0SZhengjun Xing "CounterMask": "1", 167f9900dd0SZhengjun Xing "EventCode": "0x2d", 168f9900dd0SZhengjun Xing "EventName": "XQ.FULL_CYCLES", 169f9900dd0SZhengjun Xing "SampleAfterValue": "1000003", 170f9900dd0SZhengjun Xing "UMask": "0x1", 171f9900dd0SZhengjun Xing "Unit": "cpu_core" 172f9900dd0SZhengjun Xing } 173f9900dd0SZhengjun Xing] 174