17ae5c03aSIan Rogers[ 27ae5c03aSIan Rogers { 37ae5c03aSIan Rogers "MetricExpr": "1 / IPC", 47ae5c03aSIan Rogers "MetricName": "CPI" 57ae5c03aSIan Rogers }, 67ae5c03aSIan Rogers { 77ae5c03aSIan Rogers "MetricExpr": "inst_retired.any / cpu_clk_unhalted.thread", 87ae5c03aSIan Rogers "MetricName": "IPC", 97ae5c03aSIan Rogers "MetricGroup": "group1" 107ae5c03aSIan Rogers }, 117ae5c03aSIan Rogers { 127ae5c03aSIan Rogers "MetricExpr": "idq_uops_not_delivered.core / (4 * (( ( cpu_clk_unhalted.thread / 2 ) * ( 1 + cpu_clk_unhalted.one_thread_active / cpu_clk_unhalted.ref_xclk ) )))", 137ae5c03aSIan Rogers "MetricName": "Frontend_Bound_SMT" 147ae5c03aSIan Rogers }, 157ae5c03aSIan Rogers { 167ae5c03aSIan Rogers "MetricExpr": "l1d\\-loads\\-misses / inst_retired.any", 177ae5c03aSIan Rogers "MetricName": "dcache_miss_cpi" 187ae5c03aSIan Rogers }, 197ae5c03aSIan Rogers { 207ae5c03aSIan Rogers "MetricExpr": "l1i\\-loads\\-misses / inst_retired.any", 217ae5c03aSIan Rogers "MetricName": "icache_miss_cycles" 227ae5c03aSIan Rogers }, 237ae5c03aSIan Rogers { 247ae5c03aSIan Rogers "MetricExpr": "(dcache_miss_cpi + icache_miss_cycles)", 257ae5c03aSIan Rogers "MetricName": "cache_miss_cycles", 267ae5c03aSIan Rogers "MetricGroup": "group1" 277ae5c03aSIan Rogers }, 287ae5c03aSIan Rogers { 297ae5c03aSIan Rogers "MetricExpr": "l2_rqsts.demand_data_rd_hit + l2_rqsts.pf_hit + l2_rqsts.rfo_hit", 307ae5c03aSIan Rogers "MetricName": "DCache_L2_All_Hits" 317ae5c03aSIan Rogers }, 327ae5c03aSIan Rogers { 337ae5c03aSIan Rogers "MetricExpr": "max(l2_rqsts.all_demand_data_rd - l2_rqsts.demand_data_rd_hit, 0) + l2_rqsts.pf_miss + l2_rqsts.rfo_miss", 347ae5c03aSIan Rogers "MetricName": "DCache_L2_All_Miss" 357ae5c03aSIan Rogers }, 367ae5c03aSIan Rogers { 37*0e407915SIan Rogers "MetricExpr": "DCache_L2_All_Hits + DCache_L2_All_Miss", 387ae5c03aSIan Rogers "MetricName": "DCache_L2_All" 397ae5c03aSIan Rogers }, 407ae5c03aSIan Rogers { 41*0e407915SIan Rogers "MetricExpr": "d_ratio(DCache_L2_All_Hits, DCache_L2_All)", 427ae5c03aSIan Rogers "MetricName": "DCache_L2_Hits" 437ae5c03aSIan Rogers }, 447ae5c03aSIan Rogers { 45*0e407915SIan Rogers "MetricExpr": "d_ratio(DCache_L2_All_Miss, DCache_L2_All)", 467ae5c03aSIan Rogers "MetricName": "DCache_L2_Misses" 477ae5c03aSIan Rogers }, 487ae5c03aSIan Rogers { 497ae5c03aSIan Rogers "MetricExpr": "ipc + M2", 507ae5c03aSIan Rogers "MetricName": "M1" 517ae5c03aSIan Rogers }, 527ae5c03aSIan Rogers { 537ae5c03aSIan Rogers "MetricExpr": "ipc + M1", 547ae5c03aSIan Rogers "MetricName": "M2" 557ae5c03aSIan Rogers }, 567ae5c03aSIan Rogers { 577ae5c03aSIan Rogers "MetricExpr": "1/M3", 587ae5c03aSIan Rogers "MetricName": "M3" 597ae5c03aSIan Rogers }, 607ae5c03aSIan Rogers { 617ae5c03aSIan Rogers "MetricExpr": "64 * l1d.replacement / 1000000000 / duration_time", 627ae5c03aSIan Rogers "MetricName": "L1D_Cache_Fill_BW" 637ae5c03aSIan Rogers } 647ae5c03aSIan Rogers] 65