1cfbb9be8SThomas Richter[ 2cfbb9be8SThomas Richter { 3cfbb9be8SThomas Richter "EventCode": "128", 4cfbb9be8SThomas Richter "EventName": "L1I_L2_SOURCED_WRITES", 5cfbb9be8SThomas Richter "BriefDescription": "L1I L2 Sourced Writes", 6cfbb9be8SThomas Richter "PublicDescription": "A directory write to the Level-1 I-Cache directory where the returned cache line was sourced from the Level-2 (L1.5) cache" 7cfbb9be8SThomas Richter }, 8cfbb9be8SThomas Richter { 9cfbb9be8SThomas Richter "EventCode": "129", 10cfbb9be8SThomas Richter "EventName": "L1D_L2_SOURCED_WRITES", 11cfbb9be8SThomas Richter "BriefDescription": "L1D L2 Sourced Writes", 12cfbb9be8SThomas Richter "PublicDescription": "A directory write to the Level-1 D-Cache directory where the installed cache line was sourced from the Level-2 (L1.5) cache" 13cfbb9be8SThomas Richter }, 14cfbb9be8SThomas Richter { 15cfbb9be8SThomas Richter "EventCode": "130", 16cfbb9be8SThomas Richter "EventName": "L1I_L3_LOCAL_WRITES", 17cfbb9be8SThomas Richter "BriefDescription": "L1I L3 Local Writes", 18cfbb9be8SThomas Richter "PublicDescription": "A directory write to the Level-1 I-Cache directory where the installed cache line was sourced from the Level-3 cache that is on the same book as the Instruction cache (Local L2 cache)" 19cfbb9be8SThomas Richter }, 20cfbb9be8SThomas Richter { 21cfbb9be8SThomas Richter "EventCode": "131", 22cfbb9be8SThomas Richter "EventName": "L1D_L3_LOCAL_WRITES", 23cfbb9be8SThomas Richter "BriefDescription": "L1D L3 Local Writes", 24cfbb9be8SThomas Richter "PublicDescription": "A directory write to the Level-1 D-Cache directory where the installtion cache line was source from the Level-3 cache that is on the same book as the Data cache (Local L2 cache)" 25cfbb9be8SThomas Richter }, 26cfbb9be8SThomas Richter { 27cfbb9be8SThomas Richter "EventCode": "132", 28cfbb9be8SThomas Richter "EventName": "L1I_L3_REMOTE_WRITES", 29cfbb9be8SThomas Richter "BriefDescription": "L1I L3 Remote Writes", 30cfbb9be8SThomas Richter "PublicDescription": "A directory write to the Level-1 I-Cache directory where the installed cache line was sourced from a Level-3 cache that is not on the same book as the Instruction cache (Remote L2 cache)" 31cfbb9be8SThomas Richter }, 32cfbb9be8SThomas Richter { 33cfbb9be8SThomas Richter "EventCode": "133", 34cfbb9be8SThomas Richter "EventName": "L1D_L3_REMOTE_WRITES", 35cfbb9be8SThomas Richter "BriefDescription": "L1D L3 Remote Writes", 36cfbb9be8SThomas Richter "PublicDescription": "A directory write to the Level-1 D-Cache directory where the installed cache line was sourced from a Level-3 cache that is not on the same book as the Data cache (Remote L2 cache)" 37cfbb9be8SThomas Richter }, 38cfbb9be8SThomas Richter { 39cfbb9be8SThomas Richter "EventCode": "134", 40cfbb9be8SThomas Richter "EventName": "L1D_LMEM_SOURCED_WRITES", 41cfbb9be8SThomas Richter "BriefDescription": "L1D Local Memory Sourced Writes", 42cfbb9be8SThomas Richter "PublicDescription": "A directory write to the Level-1 D-Cache directory where the installed cache line was sourced from memory that is attached to the same book as the Data cache (Local Memory)" 43cfbb9be8SThomas Richter }, 44cfbb9be8SThomas Richter { 45cfbb9be8SThomas Richter "EventCode": "135", 46cfbb9be8SThomas Richter "EventName": "L1I_LMEM_SOURCED_WRITES", 47cfbb9be8SThomas Richter "BriefDescription": "L1I Local Memory Sourced Writes", 48cfbb9be8SThomas Richter "PublicDescription": "A directory write to the Level-1 I-Cache where the installed cache line was sourced from memory that is attached to the s ame book as the Instruction cache (Local Memory)" 49cfbb9be8SThomas Richter }, 50cfbb9be8SThomas Richter { 51cfbb9be8SThomas Richter "EventCode": "136", 52cfbb9be8SThomas Richter "EventName": "L1D_RO_EXCL_WRITES", 53cfbb9be8SThomas Richter "BriefDescription": "L1D Read-only Exclusive Writes", 54cfbb9be8SThomas Richter "PublicDescription": "A directory write to the Level-1 D-Cache where the line was originally in a Read-Only state in the cache but has been updated to be in the Exclusive state that allows stores to the cache line" 55cfbb9be8SThomas Richter }, 56cfbb9be8SThomas Richter { 57cfbb9be8SThomas Richter "EventCode": "137", 58cfbb9be8SThomas Richter "EventName": "L1I_CACHELINE_INVALIDATES", 59cfbb9be8SThomas Richter "BriefDescription": "L1I Cacheline Invalidates", 60cfbb9be8SThomas Richter "PublicDescription": "A cache line in the Level-1 I-Cache has been invalidated by a store on the same CPU as the Level-1 I-Cache" 61cfbb9be8SThomas Richter }, 62cfbb9be8SThomas Richter { 63cfbb9be8SThomas Richter "EventCode": "138", 64cfbb9be8SThomas Richter "EventName": "ITLB1_WRITES", 65cfbb9be8SThomas Richter "BriefDescription": "ITLB1 Writes", 66cfbb9be8SThomas Richter "PublicDescription": "A translation entry has been written into the Level-1 Instruction Translation Lookaside Buffer" 67cfbb9be8SThomas Richter }, 68cfbb9be8SThomas Richter { 69cfbb9be8SThomas Richter "EventCode": "139", 70cfbb9be8SThomas Richter "EventName": "DTLB1_WRITES", 71cfbb9be8SThomas Richter "BriefDescription": "DTLB1 Writes", 72cfbb9be8SThomas Richter "PublicDescription": "A translation entry has been written to the Level-1 Data Translation Lookaside Buffer" 73cfbb9be8SThomas Richter }, 74cfbb9be8SThomas Richter { 75cfbb9be8SThomas Richter "EventCode": "140", 76cfbb9be8SThomas Richter "EventName": "TLB2_PTE_WRITES", 77cfbb9be8SThomas Richter "BriefDescription": "TLB2 PTE Writes", 78cfbb9be8SThomas Richter "PublicDescription": "A translation entry has been written to the Level-2 TLB Page Table Entry arrays" 79cfbb9be8SThomas Richter }, 80cfbb9be8SThomas Richter { 81cfbb9be8SThomas Richter "EventCode": "141", 82cfbb9be8SThomas Richter "EventName": "TLB2_CRSTE_WRITES", 83cfbb9be8SThomas Richter "BriefDescription": "TLB2 CRSTE Writes", 84cfbb9be8SThomas Richter "PublicDescription": "A translation entry has been written to the Level-2 TLB Common Region Segment Table Entry arrays" 85cfbb9be8SThomas Richter }, 86cfbb9be8SThomas Richter { 87cfbb9be8SThomas Richter "EventCode": "142", 88cfbb9be8SThomas Richter "EventName": "TLB2_CRSTE_HPAGE_WRITES", 89cfbb9be8SThomas Richter "BriefDescription": "TLB2 CRSTE One-Megabyte Page Writes", 90cfbb9be8SThomas Richter "PublicDescription": "A translation entry has been written to the Level-2 TLB Common Region Segment Table Entry arrays for a one-megabyte large page translation" 91cfbb9be8SThomas Richter }, 92cfbb9be8SThomas Richter { 93cfbb9be8SThomas Richter "EventCode": "145", 94cfbb9be8SThomas Richter "EventName": "ITLB1_MISSES", 95cfbb9be8SThomas Richter "BriefDescription": "ITLB1 Misses", 96cfbb9be8SThomas Richter "PublicDescription": "Level-1 Instruction TLB miss in progress. Incremented by one for every cycle an ITLB1 miss is in progress" 97cfbb9be8SThomas Richter }, 98cfbb9be8SThomas Richter { 99cfbb9be8SThomas Richter "EventCode": "146", 100cfbb9be8SThomas Richter "EventName": "DTLB1_MISSES", 101cfbb9be8SThomas Richter "BriefDescription": "DTLB1 Misses", 102cfbb9be8SThomas Richter "PublicDescription": "Level-1 Data TLB miss in progress. Incremented by one for every cycle an DTLB1 miss is in progress" 103cfbb9be8SThomas Richter }, 104cfbb9be8SThomas Richter { 105cfbb9be8SThomas Richter "EventCode": "147", 106cfbb9be8SThomas Richter "EventName": "L2C_STORES_SENT", 107cfbb9be8SThomas Richter "BriefDescription": "L2C Stores Sent", 108cfbb9be8SThomas Richter "PublicDescription": "Incremented by one for every store sent to Level-2 (L1.5) cache" 109cfbb9be8SThomas Richter }, 110cfbb9be8SThomas Richter] 111