1826db0f1SSukadev Bhattiprolu[ 2da3ef7f6SJames Clark { 3826db0f1SSukadev Bhattiprolu "EventCode": "0x1415A", 4826db0f1SSukadev Bhattiprolu "EventName": "PM_MRK_DATA_FROM_L2_DISP_CONFLICT_LDHITST_CYC", 53c22ba52SSukadev Bhattiprolu "BriefDescription": "Duration in cycles to reload from local core's L2 with load hit store conflict due to a marked load" 63c22ba52SSukadev Bhattiprolu }, 7da3ef7f6SJames Clark { 83c22ba52SSukadev Bhattiprolu "EventCode": "0x10058", 93c22ba52SSukadev Bhattiprolu "EventName": "PM_MEM_LOC_THRESH_IFU", 103c22ba52SSukadev Bhattiprolu "BriefDescription": "Local Memory above threshold for IFU speculation control" 11826db0f1SSukadev Bhattiprolu }, 12da3ef7f6SJames Clark { 13826db0f1SSukadev Bhattiprolu "EventCode": "0x2D028", 14826db0f1SSukadev Bhattiprolu "EventName": "PM_RADIX_PWC_L2_PDE_FROM_L2", 153c22ba52SSukadev Bhattiprolu "BriefDescription": "A Page Directory Entry was reloaded to a level 2 page walk cache from the core's L2 data cache" 16826db0f1SSukadev Bhattiprolu }, 17da3ef7f6SJames Clark { 18826db0f1SSukadev Bhattiprolu "EventCode": "0x30012", 19826db0f1SSukadev Bhattiprolu "EventName": "PM_FLUSH_COMPLETION", 203c22ba52SSukadev Bhattiprolu "BriefDescription": "The instruction that was next to complete did not complete because it suffered a flush" 213c22ba52SSukadev Bhattiprolu }, 22da3ef7f6SJames Clark { 233c22ba52SSukadev Bhattiprolu "EventCode": "0x2D154", 243c22ba52SSukadev Bhattiprolu "EventName": "PM_MRK_DERAT_MISS_64K", 253c22ba52SSukadev Bhattiprolu "BriefDescription": "Marked Data ERAT Miss (Data TLB Access) page size 64K" 26826db0f1SSukadev Bhattiprolu }, 27da3ef7f6SJames Clark { 28826db0f1SSukadev Bhattiprolu "EventCode": "0x4016E", 29826db0f1SSukadev Bhattiprolu "EventName": "PM_THRESH_NOT_MET", 303c22ba52SSukadev Bhattiprolu "BriefDescription": "Threshold counter did not meet threshold" 31826db0f1SSukadev Bhattiprolu } 32826db0f1SSukadev Bhattiprolu] 33