1*5497b23eSShunsuke Nakamura[
2*5497b23eSShunsuke Nakamura  {
3*5497b23eSShunsuke Nakamura    "ArchStdEvent": "SIMD_INST_RETIRED"
4*5497b23eSShunsuke Nakamura  },
5*5497b23eSShunsuke Nakamura  {
6*5497b23eSShunsuke Nakamura    "ArchStdEvent": "SVE_INST_RETIRED"
7*5497b23eSShunsuke Nakamura  },
8*5497b23eSShunsuke Nakamura  {
9*5497b23eSShunsuke Nakamura    "ArchStdEvent": "UOP_SPEC"
10*5497b23eSShunsuke Nakamura  },
11*5497b23eSShunsuke Nakamura  {
12*5497b23eSShunsuke Nakamura    "ArchStdEvent": "SVE_MATH_SPEC"
13*5497b23eSShunsuke Nakamura  },
14*5497b23eSShunsuke Nakamura  {
15*5497b23eSShunsuke Nakamura    "ArchStdEvent": "FP_SPEC"
16*5497b23eSShunsuke Nakamura  },
17*5497b23eSShunsuke Nakamura  {
18*5497b23eSShunsuke Nakamura    "ArchStdEvent": "FP_FMA_SPEC"
19*5497b23eSShunsuke Nakamura  },
20*5497b23eSShunsuke Nakamura  {
21*5497b23eSShunsuke Nakamura    "ArchStdEvent": "FP_RECPE_SPEC"
22*5497b23eSShunsuke Nakamura  },
23*5497b23eSShunsuke Nakamura  {
24*5497b23eSShunsuke Nakamura    "ArchStdEvent": "FP_CVT_SPEC"
25*5497b23eSShunsuke Nakamura  },
26*5497b23eSShunsuke Nakamura  {
27*5497b23eSShunsuke Nakamura    "ArchStdEvent": "ASE_SVE_INT_SPEC"
28*5497b23eSShunsuke Nakamura  },
29*5497b23eSShunsuke Nakamura  {
30*5497b23eSShunsuke Nakamura    "ArchStdEvent": "SVE_PRED_SPEC"
31*5497b23eSShunsuke Nakamura  },
32*5497b23eSShunsuke Nakamura  {
33*5497b23eSShunsuke Nakamura    "ArchStdEvent": "SVE_MOVPRFX_SPEC"
34*5497b23eSShunsuke Nakamura  },
35*5497b23eSShunsuke Nakamura  {
36*5497b23eSShunsuke Nakamura    "ArchStdEvent": "SVE_MOVPRFX_U_SPEC"
37*5497b23eSShunsuke Nakamura  },
38*5497b23eSShunsuke Nakamura  {
39*5497b23eSShunsuke Nakamura    "ArchStdEvent": "ASE_SVE_LD_SPEC"
40*5497b23eSShunsuke Nakamura  },
41*5497b23eSShunsuke Nakamura  {
42*5497b23eSShunsuke Nakamura    "ArchStdEvent": "ASE_SVE_ST_SPEC"
43*5497b23eSShunsuke Nakamura  },
44*5497b23eSShunsuke Nakamura  {
45*5497b23eSShunsuke Nakamura    "ArchStdEvent": "PRF_SPEC"
46*5497b23eSShunsuke Nakamura  },
47*5497b23eSShunsuke Nakamura  {
48*5497b23eSShunsuke Nakamura    "ArchStdEvent": "BASE_LD_REG_SPEC"
49*5497b23eSShunsuke Nakamura  },
50*5497b23eSShunsuke Nakamura  {
51*5497b23eSShunsuke Nakamura    "ArchStdEvent": "BASE_ST_REG_SPEC"
52*5497b23eSShunsuke Nakamura  },
53*5497b23eSShunsuke Nakamura  {
54*5497b23eSShunsuke Nakamura    "ArchStdEvent": "SVE_LDR_REG_SPEC"
55*5497b23eSShunsuke Nakamura  },
56*5497b23eSShunsuke Nakamura  {
57*5497b23eSShunsuke Nakamura    "ArchStdEvent": "SVE_STR_REG_SPEC"
58*5497b23eSShunsuke Nakamura  },
59*5497b23eSShunsuke Nakamura  {
60*5497b23eSShunsuke Nakamura    "ArchStdEvent": "SVE_LDR_PREG_SPEC"
61*5497b23eSShunsuke Nakamura  },
62*5497b23eSShunsuke Nakamura  {
63*5497b23eSShunsuke Nakamura    "ArchStdEvent": "SVE_STR_PREG_SPEC"
64*5497b23eSShunsuke Nakamura  },
65*5497b23eSShunsuke Nakamura  {
66*5497b23eSShunsuke Nakamura    "ArchStdEvent": "SVE_PRF_CONTIG_SPEC"
67*5497b23eSShunsuke Nakamura  },
68*5497b23eSShunsuke Nakamura  {
69*5497b23eSShunsuke Nakamura    "ArchStdEvent": "ASE_SVE_LD_MULTI_SPEC"
70*5497b23eSShunsuke Nakamura  },
71*5497b23eSShunsuke Nakamura  {
72*5497b23eSShunsuke Nakamura    "ArchStdEvent": "ASE_SVE_ST_MULTI_SPEC"
73*5497b23eSShunsuke Nakamura  },
74*5497b23eSShunsuke Nakamura  {
75*5497b23eSShunsuke Nakamura    "ArchStdEvent": "SVE_LD_GATHER_SPEC"
76*5497b23eSShunsuke Nakamura  },
77*5497b23eSShunsuke Nakamura  {
78*5497b23eSShunsuke Nakamura    "ArchStdEvent": "SVE_ST_SCATTER_SPEC"
79*5497b23eSShunsuke Nakamura  },
80*5497b23eSShunsuke Nakamura  {
81*5497b23eSShunsuke Nakamura    "ArchStdEvent": "SVE_PRF_GATHER_SPEC"
82*5497b23eSShunsuke Nakamura  },
83*5497b23eSShunsuke Nakamura  {
84*5497b23eSShunsuke Nakamura    "ArchStdEvent": "SVE_LDFF_SPEC"
85*5497b23eSShunsuke Nakamura  },
86*5497b23eSShunsuke Nakamura  {
87*5497b23eSShunsuke Nakamura    "ArchStdEvent": "FP_SCALE_OPS_SPEC"
88*5497b23eSShunsuke Nakamura  },
89*5497b23eSShunsuke Nakamura  {
90*5497b23eSShunsuke Nakamura    "ArchStdEvent": "FP_FIXED_OPS_SPEC"
91*5497b23eSShunsuke Nakamura  },
92*5497b23eSShunsuke Nakamura  {
93*5497b23eSShunsuke Nakamura    "ArchStdEvent": "FP_HP_SCALE_OPS_SPEC"
94*5497b23eSShunsuke Nakamura  },
95*5497b23eSShunsuke Nakamura  {
96*5497b23eSShunsuke Nakamura    "ArchStdEvent": "FP_HP_FIXED_OPS_SPEC"
97*5497b23eSShunsuke Nakamura  },
98*5497b23eSShunsuke Nakamura  {
99*5497b23eSShunsuke Nakamura    "ArchStdEvent": "FP_SP_SCALE_OPS_SPEC"
100*5497b23eSShunsuke Nakamura  },
101*5497b23eSShunsuke Nakamura  {
102*5497b23eSShunsuke Nakamura    "ArchStdEvent": "FP_SP_FIXED_OPS_SPEC"
103*5497b23eSShunsuke Nakamura  },
104*5497b23eSShunsuke Nakamura  {
105*5497b23eSShunsuke Nakamura    "ArchStdEvent": "FP_DP_SCALE_OPS_SPEC"
106*5497b23eSShunsuke Nakamura  },
107*5497b23eSShunsuke Nakamura  {
108*5497b23eSShunsuke Nakamura    "ArchStdEvent": "FP_DP_FIXED_OPS_SPEC"
109*5497b23eSShunsuke Nakamura  }
110*5497b23eSShunsuke Nakamura]
111