1*842ed298SJoakim Zhang[
2*842ed298SJoakim Zhang   {
3*842ed298SJoakim Zhang	    "BriefDescription": "bytes all masters read from ddr based on read-cycles event",
4*842ed298SJoakim Zhang	    "MetricName": "imx8mn_ddr_read.all",
5*842ed298SJoakim Zhang	    "MetricExpr": "imx8mn_ddr.read_cycles * 4 * 2",
6*842ed298SJoakim Zhang	    "ScaleUnit": "9.765625e-4KB",
7*842ed298SJoakim Zhang	    "Unit": "imx8_ddr",
8*842ed298SJoakim Zhang	    "Compat": "i.MX8MN"
9*842ed298SJoakim Zhang   },
10*842ed298SJoakim Zhang   {
11*842ed298SJoakim Zhang	    "BriefDescription": "bytes all masters write to ddr based on write-cycles event",
12*842ed298SJoakim Zhang	    "MetricName": "imx8mn_ddr_write.all",
13*842ed298SJoakim Zhang	    "MetricExpr": "imx8mn_ddr.write_cycles * 4 * 2",
14*842ed298SJoakim Zhang	    "ScaleUnit": "9.765625e-4KB",
15*842ed298SJoakim Zhang	    "Unit": "imx8_ddr",
16*842ed298SJoakim Zhang	    "Compat": "i.MX8MN"
17*842ed298SJoakim Zhang   }
18*842ed298SJoakim Zhang]
19