1*70ae034dSAndrew Kilroy[ 2*70ae034dSAndrew Kilroy { 3*70ae034dSAndrew Kilroy "ArchStdEvent": "CPU_CYCLES" 4*70ae034dSAndrew Kilroy }, 5*70ae034dSAndrew Kilroy { 6*70ae034dSAndrew Kilroy "ArchStdEvent": "BUS_ACCESS" 7*70ae034dSAndrew Kilroy }, 8*70ae034dSAndrew Kilroy { 9*70ae034dSAndrew Kilroy "ArchStdEvent": "BUS_CYCLES" 10*70ae034dSAndrew Kilroy }, 11*70ae034dSAndrew Kilroy { 12*70ae034dSAndrew Kilroy "ArchStdEvent": "BUS_ACCESS_RD" 13*70ae034dSAndrew Kilroy }, 14*70ae034dSAndrew Kilroy { 15*70ae034dSAndrew Kilroy "ArchStdEvent": "BUS_ACCESS_WR" 16*70ae034dSAndrew Kilroy }, 17*70ae034dSAndrew Kilroy { 18*70ae034dSAndrew Kilroy "ArchStdEvent": "CNT_CYCLES" 19*70ae034dSAndrew Kilroy } 20*70ae034dSAndrew Kilroy] 21