xref: /openbmc/linux/tools/perf/perf-sys.h (revision 827634ad)
1 #ifndef _PERF_SYS_H
2 #define _PERF_SYS_H
3 
4 #include <unistd.h>
5 #include <sys/types.h>
6 #include <sys/syscall.h>
7 #include <linux/types.h>
8 #include <linux/perf_event.h>
9 #include <asm/barrier.h>
10 
11 #if defined(__i386__)
12 #define cpu_relax()	asm volatile("rep; nop" ::: "memory");
13 #define CPUINFO_PROC	{"model name"}
14 #ifndef __NR_perf_event_open
15 # define __NR_perf_event_open 336
16 #endif
17 #ifndef __NR_futex
18 # define __NR_futex 240
19 #endif
20 #ifndef __NR_gettid
21 # define __NR_gettid 224
22 #endif
23 #endif
24 
25 #if defined(__x86_64__)
26 #define cpu_relax()	asm volatile("rep; nop" ::: "memory");
27 #define CPUINFO_PROC	{"model name"}
28 #ifndef __NR_perf_event_open
29 # define __NR_perf_event_open 298
30 #endif
31 #ifndef __NR_futex
32 # define __NR_futex 202
33 #endif
34 #ifndef __NR_gettid
35 # define __NR_gettid 186
36 #endif
37 #endif
38 
39 #ifdef __powerpc__
40 #include "../../arch/powerpc/include/uapi/asm/unistd.h"
41 #define CPUINFO_PROC	{"cpu"}
42 #endif
43 
44 #ifdef __s390__
45 #define CPUINFO_PROC	{"vendor_id"}
46 #endif
47 
48 #ifdef __sh__
49 #define CPUINFO_PROC	{"cpu type"}
50 #endif
51 
52 #ifdef __hppa__
53 #define mb()		asm volatile("" ::: "memory")
54 #define wmb()		asm volatile("" ::: "memory")
55 #define rmb()		asm volatile("" ::: "memory")
56 #define CPUINFO_PROC	{"cpu"}
57 #endif
58 
59 #ifdef __sparc__
60 #ifdef __LP64__
61 #define mb()		asm volatile("ba,pt %%xcc, 1f\n"	\
62 				     "membar #StoreLoad\n"	\
63 				     "1:\n":::"memory")
64 #else
65 #define mb()		asm volatile("":::"memory")
66 #endif
67 #define wmb()		asm volatile("":::"memory")
68 #define rmb()		asm volatile("":::"memory")
69 #define CPUINFO_PROC	{"cpu"}
70 #endif
71 
72 #ifdef __alpha__
73 #define mb()		asm volatile("mb" ::: "memory")
74 #define wmb()		asm volatile("wmb" ::: "memory")
75 #define rmb()		asm volatile("mb" ::: "memory")
76 #define CPUINFO_PROC	{"cpu model"}
77 #endif
78 
79 #ifdef __ia64__
80 #define mb()		asm volatile ("mf" ::: "memory")
81 #define wmb()		asm volatile ("mf" ::: "memory")
82 #define rmb()		asm volatile ("mf" ::: "memory")
83 #define cpu_relax()	asm volatile ("hint @pause" ::: "memory")
84 #define CPUINFO_PROC	{"model name"}
85 #endif
86 
87 #ifdef __arm__
88 /*
89  * Use the __kuser_memory_barrier helper in the CPU helper page. See
90  * arch/arm/kernel/entry-armv.S in the kernel source for details.
91  */
92 #define mb()		((void(*)(void))0xffff0fa0)()
93 #define wmb()		((void(*)(void))0xffff0fa0)()
94 #define rmb()		((void(*)(void))0xffff0fa0)()
95 #define CPUINFO_PROC	{"model name", "Processor"}
96 #endif
97 
98 #ifdef __aarch64__
99 #define mb()		asm volatile("dmb ish" ::: "memory")
100 #define wmb()		asm volatile("dmb ishst" ::: "memory")
101 #define rmb()		asm volatile("dmb ishld" ::: "memory")
102 #define cpu_relax()	asm volatile("yield" ::: "memory")
103 #endif
104 
105 #ifdef __mips__
106 #define mb()		asm volatile(					\
107 				".set	mips2\n\t"			\
108 				"sync\n\t"				\
109 				".set	mips0"				\
110 				: /* no output */			\
111 				: /* no input */			\
112 				: "memory")
113 #define wmb()	mb()
114 #define rmb()	mb()
115 #define CPUINFO_PROC	{"cpu model"}
116 #endif
117 
118 #ifdef __arc__
119 #define mb()		asm volatile("" ::: "memory")
120 #define wmb()		asm volatile("" ::: "memory")
121 #define rmb()		asm volatile("" ::: "memory")
122 #define CPUINFO_PROC	{"Processor"}
123 #endif
124 
125 #ifdef __metag__
126 #define mb()		asm volatile("" ::: "memory")
127 #define wmb()		asm volatile("" ::: "memory")
128 #define rmb()		asm volatile("" ::: "memory")
129 #define CPUINFO_PROC	{"CPU"}
130 #endif
131 
132 #ifdef __xtensa__
133 #define mb()		asm volatile("memw" ::: "memory")
134 #define wmb()		asm volatile("memw" ::: "memory")
135 #define rmb()		asm volatile("" ::: "memory")
136 #define CPUINFO_PROC	{"core ID"}
137 #endif
138 
139 #ifdef __tile__
140 #define mb()		asm volatile ("mf" ::: "memory")
141 #define wmb()		asm volatile ("mf" ::: "memory")
142 #define rmb()		asm volatile ("mf" ::: "memory")
143 #define cpu_relax()	asm volatile ("mfspr zero, PASS" ::: "memory")
144 #define CPUINFO_PROC    {"model name"}
145 #endif
146 
147 #ifndef cpu_relax
148 #define cpu_relax() barrier()
149 #endif
150 
151 static inline int
152 sys_perf_event_open(struct perf_event_attr *attr,
153 		      pid_t pid, int cpu, int group_fd,
154 		      unsigned long flags)
155 {
156 	int fd;
157 
158 	fd = syscall(__NR_perf_event_open, attr, pid, cpu,
159 		     group_fd, flags);
160 
161 #ifdef HAVE_ATTR_TEST
162 	if (unlikely(test_attr__enabled))
163 		test_attr__open(attr, pid, cpu, fd, group_fd, flags);
164 #endif
165 	return fd;
166 }
167 
168 #endif /* _PERF_SYS_H */
169