xref: /openbmc/linux/tools/perf/arch/x86/util/intel-pt.c (revision 6b5fc336)
1 /*
2  * intel_pt.c: Intel Processor Trace support
3  * Copyright (c) 2013-2015, Intel Corporation.
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms and conditions of the GNU General Public License,
7  * version 2, as published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope it will be useful, but WITHOUT
10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
12  * more details.
13  *
14  */
15 
16 #include <errno.h>
17 #include <stdbool.h>
18 #include <linux/kernel.h>
19 #include <linux/types.h>
20 #include <linux/bitops.h>
21 #include <linux/log2.h>
22 #include <cpuid.h>
23 
24 #include "../../perf.h"
25 #include "../../util/session.h"
26 #include "../../util/event.h"
27 #include "../../util/evlist.h"
28 #include "../../util/evsel.h"
29 #include "../../util/cpumap.h"
30 #include <subcmd/parse-options.h>
31 #include "../../util/parse-events.h"
32 #include "../../util/pmu.h"
33 #include "../../util/debug.h"
34 #include "../../util/auxtrace.h"
35 #include "../../util/tsc.h"
36 #include "../../util/intel-pt.h"
37 
38 #define KiB(x) ((x) * 1024)
39 #define MiB(x) ((x) * 1024 * 1024)
40 #define KiB_MASK(x) (KiB(x) - 1)
41 #define MiB_MASK(x) (MiB(x) - 1)
42 
43 #define INTEL_PT_PSB_PERIOD_NEAR	256
44 
45 struct intel_pt_snapshot_ref {
46 	void *ref_buf;
47 	size_t ref_offset;
48 	bool wrapped;
49 };
50 
51 struct intel_pt_recording {
52 	struct auxtrace_record		itr;
53 	struct perf_pmu			*intel_pt_pmu;
54 	int				have_sched_switch;
55 	struct perf_evlist		*evlist;
56 	bool				snapshot_mode;
57 	bool				snapshot_init_done;
58 	size_t				snapshot_size;
59 	size_t				snapshot_ref_buf_size;
60 	int				snapshot_ref_cnt;
61 	struct intel_pt_snapshot_ref	*snapshot_refs;
62 	size_t				priv_size;
63 };
64 
65 static int intel_pt_parse_terms_with_default(struct list_head *formats,
66 					     const char *str,
67 					     u64 *config)
68 {
69 	struct list_head *terms;
70 	struct perf_event_attr attr = { .size = 0, };
71 	int err;
72 
73 	terms = malloc(sizeof(struct list_head));
74 	if (!terms)
75 		return -ENOMEM;
76 
77 	INIT_LIST_HEAD(terms);
78 
79 	err = parse_events_terms(terms, str);
80 	if (err)
81 		goto out_free;
82 
83 	attr.config = *config;
84 	err = perf_pmu__config_terms(formats, &attr, terms, true, NULL);
85 	if (err)
86 		goto out_free;
87 
88 	*config = attr.config;
89 out_free:
90 	parse_events_terms__delete(terms);
91 	return err;
92 }
93 
94 static int intel_pt_parse_terms(struct list_head *formats, const char *str,
95 				u64 *config)
96 {
97 	*config = 0;
98 	return intel_pt_parse_terms_with_default(formats, str, config);
99 }
100 
101 static u64 intel_pt_masked_bits(u64 mask, u64 bits)
102 {
103 	const u64 top_bit = 1ULL << 63;
104 	u64 res = 0;
105 	int i;
106 
107 	for (i = 0; i < 64; i++) {
108 		if (mask & top_bit) {
109 			res <<= 1;
110 			if (bits & top_bit)
111 				res |= 1;
112 		}
113 		mask <<= 1;
114 		bits <<= 1;
115 	}
116 
117 	return res;
118 }
119 
120 static int intel_pt_read_config(struct perf_pmu *intel_pt_pmu, const char *str,
121 				struct perf_evlist *evlist, u64 *res)
122 {
123 	struct perf_evsel *evsel;
124 	u64 mask;
125 
126 	*res = 0;
127 
128 	mask = perf_pmu__format_bits(&intel_pt_pmu->format, str);
129 	if (!mask)
130 		return -EINVAL;
131 
132 	evlist__for_each_entry(evlist, evsel) {
133 		if (evsel->attr.type == intel_pt_pmu->type) {
134 			*res = intel_pt_masked_bits(mask, evsel->attr.config);
135 			return 0;
136 		}
137 	}
138 
139 	return -EINVAL;
140 }
141 
142 static size_t intel_pt_psb_period(struct perf_pmu *intel_pt_pmu,
143 				  struct perf_evlist *evlist)
144 {
145 	u64 val;
146 	int err, topa_multiple_entries;
147 	size_t psb_period;
148 
149 	if (perf_pmu__scan_file(intel_pt_pmu, "caps/topa_multiple_entries",
150 				"%d", &topa_multiple_entries) != 1)
151 		topa_multiple_entries = 0;
152 
153 	/*
154 	 * Use caps/topa_multiple_entries to indicate early hardware that had
155 	 * extra frequent PSBs.
156 	 */
157 	if (!topa_multiple_entries) {
158 		psb_period = 256;
159 		goto out;
160 	}
161 
162 	err = intel_pt_read_config(intel_pt_pmu, "psb_period", evlist, &val);
163 	if (err)
164 		val = 0;
165 
166 	psb_period = 1 << (val + 11);
167 out:
168 	pr_debug2("%s psb_period %zu\n", intel_pt_pmu->name, psb_period);
169 	return psb_period;
170 }
171 
172 static int intel_pt_pick_bit(int bits, int target)
173 {
174 	int pos, pick = -1;
175 
176 	for (pos = 0; bits; bits >>= 1, pos++) {
177 		if (bits & 1) {
178 			if (pos <= target || pick < 0)
179 				pick = pos;
180 			if (pos >= target)
181 				break;
182 		}
183 	}
184 
185 	return pick;
186 }
187 
188 static u64 intel_pt_default_config(struct perf_pmu *intel_pt_pmu)
189 {
190 	char buf[256];
191 	int mtc, mtc_periods = 0, mtc_period;
192 	int psb_cyc, psb_periods, psb_period;
193 	int pos = 0;
194 	u64 config;
195 	char c;
196 
197 	pos += scnprintf(buf + pos, sizeof(buf) - pos, "tsc");
198 
199 	if (perf_pmu__scan_file(intel_pt_pmu, "caps/mtc", "%d",
200 				&mtc) != 1)
201 		mtc = 1;
202 
203 	if (mtc) {
204 		if (perf_pmu__scan_file(intel_pt_pmu, "caps/mtc_periods", "%x",
205 					&mtc_periods) != 1)
206 			mtc_periods = 0;
207 		if (mtc_periods) {
208 			mtc_period = intel_pt_pick_bit(mtc_periods, 3);
209 			pos += scnprintf(buf + pos, sizeof(buf) - pos,
210 					 ",mtc,mtc_period=%d", mtc_period);
211 		}
212 	}
213 
214 	if (perf_pmu__scan_file(intel_pt_pmu, "caps/psb_cyc", "%d",
215 				&psb_cyc) != 1)
216 		psb_cyc = 1;
217 
218 	if (psb_cyc && mtc_periods) {
219 		if (perf_pmu__scan_file(intel_pt_pmu, "caps/psb_periods", "%x",
220 					&psb_periods) != 1)
221 			psb_periods = 0;
222 		if (psb_periods) {
223 			psb_period = intel_pt_pick_bit(psb_periods, 3);
224 			pos += scnprintf(buf + pos, sizeof(buf) - pos,
225 					 ",psb_period=%d", psb_period);
226 		}
227 	}
228 
229 	if (perf_pmu__scan_file(intel_pt_pmu, "format/pt", "%c", &c) == 1 &&
230 	    perf_pmu__scan_file(intel_pt_pmu, "format/branch", "%c", &c) == 1)
231 		pos += scnprintf(buf + pos, sizeof(buf) - pos, ",pt,branch");
232 
233 	pr_debug2("%s default config: %s\n", intel_pt_pmu->name, buf);
234 
235 	intel_pt_parse_terms(&intel_pt_pmu->format, buf, &config);
236 
237 	return config;
238 }
239 
240 static int intel_pt_parse_snapshot_options(struct auxtrace_record *itr,
241 					   struct record_opts *opts,
242 					   const char *str)
243 {
244 	struct intel_pt_recording *ptr =
245 			container_of(itr, struct intel_pt_recording, itr);
246 	unsigned long long snapshot_size = 0;
247 	char *endptr;
248 
249 	if (str) {
250 		snapshot_size = strtoull(str, &endptr, 0);
251 		if (*endptr || snapshot_size > SIZE_MAX)
252 			return -1;
253 	}
254 
255 	opts->auxtrace_snapshot_mode = true;
256 	opts->auxtrace_snapshot_size = snapshot_size;
257 
258 	ptr->snapshot_size = snapshot_size;
259 
260 	return 0;
261 }
262 
263 struct perf_event_attr *
264 intel_pt_pmu_default_config(struct perf_pmu *intel_pt_pmu)
265 {
266 	struct perf_event_attr *attr;
267 
268 	attr = zalloc(sizeof(struct perf_event_attr));
269 	if (!attr)
270 		return NULL;
271 
272 	attr->config = intel_pt_default_config(intel_pt_pmu);
273 
274 	intel_pt_pmu->selectable = true;
275 
276 	return attr;
277 }
278 
279 static const char *intel_pt_find_filter(struct perf_evlist *evlist,
280 					struct perf_pmu *intel_pt_pmu)
281 {
282 	struct perf_evsel *evsel;
283 
284 	evlist__for_each_entry(evlist, evsel) {
285 		if (evsel->attr.type == intel_pt_pmu->type)
286 			return evsel->filter;
287 	}
288 
289 	return NULL;
290 }
291 
292 static size_t intel_pt_filter_bytes(const char *filter)
293 {
294 	size_t len = filter ? strlen(filter) : 0;
295 
296 	return len ? roundup(len + 1, 8) : 0;
297 }
298 
299 static size_t
300 intel_pt_info_priv_size(struct auxtrace_record *itr, struct perf_evlist *evlist)
301 {
302 	struct intel_pt_recording *ptr =
303 			container_of(itr, struct intel_pt_recording, itr);
304 	const char *filter = intel_pt_find_filter(evlist, ptr->intel_pt_pmu);
305 
306 	ptr->priv_size = (INTEL_PT_AUXTRACE_PRIV_MAX * sizeof(u64)) +
307 			 intel_pt_filter_bytes(filter);
308 
309 	return ptr->priv_size;
310 }
311 
312 static void intel_pt_tsc_ctc_ratio(u32 *n, u32 *d)
313 {
314 	unsigned int eax = 0, ebx = 0, ecx = 0, edx = 0;
315 
316 	__get_cpuid(0x15, &eax, &ebx, &ecx, &edx);
317 	*n = ebx;
318 	*d = eax;
319 }
320 
321 static int intel_pt_info_fill(struct auxtrace_record *itr,
322 			      struct perf_session *session,
323 			      struct auxtrace_info_event *auxtrace_info,
324 			      size_t priv_size)
325 {
326 	struct intel_pt_recording *ptr =
327 			container_of(itr, struct intel_pt_recording, itr);
328 	struct perf_pmu *intel_pt_pmu = ptr->intel_pt_pmu;
329 	struct perf_event_mmap_page *pc;
330 	struct perf_tsc_conversion tc = { .time_mult = 0, };
331 	bool cap_user_time_zero = false, per_cpu_mmaps;
332 	u64 tsc_bit, mtc_bit, mtc_freq_bits, cyc_bit, noretcomp_bit;
333 	u32 tsc_ctc_ratio_n, tsc_ctc_ratio_d;
334 	unsigned long max_non_turbo_ratio;
335 	size_t filter_str_len;
336 	const char *filter;
337 	u64 *info;
338 	int err;
339 
340 	if (priv_size != ptr->priv_size)
341 		return -EINVAL;
342 
343 	intel_pt_parse_terms(&intel_pt_pmu->format, "tsc", &tsc_bit);
344 	intel_pt_parse_terms(&intel_pt_pmu->format, "noretcomp",
345 			     &noretcomp_bit);
346 	intel_pt_parse_terms(&intel_pt_pmu->format, "mtc", &mtc_bit);
347 	mtc_freq_bits = perf_pmu__format_bits(&intel_pt_pmu->format,
348 					      "mtc_period");
349 	intel_pt_parse_terms(&intel_pt_pmu->format, "cyc", &cyc_bit);
350 
351 	intel_pt_tsc_ctc_ratio(&tsc_ctc_ratio_n, &tsc_ctc_ratio_d);
352 
353 	if (perf_pmu__scan_file(intel_pt_pmu, "max_nonturbo_ratio",
354 				"%lu", &max_non_turbo_ratio) != 1)
355 		max_non_turbo_ratio = 0;
356 
357 	filter = intel_pt_find_filter(session->evlist, ptr->intel_pt_pmu);
358 	filter_str_len = filter ? strlen(filter) : 0;
359 
360 	if (!session->evlist->nr_mmaps)
361 		return -EINVAL;
362 
363 	pc = session->evlist->mmap[0].base;
364 	if (pc) {
365 		err = perf_read_tsc_conversion(pc, &tc);
366 		if (err) {
367 			if (err != -EOPNOTSUPP)
368 				return err;
369 		} else {
370 			cap_user_time_zero = tc.time_mult != 0;
371 		}
372 		if (!cap_user_time_zero)
373 			ui__warning("Intel Processor Trace: TSC not available\n");
374 	}
375 
376 	per_cpu_mmaps = !cpu_map__empty(session->evlist->cpus);
377 
378 	auxtrace_info->type = PERF_AUXTRACE_INTEL_PT;
379 	auxtrace_info->priv[INTEL_PT_PMU_TYPE] = intel_pt_pmu->type;
380 	auxtrace_info->priv[INTEL_PT_TIME_SHIFT] = tc.time_shift;
381 	auxtrace_info->priv[INTEL_PT_TIME_MULT] = tc.time_mult;
382 	auxtrace_info->priv[INTEL_PT_TIME_ZERO] = tc.time_zero;
383 	auxtrace_info->priv[INTEL_PT_CAP_USER_TIME_ZERO] = cap_user_time_zero;
384 	auxtrace_info->priv[INTEL_PT_TSC_BIT] = tsc_bit;
385 	auxtrace_info->priv[INTEL_PT_NORETCOMP_BIT] = noretcomp_bit;
386 	auxtrace_info->priv[INTEL_PT_HAVE_SCHED_SWITCH] = ptr->have_sched_switch;
387 	auxtrace_info->priv[INTEL_PT_SNAPSHOT_MODE] = ptr->snapshot_mode;
388 	auxtrace_info->priv[INTEL_PT_PER_CPU_MMAPS] = per_cpu_mmaps;
389 	auxtrace_info->priv[INTEL_PT_MTC_BIT] = mtc_bit;
390 	auxtrace_info->priv[INTEL_PT_MTC_FREQ_BITS] = mtc_freq_bits;
391 	auxtrace_info->priv[INTEL_PT_TSC_CTC_N] = tsc_ctc_ratio_n;
392 	auxtrace_info->priv[INTEL_PT_TSC_CTC_D] = tsc_ctc_ratio_d;
393 	auxtrace_info->priv[INTEL_PT_CYC_BIT] = cyc_bit;
394 	auxtrace_info->priv[INTEL_PT_MAX_NONTURBO_RATIO] = max_non_turbo_ratio;
395 	auxtrace_info->priv[INTEL_PT_FILTER_STR_LEN] = filter_str_len;
396 
397 	info = &auxtrace_info->priv[INTEL_PT_FILTER_STR_LEN] + 1;
398 
399 	if (filter_str_len) {
400 		size_t len = intel_pt_filter_bytes(filter);
401 
402 		strncpy((char *)info, filter, len);
403 		info += len >> 3;
404 	}
405 
406 	return 0;
407 }
408 
409 static int intel_pt_track_switches(struct perf_evlist *evlist)
410 {
411 	const char *sched_switch = "sched:sched_switch";
412 	struct perf_evsel *evsel;
413 	int err;
414 
415 	if (!perf_evlist__can_select_event(evlist, sched_switch))
416 		return -EPERM;
417 
418 	err = parse_events(evlist, sched_switch, NULL);
419 	if (err) {
420 		pr_debug2("%s: failed to parse %s, error %d\n",
421 			  __func__, sched_switch, err);
422 		return err;
423 	}
424 
425 	evsel = perf_evlist__last(evlist);
426 
427 	perf_evsel__set_sample_bit(evsel, CPU);
428 	perf_evsel__set_sample_bit(evsel, TIME);
429 
430 	evsel->system_wide = true;
431 	evsel->no_aux_samples = true;
432 	evsel->immediate = true;
433 
434 	return 0;
435 }
436 
437 static void intel_pt_valid_str(char *str, size_t len, u64 valid)
438 {
439 	unsigned int val, last = 0, state = 1;
440 	int p = 0;
441 
442 	str[0] = '\0';
443 
444 	for (val = 0; val <= 64; val++, valid >>= 1) {
445 		if (valid & 1) {
446 			last = val;
447 			switch (state) {
448 			case 0:
449 				p += scnprintf(str + p, len - p, ",");
450 				/* Fall through */
451 			case 1:
452 				p += scnprintf(str + p, len - p, "%u", val);
453 				state = 2;
454 				break;
455 			case 2:
456 				state = 3;
457 				break;
458 			case 3:
459 				state = 4;
460 				break;
461 			default:
462 				break;
463 			}
464 		} else {
465 			switch (state) {
466 			case 3:
467 				p += scnprintf(str + p, len - p, ",%u", last);
468 				state = 0;
469 				break;
470 			case 4:
471 				p += scnprintf(str + p, len - p, "-%u", last);
472 				state = 0;
473 				break;
474 			default:
475 				break;
476 			}
477 			if (state != 1)
478 				state = 0;
479 		}
480 	}
481 }
482 
483 static int intel_pt_val_config_term(struct perf_pmu *intel_pt_pmu,
484 				    const char *caps, const char *name,
485 				    const char *supported, u64 config)
486 {
487 	char valid_str[256];
488 	unsigned int shift;
489 	unsigned long long valid;
490 	u64 bits;
491 	int ok;
492 
493 	if (perf_pmu__scan_file(intel_pt_pmu, caps, "%llx", &valid) != 1)
494 		valid = 0;
495 
496 	if (supported &&
497 	    perf_pmu__scan_file(intel_pt_pmu, supported, "%d", &ok) == 1 && !ok)
498 		valid = 0;
499 
500 	valid |= 1;
501 
502 	bits = perf_pmu__format_bits(&intel_pt_pmu->format, name);
503 
504 	config &= bits;
505 
506 	for (shift = 0; bits && !(bits & 1); shift++)
507 		bits >>= 1;
508 
509 	config >>= shift;
510 
511 	if (config > 63)
512 		goto out_err;
513 
514 	if (valid & (1 << config))
515 		return 0;
516 out_err:
517 	intel_pt_valid_str(valid_str, sizeof(valid_str), valid);
518 	pr_err("Invalid %s for %s. Valid values are: %s\n",
519 	       name, INTEL_PT_PMU_NAME, valid_str);
520 	return -EINVAL;
521 }
522 
523 static int intel_pt_validate_config(struct perf_pmu *intel_pt_pmu,
524 				    struct perf_evsel *evsel)
525 {
526 	int err;
527 
528 	if (!evsel)
529 		return 0;
530 
531 	err = intel_pt_val_config_term(intel_pt_pmu, "caps/cycle_thresholds",
532 				       "cyc_thresh", "caps/psb_cyc",
533 				       evsel->attr.config);
534 	if (err)
535 		return err;
536 
537 	err = intel_pt_val_config_term(intel_pt_pmu, "caps/mtc_periods",
538 				       "mtc_period", "caps/mtc",
539 				       evsel->attr.config);
540 	if (err)
541 		return err;
542 
543 	return intel_pt_val_config_term(intel_pt_pmu, "caps/psb_periods",
544 					"psb_period", "caps/psb_cyc",
545 					evsel->attr.config);
546 }
547 
548 static int intel_pt_recording_options(struct auxtrace_record *itr,
549 				      struct perf_evlist *evlist,
550 				      struct record_opts *opts)
551 {
552 	struct intel_pt_recording *ptr =
553 			container_of(itr, struct intel_pt_recording, itr);
554 	struct perf_pmu *intel_pt_pmu = ptr->intel_pt_pmu;
555 	bool have_timing_info, need_immediate = false;
556 	struct perf_evsel *evsel, *intel_pt_evsel = NULL;
557 	const struct cpu_map *cpus = evlist->cpus;
558 	bool privileged = geteuid() == 0 || perf_event_paranoid() < 0;
559 	u64 tsc_bit;
560 	int err;
561 
562 	ptr->evlist = evlist;
563 	ptr->snapshot_mode = opts->auxtrace_snapshot_mode;
564 
565 	evlist__for_each_entry(evlist, evsel) {
566 		if (evsel->attr.type == intel_pt_pmu->type) {
567 			if (intel_pt_evsel) {
568 				pr_err("There may be only one " INTEL_PT_PMU_NAME " event\n");
569 				return -EINVAL;
570 			}
571 			evsel->attr.freq = 0;
572 			evsel->attr.sample_period = 1;
573 			intel_pt_evsel = evsel;
574 			opts->full_auxtrace = true;
575 		}
576 	}
577 
578 	if (opts->auxtrace_snapshot_mode && !opts->full_auxtrace) {
579 		pr_err("Snapshot mode (-S option) requires " INTEL_PT_PMU_NAME " PMU event (-e " INTEL_PT_PMU_NAME ")\n");
580 		return -EINVAL;
581 	}
582 
583 	if (opts->use_clockid) {
584 		pr_err("Cannot use clockid (-k option) with " INTEL_PT_PMU_NAME "\n");
585 		return -EINVAL;
586 	}
587 
588 	if (!opts->full_auxtrace)
589 		return 0;
590 
591 	err = intel_pt_validate_config(intel_pt_pmu, intel_pt_evsel);
592 	if (err)
593 		return err;
594 
595 	/* Set default sizes for snapshot mode */
596 	if (opts->auxtrace_snapshot_mode) {
597 		size_t psb_period = intel_pt_psb_period(intel_pt_pmu, evlist);
598 
599 		if (!opts->auxtrace_snapshot_size && !opts->auxtrace_mmap_pages) {
600 			if (privileged) {
601 				opts->auxtrace_mmap_pages = MiB(4) / page_size;
602 			} else {
603 				opts->auxtrace_mmap_pages = KiB(128) / page_size;
604 				if (opts->mmap_pages == UINT_MAX)
605 					opts->mmap_pages = KiB(256) / page_size;
606 			}
607 		} else if (!opts->auxtrace_mmap_pages && !privileged &&
608 			   opts->mmap_pages == UINT_MAX) {
609 			opts->mmap_pages = KiB(256) / page_size;
610 		}
611 		if (!opts->auxtrace_snapshot_size)
612 			opts->auxtrace_snapshot_size =
613 				opts->auxtrace_mmap_pages * (size_t)page_size;
614 		if (!opts->auxtrace_mmap_pages) {
615 			size_t sz = opts->auxtrace_snapshot_size;
616 
617 			sz = round_up(sz, page_size) / page_size;
618 			opts->auxtrace_mmap_pages = roundup_pow_of_two(sz);
619 		}
620 		if (opts->auxtrace_snapshot_size >
621 				opts->auxtrace_mmap_pages * (size_t)page_size) {
622 			pr_err("Snapshot size %zu must not be greater than AUX area tracing mmap size %zu\n",
623 			       opts->auxtrace_snapshot_size,
624 			       opts->auxtrace_mmap_pages * (size_t)page_size);
625 			return -EINVAL;
626 		}
627 		if (!opts->auxtrace_snapshot_size || !opts->auxtrace_mmap_pages) {
628 			pr_err("Failed to calculate default snapshot size and/or AUX area tracing mmap pages\n");
629 			return -EINVAL;
630 		}
631 		pr_debug2("Intel PT snapshot size: %zu\n",
632 			  opts->auxtrace_snapshot_size);
633 		if (psb_period &&
634 		    opts->auxtrace_snapshot_size <= psb_period +
635 						  INTEL_PT_PSB_PERIOD_NEAR)
636 			ui__warning("Intel PT snapshot size (%zu) may be too small for PSB period (%zu)\n",
637 				    opts->auxtrace_snapshot_size, psb_period);
638 	}
639 
640 	/* Set default sizes for full trace mode */
641 	if (opts->full_auxtrace && !opts->auxtrace_mmap_pages) {
642 		if (privileged) {
643 			opts->auxtrace_mmap_pages = MiB(4) / page_size;
644 		} else {
645 			opts->auxtrace_mmap_pages = KiB(128) / page_size;
646 			if (opts->mmap_pages == UINT_MAX)
647 				opts->mmap_pages = KiB(256) / page_size;
648 		}
649 	}
650 
651 	/* Validate auxtrace_mmap_pages */
652 	if (opts->auxtrace_mmap_pages) {
653 		size_t sz = opts->auxtrace_mmap_pages * (size_t)page_size;
654 		size_t min_sz;
655 
656 		if (opts->auxtrace_snapshot_mode)
657 			min_sz = KiB(4);
658 		else
659 			min_sz = KiB(8);
660 
661 		if (sz < min_sz || !is_power_of_2(sz)) {
662 			pr_err("Invalid mmap size for Intel Processor Trace: must be at least %zuKiB and a power of 2\n",
663 			       min_sz / 1024);
664 			return -EINVAL;
665 		}
666 	}
667 
668 	intel_pt_parse_terms(&intel_pt_pmu->format, "tsc", &tsc_bit);
669 
670 	if (opts->full_auxtrace && (intel_pt_evsel->attr.config & tsc_bit))
671 		have_timing_info = true;
672 	else
673 		have_timing_info = false;
674 
675 	/*
676 	 * Per-cpu recording needs sched_switch events to distinguish different
677 	 * threads.
678 	 */
679 	if (have_timing_info && !cpu_map__empty(cpus)) {
680 		if (perf_can_record_switch_events()) {
681 			bool cpu_wide = !target__none(&opts->target) &&
682 					!target__has_task(&opts->target);
683 
684 			if (!cpu_wide && perf_can_record_cpu_wide()) {
685 				struct perf_evsel *switch_evsel;
686 
687 				err = parse_events(evlist, "dummy:u", NULL);
688 				if (err)
689 					return err;
690 
691 				switch_evsel = perf_evlist__last(evlist);
692 
693 				switch_evsel->attr.freq = 0;
694 				switch_evsel->attr.sample_period = 1;
695 				switch_evsel->attr.context_switch = 1;
696 
697 				switch_evsel->system_wide = true;
698 				switch_evsel->no_aux_samples = true;
699 				switch_evsel->immediate = true;
700 
701 				perf_evsel__set_sample_bit(switch_evsel, TID);
702 				perf_evsel__set_sample_bit(switch_evsel, TIME);
703 				perf_evsel__set_sample_bit(switch_evsel, CPU);
704 
705 				opts->record_switch_events = false;
706 				ptr->have_sched_switch = 3;
707 			} else {
708 				opts->record_switch_events = true;
709 				need_immediate = true;
710 				if (cpu_wide)
711 					ptr->have_sched_switch = 3;
712 				else
713 					ptr->have_sched_switch = 2;
714 			}
715 		} else {
716 			err = intel_pt_track_switches(evlist);
717 			if (err == -EPERM)
718 				pr_debug2("Unable to select sched:sched_switch\n");
719 			else if (err)
720 				return err;
721 			else
722 				ptr->have_sched_switch = 1;
723 		}
724 	}
725 
726 	if (intel_pt_evsel) {
727 		/*
728 		 * To obtain the auxtrace buffer file descriptor, the auxtrace
729 		 * event must come first.
730 		 */
731 		perf_evlist__to_front(evlist, intel_pt_evsel);
732 		/*
733 		 * In the case of per-cpu mmaps, we need the CPU on the
734 		 * AUX event.
735 		 */
736 		if (!cpu_map__empty(cpus))
737 			perf_evsel__set_sample_bit(intel_pt_evsel, CPU);
738 	}
739 
740 	/* Add dummy event to keep tracking */
741 	if (opts->full_auxtrace) {
742 		struct perf_evsel *tracking_evsel;
743 
744 		err = parse_events(evlist, "dummy:u", NULL);
745 		if (err)
746 			return err;
747 
748 		tracking_evsel = perf_evlist__last(evlist);
749 
750 		perf_evlist__set_tracking_event(evlist, tracking_evsel);
751 
752 		tracking_evsel->attr.freq = 0;
753 		tracking_evsel->attr.sample_period = 1;
754 
755 		if (need_immediate)
756 			tracking_evsel->immediate = true;
757 
758 		/* In per-cpu case, always need the time of mmap events etc */
759 		if (!cpu_map__empty(cpus)) {
760 			perf_evsel__set_sample_bit(tracking_evsel, TIME);
761 			/* And the CPU for switch events */
762 			perf_evsel__set_sample_bit(tracking_evsel, CPU);
763 		}
764 	}
765 
766 	/*
767 	 * Warn the user when we do not have enough information to decode i.e.
768 	 * per-cpu with no sched_switch (except workload-only).
769 	 */
770 	if (!ptr->have_sched_switch && !cpu_map__empty(cpus) &&
771 	    !target__none(&opts->target))
772 		ui__warning("Intel Processor Trace decoding will not be possible except for kernel tracing!\n");
773 
774 	return 0;
775 }
776 
777 static int intel_pt_snapshot_start(struct auxtrace_record *itr)
778 {
779 	struct intel_pt_recording *ptr =
780 			container_of(itr, struct intel_pt_recording, itr);
781 	struct perf_evsel *evsel;
782 
783 	evlist__for_each_entry(ptr->evlist, evsel) {
784 		if (evsel->attr.type == ptr->intel_pt_pmu->type)
785 			return perf_evsel__disable(evsel);
786 	}
787 	return -EINVAL;
788 }
789 
790 static int intel_pt_snapshot_finish(struct auxtrace_record *itr)
791 {
792 	struct intel_pt_recording *ptr =
793 			container_of(itr, struct intel_pt_recording, itr);
794 	struct perf_evsel *evsel;
795 
796 	evlist__for_each_entry(ptr->evlist, evsel) {
797 		if (evsel->attr.type == ptr->intel_pt_pmu->type)
798 			return perf_evsel__enable(evsel);
799 	}
800 	return -EINVAL;
801 }
802 
803 static int intel_pt_alloc_snapshot_refs(struct intel_pt_recording *ptr, int idx)
804 {
805 	const size_t sz = sizeof(struct intel_pt_snapshot_ref);
806 	int cnt = ptr->snapshot_ref_cnt, new_cnt = cnt * 2;
807 	struct intel_pt_snapshot_ref *refs;
808 
809 	if (!new_cnt)
810 		new_cnt = 16;
811 
812 	while (new_cnt <= idx)
813 		new_cnt *= 2;
814 
815 	refs = calloc(new_cnt, sz);
816 	if (!refs)
817 		return -ENOMEM;
818 
819 	memcpy(refs, ptr->snapshot_refs, cnt * sz);
820 
821 	ptr->snapshot_refs = refs;
822 	ptr->snapshot_ref_cnt = new_cnt;
823 
824 	return 0;
825 }
826 
827 static void intel_pt_free_snapshot_refs(struct intel_pt_recording *ptr)
828 {
829 	int i;
830 
831 	for (i = 0; i < ptr->snapshot_ref_cnt; i++)
832 		zfree(&ptr->snapshot_refs[i].ref_buf);
833 	zfree(&ptr->snapshot_refs);
834 }
835 
836 static void intel_pt_recording_free(struct auxtrace_record *itr)
837 {
838 	struct intel_pt_recording *ptr =
839 			container_of(itr, struct intel_pt_recording, itr);
840 
841 	intel_pt_free_snapshot_refs(ptr);
842 	free(ptr);
843 }
844 
845 static int intel_pt_alloc_snapshot_ref(struct intel_pt_recording *ptr, int idx,
846 				       size_t snapshot_buf_size)
847 {
848 	size_t ref_buf_size = ptr->snapshot_ref_buf_size;
849 	void *ref_buf;
850 
851 	ref_buf = zalloc(ref_buf_size);
852 	if (!ref_buf)
853 		return -ENOMEM;
854 
855 	ptr->snapshot_refs[idx].ref_buf = ref_buf;
856 	ptr->snapshot_refs[idx].ref_offset = snapshot_buf_size - ref_buf_size;
857 
858 	return 0;
859 }
860 
861 static size_t intel_pt_snapshot_ref_buf_size(struct intel_pt_recording *ptr,
862 					     size_t snapshot_buf_size)
863 {
864 	const size_t max_size = 256 * 1024;
865 	size_t buf_size = 0, psb_period;
866 
867 	if (ptr->snapshot_size <= 64 * 1024)
868 		return 0;
869 
870 	psb_period = intel_pt_psb_period(ptr->intel_pt_pmu, ptr->evlist);
871 	if (psb_period)
872 		buf_size = psb_period * 2;
873 
874 	if (!buf_size || buf_size > max_size)
875 		buf_size = max_size;
876 
877 	if (buf_size >= snapshot_buf_size)
878 		return 0;
879 
880 	if (buf_size >= ptr->snapshot_size / 2)
881 		return 0;
882 
883 	return buf_size;
884 }
885 
886 static int intel_pt_snapshot_init(struct intel_pt_recording *ptr,
887 				  size_t snapshot_buf_size)
888 {
889 	if (ptr->snapshot_init_done)
890 		return 0;
891 
892 	ptr->snapshot_init_done = true;
893 
894 	ptr->snapshot_ref_buf_size = intel_pt_snapshot_ref_buf_size(ptr,
895 							snapshot_buf_size);
896 
897 	return 0;
898 }
899 
900 /**
901  * intel_pt_compare_buffers - compare bytes in a buffer to a circular buffer.
902  * @buf1: first buffer
903  * @compare_size: number of bytes to compare
904  * @buf2: second buffer (a circular buffer)
905  * @offs2: offset in second buffer
906  * @buf2_size: size of second buffer
907  *
908  * The comparison allows for the possibility that the bytes to compare in the
909  * circular buffer are not contiguous.  It is assumed that @compare_size <=
910  * @buf2_size.  This function returns %false if the bytes are identical, %true
911  * otherwise.
912  */
913 static bool intel_pt_compare_buffers(void *buf1, size_t compare_size,
914 				     void *buf2, size_t offs2, size_t buf2_size)
915 {
916 	size_t end2 = offs2 + compare_size, part_size;
917 
918 	if (end2 <= buf2_size)
919 		return memcmp(buf1, buf2 + offs2, compare_size);
920 
921 	part_size = end2 - buf2_size;
922 	if (memcmp(buf1, buf2 + offs2, part_size))
923 		return true;
924 
925 	compare_size -= part_size;
926 
927 	return memcmp(buf1 + part_size, buf2, compare_size);
928 }
929 
930 static bool intel_pt_compare_ref(void *ref_buf, size_t ref_offset,
931 				 size_t ref_size, size_t buf_size,
932 				 void *data, size_t head)
933 {
934 	size_t ref_end = ref_offset + ref_size;
935 
936 	if (ref_end > buf_size) {
937 		if (head > ref_offset || head < ref_end - buf_size)
938 			return true;
939 	} else if (head > ref_offset && head < ref_end) {
940 		return true;
941 	}
942 
943 	return intel_pt_compare_buffers(ref_buf, ref_size, data, ref_offset,
944 					buf_size);
945 }
946 
947 static void intel_pt_copy_ref(void *ref_buf, size_t ref_size, size_t buf_size,
948 			      void *data, size_t head)
949 {
950 	if (head >= ref_size) {
951 		memcpy(ref_buf, data + head - ref_size, ref_size);
952 	} else {
953 		memcpy(ref_buf, data, head);
954 		ref_size -= head;
955 		memcpy(ref_buf + head, data + buf_size - ref_size, ref_size);
956 	}
957 }
958 
959 static bool intel_pt_wrapped(struct intel_pt_recording *ptr, int idx,
960 			     struct auxtrace_mmap *mm, unsigned char *data,
961 			     u64 head)
962 {
963 	struct intel_pt_snapshot_ref *ref = &ptr->snapshot_refs[idx];
964 	bool wrapped;
965 
966 	wrapped = intel_pt_compare_ref(ref->ref_buf, ref->ref_offset,
967 				       ptr->snapshot_ref_buf_size, mm->len,
968 				       data, head);
969 
970 	intel_pt_copy_ref(ref->ref_buf, ptr->snapshot_ref_buf_size, mm->len,
971 			  data, head);
972 
973 	return wrapped;
974 }
975 
976 static bool intel_pt_first_wrap(u64 *data, size_t buf_size)
977 {
978 	int i, a, b;
979 
980 	b = buf_size >> 3;
981 	a = b - 512;
982 	if (a < 0)
983 		a = 0;
984 
985 	for (i = a; i < b; i++) {
986 		if (data[i])
987 			return true;
988 	}
989 
990 	return false;
991 }
992 
993 static int intel_pt_find_snapshot(struct auxtrace_record *itr, int idx,
994 				  struct auxtrace_mmap *mm, unsigned char *data,
995 				  u64 *head, u64 *old)
996 {
997 	struct intel_pt_recording *ptr =
998 			container_of(itr, struct intel_pt_recording, itr);
999 	bool wrapped;
1000 	int err;
1001 
1002 	pr_debug3("%s: mmap index %d old head %zu new head %zu\n",
1003 		  __func__, idx, (size_t)*old, (size_t)*head);
1004 
1005 	err = intel_pt_snapshot_init(ptr, mm->len);
1006 	if (err)
1007 		goto out_err;
1008 
1009 	if (idx >= ptr->snapshot_ref_cnt) {
1010 		err = intel_pt_alloc_snapshot_refs(ptr, idx);
1011 		if (err)
1012 			goto out_err;
1013 	}
1014 
1015 	if (ptr->snapshot_ref_buf_size) {
1016 		if (!ptr->snapshot_refs[idx].ref_buf) {
1017 			err = intel_pt_alloc_snapshot_ref(ptr, idx, mm->len);
1018 			if (err)
1019 				goto out_err;
1020 		}
1021 		wrapped = intel_pt_wrapped(ptr, idx, mm, data, *head);
1022 	} else {
1023 		wrapped = ptr->snapshot_refs[idx].wrapped;
1024 		if (!wrapped && intel_pt_first_wrap((u64 *)data, mm->len)) {
1025 			ptr->snapshot_refs[idx].wrapped = true;
1026 			wrapped = true;
1027 		}
1028 	}
1029 
1030 	/*
1031 	 * In full trace mode 'head' continually increases.  However in snapshot
1032 	 * mode 'head' is an offset within the buffer.  Here 'old' and 'head'
1033 	 * are adjusted to match the full trace case which expects that 'old' is
1034 	 * always less than 'head'.
1035 	 */
1036 	if (wrapped) {
1037 		*old = *head;
1038 		*head += mm->len;
1039 	} else {
1040 		if (mm->mask)
1041 			*old &= mm->mask;
1042 		else
1043 			*old %= mm->len;
1044 		if (*old > *head)
1045 			*head += mm->len;
1046 	}
1047 
1048 	pr_debug3("%s: wrap-around %sdetected, adjusted old head %zu adjusted new head %zu\n",
1049 		  __func__, wrapped ? "" : "not ", (size_t)*old, (size_t)*head);
1050 
1051 	return 0;
1052 
1053 out_err:
1054 	pr_err("%s: failed, error %d\n", __func__, err);
1055 	return err;
1056 }
1057 
1058 static u64 intel_pt_reference(struct auxtrace_record *itr __maybe_unused)
1059 {
1060 	return rdtsc();
1061 }
1062 
1063 static int intel_pt_read_finish(struct auxtrace_record *itr, int idx)
1064 {
1065 	struct intel_pt_recording *ptr =
1066 			container_of(itr, struct intel_pt_recording, itr);
1067 	struct perf_evsel *evsel;
1068 
1069 	evlist__for_each_entry(ptr->evlist, evsel) {
1070 		if (evsel->attr.type == ptr->intel_pt_pmu->type)
1071 			return perf_evlist__enable_event_idx(ptr->evlist, evsel,
1072 							     idx);
1073 	}
1074 	return -EINVAL;
1075 }
1076 
1077 struct auxtrace_record *intel_pt_recording_init(int *err)
1078 {
1079 	struct perf_pmu *intel_pt_pmu = perf_pmu__find(INTEL_PT_PMU_NAME);
1080 	struct intel_pt_recording *ptr;
1081 
1082 	if (!intel_pt_pmu)
1083 		return NULL;
1084 
1085 	if (setenv("JITDUMP_USE_ARCH_TIMESTAMP", "1", 1)) {
1086 		*err = -errno;
1087 		return NULL;
1088 	}
1089 
1090 	ptr = zalloc(sizeof(struct intel_pt_recording));
1091 	if (!ptr) {
1092 		*err = -ENOMEM;
1093 		return NULL;
1094 	}
1095 
1096 	ptr->intel_pt_pmu = intel_pt_pmu;
1097 	ptr->itr.recording_options = intel_pt_recording_options;
1098 	ptr->itr.info_priv_size = intel_pt_info_priv_size;
1099 	ptr->itr.info_fill = intel_pt_info_fill;
1100 	ptr->itr.free = intel_pt_recording_free;
1101 	ptr->itr.snapshot_start = intel_pt_snapshot_start;
1102 	ptr->itr.snapshot_finish = intel_pt_snapshot_finish;
1103 	ptr->itr.find_snapshot = intel_pt_find_snapshot;
1104 	ptr->itr.parse_snapshot_options = intel_pt_parse_snapshot_options;
1105 	ptr->itr.reference = intel_pt_reference;
1106 	ptr->itr.read_finish = intel_pt_read_finish;
1107 	return &ptr->itr;
1108 }
1109