1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * intel_pt.c: Intel Processor Trace support 4 * Copyright (c) 2013-2015, Intel Corporation. 5 */ 6 7 #include <errno.h> 8 #include <stdbool.h> 9 #include <linux/kernel.h> 10 #include <linux/types.h> 11 #include <linux/bitops.h> 12 #include <linux/log2.h> 13 #include <linux/zalloc.h> 14 #include <cpuid.h> 15 16 #include "../../../util/session.h" 17 #include "../../../util/event.h" 18 #include "../../../util/evlist.h" 19 #include "../../../util/evsel.h" 20 #include "../../../util/evsel_config.h" 21 #include "../../../util/cpumap.h" 22 #include "../../../util/mmap.h" 23 #include <subcmd/parse-options.h> 24 #include "../../../util/parse-events.h" 25 #include "../../../util/pmu.h" 26 #include "../../../util/debug.h" 27 #include "../../../util/auxtrace.h" 28 #include "../../../util/perf_api_probe.h" 29 #include "../../../util/record.h" 30 #include "../../../util/target.h" 31 #include "../../../util/tsc.h" 32 #include <internal/lib.h> // page_size 33 #include "../../../util/intel-pt.h" 34 35 #define KiB(x) ((x) * 1024) 36 #define MiB(x) ((x) * 1024 * 1024) 37 #define KiB_MASK(x) (KiB(x) - 1) 38 #define MiB_MASK(x) (MiB(x) - 1) 39 40 #define INTEL_PT_PSB_PERIOD_NEAR 256 41 42 struct intel_pt_snapshot_ref { 43 void *ref_buf; 44 size_t ref_offset; 45 bool wrapped; 46 }; 47 48 struct intel_pt_recording { 49 struct auxtrace_record itr; 50 struct perf_pmu *intel_pt_pmu; 51 int have_sched_switch; 52 struct evlist *evlist; 53 bool snapshot_mode; 54 bool snapshot_init_done; 55 size_t snapshot_size; 56 size_t snapshot_ref_buf_size; 57 int snapshot_ref_cnt; 58 struct intel_pt_snapshot_ref *snapshot_refs; 59 size_t priv_size; 60 }; 61 62 static int intel_pt_parse_terms_with_default(const char *pmu_name, 63 struct list_head *formats, 64 const char *str, 65 u64 *config) 66 { 67 struct list_head *terms; 68 struct perf_event_attr attr = { .size = 0, }; 69 int err; 70 71 terms = malloc(sizeof(struct list_head)); 72 if (!terms) 73 return -ENOMEM; 74 75 INIT_LIST_HEAD(terms); 76 77 err = parse_events_terms(terms, str); 78 if (err) 79 goto out_free; 80 81 attr.config = *config; 82 err = perf_pmu__config_terms(pmu_name, formats, &attr, terms, true, 83 NULL); 84 if (err) 85 goto out_free; 86 87 *config = attr.config; 88 out_free: 89 parse_events_terms__delete(terms); 90 return err; 91 } 92 93 static int intel_pt_parse_terms(const char *pmu_name, struct list_head *formats, 94 const char *str, u64 *config) 95 { 96 *config = 0; 97 return intel_pt_parse_terms_with_default(pmu_name, formats, str, 98 config); 99 } 100 101 static u64 intel_pt_masked_bits(u64 mask, u64 bits) 102 { 103 const u64 top_bit = 1ULL << 63; 104 u64 res = 0; 105 int i; 106 107 for (i = 0; i < 64; i++) { 108 if (mask & top_bit) { 109 res <<= 1; 110 if (bits & top_bit) 111 res |= 1; 112 } 113 mask <<= 1; 114 bits <<= 1; 115 } 116 117 return res; 118 } 119 120 static int intel_pt_read_config(struct perf_pmu *intel_pt_pmu, const char *str, 121 struct evlist *evlist, u64 *res) 122 { 123 struct evsel *evsel; 124 u64 mask; 125 126 *res = 0; 127 128 mask = perf_pmu__format_bits(&intel_pt_pmu->format, str); 129 if (!mask) 130 return -EINVAL; 131 132 evlist__for_each_entry(evlist, evsel) { 133 if (evsel->core.attr.type == intel_pt_pmu->type) { 134 *res = intel_pt_masked_bits(mask, evsel->core.attr.config); 135 return 0; 136 } 137 } 138 139 return -EINVAL; 140 } 141 142 static size_t intel_pt_psb_period(struct perf_pmu *intel_pt_pmu, 143 struct evlist *evlist) 144 { 145 u64 val; 146 int err, topa_multiple_entries; 147 size_t psb_period; 148 149 if (perf_pmu__scan_file(intel_pt_pmu, "caps/topa_multiple_entries", 150 "%d", &topa_multiple_entries) != 1) 151 topa_multiple_entries = 0; 152 153 /* 154 * Use caps/topa_multiple_entries to indicate early hardware that had 155 * extra frequent PSBs. 156 */ 157 if (!topa_multiple_entries) { 158 psb_period = 256; 159 goto out; 160 } 161 162 err = intel_pt_read_config(intel_pt_pmu, "psb_period", evlist, &val); 163 if (err) 164 val = 0; 165 166 psb_period = 1 << (val + 11); 167 out: 168 pr_debug2("%s psb_period %zu\n", intel_pt_pmu->name, psb_period); 169 return psb_period; 170 } 171 172 static int intel_pt_pick_bit(int bits, int target) 173 { 174 int pos, pick = -1; 175 176 for (pos = 0; bits; bits >>= 1, pos++) { 177 if (bits & 1) { 178 if (pos <= target || pick < 0) 179 pick = pos; 180 if (pos >= target) 181 break; 182 } 183 } 184 185 return pick; 186 } 187 188 static u64 intel_pt_default_config(struct perf_pmu *intel_pt_pmu) 189 { 190 char buf[256]; 191 int mtc, mtc_periods = 0, mtc_period; 192 int psb_cyc, psb_periods, psb_period; 193 int pos = 0; 194 u64 config; 195 char c; 196 197 pos += scnprintf(buf + pos, sizeof(buf) - pos, "tsc"); 198 199 if (perf_pmu__scan_file(intel_pt_pmu, "caps/mtc", "%d", 200 &mtc) != 1) 201 mtc = 1; 202 203 if (mtc) { 204 if (perf_pmu__scan_file(intel_pt_pmu, "caps/mtc_periods", "%x", 205 &mtc_periods) != 1) 206 mtc_periods = 0; 207 if (mtc_periods) { 208 mtc_period = intel_pt_pick_bit(mtc_periods, 3); 209 pos += scnprintf(buf + pos, sizeof(buf) - pos, 210 ",mtc,mtc_period=%d", mtc_period); 211 } 212 } 213 214 if (perf_pmu__scan_file(intel_pt_pmu, "caps/psb_cyc", "%d", 215 &psb_cyc) != 1) 216 psb_cyc = 1; 217 218 if (psb_cyc && mtc_periods) { 219 if (perf_pmu__scan_file(intel_pt_pmu, "caps/psb_periods", "%x", 220 &psb_periods) != 1) 221 psb_periods = 0; 222 if (psb_periods) { 223 psb_period = intel_pt_pick_bit(psb_periods, 3); 224 pos += scnprintf(buf + pos, sizeof(buf) - pos, 225 ",psb_period=%d", psb_period); 226 } 227 } 228 229 if (perf_pmu__scan_file(intel_pt_pmu, "format/pt", "%c", &c) == 1 && 230 perf_pmu__scan_file(intel_pt_pmu, "format/branch", "%c", &c) == 1) 231 pos += scnprintf(buf + pos, sizeof(buf) - pos, ",pt,branch"); 232 233 pr_debug2("%s default config: %s\n", intel_pt_pmu->name, buf); 234 235 intel_pt_parse_terms(intel_pt_pmu->name, &intel_pt_pmu->format, buf, 236 &config); 237 238 return config; 239 } 240 241 static int intel_pt_parse_snapshot_options(struct auxtrace_record *itr, 242 struct record_opts *opts, 243 const char *str) 244 { 245 struct intel_pt_recording *ptr = 246 container_of(itr, struct intel_pt_recording, itr); 247 unsigned long long snapshot_size = 0; 248 char *endptr; 249 250 if (str) { 251 snapshot_size = strtoull(str, &endptr, 0); 252 if (*endptr || snapshot_size > SIZE_MAX) 253 return -1; 254 } 255 256 opts->auxtrace_snapshot_mode = true; 257 opts->auxtrace_snapshot_size = snapshot_size; 258 259 ptr->snapshot_size = snapshot_size; 260 261 return 0; 262 } 263 264 struct perf_event_attr * 265 intel_pt_pmu_default_config(struct perf_pmu *intel_pt_pmu) 266 { 267 struct perf_event_attr *attr; 268 269 attr = zalloc(sizeof(struct perf_event_attr)); 270 if (!attr) 271 return NULL; 272 273 attr->config = intel_pt_default_config(intel_pt_pmu); 274 275 intel_pt_pmu->selectable = true; 276 277 return attr; 278 } 279 280 static const char *intel_pt_find_filter(struct evlist *evlist, 281 struct perf_pmu *intel_pt_pmu) 282 { 283 struct evsel *evsel; 284 285 evlist__for_each_entry(evlist, evsel) { 286 if (evsel->core.attr.type == intel_pt_pmu->type) 287 return evsel->filter; 288 } 289 290 return NULL; 291 } 292 293 static size_t intel_pt_filter_bytes(const char *filter) 294 { 295 size_t len = filter ? strlen(filter) : 0; 296 297 return len ? roundup(len + 1, 8) : 0; 298 } 299 300 static size_t 301 intel_pt_info_priv_size(struct auxtrace_record *itr, struct evlist *evlist) 302 { 303 struct intel_pt_recording *ptr = 304 container_of(itr, struct intel_pt_recording, itr); 305 const char *filter = intel_pt_find_filter(evlist, ptr->intel_pt_pmu); 306 307 ptr->priv_size = (INTEL_PT_AUXTRACE_PRIV_MAX * sizeof(u64)) + 308 intel_pt_filter_bytes(filter); 309 ptr->priv_size += sizeof(u64); /* Cap Event Trace */ 310 311 return ptr->priv_size; 312 } 313 314 static void intel_pt_tsc_ctc_ratio(u32 *n, u32 *d) 315 { 316 unsigned int eax = 0, ebx = 0, ecx = 0, edx = 0; 317 318 __get_cpuid(0x15, &eax, &ebx, &ecx, &edx); 319 *n = ebx; 320 *d = eax; 321 } 322 323 static int intel_pt_info_fill(struct auxtrace_record *itr, 324 struct perf_session *session, 325 struct perf_record_auxtrace_info *auxtrace_info, 326 size_t priv_size) 327 { 328 struct intel_pt_recording *ptr = 329 container_of(itr, struct intel_pt_recording, itr); 330 struct perf_pmu *intel_pt_pmu = ptr->intel_pt_pmu; 331 struct perf_event_mmap_page *pc; 332 struct perf_tsc_conversion tc = { .time_mult = 0, }; 333 bool cap_user_time_zero = false, per_cpu_mmaps; 334 u64 tsc_bit, mtc_bit, mtc_freq_bits, cyc_bit, noretcomp_bit; 335 u32 tsc_ctc_ratio_n, tsc_ctc_ratio_d; 336 unsigned long max_non_turbo_ratio; 337 size_t filter_str_len; 338 const char *filter; 339 int event_trace; 340 __u64 *info; 341 int err; 342 343 if (priv_size != ptr->priv_size) 344 return -EINVAL; 345 346 intel_pt_parse_terms(intel_pt_pmu->name, &intel_pt_pmu->format, 347 "tsc", &tsc_bit); 348 intel_pt_parse_terms(intel_pt_pmu->name, &intel_pt_pmu->format, 349 "noretcomp", &noretcomp_bit); 350 intel_pt_parse_terms(intel_pt_pmu->name, &intel_pt_pmu->format, 351 "mtc", &mtc_bit); 352 mtc_freq_bits = perf_pmu__format_bits(&intel_pt_pmu->format, 353 "mtc_period"); 354 intel_pt_parse_terms(intel_pt_pmu->name, &intel_pt_pmu->format, 355 "cyc", &cyc_bit); 356 357 intel_pt_tsc_ctc_ratio(&tsc_ctc_ratio_n, &tsc_ctc_ratio_d); 358 359 if (perf_pmu__scan_file(intel_pt_pmu, "max_nonturbo_ratio", 360 "%lu", &max_non_turbo_ratio) != 1) 361 max_non_turbo_ratio = 0; 362 if (perf_pmu__scan_file(intel_pt_pmu, "caps/event_trace", 363 "%d", &event_trace) != 1) 364 event_trace = 0; 365 366 filter = intel_pt_find_filter(session->evlist, ptr->intel_pt_pmu); 367 filter_str_len = filter ? strlen(filter) : 0; 368 369 if (!session->evlist->core.nr_mmaps) 370 return -EINVAL; 371 372 pc = session->evlist->mmap[0].core.base; 373 if (pc) { 374 err = perf_read_tsc_conversion(pc, &tc); 375 if (err) { 376 if (err != -EOPNOTSUPP) 377 return err; 378 } else { 379 cap_user_time_zero = tc.time_mult != 0; 380 } 381 if (!cap_user_time_zero) 382 ui__warning("Intel Processor Trace: TSC not available\n"); 383 } 384 385 per_cpu_mmaps = !perf_cpu_map__empty(session->evlist->core.user_requested_cpus); 386 387 auxtrace_info->type = PERF_AUXTRACE_INTEL_PT; 388 auxtrace_info->priv[INTEL_PT_PMU_TYPE] = intel_pt_pmu->type; 389 auxtrace_info->priv[INTEL_PT_TIME_SHIFT] = tc.time_shift; 390 auxtrace_info->priv[INTEL_PT_TIME_MULT] = tc.time_mult; 391 auxtrace_info->priv[INTEL_PT_TIME_ZERO] = tc.time_zero; 392 auxtrace_info->priv[INTEL_PT_CAP_USER_TIME_ZERO] = cap_user_time_zero; 393 auxtrace_info->priv[INTEL_PT_TSC_BIT] = tsc_bit; 394 auxtrace_info->priv[INTEL_PT_NORETCOMP_BIT] = noretcomp_bit; 395 auxtrace_info->priv[INTEL_PT_HAVE_SCHED_SWITCH] = ptr->have_sched_switch; 396 auxtrace_info->priv[INTEL_PT_SNAPSHOT_MODE] = ptr->snapshot_mode; 397 auxtrace_info->priv[INTEL_PT_PER_CPU_MMAPS] = per_cpu_mmaps; 398 auxtrace_info->priv[INTEL_PT_MTC_BIT] = mtc_bit; 399 auxtrace_info->priv[INTEL_PT_MTC_FREQ_BITS] = mtc_freq_bits; 400 auxtrace_info->priv[INTEL_PT_TSC_CTC_N] = tsc_ctc_ratio_n; 401 auxtrace_info->priv[INTEL_PT_TSC_CTC_D] = tsc_ctc_ratio_d; 402 auxtrace_info->priv[INTEL_PT_CYC_BIT] = cyc_bit; 403 auxtrace_info->priv[INTEL_PT_MAX_NONTURBO_RATIO] = max_non_turbo_ratio; 404 auxtrace_info->priv[INTEL_PT_FILTER_STR_LEN] = filter_str_len; 405 406 info = &auxtrace_info->priv[INTEL_PT_FILTER_STR_LEN] + 1; 407 408 if (filter_str_len) { 409 size_t len = intel_pt_filter_bytes(filter); 410 411 strncpy((char *)info, filter, len); 412 info += len >> 3; 413 } 414 415 *info++ = event_trace; 416 417 return 0; 418 } 419 420 static int intel_pt_track_switches(struct evlist *evlist) 421 { 422 const char *sched_switch = "sched:sched_switch"; 423 struct evsel *evsel; 424 int err; 425 426 if (!evlist__can_select_event(evlist, sched_switch)) 427 return -EPERM; 428 429 err = parse_event(evlist, sched_switch); 430 if (err) { 431 pr_debug2("%s: failed to parse %s, error %d\n", 432 __func__, sched_switch, err); 433 return err; 434 } 435 436 evsel = evlist__last(evlist); 437 438 evsel__set_sample_bit(evsel, CPU); 439 evsel__set_sample_bit(evsel, TIME); 440 441 evsel->core.system_wide = true; 442 evsel->no_aux_samples = true; 443 evsel->immediate = true; 444 445 return 0; 446 } 447 448 static void intel_pt_valid_str(char *str, size_t len, u64 valid) 449 { 450 unsigned int val, last = 0, state = 1; 451 int p = 0; 452 453 str[0] = '\0'; 454 455 for (val = 0; val <= 64; val++, valid >>= 1) { 456 if (valid & 1) { 457 last = val; 458 switch (state) { 459 case 0: 460 p += scnprintf(str + p, len - p, ","); 461 /* Fall through */ 462 case 1: 463 p += scnprintf(str + p, len - p, "%u", val); 464 state = 2; 465 break; 466 case 2: 467 state = 3; 468 break; 469 case 3: 470 state = 4; 471 break; 472 default: 473 break; 474 } 475 } else { 476 switch (state) { 477 case 3: 478 p += scnprintf(str + p, len - p, ",%u", last); 479 state = 0; 480 break; 481 case 4: 482 p += scnprintf(str + p, len - p, "-%u", last); 483 state = 0; 484 break; 485 default: 486 break; 487 } 488 if (state != 1) 489 state = 0; 490 } 491 } 492 } 493 494 static int intel_pt_val_config_term(struct perf_pmu *intel_pt_pmu, 495 const char *caps, const char *name, 496 const char *supported, u64 config) 497 { 498 char valid_str[256]; 499 unsigned int shift; 500 unsigned long long valid; 501 u64 bits; 502 int ok; 503 504 if (perf_pmu__scan_file(intel_pt_pmu, caps, "%llx", &valid) != 1) 505 valid = 0; 506 507 if (supported && 508 perf_pmu__scan_file(intel_pt_pmu, supported, "%d", &ok) == 1 && !ok) 509 valid = 0; 510 511 valid |= 1; 512 513 bits = perf_pmu__format_bits(&intel_pt_pmu->format, name); 514 515 config &= bits; 516 517 for (shift = 0; bits && !(bits & 1); shift++) 518 bits >>= 1; 519 520 config >>= shift; 521 522 if (config > 63) 523 goto out_err; 524 525 if (valid & (1 << config)) 526 return 0; 527 out_err: 528 intel_pt_valid_str(valid_str, sizeof(valid_str), valid); 529 pr_err("Invalid %s for %s. Valid values are: %s\n", 530 name, INTEL_PT_PMU_NAME, valid_str); 531 return -EINVAL; 532 } 533 534 static int intel_pt_validate_config(struct perf_pmu *intel_pt_pmu, 535 struct evsel *evsel) 536 { 537 int err; 538 char c; 539 540 if (!evsel) 541 return 0; 542 543 /* 544 * If supported, force pass-through config term (pt=1) even if user 545 * sets pt=0, which avoids senseless kernel errors. 546 */ 547 if (perf_pmu__scan_file(intel_pt_pmu, "format/pt", "%c", &c) == 1 && 548 !(evsel->core.attr.config & 1)) { 549 pr_warning("pt=0 doesn't make sense, forcing pt=1\n"); 550 evsel->core.attr.config |= 1; 551 } 552 553 err = intel_pt_val_config_term(intel_pt_pmu, "caps/cycle_thresholds", 554 "cyc_thresh", "caps/psb_cyc", 555 evsel->core.attr.config); 556 if (err) 557 return err; 558 559 err = intel_pt_val_config_term(intel_pt_pmu, "caps/mtc_periods", 560 "mtc_period", "caps/mtc", 561 evsel->core.attr.config); 562 if (err) 563 return err; 564 565 return intel_pt_val_config_term(intel_pt_pmu, "caps/psb_periods", 566 "psb_period", "caps/psb_cyc", 567 evsel->core.attr.config); 568 } 569 570 static void intel_pt_config_sample_mode(struct perf_pmu *intel_pt_pmu, 571 struct evsel *evsel) 572 { 573 u64 user_bits = 0, bits; 574 struct evsel_config_term *term = evsel__get_config_term(evsel, CFG_CHG); 575 576 if (term) 577 user_bits = term->val.cfg_chg; 578 579 bits = perf_pmu__format_bits(&intel_pt_pmu->format, "psb_period"); 580 581 /* Did user change psb_period */ 582 if (bits & user_bits) 583 return; 584 585 /* Set psb_period to 0 */ 586 evsel->core.attr.config &= ~bits; 587 } 588 589 static void intel_pt_min_max_sample_sz(struct evlist *evlist, 590 size_t *min_sz, size_t *max_sz) 591 { 592 struct evsel *evsel; 593 594 evlist__for_each_entry(evlist, evsel) { 595 size_t sz = evsel->core.attr.aux_sample_size; 596 597 if (!sz) 598 continue; 599 if (min_sz && (sz < *min_sz || !*min_sz)) 600 *min_sz = sz; 601 if (max_sz && sz > *max_sz) 602 *max_sz = sz; 603 } 604 } 605 606 /* 607 * Currently, there is not enough information to disambiguate different PEBS 608 * events, so only allow one. 609 */ 610 static bool intel_pt_too_many_aux_output(struct evlist *evlist) 611 { 612 struct evsel *evsel; 613 int aux_output_cnt = 0; 614 615 evlist__for_each_entry(evlist, evsel) 616 aux_output_cnt += !!evsel->core.attr.aux_output; 617 618 if (aux_output_cnt > 1) { 619 pr_err(INTEL_PT_PMU_NAME " supports at most one event with aux-output\n"); 620 return true; 621 } 622 623 return false; 624 } 625 626 static int intel_pt_recording_options(struct auxtrace_record *itr, 627 struct evlist *evlist, 628 struct record_opts *opts) 629 { 630 struct intel_pt_recording *ptr = 631 container_of(itr, struct intel_pt_recording, itr); 632 struct perf_pmu *intel_pt_pmu = ptr->intel_pt_pmu; 633 bool have_timing_info, need_immediate = false; 634 struct evsel *evsel, *intel_pt_evsel = NULL; 635 const struct perf_cpu_map *cpus = evlist->core.user_requested_cpus; 636 bool privileged = perf_event_paranoid_check(-1); 637 u64 tsc_bit; 638 int err; 639 640 ptr->evlist = evlist; 641 ptr->snapshot_mode = opts->auxtrace_snapshot_mode; 642 643 evlist__for_each_entry(evlist, evsel) { 644 if (evsel->core.attr.type == intel_pt_pmu->type) { 645 if (intel_pt_evsel) { 646 pr_err("There may be only one " INTEL_PT_PMU_NAME " event\n"); 647 return -EINVAL; 648 } 649 evsel->core.attr.freq = 0; 650 evsel->core.attr.sample_period = 1; 651 evsel->no_aux_samples = true; 652 evsel->needs_auxtrace_mmap = true; 653 intel_pt_evsel = evsel; 654 opts->full_auxtrace = true; 655 } 656 } 657 658 if (opts->auxtrace_snapshot_mode && !opts->full_auxtrace) { 659 pr_err("Snapshot mode (-S option) requires " INTEL_PT_PMU_NAME " PMU event (-e " INTEL_PT_PMU_NAME ")\n"); 660 return -EINVAL; 661 } 662 663 if (opts->auxtrace_snapshot_mode && opts->auxtrace_sample_mode) { 664 pr_err("Snapshot mode (" INTEL_PT_PMU_NAME " PMU) and sample trace cannot be used together\n"); 665 return -EINVAL; 666 } 667 668 if (opts->use_clockid) { 669 pr_err("Cannot use clockid (-k option) with " INTEL_PT_PMU_NAME "\n"); 670 return -EINVAL; 671 } 672 673 if (intel_pt_too_many_aux_output(evlist)) 674 return -EINVAL; 675 676 if (!opts->full_auxtrace) 677 return 0; 678 679 if (opts->auxtrace_sample_mode) 680 intel_pt_config_sample_mode(intel_pt_pmu, intel_pt_evsel); 681 682 err = intel_pt_validate_config(intel_pt_pmu, intel_pt_evsel); 683 if (err) 684 return err; 685 686 /* Set default sizes for snapshot mode */ 687 if (opts->auxtrace_snapshot_mode) { 688 size_t psb_period = intel_pt_psb_period(intel_pt_pmu, evlist); 689 690 if (!opts->auxtrace_snapshot_size && !opts->auxtrace_mmap_pages) { 691 if (privileged) { 692 opts->auxtrace_mmap_pages = MiB(4) / page_size; 693 } else { 694 opts->auxtrace_mmap_pages = KiB(128) / page_size; 695 if (opts->mmap_pages == UINT_MAX) 696 opts->mmap_pages = KiB(256) / page_size; 697 } 698 } else if (!opts->auxtrace_mmap_pages && !privileged && 699 opts->mmap_pages == UINT_MAX) { 700 opts->mmap_pages = KiB(256) / page_size; 701 } 702 if (!opts->auxtrace_snapshot_size) 703 opts->auxtrace_snapshot_size = 704 opts->auxtrace_mmap_pages * (size_t)page_size; 705 if (!opts->auxtrace_mmap_pages) { 706 size_t sz = opts->auxtrace_snapshot_size; 707 708 sz = round_up(sz, page_size) / page_size; 709 opts->auxtrace_mmap_pages = roundup_pow_of_two(sz); 710 } 711 if (opts->auxtrace_snapshot_size > 712 opts->auxtrace_mmap_pages * (size_t)page_size) { 713 pr_err("Snapshot size %zu must not be greater than AUX area tracing mmap size %zu\n", 714 opts->auxtrace_snapshot_size, 715 opts->auxtrace_mmap_pages * (size_t)page_size); 716 return -EINVAL; 717 } 718 if (!opts->auxtrace_snapshot_size || !opts->auxtrace_mmap_pages) { 719 pr_err("Failed to calculate default snapshot size and/or AUX area tracing mmap pages\n"); 720 return -EINVAL; 721 } 722 pr_debug2("Intel PT snapshot size: %zu\n", 723 opts->auxtrace_snapshot_size); 724 if (psb_period && 725 opts->auxtrace_snapshot_size <= psb_period + 726 INTEL_PT_PSB_PERIOD_NEAR) 727 ui__warning("Intel PT snapshot size (%zu) may be too small for PSB period (%zu)\n", 728 opts->auxtrace_snapshot_size, psb_period); 729 } 730 731 /* Set default sizes for sample mode */ 732 if (opts->auxtrace_sample_mode) { 733 size_t psb_period = intel_pt_psb_period(intel_pt_pmu, evlist); 734 size_t min_sz = 0, max_sz = 0; 735 736 intel_pt_min_max_sample_sz(evlist, &min_sz, &max_sz); 737 if (!opts->auxtrace_mmap_pages && !privileged && 738 opts->mmap_pages == UINT_MAX) 739 opts->mmap_pages = KiB(256) / page_size; 740 if (!opts->auxtrace_mmap_pages) { 741 size_t sz = round_up(max_sz, page_size) / page_size; 742 743 opts->auxtrace_mmap_pages = roundup_pow_of_two(sz); 744 } 745 if (max_sz > opts->auxtrace_mmap_pages * (size_t)page_size) { 746 pr_err("Sample size %zu must not be greater than AUX area tracing mmap size %zu\n", 747 max_sz, 748 opts->auxtrace_mmap_pages * (size_t)page_size); 749 return -EINVAL; 750 } 751 pr_debug2("Intel PT min. sample size: %zu max. sample size: %zu\n", 752 min_sz, max_sz); 753 if (psb_period && 754 min_sz <= psb_period + INTEL_PT_PSB_PERIOD_NEAR) 755 ui__warning("Intel PT sample size (%zu) may be too small for PSB period (%zu)\n", 756 min_sz, psb_period); 757 } 758 759 /* Set default sizes for full trace mode */ 760 if (opts->full_auxtrace && !opts->auxtrace_mmap_pages) { 761 if (privileged) { 762 opts->auxtrace_mmap_pages = MiB(4) / page_size; 763 } else { 764 opts->auxtrace_mmap_pages = KiB(128) / page_size; 765 if (opts->mmap_pages == UINT_MAX) 766 opts->mmap_pages = KiB(256) / page_size; 767 } 768 } 769 770 /* Validate auxtrace_mmap_pages */ 771 if (opts->auxtrace_mmap_pages) { 772 size_t sz = opts->auxtrace_mmap_pages * (size_t)page_size; 773 size_t min_sz; 774 775 if (opts->auxtrace_snapshot_mode || opts->auxtrace_sample_mode) 776 min_sz = KiB(4); 777 else 778 min_sz = KiB(8); 779 780 if (sz < min_sz || !is_power_of_2(sz)) { 781 pr_err("Invalid mmap size for Intel Processor Trace: must be at least %zuKiB and a power of 2\n", 782 min_sz / 1024); 783 return -EINVAL; 784 } 785 } 786 787 if (!opts->auxtrace_snapshot_mode && !opts->auxtrace_sample_mode) { 788 u32 aux_watermark = opts->auxtrace_mmap_pages * page_size / 4; 789 790 intel_pt_evsel->core.attr.aux_watermark = aux_watermark; 791 } 792 793 intel_pt_parse_terms(intel_pt_pmu->name, &intel_pt_pmu->format, 794 "tsc", &tsc_bit); 795 796 if (opts->full_auxtrace && (intel_pt_evsel->core.attr.config & tsc_bit)) 797 have_timing_info = true; 798 else 799 have_timing_info = false; 800 801 /* 802 * Per-cpu recording needs sched_switch events to distinguish different 803 * threads. 804 */ 805 if (have_timing_info && !perf_cpu_map__empty(cpus) && 806 !record_opts__no_switch_events(opts)) { 807 if (perf_can_record_switch_events()) { 808 bool cpu_wide = !target__none(&opts->target) && 809 !target__has_task(&opts->target); 810 811 if (!cpu_wide && perf_can_record_cpu_wide()) { 812 struct evsel *switch_evsel; 813 814 switch_evsel = evlist__add_dummy_on_all_cpus(evlist); 815 if (!switch_evsel) 816 return -ENOMEM; 817 818 switch_evsel->core.attr.context_switch = 1; 819 switch_evsel->immediate = true; 820 821 evsel__set_sample_bit(switch_evsel, TID); 822 evsel__set_sample_bit(switch_evsel, TIME); 823 evsel__set_sample_bit(switch_evsel, CPU); 824 evsel__reset_sample_bit(switch_evsel, BRANCH_STACK); 825 826 opts->record_switch_events = false; 827 ptr->have_sched_switch = 3; 828 } else { 829 opts->record_switch_events = true; 830 need_immediate = true; 831 if (cpu_wide) 832 ptr->have_sched_switch = 3; 833 else 834 ptr->have_sched_switch = 2; 835 } 836 } else { 837 err = intel_pt_track_switches(evlist); 838 if (err == -EPERM) 839 pr_debug2("Unable to select sched:sched_switch\n"); 840 else if (err) 841 return err; 842 else 843 ptr->have_sched_switch = 1; 844 } 845 } 846 847 if (have_timing_info && !intel_pt_evsel->core.attr.exclude_kernel && 848 perf_can_record_text_poke_events() && perf_can_record_cpu_wide()) 849 opts->text_poke = true; 850 851 if (intel_pt_evsel) { 852 /* 853 * To obtain the auxtrace buffer file descriptor, the auxtrace 854 * event must come first. 855 */ 856 evlist__to_front(evlist, intel_pt_evsel); 857 /* 858 * In the case of per-cpu mmaps, we need the CPU on the 859 * AUX event. 860 */ 861 if (!perf_cpu_map__empty(cpus)) 862 evsel__set_sample_bit(intel_pt_evsel, CPU); 863 } 864 865 /* Add dummy event to keep tracking */ 866 if (opts->full_auxtrace) { 867 bool need_system_wide_tracking; 868 struct evsel *tracking_evsel; 869 870 /* 871 * User space tasks can migrate between CPUs, so when tracing 872 * selected CPUs, sideband for all CPUs is still needed. 873 */ 874 need_system_wide_tracking = evlist->core.has_user_cpus && 875 !intel_pt_evsel->core.attr.exclude_user; 876 877 tracking_evsel = evlist__add_aux_dummy(evlist, need_system_wide_tracking); 878 if (!tracking_evsel) 879 return -ENOMEM; 880 881 evlist__set_tracking_event(evlist, tracking_evsel); 882 883 if (need_immediate) 884 tracking_evsel->immediate = true; 885 886 /* In per-cpu case, always need the time of mmap events etc */ 887 if (!perf_cpu_map__empty(cpus)) { 888 evsel__set_sample_bit(tracking_evsel, TIME); 889 /* And the CPU for switch events */ 890 evsel__set_sample_bit(tracking_evsel, CPU); 891 } 892 evsel__reset_sample_bit(tracking_evsel, BRANCH_STACK); 893 } 894 895 /* 896 * Warn the user when we do not have enough information to decode i.e. 897 * per-cpu with no sched_switch (except workload-only). 898 */ 899 if (!ptr->have_sched_switch && !perf_cpu_map__empty(cpus) && 900 !target__none(&opts->target) && 901 !intel_pt_evsel->core.attr.exclude_user) 902 ui__warning("Intel Processor Trace decoding will not be possible except for kernel tracing!\n"); 903 904 return 0; 905 } 906 907 static int intel_pt_snapshot_start(struct auxtrace_record *itr) 908 { 909 struct intel_pt_recording *ptr = 910 container_of(itr, struct intel_pt_recording, itr); 911 struct evsel *evsel; 912 913 evlist__for_each_entry(ptr->evlist, evsel) { 914 if (evsel->core.attr.type == ptr->intel_pt_pmu->type) 915 return evsel__disable(evsel); 916 } 917 return -EINVAL; 918 } 919 920 static int intel_pt_snapshot_finish(struct auxtrace_record *itr) 921 { 922 struct intel_pt_recording *ptr = 923 container_of(itr, struct intel_pt_recording, itr); 924 struct evsel *evsel; 925 926 evlist__for_each_entry(ptr->evlist, evsel) { 927 if (evsel->core.attr.type == ptr->intel_pt_pmu->type) 928 return evsel__enable(evsel); 929 } 930 return -EINVAL; 931 } 932 933 static int intel_pt_alloc_snapshot_refs(struct intel_pt_recording *ptr, int idx) 934 { 935 const size_t sz = sizeof(struct intel_pt_snapshot_ref); 936 int cnt = ptr->snapshot_ref_cnt, new_cnt = cnt * 2; 937 struct intel_pt_snapshot_ref *refs; 938 939 if (!new_cnt) 940 new_cnt = 16; 941 942 while (new_cnt <= idx) 943 new_cnt *= 2; 944 945 refs = calloc(new_cnt, sz); 946 if (!refs) 947 return -ENOMEM; 948 949 memcpy(refs, ptr->snapshot_refs, cnt * sz); 950 951 ptr->snapshot_refs = refs; 952 ptr->snapshot_ref_cnt = new_cnt; 953 954 return 0; 955 } 956 957 static void intel_pt_free_snapshot_refs(struct intel_pt_recording *ptr) 958 { 959 int i; 960 961 for (i = 0; i < ptr->snapshot_ref_cnt; i++) 962 zfree(&ptr->snapshot_refs[i].ref_buf); 963 zfree(&ptr->snapshot_refs); 964 } 965 966 static void intel_pt_recording_free(struct auxtrace_record *itr) 967 { 968 struct intel_pt_recording *ptr = 969 container_of(itr, struct intel_pt_recording, itr); 970 971 intel_pt_free_snapshot_refs(ptr); 972 free(ptr); 973 } 974 975 static int intel_pt_alloc_snapshot_ref(struct intel_pt_recording *ptr, int idx, 976 size_t snapshot_buf_size) 977 { 978 size_t ref_buf_size = ptr->snapshot_ref_buf_size; 979 void *ref_buf; 980 981 ref_buf = zalloc(ref_buf_size); 982 if (!ref_buf) 983 return -ENOMEM; 984 985 ptr->snapshot_refs[idx].ref_buf = ref_buf; 986 ptr->snapshot_refs[idx].ref_offset = snapshot_buf_size - ref_buf_size; 987 988 return 0; 989 } 990 991 static size_t intel_pt_snapshot_ref_buf_size(struct intel_pt_recording *ptr, 992 size_t snapshot_buf_size) 993 { 994 const size_t max_size = 256 * 1024; 995 size_t buf_size = 0, psb_period; 996 997 if (ptr->snapshot_size <= 64 * 1024) 998 return 0; 999 1000 psb_period = intel_pt_psb_period(ptr->intel_pt_pmu, ptr->evlist); 1001 if (psb_period) 1002 buf_size = psb_period * 2; 1003 1004 if (!buf_size || buf_size > max_size) 1005 buf_size = max_size; 1006 1007 if (buf_size >= snapshot_buf_size) 1008 return 0; 1009 1010 if (buf_size >= ptr->snapshot_size / 2) 1011 return 0; 1012 1013 return buf_size; 1014 } 1015 1016 static int intel_pt_snapshot_init(struct intel_pt_recording *ptr, 1017 size_t snapshot_buf_size) 1018 { 1019 if (ptr->snapshot_init_done) 1020 return 0; 1021 1022 ptr->snapshot_init_done = true; 1023 1024 ptr->snapshot_ref_buf_size = intel_pt_snapshot_ref_buf_size(ptr, 1025 snapshot_buf_size); 1026 1027 return 0; 1028 } 1029 1030 /** 1031 * intel_pt_compare_buffers - compare bytes in a buffer to a circular buffer. 1032 * @buf1: first buffer 1033 * @compare_size: number of bytes to compare 1034 * @buf2: second buffer (a circular buffer) 1035 * @offs2: offset in second buffer 1036 * @buf2_size: size of second buffer 1037 * 1038 * The comparison allows for the possibility that the bytes to compare in the 1039 * circular buffer are not contiguous. It is assumed that @compare_size <= 1040 * @buf2_size. This function returns %false if the bytes are identical, %true 1041 * otherwise. 1042 */ 1043 static bool intel_pt_compare_buffers(void *buf1, size_t compare_size, 1044 void *buf2, size_t offs2, size_t buf2_size) 1045 { 1046 size_t end2 = offs2 + compare_size, part_size; 1047 1048 if (end2 <= buf2_size) 1049 return memcmp(buf1, buf2 + offs2, compare_size); 1050 1051 part_size = end2 - buf2_size; 1052 if (memcmp(buf1, buf2 + offs2, part_size)) 1053 return true; 1054 1055 compare_size -= part_size; 1056 1057 return memcmp(buf1 + part_size, buf2, compare_size); 1058 } 1059 1060 static bool intel_pt_compare_ref(void *ref_buf, size_t ref_offset, 1061 size_t ref_size, size_t buf_size, 1062 void *data, size_t head) 1063 { 1064 size_t ref_end = ref_offset + ref_size; 1065 1066 if (ref_end > buf_size) { 1067 if (head > ref_offset || head < ref_end - buf_size) 1068 return true; 1069 } else if (head > ref_offset && head < ref_end) { 1070 return true; 1071 } 1072 1073 return intel_pt_compare_buffers(ref_buf, ref_size, data, ref_offset, 1074 buf_size); 1075 } 1076 1077 static void intel_pt_copy_ref(void *ref_buf, size_t ref_size, size_t buf_size, 1078 void *data, size_t head) 1079 { 1080 if (head >= ref_size) { 1081 memcpy(ref_buf, data + head - ref_size, ref_size); 1082 } else { 1083 memcpy(ref_buf, data, head); 1084 ref_size -= head; 1085 memcpy(ref_buf + head, data + buf_size - ref_size, ref_size); 1086 } 1087 } 1088 1089 static bool intel_pt_wrapped(struct intel_pt_recording *ptr, int idx, 1090 struct auxtrace_mmap *mm, unsigned char *data, 1091 u64 head) 1092 { 1093 struct intel_pt_snapshot_ref *ref = &ptr->snapshot_refs[idx]; 1094 bool wrapped; 1095 1096 wrapped = intel_pt_compare_ref(ref->ref_buf, ref->ref_offset, 1097 ptr->snapshot_ref_buf_size, mm->len, 1098 data, head); 1099 1100 intel_pt_copy_ref(ref->ref_buf, ptr->snapshot_ref_buf_size, mm->len, 1101 data, head); 1102 1103 return wrapped; 1104 } 1105 1106 static bool intel_pt_first_wrap(u64 *data, size_t buf_size) 1107 { 1108 int i, a, b; 1109 1110 b = buf_size >> 3; 1111 a = b - 512; 1112 if (a < 0) 1113 a = 0; 1114 1115 for (i = a; i < b; i++) { 1116 if (data[i]) 1117 return true; 1118 } 1119 1120 return false; 1121 } 1122 1123 static int intel_pt_find_snapshot(struct auxtrace_record *itr, int idx, 1124 struct auxtrace_mmap *mm, unsigned char *data, 1125 u64 *head, u64 *old) 1126 { 1127 struct intel_pt_recording *ptr = 1128 container_of(itr, struct intel_pt_recording, itr); 1129 bool wrapped; 1130 int err; 1131 1132 pr_debug3("%s: mmap index %d old head %zu new head %zu\n", 1133 __func__, idx, (size_t)*old, (size_t)*head); 1134 1135 err = intel_pt_snapshot_init(ptr, mm->len); 1136 if (err) 1137 goto out_err; 1138 1139 if (idx >= ptr->snapshot_ref_cnt) { 1140 err = intel_pt_alloc_snapshot_refs(ptr, idx); 1141 if (err) 1142 goto out_err; 1143 } 1144 1145 if (ptr->snapshot_ref_buf_size) { 1146 if (!ptr->snapshot_refs[idx].ref_buf) { 1147 err = intel_pt_alloc_snapshot_ref(ptr, idx, mm->len); 1148 if (err) 1149 goto out_err; 1150 } 1151 wrapped = intel_pt_wrapped(ptr, idx, mm, data, *head); 1152 } else { 1153 wrapped = ptr->snapshot_refs[idx].wrapped; 1154 if (!wrapped && intel_pt_first_wrap((u64 *)data, mm->len)) { 1155 ptr->snapshot_refs[idx].wrapped = true; 1156 wrapped = true; 1157 } 1158 } 1159 1160 /* 1161 * In full trace mode 'head' continually increases. However in snapshot 1162 * mode 'head' is an offset within the buffer. Here 'old' and 'head' 1163 * are adjusted to match the full trace case which expects that 'old' is 1164 * always less than 'head'. 1165 */ 1166 if (wrapped) { 1167 *old = *head; 1168 *head += mm->len; 1169 } else { 1170 if (mm->mask) 1171 *old &= mm->mask; 1172 else 1173 *old %= mm->len; 1174 if (*old > *head) 1175 *head += mm->len; 1176 } 1177 1178 pr_debug3("%s: wrap-around %sdetected, adjusted old head %zu adjusted new head %zu\n", 1179 __func__, wrapped ? "" : "not ", (size_t)*old, (size_t)*head); 1180 1181 return 0; 1182 1183 out_err: 1184 pr_err("%s: failed, error %d\n", __func__, err); 1185 return err; 1186 } 1187 1188 static u64 intel_pt_reference(struct auxtrace_record *itr __maybe_unused) 1189 { 1190 return rdtsc(); 1191 } 1192 1193 struct auxtrace_record *intel_pt_recording_init(int *err) 1194 { 1195 struct perf_pmu *intel_pt_pmu = perf_pmu__find(INTEL_PT_PMU_NAME); 1196 struct intel_pt_recording *ptr; 1197 1198 if (!intel_pt_pmu) 1199 return NULL; 1200 1201 if (setenv("JITDUMP_USE_ARCH_TIMESTAMP", "1", 1)) { 1202 *err = -errno; 1203 return NULL; 1204 } 1205 1206 ptr = zalloc(sizeof(struct intel_pt_recording)); 1207 if (!ptr) { 1208 *err = -ENOMEM; 1209 return NULL; 1210 } 1211 1212 ptr->intel_pt_pmu = intel_pt_pmu; 1213 ptr->itr.pmu = intel_pt_pmu; 1214 ptr->itr.recording_options = intel_pt_recording_options; 1215 ptr->itr.info_priv_size = intel_pt_info_priv_size; 1216 ptr->itr.info_fill = intel_pt_info_fill; 1217 ptr->itr.free = intel_pt_recording_free; 1218 ptr->itr.snapshot_start = intel_pt_snapshot_start; 1219 ptr->itr.snapshot_finish = intel_pt_snapshot_finish; 1220 ptr->itr.find_snapshot = intel_pt_find_snapshot; 1221 ptr->itr.parse_snapshot_options = intel_pt_parse_snapshot_options; 1222 ptr->itr.reference = intel_pt_reference; 1223 ptr->itr.read_finish = auxtrace_record__read_finish; 1224 /* 1225 * Decoding starts at a PSB packet. Minimum PSB period is 2K so 4K 1226 * should give at least 1 PSB per sample. 1227 */ 1228 ptr->itr.default_aux_sample_size = 4096; 1229 return &ptr->itr; 1230 } 1231