1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * intel_pt.c: Intel Processor Trace support 4 * Copyright (c) 2013-2015, Intel Corporation. 5 */ 6 7 #include <errno.h> 8 #include <stdbool.h> 9 #include <linux/kernel.h> 10 #include <linux/types.h> 11 #include <linux/bitops.h> 12 #include <linux/log2.h> 13 #include <linux/zalloc.h> 14 #include <linux/err.h> 15 #include <cpuid.h> 16 17 #include "../../../util/session.h" 18 #include "../../../util/event.h" 19 #include "../../../util/evlist.h" 20 #include "../../../util/evsel.h" 21 #include "../../../util/evsel_config.h" 22 #include "../../../util/cpumap.h" 23 #include "../../../util/mmap.h" 24 #include <subcmd/parse-options.h> 25 #include "../../../util/parse-events.h" 26 #include "../../../util/pmu.h" 27 #include "../../../util/debug.h" 28 #include "../../../util/auxtrace.h" 29 #include "../../../util/perf_api_probe.h" 30 #include "../../../util/record.h" 31 #include "../../../util/target.h" 32 #include "../../../util/tsc.h" 33 #include <internal/lib.h> // page_size 34 #include "../../../util/intel-pt.h" 35 36 #define KiB(x) ((x) * 1024) 37 #define MiB(x) ((x) * 1024 * 1024) 38 #define KiB_MASK(x) (KiB(x) - 1) 39 #define MiB_MASK(x) (MiB(x) - 1) 40 41 #define INTEL_PT_PSB_PERIOD_NEAR 256 42 43 struct intel_pt_snapshot_ref { 44 void *ref_buf; 45 size_t ref_offset; 46 bool wrapped; 47 }; 48 49 struct intel_pt_recording { 50 struct auxtrace_record itr; 51 struct perf_pmu *intel_pt_pmu; 52 int have_sched_switch; 53 struct evlist *evlist; 54 bool snapshot_mode; 55 bool snapshot_init_done; 56 size_t snapshot_size; 57 size_t snapshot_ref_buf_size; 58 int snapshot_ref_cnt; 59 struct intel_pt_snapshot_ref *snapshot_refs; 60 size_t priv_size; 61 }; 62 63 static int intel_pt_parse_terms_with_default(const char *pmu_name, 64 struct list_head *formats, 65 const char *str, 66 u64 *config) 67 { 68 struct list_head *terms; 69 struct perf_event_attr attr = { .size = 0, }; 70 int err; 71 72 terms = malloc(sizeof(struct list_head)); 73 if (!terms) 74 return -ENOMEM; 75 76 INIT_LIST_HEAD(terms); 77 78 err = parse_events_terms(terms, str); 79 if (err) 80 goto out_free; 81 82 attr.config = *config; 83 err = perf_pmu__config_terms(pmu_name, formats, &attr, terms, true, 84 NULL); 85 if (err) 86 goto out_free; 87 88 *config = attr.config; 89 out_free: 90 parse_events_terms__delete(terms); 91 return err; 92 } 93 94 static int intel_pt_parse_terms(const char *pmu_name, struct list_head *formats, 95 const char *str, u64 *config) 96 { 97 *config = 0; 98 return intel_pt_parse_terms_with_default(pmu_name, formats, str, 99 config); 100 } 101 102 static u64 intel_pt_masked_bits(u64 mask, u64 bits) 103 { 104 const u64 top_bit = 1ULL << 63; 105 u64 res = 0; 106 int i; 107 108 for (i = 0; i < 64; i++) { 109 if (mask & top_bit) { 110 res <<= 1; 111 if (bits & top_bit) 112 res |= 1; 113 } 114 mask <<= 1; 115 bits <<= 1; 116 } 117 118 return res; 119 } 120 121 static int intel_pt_read_config(struct perf_pmu *intel_pt_pmu, const char *str, 122 struct evlist *evlist, u64 *res) 123 { 124 struct evsel *evsel; 125 u64 mask; 126 127 *res = 0; 128 129 mask = perf_pmu__format_bits(&intel_pt_pmu->format, str); 130 if (!mask) 131 return -EINVAL; 132 133 evlist__for_each_entry(evlist, evsel) { 134 if (evsel->core.attr.type == intel_pt_pmu->type) { 135 *res = intel_pt_masked_bits(mask, evsel->core.attr.config); 136 return 0; 137 } 138 } 139 140 return -EINVAL; 141 } 142 143 static size_t intel_pt_psb_period(struct perf_pmu *intel_pt_pmu, 144 struct evlist *evlist) 145 { 146 u64 val; 147 int err, topa_multiple_entries; 148 size_t psb_period; 149 150 if (perf_pmu__scan_file(intel_pt_pmu, "caps/topa_multiple_entries", 151 "%d", &topa_multiple_entries) != 1) 152 topa_multiple_entries = 0; 153 154 /* 155 * Use caps/topa_multiple_entries to indicate early hardware that had 156 * extra frequent PSBs. 157 */ 158 if (!topa_multiple_entries) { 159 psb_period = 256; 160 goto out; 161 } 162 163 err = intel_pt_read_config(intel_pt_pmu, "psb_period", evlist, &val); 164 if (err) 165 val = 0; 166 167 psb_period = 1 << (val + 11); 168 out: 169 pr_debug2("%s psb_period %zu\n", intel_pt_pmu->name, psb_period); 170 return psb_period; 171 } 172 173 static int intel_pt_pick_bit(int bits, int target) 174 { 175 int pos, pick = -1; 176 177 for (pos = 0; bits; bits >>= 1, pos++) { 178 if (bits & 1) { 179 if (pos <= target || pick < 0) 180 pick = pos; 181 if (pos >= target) 182 break; 183 } 184 } 185 186 return pick; 187 } 188 189 static u64 intel_pt_default_config(struct perf_pmu *intel_pt_pmu) 190 { 191 char buf[256]; 192 int mtc, mtc_periods = 0, mtc_period; 193 int psb_cyc, psb_periods, psb_period; 194 int pos = 0; 195 u64 config; 196 char c; 197 int dirfd; 198 199 dirfd = perf_pmu__event_source_devices_fd(); 200 201 pos += scnprintf(buf + pos, sizeof(buf) - pos, "tsc"); 202 203 if (perf_pmu__scan_file_at(intel_pt_pmu, dirfd, "caps/mtc", "%d", 204 &mtc) != 1) 205 mtc = 1; 206 207 if (mtc) { 208 if (perf_pmu__scan_file_at(intel_pt_pmu, dirfd, "caps/mtc_periods", "%x", 209 &mtc_periods) != 1) 210 mtc_periods = 0; 211 if (mtc_periods) { 212 mtc_period = intel_pt_pick_bit(mtc_periods, 3); 213 pos += scnprintf(buf + pos, sizeof(buf) - pos, 214 ",mtc,mtc_period=%d", mtc_period); 215 } 216 } 217 218 if (perf_pmu__scan_file_at(intel_pt_pmu, dirfd, "caps/psb_cyc", "%d", 219 &psb_cyc) != 1) 220 psb_cyc = 1; 221 222 if (psb_cyc && mtc_periods) { 223 if (perf_pmu__scan_file_at(intel_pt_pmu, dirfd, "caps/psb_periods", "%x", 224 &psb_periods) != 1) 225 psb_periods = 0; 226 if (psb_periods) { 227 psb_period = intel_pt_pick_bit(psb_periods, 3); 228 pos += scnprintf(buf + pos, sizeof(buf) - pos, 229 ",psb_period=%d", psb_period); 230 } 231 } 232 233 if (perf_pmu__scan_file_at(intel_pt_pmu, dirfd, "format/pt", "%c", &c) == 1 && 234 perf_pmu__scan_file_at(intel_pt_pmu, dirfd, "format/branch", "%c", &c) == 1) 235 pos += scnprintf(buf + pos, sizeof(buf) - pos, ",pt,branch"); 236 237 pr_debug2("%s default config: %s\n", intel_pt_pmu->name, buf); 238 239 intel_pt_parse_terms(intel_pt_pmu->name, &intel_pt_pmu->format, buf, 240 &config); 241 242 close(dirfd); 243 return config; 244 } 245 246 static int intel_pt_parse_snapshot_options(struct auxtrace_record *itr, 247 struct record_opts *opts, 248 const char *str) 249 { 250 struct intel_pt_recording *ptr = 251 container_of(itr, struct intel_pt_recording, itr); 252 unsigned long long snapshot_size = 0; 253 char *endptr; 254 255 if (str) { 256 snapshot_size = strtoull(str, &endptr, 0); 257 if (*endptr || snapshot_size > SIZE_MAX) 258 return -1; 259 } 260 261 opts->auxtrace_snapshot_mode = true; 262 opts->auxtrace_snapshot_size = snapshot_size; 263 264 ptr->snapshot_size = snapshot_size; 265 266 return 0; 267 } 268 269 struct perf_event_attr * 270 intel_pt_pmu_default_config(struct perf_pmu *intel_pt_pmu) 271 { 272 struct perf_event_attr *attr; 273 274 attr = zalloc(sizeof(struct perf_event_attr)); 275 if (!attr) 276 return NULL; 277 278 attr->config = intel_pt_default_config(intel_pt_pmu); 279 280 intel_pt_pmu->selectable = true; 281 282 return attr; 283 } 284 285 static const char *intel_pt_find_filter(struct evlist *evlist, 286 struct perf_pmu *intel_pt_pmu) 287 { 288 struct evsel *evsel; 289 290 evlist__for_each_entry(evlist, evsel) { 291 if (evsel->core.attr.type == intel_pt_pmu->type) 292 return evsel->filter; 293 } 294 295 return NULL; 296 } 297 298 static size_t intel_pt_filter_bytes(const char *filter) 299 { 300 size_t len = filter ? strlen(filter) : 0; 301 302 return len ? roundup(len + 1, 8) : 0; 303 } 304 305 static size_t 306 intel_pt_info_priv_size(struct auxtrace_record *itr, struct evlist *evlist) 307 { 308 struct intel_pt_recording *ptr = 309 container_of(itr, struct intel_pt_recording, itr); 310 const char *filter = intel_pt_find_filter(evlist, ptr->intel_pt_pmu); 311 312 ptr->priv_size = (INTEL_PT_AUXTRACE_PRIV_MAX * sizeof(u64)) + 313 intel_pt_filter_bytes(filter); 314 ptr->priv_size += sizeof(u64); /* Cap Event Trace */ 315 316 return ptr->priv_size; 317 } 318 319 static void intel_pt_tsc_ctc_ratio(u32 *n, u32 *d) 320 { 321 unsigned int eax = 0, ebx = 0, ecx = 0, edx = 0; 322 323 __get_cpuid(0x15, &eax, &ebx, &ecx, &edx); 324 *n = ebx; 325 *d = eax; 326 } 327 328 static int intel_pt_info_fill(struct auxtrace_record *itr, 329 struct perf_session *session, 330 struct perf_record_auxtrace_info *auxtrace_info, 331 size_t priv_size) 332 { 333 struct intel_pt_recording *ptr = 334 container_of(itr, struct intel_pt_recording, itr); 335 struct perf_pmu *intel_pt_pmu = ptr->intel_pt_pmu; 336 struct perf_event_mmap_page *pc; 337 struct perf_tsc_conversion tc = { .time_mult = 0, }; 338 bool cap_user_time_zero = false, per_cpu_mmaps; 339 u64 tsc_bit, mtc_bit, mtc_freq_bits, cyc_bit, noretcomp_bit; 340 u32 tsc_ctc_ratio_n, tsc_ctc_ratio_d; 341 unsigned long max_non_turbo_ratio; 342 size_t filter_str_len; 343 const char *filter; 344 int event_trace; 345 __u64 *info; 346 int err; 347 348 if (priv_size != ptr->priv_size) 349 return -EINVAL; 350 351 intel_pt_parse_terms(intel_pt_pmu->name, &intel_pt_pmu->format, 352 "tsc", &tsc_bit); 353 intel_pt_parse_terms(intel_pt_pmu->name, &intel_pt_pmu->format, 354 "noretcomp", &noretcomp_bit); 355 intel_pt_parse_terms(intel_pt_pmu->name, &intel_pt_pmu->format, 356 "mtc", &mtc_bit); 357 mtc_freq_bits = perf_pmu__format_bits(&intel_pt_pmu->format, 358 "mtc_period"); 359 intel_pt_parse_terms(intel_pt_pmu->name, &intel_pt_pmu->format, 360 "cyc", &cyc_bit); 361 362 intel_pt_tsc_ctc_ratio(&tsc_ctc_ratio_n, &tsc_ctc_ratio_d); 363 364 if (perf_pmu__scan_file(intel_pt_pmu, "max_nonturbo_ratio", 365 "%lu", &max_non_turbo_ratio) != 1) 366 max_non_turbo_ratio = 0; 367 if (perf_pmu__scan_file(intel_pt_pmu, "caps/event_trace", 368 "%d", &event_trace) != 1) 369 event_trace = 0; 370 371 filter = intel_pt_find_filter(session->evlist, ptr->intel_pt_pmu); 372 filter_str_len = filter ? strlen(filter) : 0; 373 374 if (!session->evlist->core.nr_mmaps) 375 return -EINVAL; 376 377 pc = session->evlist->mmap[0].core.base; 378 if (pc) { 379 err = perf_read_tsc_conversion(pc, &tc); 380 if (err) { 381 if (err != -EOPNOTSUPP) 382 return err; 383 } else { 384 cap_user_time_zero = tc.time_mult != 0; 385 } 386 if (!cap_user_time_zero) 387 ui__warning("Intel Processor Trace: TSC not available\n"); 388 } 389 390 per_cpu_mmaps = !perf_cpu_map__empty(session->evlist->core.user_requested_cpus); 391 392 auxtrace_info->type = PERF_AUXTRACE_INTEL_PT; 393 auxtrace_info->priv[INTEL_PT_PMU_TYPE] = intel_pt_pmu->type; 394 auxtrace_info->priv[INTEL_PT_TIME_SHIFT] = tc.time_shift; 395 auxtrace_info->priv[INTEL_PT_TIME_MULT] = tc.time_mult; 396 auxtrace_info->priv[INTEL_PT_TIME_ZERO] = tc.time_zero; 397 auxtrace_info->priv[INTEL_PT_CAP_USER_TIME_ZERO] = cap_user_time_zero; 398 auxtrace_info->priv[INTEL_PT_TSC_BIT] = tsc_bit; 399 auxtrace_info->priv[INTEL_PT_NORETCOMP_BIT] = noretcomp_bit; 400 auxtrace_info->priv[INTEL_PT_HAVE_SCHED_SWITCH] = ptr->have_sched_switch; 401 auxtrace_info->priv[INTEL_PT_SNAPSHOT_MODE] = ptr->snapshot_mode; 402 auxtrace_info->priv[INTEL_PT_PER_CPU_MMAPS] = per_cpu_mmaps; 403 auxtrace_info->priv[INTEL_PT_MTC_BIT] = mtc_bit; 404 auxtrace_info->priv[INTEL_PT_MTC_FREQ_BITS] = mtc_freq_bits; 405 auxtrace_info->priv[INTEL_PT_TSC_CTC_N] = tsc_ctc_ratio_n; 406 auxtrace_info->priv[INTEL_PT_TSC_CTC_D] = tsc_ctc_ratio_d; 407 auxtrace_info->priv[INTEL_PT_CYC_BIT] = cyc_bit; 408 auxtrace_info->priv[INTEL_PT_MAX_NONTURBO_RATIO] = max_non_turbo_ratio; 409 auxtrace_info->priv[INTEL_PT_FILTER_STR_LEN] = filter_str_len; 410 411 info = &auxtrace_info->priv[INTEL_PT_FILTER_STR_LEN] + 1; 412 413 if (filter_str_len) { 414 size_t len = intel_pt_filter_bytes(filter); 415 416 strncpy((char *)info, filter, len); 417 info += len >> 3; 418 } 419 420 *info++ = event_trace; 421 422 return 0; 423 } 424 425 #ifdef HAVE_LIBTRACEEVENT 426 static int intel_pt_track_switches(struct evlist *evlist) 427 { 428 const char *sched_switch = "sched:sched_switch"; 429 struct evsel *evsel; 430 int err; 431 432 if (!evlist__can_select_event(evlist, sched_switch)) 433 return -EPERM; 434 435 evsel = evlist__add_sched_switch(evlist, true); 436 if (IS_ERR(evsel)) { 437 err = PTR_ERR(evsel); 438 pr_debug2("%s: failed to create %s, error = %d\n", 439 __func__, sched_switch, err); 440 return err; 441 } 442 443 evsel->immediate = true; 444 445 return 0; 446 } 447 #endif 448 449 static void intel_pt_valid_str(char *str, size_t len, u64 valid) 450 { 451 unsigned int val, last = 0, state = 1; 452 int p = 0; 453 454 str[0] = '\0'; 455 456 for (val = 0; val <= 64; val++, valid >>= 1) { 457 if (valid & 1) { 458 last = val; 459 switch (state) { 460 case 0: 461 p += scnprintf(str + p, len - p, ","); 462 /* Fall through */ 463 case 1: 464 p += scnprintf(str + p, len - p, "%u", val); 465 state = 2; 466 break; 467 case 2: 468 state = 3; 469 break; 470 case 3: 471 state = 4; 472 break; 473 default: 474 break; 475 } 476 } else { 477 switch (state) { 478 case 3: 479 p += scnprintf(str + p, len - p, ",%u", last); 480 state = 0; 481 break; 482 case 4: 483 p += scnprintf(str + p, len - p, "-%u", last); 484 state = 0; 485 break; 486 default: 487 break; 488 } 489 if (state != 1) 490 state = 0; 491 } 492 } 493 } 494 495 static int intel_pt_val_config_term(struct perf_pmu *intel_pt_pmu, int dirfd, 496 const char *caps, const char *name, 497 const char *supported, u64 config) 498 { 499 char valid_str[256]; 500 unsigned int shift; 501 unsigned long long valid; 502 u64 bits; 503 int ok; 504 505 if (perf_pmu__scan_file_at(intel_pt_pmu, dirfd, caps, "%llx", &valid) != 1) 506 valid = 0; 507 508 if (supported && 509 perf_pmu__scan_file_at(intel_pt_pmu, dirfd, supported, "%d", &ok) == 1 && !ok) 510 valid = 0; 511 512 valid |= 1; 513 514 bits = perf_pmu__format_bits(&intel_pt_pmu->format, name); 515 516 config &= bits; 517 518 for (shift = 0; bits && !(bits & 1); shift++) 519 bits >>= 1; 520 521 config >>= shift; 522 523 if (config > 63) 524 goto out_err; 525 526 if (valid & (1 << config)) 527 return 0; 528 out_err: 529 intel_pt_valid_str(valid_str, sizeof(valid_str), valid); 530 pr_err("Invalid %s for %s. Valid values are: %s\n", 531 name, INTEL_PT_PMU_NAME, valid_str); 532 return -EINVAL; 533 } 534 535 static int intel_pt_validate_config(struct perf_pmu *intel_pt_pmu, 536 struct evsel *evsel) 537 { 538 int err, dirfd; 539 char c; 540 541 if (!evsel) 542 return 0; 543 544 dirfd = perf_pmu__event_source_devices_fd(); 545 if (dirfd < 0) 546 return dirfd; 547 548 /* 549 * If supported, force pass-through config term (pt=1) even if user 550 * sets pt=0, which avoids senseless kernel errors. 551 */ 552 if (perf_pmu__scan_file_at(intel_pt_pmu, dirfd, "format/pt", "%c", &c) == 1 && 553 !(evsel->core.attr.config & 1)) { 554 pr_warning("pt=0 doesn't make sense, forcing pt=1\n"); 555 evsel->core.attr.config |= 1; 556 } 557 558 err = intel_pt_val_config_term(intel_pt_pmu, dirfd, "caps/cycle_thresholds", 559 "cyc_thresh", "caps/psb_cyc", 560 evsel->core.attr.config); 561 if (err) 562 goto out; 563 564 err = intel_pt_val_config_term(intel_pt_pmu, dirfd, "caps/mtc_periods", 565 "mtc_period", "caps/mtc", 566 evsel->core.attr.config); 567 if (err) 568 goto out; 569 570 err = intel_pt_val_config_term(intel_pt_pmu, dirfd, "caps/psb_periods", 571 "psb_period", "caps/psb_cyc", 572 evsel->core.attr.config); 573 574 out: 575 close(dirfd); 576 return err; 577 } 578 579 static void intel_pt_min_max_sample_sz(struct evlist *evlist, 580 size_t *min_sz, size_t *max_sz) 581 { 582 struct evsel *evsel; 583 584 evlist__for_each_entry(evlist, evsel) { 585 size_t sz = evsel->core.attr.aux_sample_size; 586 587 if (!sz) 588 continue; 589 if (min_sz && (sz < *min_sz || !*min_sz)) 590 *min_sz = sz; 591 if (max_sz && sz > *max_sz) 592 *max_sz = sz; 593 } 594 } 595 596 /* 597 * Currently, there is not enough information to disambiguate different PEBS 598 * events, so only allow one. 599 */ 600 static bool intel_pt_too_many_aux_output(struct evlist *evlist) 601 { 602 struct evsel *evsel; 603 int aux_output_cnt = 0; 604 605 evlist__for_each_entry(evlist, evsel) 606 aux_output_cnt += !!evsel->core.attr.aux_output; 607 608 if (aux_output_cnt > 1) { 609 pr_err(INTEL_PT_PMU_NAME " supports at most one event with aux-output\n"); 610 return true; 611 } 612 613 return false; 614 } 615 616 static int intel_pt_recording_options(struct auxtrace_record *itr, 617 struct evlist *evlist, 618 struct record_opts *opts) 619 { 620 struct intel_pt_recording *ptr = 621 container_of(itr, struct intel_pt_recording, itr); 622 struct perf_pmu *intel_pt_pmu = ptr->intel_pt_pmu; 623 bool have_timing_info, need_immediate = false; 624 struct evsel *evsel, *intel_pt_evsel = NULL; 625 const struct perf_cpu_map *cpus = evlist->core.user_requested_cpus; 626 bool privileged = perf_event_paranoid_check(-1); 627 u64 tsc_bit; 628 int err; 629 630 ptr->evlist = evlist; 631 ptr->snapshot_mode = opts->auxtrace_snapshot_mode; 632 633 evlist__for_each_entry(evlist, evsel) { 634 if (evsel->core.attr.type == intel_pt_pmu->type) { 635 if (intel_pt_evsel) { 636 pr_err("There may be only one " INTEL_PT_PMU_NAME " event\n"); 637 return -EINVAL; 638 } 639 evsel->core.attr.freq = 0; 640 evsel->core.attr.sample_period = 1; 641 evsel->no_aux_samples = true; 642 evsel->needs_auxtrace_mmap = true; 643 intel_pt_evsel = evsel; 644 opts->full_auxtrace = true; 645 } 646 } 647 648 if (opts->auxtrace_snapshot_mode && !opts->full_auxtrace) { 649 pr_err("Snapshot mode (-S option) requires " INTEL_PT_PMU_NAME " PMU event (-e " INTEL_PT_PMU_NAME ")\n"); 650 return -EINVAL; 651 } 652 653 if (opts->auxtrace_snapshot_mode && opts->auxtrace_sample_mode) { 654 pr_err("Snapshot mode (" INTEL_PT_PMU_NAME " PMU) and sample trace cannot be used together\n"); 655 return -EINVAL; 656 } 657 658 if (opts->use_clockid) { 659 pr_err("Cannot use clockid (-k option) with " INTEL_PT_PMU_NAME "\n"); 660 return -EINVAL; 661 } 662 663 if (intel_pt_too_many_aux_output(evlist)) 664 return -EINVAL; 665 666 if (!opts->full_auxtrace) 667 return 0; 668 669 if (opts->auxtrace_sample_mode) 670 evsel__set_config_if_unset(intel_pt_pmu, intel_pt_evsel, 671 "psb_period", 0); 672 673 err = intel_pt_validate_config(intel_pt_pmu, intel_pt_evsel); 674 if (err) 675 return err; 676 677 /* Set default sizes for snapshot mode */ 678 if (opts->auxtrace_snapshot_mode) { 679 size_t psb_period = intel_pt_psb_period(intel_pt_pmu, evlist); 680 681 if (!opts->auxtrace_snapshot_size && !opts->auxtrace_mmap_pages) { 682 if (privileged) { 683 opts->auxtrace_mmap_pages = MiB(4) / page_size; 684 } else { 685 opts->auxtrace_mmap_pages = KiB(128) / page_size; 686 if (opts->mmap_pages == UINT_MAX) 687 opts->mmap_pages = KiB(256) / page_size; 688 } 689 } else if (!opts->auxtrace_mmap_pages && !privileged && 690 opts->mmap_pages == UINT_MAX) { 691 opts->mmap_pages = KiB(256) / page_size; 692 } 693 if (!opts->auxtrace_snapshot_size) 694 opts->auxtrace_snapshot_size = 695 opts->auxtrace_mmap_pages * (size_t)page_size; 696 if (!opts->auxtrace_mmap_pages) { 697 size_t sz = opts->auxtrace_snapshot_size; 698 699 sz = round_up(sz, page_size) / page_size; 700 opts->auxtrace_mmap_pages = roundup_pow_of_two(sz); 701 } 702 if (opts->auxtrace_snapshot_size > 703 opts->auxtrace_mmap_pages * (size_t)page_size) { 704 pr_err("Snapshot size %zu must not be greater than AUX area tracing mmap size %zu\n", 705 opts->auxtrace_snapshot_size, 706 opts->auxtrace_mmap_pages * (size_t)page_size); 707 return -EINVAL; 708 } 709 if (!opts->auxtrace_snapshot_size || !opts->auxtrace_mmap_pages) { 710 pr_err("Failed to calculate default snapshot size and/or AUX area tracing mmap pages\n"); 711 return -EINVAL; 712 } 713 pr_debug2("Intel PT snapshot size: %zu\n", 714 opts->auxtrace_snapshot_size); 715 if (psb_period && 716 opts->auxtrace_snapshot_size <= psb_period + 717 INTEL_PT_PSB_PERIOD_NEAR) 718 ui__warning("Intel PT snapshot size (%zu) may be too small for PSB period (%zu)\n", 719 opts->auxtrace_snapshot_size, psb_period); 720 } 721 722 /* Set default sizes for sample mode */ 723 if (opts->auxtrace_sample_mode) { 724 size_t psb_period = intel_pt_psb_period(intel_pt_pmu, evlist); 725 size_t min_sz = 0, max_sz = 0; 726 727 intel_pt_min_max_sample_sz(evlist, &min_sz, &max_sz); 728 if (!opts->auxtrace_mmap_pages && !privileged && 729 opts->mmap_pages == UINT_MAX) 730 opts->mmap_pages = KiB(256) / page_size; 731 if (!opts->auxtrace_mmap_pages) { 732 size_t sz = round_up(max_sz, page_size) / page_size; 733 734 opts->auxtrace_mmap_pages = roundup_pow_of_two(sz); 735 } 736 if (max_sz > opts->auxtrace_mmap_pages * (size_t)page_size) { 737 pr_err("Sample size %zu must not be greater than AUX area tracing mmap size %zu\n", 738 max_sz, 739 opts->auxtrace_mmap_pages * (size_t)page_size); 740 return -EINVAL; 741 } 742 pr_debug2("Intel PT min. sample size: %zu max. sample size: %zu\n", 743 min_sz, max_sz); 744 if (psb_period && 745 min_sz <= psb_period + INTEL_PT_PSB_PERIOD_NEAR) 746 ui__warning("Intel PT sample size (%zu) may be too small for PSB period (%zu)\n", 747 min_sz, psb_period); 748 } 749 750 /* Set default sizes for full trace mode */ 751 if (opts->full_auxtrace && !opts->auxtrace_mmap_pages) { 752 if (privileged) { 753 opts->auxtrace_mmap_pages = MiB(4) / page_size; 754 } else { 755 opts->auxtrace_mmap_pages = KiB(128) / page_size; 756 if (opts->mmap_pages == UINT_MAX) 757 opts->mmap_pages = KiB(256) / page_size; 758 } 759 } 760 761 /* Validate auxtrace_mmap_pages */ 762 if (opts->auxtrace_mmap_pages) { 763 size_t sz = opts->auxtrace_mmap_pages * (size_t)page_size; 764 size_t min_sz; 765 766 if (opts->auxtrace_snapshot_mode || opts->auxtrace_sample_mode) 767 min_sz = KiB(4); 768 else 769 min_sz = KiB(8); 770 771 if (sz < min_sz || !is_power_of_2(sz)) { 772 pr_err("Invalid mmap size for Intel Processor Trace: must be at least %zuKiB and a power of 2\n", 773 min_sz / 1024); 774 return -EINVAL; 775 } 776 } 777 778 if (!opts->auxtrace_snapshot_mode && !opts->auxtrace_sample_mode) { 779 u32 aux_watermark = opts->auxtrace_mmap_pages * page_size / 4; 780 781 intel_pt_evsel->core.attr.aux_watermark = aux_watermark; 782 } 783 784 intel_pt_parse_terms(intel_pt_pmu->name, &intel_pt_pmu->format, 785 "tsc", &tsc_bit); 786 787 if (opts->full_auxtrace && (intel_pt_evsel->core.attr.config & tsc_bit)) 788 have_timing_info = true; 789 else 790 have_timing_info = false; 791 792 /* 793 * Per-cpu recording needs sched_switch events to distinguish different 794 * threads. 795 */ 796 if (have_timing_info && !perf_cpu_map__empty(cpus) && 797 !record_opts__no_switch_events(opts)) { 798 if (perf_can_record_switch_events()) { 799 bool cpu_wide = !target__none(&opts->target) && 800 !target__has_task(&opts->target); 801 802 if (!cpu_wide && perf_can_record_cpu_wide()) { 803 struct evsel *switch_evsel; 804 805 switch_evsel = evlist__add_dummy_on_all_cpus(evlist); 806 if (!switch_evsel) 807 return -ENOMEM; 808 809 switch_evsel->core.attr.context_switch = 1; 810 switch_evsel->immediate = true; 811 812 evsel__set_sample_bit(switch_evsel, TID); 813 evsel__set_sample_bit(switch_evsel, TIME); 814 evsel__set_sample_bit(switch_evsel, CPU); 815 evsel__reset_sample_bit(switch_evsel, BRANCH_STACK); 816 817 opts->record_switch_events = false; 818 ptr->have_sched_switch = 3; 819 } else { 820 opts->record_switch_events = true; 821 need_immediate = true; 822 if (cpu_wide) 823 ptr->have_sched_switch = 3; 824 else 825 ptr->have_sched_switch = 2; 826 } 827 } else { 828 #ifdef HAVE_LIBTRACEEVENT 829 err = intel_pt_track_switches(evlist); 830 if (err == -EPERM) 831 pr_debug2("Unable to select sched:sched_switch\n"); 832 else if (err) 833 return err; 834 else 835 ptr->have_sched_switch = 1; 836 #endif 837 } 838 } 839 840 if (have_timing_info && !intel_pt_evsel->core.attr.exclude_kernel && 841 perf_can_record_text_poke_events() && perf_can_record_cpu_wide()) 842 opts->text_poke = true; 843 844 if (intel_pt_evsel) { 845 /* 846 * To obtain the auxtrace buffer file descriptor, the auxtrace 847 * event must come first. 848 */ 849 evlist__to_front(evlist, intel_pt_evsel); 850 /* 851 * In the case of per-cpu mmaps, we need the CPU on the 852 * AUX event. 853 */ 854 if (!perf_cpu_map__empty(cpus)) 855 evsel__set_sample_bit(intel_pt_evsel, CPU); 856 } 857 858 /* Add dummy event to keep tracking */ 859 if (opts->full_auxtrace) { 860 bool need_system_wide_tracking; 861 struct evsel *tracking_evsel; 862 863 /* 864 * User space tasks can migrate between CPUs, so when tracing 865 * selected CPUs, sideband for all CPUs is still needed. 866 */ 867 need_system_wide_tracking = opts->target.cpu_list && 868 !intel_pt_evsel->core.attr.exclude_user; 869 870 tracking_evsel = evlist__add_aux_dummy(evlist, need_system_wide_tracking); 871 if (!tracking_evsel) 872 return -ENOMEM; 873 874 evlist__set_tracking_event(evlist, tracking_evsel); 875 876 if (need_immediate) 877 tracking_evsel->immediate = true; 878 879 /* In per-cpu case, always need the time of mmap events etc */ 880 if (!perf_cpu_map__empty(cpus)) { 881 evsel__set_sample_bit(tracking_evsel, TIME); 882 /* And the CPU for switch events */ 883 evsel__set_sample_bit(tracking_evsel, CPU); 884 } 885 evsel__reset_sample_bit(tracking_evsel, BRANCH_STACK); 886 } 887 888 /* 889 * Warn the user when we do not have enough information to decode i.e. 890 * per-cpu with no sched_switch (except workload-only). 891 */ 892 if (!ptr->have_sched_switch && !perf_cpu_map__empty(cpus) && 893 !target__none(&opts->target) && 894 !intel_pt_evsel->core.attr.exclude_user) 895 ui__warning("Intel Processor Trace decoding will not be possible except for kernel tracing!\n"); 896 897 return 0; 898 } 899 900 static int intel_pt_snapshot_start(struct auxtrace_record *itr) 901 { 902 struct intel_pt_recording *ptr = 903 container_of(itr, struct intel_pt_recording, itr); 904 struct evsel *evsel; 905 906 evlist__for_each_entry(ptr->evlist, evsel) { 907 if (evsel->core.attr.type == ptr->intel_pt_pmu->type) 908 return evsel__disable(evsel); 909 } 910 return -EINVAL; 911 } 912 913 static int intel_pt_snapshot_finish(struct auxtrace_record *itr) 914 { 915 struct intel_pt_recording *ptr = 916 container_of(itr, struct intel_pt_recording, itr); 917 struct evsel *evsel; 918 919 evlist__for_each_entry(ptr->evlist, evsel) { 920 if (evsel->core.attr.type == ptr->intel_pt_pmu->type) 921 return evsel__enable(evsel); 922 } 923 return -EINVAL; 924 } 925 926 static int intel_pt_alloc_snapshot_refs(struct intel_pt_recording *ptr, int idx) 927 { 928 const size_t sz = sizeof(struct intel_pt_snapshot_ref); 929 int cnt = ptr->snapshot_ref_cnt, new_cnt = cnt * 2; 930 struct intel_pt_snapshot_ref *refs; 931 932 if (!new_cnt) 933 new_cnt = 16; 934 935 while (new_cnt <= idx) 936 new_cnt *= 2; 937 938 refs = calloc(new_cnt, sz); 939 if (!refs) 940 return -ENOMEM; 941 942 memcpy(refs, ptr->snapshot_refs, cnt * sz); 943 944 ptr->snapshot_refs = refs; 945 ptr->snapshot_ref_cnt = new_cnt; 946 947 return 0; 948 } 949 950 static void intel_pt_free_snapshot_refs(struct intel_pt_recording *ptr) 951 { 952 int i; 953 954 for (i = 0; i < ptr->snapshot_ref_cnt; i++) 955 zfree(&ptr->snapshot_refs[i].ref_buf); 956 zfree(&ptr->snapshot_refs); 957 } 958 959 static void intel_pt_recording_free(struct auxtrace_record *itr) 960 { 961 struct intel_pt_recording *ptr = 962 container_of(itr, struct intel_pt_recording, itr); 963 964 intel_pt_free_snapshot_refs(ptr); 965 free(ptr); 966 } 967 968 static int intel_pt_alloc_snapshot_ref(struct intel_pt_recording *ptr, int idx, 969 size_t snapshot_buf_size) 970 { 971 size_t ref_buf_size = ptr->snapshot_ref_buf_size; 972 void *ref_buf; 973 974 ref_buf = zalloc(ref_buf_size); 975 if (!ref_buf) 976 return -ENOMEM; 977 978 ptr->snapshot_refs[idx].ref_buf = ref_buf; 979 ptr->snapshot_refs[idx].ref_offset = snapshot_buf_size - ref_buf_size; 980 981 return 0; 982 } 983 984 static size_t intel_pt_snapshot_ref_buf_size(struct intel_pt_recording *ptr, 985 size_t snapshot_buf_size) 986 { 987 const size_t max_size = 256 * 1024; 988 size_t buf_size = 0, psb_period; 989 990 if (ptr->snapshot_size <= 64 * 1024) 991 return 0; 992 993 psb_period = intel_pt_psb_period(ptr->intel_pt_pmu, ptr->evlist); 994 if (psb_period) 995 buf_size = psb_period * 2; 996 997 if (!buf_size || buf_size > max_size) 998 buf_size = max_size; 999 1000 if (buf_size >= snapshot_buf_size) 1001 return 0; 1002 1003 if (buf_size >= ptr->snapshot_size / 2) 1004 return 0; 1005 1006 return buf_size; 1007 } 1008 1009 static int intel_pt_snapshot_init(struct intel_pt_recording *ptr, 1010 size_t snapshot_buf_size) 1011 { 1012 if (ptr->snapshot_init_done) 1013 return 0; 1014 1015 ptr->snapshot_init_done = true; 1016 1017 ptr->snapshot_ref_buf_size = intel_pt_snapshot_ref_buf_size(ptr, 1018 snapshot_buf_size); 1019 1020 return 0; 1021 } 1022 1023 /** 1024 * intel_pt_compare_buffers - compare bytes in a buffer to a circular buffer. 1025 * @buf1: first buffer 1026 * @compare_size: number of bytes to compare 1027 * @buf2: second buffer (a circular buffer) 1028 * @offs2: offset in second buffer 1029 * @buf2_size: size of second buffer 1030 * 1031 * The comparison allows for the possibility that the bytes to compare in the 1032 * circular buffer are not contiguous. It is assumed that @compare_size <= 1033 * @buf2_size. This function returns %false if the bytes are identical, %true 1034 * otherwise. 1035 */ 1036 static bool intel_pt_compare_buffers(void *buf1, size_t compare_size, 1037 void *buf2, size_t offs2, size_t buf2_size) 1038 { 1039 size_t end2 = offs2 + compare_size, part_size; 1040 1041 if (end2 <= buf2_size) 1042 return memcmp(buf1, buf2 + offs2, compare_size); 1043 1044 part_size = end2 - buf2_size; 1045 if (memcmp(buf1, buf2 + offs2, part_size)) 1046 return true; 1047 1048 compare_size -= part_size; 1049 1050 return memcmp(buf1 + part_size, buf2, compare_size); 1051 } 1052 1053 static bool intel_pt_compare_ref(void *ref_buf, size_t ref_offset, 1054 size_t ref_size, size_t buf_size, 1055 void *data, size_t head) 1056 { 1057 size_t ref_end = ref_offset + ref_size; 1058 1059 if (ref_end > buf_size) { 1060 if (head > ref_offset || head < ref_end - buf_size) 1061 return true; 1062 } else if (head > ref_offset && head < ref_end) { 1063 return true; 1064 } 1065 1066 return intel_pt_compare_buffers(ref_buf, ref_size, data, ref_offset, 1067 buf_size); 1068 } 1069 1070 static void intel_pt_copy_ref(void *ref_buf, size_t ref_size, size_t buf_size, 1071 void *data, size_t head) 1072 { 1073 if (head >= ref_size) { 1074 memcpy(ref_buf, data + head - ref_size, ref_size); 1075 } else { 1076 memcpy(ref_buf, data, head); 1077 ref_size -= head; 1078 memcpy(ref_buf + head, data + buf_size - ref_size, ref_size); 1079 } 1080 } 1081 1082 static bool intel_pt_wrapped(struct intel_pt_recording *ptr, int idx, 1083 struct auxtrace_mmap *mm, unsigned char *data, 1084 u64 head) 1085 { 1086 struct intel_pt_snapshot_ref *ref = &ptr->snapshot_refs[idx]; 1087 bool wrapped; 1088 1089 wrapped = intel_pt_compare_ref(ref->ref_buf, ref->ref_offset, 1090 ptr->snapshot_ref_buf_size, mm->len, 1091 data, head); 1092 1093 intel_pt_copy_ref(ref->ref_buf, ptr->snapshot_ref_buf_size, mm->len, 1094 data, head); 1095 1096 return wrapped; 1097 } 1098 1099 static bool intel_pt_first_wrap(u64 *data, size_t buf_size) 1100 { 1101 int i, a, b; 1102 1103 b = buf_size >> 3; 1104 a = b - 512; 1105 if (a < 0) 1106 a = 0; 1107 1108 for (i = a; i < b; i++) { 1109 if (data[i]) 1110 return true; 1111 } 1112 1113 return false; 1114 } 1115 1116 static int intel_pt_find_snapshot(struct auxtrace_record *itr, int idx, 1117 struct auxtrace_mmap *mm, unsigned char *data, 1118 u64 *head, u64 *old) 1119 { 1120 struct intel_pt_recording *ptr = 1121 container_of(itr, struct intel_pt_recording, itr); 1122 bool wrapped; 1123 int err; 1124 1125 pr_debug3("%s: mmap index %d old head %zu new head %zu\n", 1126 __func__, idx, (size_t)*old, (size_t)*head); 1127 1128 err = intel_pt_snapshot_init(ptr, mm->len); 1129 if (err) 1130 goto out_err; 1131 1132 if (idx >= ptr->snapshot_ref_cnt) { 1133 err = intel_pt_alloc_snapshot_refs(ptr, idx); 1134 if (err) 1135 goto out_err; 1136 } 1137 1138 if (ptr->snapshot_ref_buf_size) { 1139 if (!ptr->snapshot_refs[idx].ref_buf) { 1140 err = intel_pt_alloc_snapshot_ref(ptr, idx, mm->len); 1141 if (err) 1142 goto out_err; 1143 } 1144 wrapped = intel_pt_wrapped(ptr, idx, mm, data, *head); 1145 } else { 1146 wrapped = ptr->snapshot_refs[idx].wrapped; 1147 if (!wrapped && intel_pt_first_wrap((u64 *)data, mm->len)) { 1148 ptr->snapshot_refs[idx].wrapped = true; 1149 wrapped = true; 1150 } 1151 } 1152 1153 /* 1154 * In full trace mode 'head' continually increases. However in snapshot 1155 * mode 'head' is an offset within the buffer. Here 'old' and 'head' 1156 * are adjusted to match the full trace case which expects that 'old' is 1157 * always less than 'head'. 1158 */ 1159 if (wrapped) { 1160 *old = *head; 1161 *head += mm->len; 1162 } else { 1163 if (mm->mask) 1164 *old &= mm->mask; 1165 else 1166 *old %= mm->len; 1167 if (*old > *head) 1168 *head += mm->len; 1169 } 1170 1171 pr_debug3("%s: wrap-around %sdetected, adjusted old head %zu adjusted new head %zu\n", 1172 __func__, wrapped ? "" : "not ", (size_t)*old, (size_t)*head); 1173 1174 return 0; 1175 1176 out_err: 1177 pr_err("%s: failed, error %d\n", __func__, err); 1178 return err; 1179 } 1180 1181 static u64 intel_pt_reference(struct auxtrace_record *itr __maybe_unused) 1182 { 1183 return rdtsc(); 1184 } 1185 1186 struct auxtrace_record *intel_pt_recording_init(int *err) 1187 { 1188 struct perf_pmu *intel_pt_pmu = perf_pmu__find(INTEL_PT_PMU_NAME); 1189 struct intel_pt_recording *ptr; 1190 1191 if (!intel_pt_pmu) 1192 return NULL; 1193 1194 if (setenv("JITDUMP_USE_ARCH_TIMESTAMP", "1", 1)) { 1195 *err = -errno; 1196 return NULL; 1197 } 1198 1199 ptr = zalloc(sizeof(struct intel_pt_recording)); 1200 if (!ptr) { 1201 *err = -ENOMEM; 1202 return NULL; 1203 } 1204 1205 ptr->intel_pt_pmu = intel_pt_pmu; 1206 ptr->itr.pmu = intel_pt_pmu; 1207 ptr->itr.recording_options = intel_pt_recording_options; 1208 ptr->itr.info_priv_size = intel_pt_info_priv_size; 1209 ptr->itr.info_fill = intel_pt_info_fill; 1210 ptr->itr.free = intel_pt_recording_free; 1211 ptr->itr.snapshot_start = intel_pt_snapshot_start; 1212 ptr->itr.snapshot_finish = intel_pt_snapshot_finish; 1213 ptr->itr.find_snapshot = intel_pt_find_snapshot; 1214 ptr->itr.parse_snapshot_options = intel_pt_parse_snapshot_options; 1215 ptr->itr.reference = intel_pt_reference; 1216 ptr->itr.read_finish = auxtrace_record__read_finish; 1217 /* 1218 * Decoding starts at a PSB packet. Minimum PSB period is 2K so 4K 1219 * should give at least 1 PSB per sample. 1220 */ 1221 ptr->itr.default_aux_sample_size = 4096; 1222 return &ptr->itr; 1223 } 1224