1 // SPDX-License-Identifier: GPL-2.0 2 #include <stdio.h> 3 #include <stdlib.h> 4 #include "util/evsel.h" 5 #include "util/env.h" 6 #include "util/pmu.h" 7 #include "util/pmus.h" 8 #include "linux/string.h" 9 #include "evsel.h" 10 #include "util/debug.h" 11 12 #define IBS_FETCH_L3MISSONLY (1ULL << 59) 13 #define IBS_OP_L3MISSONLY (1ULL << 16) 14 15 void arch_evsel__set_sample_weight(struct evsel *evsel) 16 { 17 evsel__set_sample_bit(evsel, WEIGHT_STRUCT); 18 } 19 20 /* Check whether the evsel's PMU supports the perf metrics */ 21 bool evsel__sys_has_perf_metrics(const struct evsel *evsel) 22 { 23 const char *pmu_name = evsel->pmu_name ? evsel->pmu_name : "cpu"; 24 25 /* 26 * The PERF_TYPE_RAW type is the core PMU type, e.g., "cpu" PMU 27 * on a non-hybrid machine, "cpu_core" PMU on a hybrid machine. 28 * The slots event is only available for the core PMU, which 29 * supports the perf metrics feature. 30 * Checking both the PERF_TYPE_RAW type and the slots event 31 * should be good enough to detect the perf metrics feature. 32 */ 33 if ((evsel->core.attr.type == PERF_TYPE_RAW) && 34 perf_pmus__have_event(pmu_name, "slots")) 35 return true; 36 37 return false; 38 } 39 40 bool arch_evsel__must_be_in_group(const struct evsel *evsel) 41 { 42 if (!evsel__sys_has_perf_metrics(evsel)) 43 return false; 44 45 return evsel->name && 46 (strcasestr(evsel->name, "slots") || 47 strcasestr(evsel->name, "topdown")); 48 } 49 50 int arch_evsel__hw_name(struct evsel *evsel, char *bf, size_t size) 51 { 52 u64 event = evsel->core.attr.config & PERF_HW_EVENT_MASK; 53 u64 pmu = evsel->core.attr.config >> PERF_PMU_TYPE_SHIFT; 54 const char *event_name; 55 56 if (event < PERF_COUNT_HW_MAX && evsel__hw_names[event]) 57 event_name = evsel__hw_names[event]; 58 else 59 event_name = "unknown-hardware"; 60 61 /* The PMU type is not required for the non-hybrid platform. */ 62 if (!pmu) 63 return scnprintf(bf, size, "%s", event_name); 64 65 return scnprintf(bf, size, "%s/%s/", 66 evsel->pmu_name ? evsel->pmu_name : "cpu", 67 event_name); 68 } 69 70 static void ibs_l3miss_warn(void) 71 { 72 pr_warning( 73 "WARNING: Hw internally resets sampling period when L3 Miss Filtering is enabled\n" 74 "and tagged operation does not cause L3 Miss. This causes sampling period skew.\n"); 75 } 76 77 void arch__post_evsel_config(struct evsel *evsel, struct perf_event_attr *attr) 78 { 79 struct perf_pmu *evsel_pmu, *ibs_fetch_pmu, *ibs_op_pmu; 80 static int warned_once; 81 /* 0: Uninitialized, 1: Yes, -1: No */ 82 static int is_amd; 83 84 if (warned_once || is_amd == -1) 85 return; 86 87 if (!is_amd) { 88 struct perf_env *env = evsel__env(evsel); 89 90 if (!perf_env__cpuid(env) || !env->cpuid || 91 !strstarts(env->cpuid, "AuthenticAMD")) { 92 is_amd = -1; 93 return; 94 } 95 is_amd = 1; 96 } 97 98 evsel_pmu = evsel__find_pmu(evsel); 99 if (!evsel_pmu) 100 return; 101 102 ibs_fetch_pmu = perf_pmus__find("ibs_fetch"); 103 ibs_op_pmu = perf_pmus__find("ibs_op"); 104 105 if (ibs_fetch_pmu && ibs_fetch_pmu->type == evsel_pmu->type) { 106 if (attr->config & IBS_FETCH_L3MISSONLY) { 107 ibs_l3miss_warn(); 108 warned_once = 1; 109 } 110 } else if (ibs_op_pmu && ibs_op_pmu->type == evsel_pmu->type) { 111 if (attr->config & IBS_OP_L3MISSONLY) { 112 ibs_l3miss_warn(); 113 warned_once = 1; 114 } 115 } 116 } 117