1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright(C) 2015 Linaro Limited. All rights reserved. 4 * Author: Mathieu Poirier <mathieu.poirier@linaro.org> 5 */ 6 7 #include <api/fs/fs.h> 8 #include <linux/bits.h> 9 #include <linux/bitops.h> 10 #include <linux/compiler.h> 11 #include <linux/coresight-pmu.h> 12 #include <linux/kernel.h> 13 #include <linux/log2.h> 14 #include <linux/string.h> 15 #include <linux/types.h> 16 #include <linux/zalloc.h> 17 18 #include "cs-etm.h" 19 #include "../../../util/debug.h" 20 #include "../../../util/record.h" 21 #include "../../../util/auxtrace.h" 22 #include "../../../util/cpumap.h" 23 #include "../../../util/event.h" 24 #include "../../../util/evlist.h" 25 #include "../../../util/evsel.h" 26 #include "../../../util/perf_api_probe.h" 27 #include "../../../util/evsel_config.h" 28 #include "../../../util/pmu.h" 29 #include "../../../util/cs-etm.h" 30 #include <internal/lib.h> // page_size 31 #include "../../../util/session.h" 32 33 #include <errno.h> 34 #include <stdlib.h> 35 #include <sys/stat.h> 36 37 struct cs_etm_recording { 38 struct auxtrace_record itr; 39 struct perf_pmu *cs_etm_pmu; 40 struct evlist *evlist; 41 bool snapshot_mode; 42 size_t snapshot_size; 43 }; 44 45 static const char *metadata_etmv3_ro[CS_ETM_PRIV_MAX] = { 46 [CS_ETM_ETMCCER] = "mgmt/etmccer", 47 [CS_ETM_ETMIDR] = "mgmt/etmidr", 48 }; 49 50 static const char * const metadata_etmv4_ro[] = { 51 [CS_ETMV4_TRCIDR0] = "trcidr/trcidr0", 52 [CS_ETMV4_TRCIDR1] = "trcidr/trcidr1", 53 [CS_ETMV4_TRCIDR2] = "trcidr/trcidr2", 54 [CS_ETMV4_TRCIDR8] = "trcidr/trcidr8", 55 [CS_ETMV4_TRCAUTHSTATUS] = "mgmt/trcauthstatus", 56 [CS_ETE_TRCDEVARCH] = "mgmt/trcdevarch" 57 }; 58 59 static bool cs_etm_is_etmv4(struct auxtrace_record *itr, int cpu); 60 static bool cs_etm_is_ete(struct auxtrace_record *itr, int cpu); 61 62 static int cs_etm_set_context_id(struct auxtrace_record *itr, 63 struct evsel *evsel, int cpu) 64 { 65 struct cs_etm_recording *ptr; 66 struct perf_pmu *cs_etm_pmu; 67 char path[PATH_MAX]; 68 int err = -EINVAL; 69 u32 val; 70 u64 contextid; 71 72 ptr = container_of(itr, struct cs_etm_recording, itr); 73 cs_etm_pmu = ptr->cs_etm_pmu; 74 75 if (!cs_etm_is_etmv4(itr, cpu)) 76 goto out; 77 78 /* Get a handle on TRCIDR2 */ 79 snprintf(path, PATH_MAX, "cpu%d/%s", 80 cpu, metadata_etmv4_ro[CS_ETMV4_TRCIDR2]); 81 err = perf_pmu__scan_file(cs_etm_pmu, path, "%x", &val); 82 83 /* There was a problem reading the file, bailing out */ 84 if (err != 1) { 85 pr_err("%s: can't read file %s\n", 86 CORESIGHT_ETM_PMU_NAME, path); 87 goto out; 88 } 89 90 /* User has configured for PID tracing, respects it. */ 91 contextid = evsel->core.attr.config & 92 (BIT(ETM_OPT_CTXTID) | BIT(ETM_OPT_CTXTID2)); 93 94 /* 95 * If user doesn't configure the contextid format, parse PMU format and 96 * enable PID tracing according to the "contextid" format bits: 97 * 98 * If bit ETM_OPT_CTXTID is set, trace CONTEXTIDR_EL1; 99 * If bit ETM_OPT_CTXTID2 is set, trace CONTEXTIDR_EL2. 100 */ 101 if (!contextid) 102 contextid = perf_pmu__format_bits(&cs_etm_pmu->format, 103 "contextid"); 104 105 if (contextid & BIT(ETM_OPT_CTXTID)) { 106 /* 107 * TRCIDR2.CIDSIZE, bit [9-5], indicates whether contextID 108 * tracing is supported: 109 * 0b00000 Context ID tracing is not supported. 110 * 0b00100 Maximum of 32-bit Context ID size. 111 * All other values are reserved. 112 */ 113 val = BMVAL(val, 5, 9); 114 if (!val || val != 0x4) { 115 pr_err("%s: CONTEXTIDR_EL1 isn't supported\n", 116 CORESIGHT_ETM_PMU_NAME); 117 err = -EINVAL; 118 goto out; 119 } 120 } 121 122 if (contextid & BIT(ETM_OPT_CTXTID2)) { 123 /* 124 * TRCIDR2.VMIDOPT[30:29] != 0 and 125 * TRCIDR2.VMIDSIZE[14:10] == 0b00100 (32bit virtual contextid) 126 * We can't support CONTEXTIDR in VMID if the size of the 127 * virtual context id is < 32bit. 128 * Any value of VMIDSIZE >= 4 (i.e, > 32bit) is fine for us. 129 */ 130 if (!BMVAL(val, 29, 30) || BMVAL(val, 10, 14) < 4) { 131 pr_err("%s: CONTEXTIDR_EL2 isn't supported\n", 132 CORESIGHT_ETM_PMU_NAME); 133 err = -EINVAL; 134 goto out; 135 } 136 } 137 138 /* All good, let the kernel know */ 139 evsel->core.attr.config |= contextid; 140 err = 0; 141 142 out: 143 return err; 144 } 145 146 static int cs_etm_set_timestamp(struct auxtrace_record *itr, 147 struct evsel *evsel, int cpu) 148 { 149 struct cs_etm_recording *ptr; 150 struct perf_pmu *cs_etm_pmu; 151 char path[PATH_MAX]; 152 int err = -EINVAL; 153 u32 val; 154 155 ptr = container_of(itr, struct cs_etm_recording, itr); 156 cs_etm_pmu = ptr->cs_etm_pmu; 157 158 if (!cs_etm_is_etmv4(itr, cpu)) 159 goto out; 160 161 /* Get a handle on TRCIRD0 */ 162 snprintf(path, PATH_MAX, "cpu%d/%s", 163 cpu, metadata_etmv4_ro[CS_ETMV4_TRCIDR0]); 164 err = perf_pmu__scan_file(cs_etm_pmu, path, "%x", &val); 165 166 /* There was a problem reading the file, bailing out */ 167 if (err != 1) { 168 pr_err("%s: can't read file %s\n", 169 CORESIGHT_ETM_PMU_NAME, path); 170 goto out; 171 } 172 173 /* 174 * TRCIDR0.TSSIZE, bit [28-24], indicates whether global timestamping 175 * is supported: 176 * 0b00000 Global timestamping is not implemented 177 * 0b00110 Implementation supports a maximum timestamp of 48bits. 178 * 0b01000 Implementation supports a maximum timestamp of 64bits. 179 */ 180 val &= GENMASK(28, 24); 181 if (!val) { 182 err = -EINVAL; 183 goto out; 184 } 185 186 /* All good, let the kernel know */ 187 evsel->core.attr.config |= (1 << ETM_OPT_TS); 188 err = 0; 189 190 out: 191 return err; 192 } 193 194 #define ETM_SET_OPT_CTXTID (1 << 0) 195 #define ETM_SET_OPT_TS (1 << 1) 196 #define ETM_SET_OPT_MASK (ETM_SET_OPT_CTXTID | ETM_SET_OPT_TS) 197 198 static int cs_etm_set_option(struct auxtrace_record *itr, 199 struct evsel *evsel, u32 option) 200 { 201 int i, err = -EINVAL; 202 struct perf_cpu_map *event_cpus = evsel->evlist->core.cpus; 203 struct perf_cpu_map *online_cpus = perf_cpu_map__new(NULL); 204 205 /* Set option of each CPU we have */ 206 for (i = 0; i < cpu__max_cpu(); i++) { 207 if (!perf_cpu_map__has(event_cpus, i) || 208 !perf_cpu_map__has(online_cpus, i)) 209 continue; 210 211 if (option & BIT(ETM_OPT_CTXTID)) { 212 err = cs_etm_set_context_id(itr, evsel, i); 213 if (err) 214 goto out; 215 } 216 if (option & BIT(ETM_OPT_TS)) { 217 err = cs_etm_set_timestamp(itr, evsel, i); 218 if (err) 219 goto out; 220 } 221 if (option & ~(BIT(ETM_OPT_CTXTID) | BIT(ETM_OPT_TS))) 222 /* Nothing else is currently supported */ 223 goto out; 224 } 225 226 err = 0; 227 out: 228 perf_cpu_map__put(online_cpus); 229 return err; 230 } 231 232 static int cs_etm_parse_snapshot_options(struct auxtrace_record *itr, 233 struct record_opts *opts, 234 const char *str) 235 { 236 struct cs_etm_recording *ptr = 237 container_of(itr, struct cs_etm_recording, itr); 238 unsigned long long snapshot_size = 0; 239 char *endptr; 240 241 if (str) { 242 snapshot_size = strtoull(str, &endptr, 0); 243 if (*endptr || snapshot_size > SIZE_MAX) 244 return -1; 245 } 246 247 opts->auxtrace_snapshot_mode = true; 248 opts->auxtrace_snapshot_size = snapshot_size; 249 ptr->snapshot_size = snapshot_size; 250 251 return 0; 252 } 253 254 static int cs_etm_set_sink_attr(struct perf_pmu *pmu, 255 struct evsel *evsel) 256 { 257 char msg[BUFSIZ], path[PATH_MAX], *sink; 258 struct evsel_config_term *term; 259 int ret = -EINVAL; 260 u32 hash; 261 262 if (evsel->core.attr.config2 & GENMASK(31, 0)) 263 return 0; 264 265 list_for_each_entry(term, &evsel->config_terms, list) { 266 if (term->type != EVSEL__CONFIG_TERM_DRV_CFG) 267 continue; 268 269 sink = term->val.str; 270 snprintf(path, PATH_MAX, "sinks/%s", sink); 271 272 ret = perf_pmu__scan_file(pmu, path, "%x", &hash); 273 if (ret != 1) { 274 pr_err("failed to set sink \"%s\" on event %s with %d (%s)\n", 275 sink, evsel__name(evsel), errno, 276 str_error_r(errno, msg, sizeof(msg))); 277 return ret; 278 } 279 280 evsel->core.attr.config2 |= hash; 281 return 0; 282 } 283 284 /* 285 * No sink was provided on the command line - allow the CoreSight 286 * system to look for a default 287 */ 288 return 0; 289 } 290 291 static int cs_etm_recording_options(struct auxtrace_record *itr, 292 struct evlist *evlist, 293 struct record_opts *opts) 294 { 295 int ret; 296 struct cs_etm_recording *ptr = 297 container_of(itr, struct cs_etm_recording, itr); 298 struct perf_pmu *cs_etm_pmu = ptr->cs_etm_pmu; 299 struct evsel *evsel, *cs_etm_evsel = NULL; 300 struct perf_cpu_map *cpus = evlist->core.cpus; 301 bool privileged = perf_event_paranoid_check(-1); 302 int err = 0; 303 304 ptr->evlist = evlist; 305 ptr->snapshot_mode = opts->auxtrace_snapshot_mode; 306 307 if (!record_opts__no_switch_events(opts) && 308 perf_can_record_switch_events()) 309 opts->record_switch_events = true; 310 311 evlist__for_each_entry(evlist, evsel) { 312 if (evsel->core.attr.type == cs_etm_pmu->type) { 313 if (cs_etm_evsel) { 314 pr_err("There may be only one %s event\n", 315 CORESIGHT_ETM_PMU_NAME); 316 return -EINVAL; 317 } 318 evsel->core.attr.freq = 0; 319 evsel->core.attr.sample_period = 1; 320 cs_etm_evsel = evsel; 321 opts->full_auxtrace = true; 322 } 323 } 324 325 /* no need to continue if at least one event of interest was found */ 326 if (!cs_etm_evsel) 327 return 0; 328 329 ret = cs_etm_set_sink_attr(cs_etm_pmu, cs_etm_evsel); 330 if (ret) 331 return ret; 332 333 if (opts->use_clockid) { 334 pr_err("Cannot use clockid (-k option) with %s\n", 335 CORESIGHT_ETM_PMU_NAME); 336 return -EINVAL; 337 } 338 339 /* we are in snapshot mode */ 340 if (opts->auxtrace_snapshot_mode) { 341 /* 342 * No size were given to '-S' or '-m,', so go with 343 * the default 344 */ 345 if (!opts->auxtrace_snapshot_size && 346 !opts->auxtrace_mmap_pages) { 347 if (privileged) { 348 opts->auxtrace_mmap_pages = MiB(4) / page_size; 349 } else { 350 opts->auxtrace_mmap_pages = 351 KiB(128) / page_size; 352 if (opts->mmap_pages == UINT_MAX) 353 opts->mmap_pages = KiB(256) / page_size; 354 } 355 } else if (!opts->auxtrace_mmap_pages && !privileged && 356 opts->mmap_pages == UINT_MAX) { 357 opts->mmap_pages = KiB(256) / page_size; 358 } 359 360 /* 361 * '-m,xyz' was specified but no snapshot size, so make the 362 * snapshot size as big as the auxtrace mmap area. 363 */ 364 if (!opts->auxtrace_snapshot_size) { 365 opts->auxtrace_snapshot_size = 366 opts->auxtrace_mmap_pages * (size_t)page_size; 367 } 368 369 /* 370 * -Sxyz was specified but no auxtrace mmap area, so make the 371 * auxtrace mmap area big enough to fit the requested snapshot 372 * size. 373 */ 374 if (!opts->auxtrace_mmap_pages) { 375 size_t sz = opts->auxtrace_snapshot_size; 376 377 sz = round_up(sz, page_size) / page_size; 378 opts->auxtrace_mmap_pages = roundup_pow_of_two(sz); 379 } 380 381 /* Snapshot size can't be bigger than the auxtrace area */ 382 if (opts->auxtrace_snapshot_size > 383 opts->auxtrace_mmap_pages * (size_t)page_size) { 384 pr_err("Snapshot size %zu must not be greater than AUX area tracing mmap size %zu\n", 385 opts->auxtrace_snapshot_size, 386 opts->auxtrace_mmap_pages * (size_t)page_size); 387 return -EINVAL; 388 } 389 390 /* Something went wrong somewhere - this shouldn't happen */ 391 if (!opts->auxtrace_snapshot_size || 392 !opts->auxtrace_mmap_pages) { 393 pr_err("Failed to calculate default snapshot size and/or AUX area tracing mmap pages\n"); 394 return -EINVAL; 395 } 396 } 397 398 /* We are in full trace mode but '-m,xyz' wasn't specified */ 399 if (opts->full_auxtrace && !opts->auxtrace_mmap_pages) { 400 if (privileged) { 401 opts->auxtrace_mmap_pages = MiB(4) / page_size; 402 } else { 403 opts->auxtrace_mmap_pages = KiB(128) / page_size; 404 if (opts->mmap_pages == UINT_MAX) 405 opts->mmap_pages = KiB(256) / page_size; 406 } 407 408 } 409 410 if (opts->auxtrace_snapshot_mode) 411 pr_debug2("%s snapshot size: %zu\n", CORESIGHT_ETM_PMU_NAME, 412 opts->auxtrace_snapshot_size); 413 414 /* 415 * To obtain the auxtrace buffer file descriptor, the auxtrace 416 * event must come first. 417 */ 418 evlist__to_front(evlist, cs_etm_evsel); 419 420 /* 421 * In the case of per-cpu mmaps, we need the CPU on the 422 * AUX event. We also need the contextID in order to be notified 423 * when a context switch happened. 424 */ 425 if (!perf_cpu_map__empty(cpus)) { 426 evsel__set_sample_bit(cs_etm_evsel, CPU); 427 428 err = cs_etm_set_option(itr, cs_etm_evsel, 429 BIT(ETM_OPT_CTXTID) | BIT(ETM_OPT_TS)); 430 if (err) 431 goto out; 432 } 433 434 /* Add dummy event to keep tracking */ 435 if (opts->full_auxtrace) { 436 struct evsel *tracking_evsel; 437 438 err = parse_events(evlist, "dummy:u", NULL); 439 if (err) 440 goto out; 441 442 tracking_evsel = evlist__last(evlist); 443 evlist__set_tracking_event(evlist, tracking_evsel); 444 445 tracking_evsel->core.attr.freq = 0; 446 tracking_evsel->core.attr.sample_period = 1; 447 448 /* In per-cpu case, always need the time of mmap events etc */ 449 if (!perf_cpu_map__empty(cpus)) 450 evsel__set_sample_bit(tracking_evsel, TIME); 451 } 452 453 out: 454 return err; 455 } 456 457 static u64 cs_etm_get_config(struct auxtrace_record *itr) 458 { 459 u64 config = 0; 460 struct cs_etm_recording *ptr = 461 container_of(itr, struct cs_etm_recording, itr); 462 struct perf_pmu *cs_etm_pmu = ptr->cs_etm_pmu; 463 struct evlist *evlist = ptr->evlist; 464 struct evsel *evsel; 465 466 evlist__for_each_entry(evlist, evsel) { 467 if (evsel->core.attr.type == cs_etm_pmu->type) { 468 /* 469 * Variable perf_event_attr::config is assigned to 470 * ETMv3/PTM. The bit fields have been made to match 471 * the ETMv3.5 ETRMCR register specification. See the 472 * PMU_FORMAT_ATTR() declarations in 473 * drivers/hwtracing/coresight/coresight-perf.c for 474 * details. 475 */ 476 config = evsel->core.attr.config; 477 break; 478 } 479 } 480 481 return config; 482 } 483 484 #ifndef BIT 485 #define BIT(N) (1UL << (N)) 486 #endif 487 488 static u64 cs_etmv4_get_config(struct auxtrace_record *itr) 489 { 490 u64 config = 0; 491 u64 config_opts = 0; 492 493 /* 494 * The perf event variable config bits represent both 495 * the command line options and register programming 496 * bits in ETMv3/PTM. For ETMv4 we must remap options 497 * to real bits 498 */ 499 config_opts = cs_etm_get_config(itr); 500 if (config_opts & BIT(ETM_OPT_CYCACC)) 501 config |= BIT(ETM4_CFG_BIT_CYCACC); 502 if (config_opts & BIT(ETM_OPT_CTXTID)) 503 config |= BIT(ETM4_CFG_BIT_CTXTID); 504 if (config_opts & BIT(ETM_OPT_TS)) 505 config |= BIT(ETM4_CFG_BIT_TS); 506 if (config_opts & BIT(ETM_OPT_RETSTK)) 507 config |= BIT(ETM4_CFG_BIT_RETSTK); 508 if (config_opts & BIT(ETM_OPT_CTXTID2)) 509 config |= BIT(ETM4_CFG_BIT_VMID) | 510 BIT(ETM4_CFG_BIT_VMID_OPT); 511 return config; 512 } 513 514 static size_t 515 cs_etm_info_priv_size(struct auxtrace_record *itr __maybe_unused, 516 struct evlist *evlist __maybe_unused) 517 { 518 int i; 519 int etmv3 = 0, etmv4 = 0, ete = 0; 520 struct perf_cpu_map *event_cpus = evlist->core.cpus; 521 struct perf_cpu_map *online_cpus = perf_cpu_map__new(NULL); 522 523 /* cpu map is not empty, we have specific CPUs to work with */ 524 if (!perf_cpu_map__empty(event_cpus)) { 525 for (i = 0; i < cpu__max_cpu(); i++) { 526 if (!perf_cpu_map__has(event_cpus, i) || 527 !perf_cpu_map__has(online_cpus, i)) 528 continue; 529 530 if (cs_etm_is_ete(itr, i)) 531 ete++; 532 else if (cs_etm_is_etmv4(itr, i)) 533 etmv4++; 534 else 535 etmv3++; 536 } 537 } else { 538 /* get configuration for all CPUs in the system */ 539 for (i = 0; i < cpu__max_cpu(); i++) { 540 if (!perf_cpu_map__has(online_cpus, i)) 541 continue; 542 543 if (cs_etm_is_ete(itr, i)) 544 ete++; 545 else if (cs_etm_is_etmv4(itr, i)) 546 etmv4++; 547 else 548 etmv3++; 549 } 550 } 551 552 perf_cpu_map__put(online_cpus); 553 554 return (CS_ETM_HEADER_SIZE + 555 (ete * CS_ETE_PRIV_SIZE) + 556 (etmv4 * CS_ETMV4_PRIV_SIZE) + 557 (etmv3 * CS_ETMV3_PRIV_SIZE)); 558 } 559 560 static bool cs_etm_is_etmv4(struct auxtrace_record *itr, int cpu) 561 { 562 bool ret = false; 563 char path[PATH_MAX]; 564 int scan; 565 unsigned int val; 566 struct cs_etm_recording *ptr = 567 container_of(itr, struct cs_etm_recording, itr); 568 struct perf_pmu *cs_etm_pmu = ptr->cs_etm_pmu; 569 570 /* Take any of the RO files for ETMv4 and see if it present */ 571 snprintf(path, PATH_MAX, "cpu%d/%s", 572 cpu, metadata_etmv4_ro[CS_ETMV4_TRCIDR0]); 573 scan = perf_pmu__scan_file(cs_etm_pmu, path, "%x", &val); 574 575 /* The file was read successfully, we have a winner */ 576 if (scan == 1) 577 ret = true; 578 579 return ret; 580 } 581 582 static int cs_etm_get_ro(struct perf_pmu *pmu, int cpu, const char *path) 583 { 584 char pmu_path[PATH_MAX]; 585 int scan; 586 unsigned int val = 0; 587 588 /* Get RO metadata from sysfs */ 589 snprintf(pmu_path, PATH_MAX, "cpu%d/%s", cpu, path); 590 591 scan = perf_pmu__scan_file(pmu, pmu_path, "%x", &val); 592 if (scan != 1) 593 pr_err("%s: error reading: %s\n", __func__, pmu_path); 594 595 return val; 596 } 597 598 #define TRCDEVARCH_ARCHPART_SHIFT 0 599 #define TRCDEVARCH_ARCHPART_MASK GENMASK(11, 0) 600 #define TRCDEVARCH_ARCHPART(x) (((x) & TRCDEVARCH_ARCHPART_MASK) >> TRCDEVARCH_ARCHPART_SHIFT) 601 602 #define TRCDEVARCH_ARCHVER_SHIFT 12 603 #define TRCDEVARCH_ARCHVER_MASK GENMASK(15, 12) 604 #define TRCDEVARCH_ARCHVER(x) (((x) & TRCDEVARCH_ARCHVER_MASK) >> TRCDEVARCH_ARCHVER_SHIFT) 605 606 static bool cs_etm_is_ete(struct auxtrace_record *itr, int cpu) 607 { 608 struct cs_etm_recording *ptr = container_of(itr, struct cs_etm_recording, itr); 609 struct perf_pmu *cs_etm_pmu = ptr->cs_etm_pmu; 610 int trcdevarch = cs_etm_get_ro(cs_etm_pmu, cpu, metadata_etmv4_ro[CS_ETE_TRCDEVARCH]); 611 612 /* 613 * ETE if ARCHVER is 5 (ARCHVER is 4 for ETM) and ARCHPART is 0xA13. 614 * See ETM_DEVARCH_ETE_ARCH in coresight-etm4x.h 615 */ 616 return TRCDEVARCH_ARCHVER(trcdevarch) == 5 && TRCDEVARCH_ARCHPART(trcdevarch) == 0xA13; 617 } 618 619 static void cs_etm_save_etmv4_header(__u64 data[], struct auxtrace_record *itr, int cpu) 620 { 621 struct cs_etm_recording *ptr = container_of(itr, struct cs_etm_recording, itr); 622 struct perf_pmu *cs_etm_pmu = ptr->cs_etm_pmu; 623 624 /* Get trace configuration register */ 625 data[CS_ETMV4_TRCCONFIGR] = cs_etmv4_get_config(itr); 626 /* Get traceID from the framework */ 627 data[CS_ETMV4_TRCTRACEIDR] = coresight_get_trace_id(cpu); 628 /* Get read-only information from sysFS */ 629 data[CS_ETMV4_TRCIDR0] = cs_etm_get_ro(cs_etm_pmu, cpu, 630 metadata_etmv4_ro[CS_ETMV4_TRCIDR0]); 631 data[CS_ETMV4_TRCIDR1] = cs_etm_get_ro(cs_etm_pmu, cpu, 632 metadata_etmv4_ro[CS_ETMV4_TRCIDR1]); 633 data[CS_ETMV4_TRCIDR2] = cs_etm_get_ro(cs_etm_pmu, cpu, 634 metadata_etmv4_ro[CS_ETMV4_TRCIDR2]); 635 data[CS_ETMV4_TRCIDR8] = cs_etm_get_ro(cs_etm_pmu, cpu, 636 metadata_etmv4_ro[CS_ETMV4_TRCIDR8]); 637 data[CS_ETMV4_TRCAUTHSTATUS] = cs_etm_get_ro(cs_etm_pmu, cpu, 638 metadata_etmv4_ro[CS_ETMV4_TRCAUTHSTATUS]); 639 } 640 641 static void cs_etm_get_metadata(int cpu, u32 *offset, 642 struct auxtrace_record *itr, 643 struct perf_record_auxtrace_info *info) 644 { 645 u32 increment, nr_trc_params; 646 u64 magic; 647 struct cs_etm_recording *ptr = 648 container_of(itr, struct cs_etm_recording, itr); 649 struct perf_pmu *cs_etm_pmu = ptr->cs_etm_pmu; 650 651 /* first see what kind of tracer this cpu is affined to */ 652 if (cs_etm_is_ete(itr, cpu)) { 653 magic = __perf_cs_ete_magic; 654 /* ETE uses the same registers as ETMv4 plus TRCDEVARCH */ 655 cs_etm_save_etmv4_header(&info->priv[*offset], itr, cpu); 656 info->priv[*offset + CS_ETE_TRCDEVARCH] = 657 cs_etm_get_ro(cs_etm_pmu, cpu, 658 metadata_etmv4_ro[CS_ETE_TRCDEVARCH]); 659 660 /* How much space was used */ 661 increment = CS_ETE_PRIV_MAX; 662 nr_trc_params = CS_ETE_PRIV_MAX - CS_ETM_COMMON_BLK_MAX_V1; 663 } else if (cs_etm_is_etmv4(itr, cpu)) { 664 magic = __perf_cs_etmv4_magic; 665 cs_etm_save_etmv4_header(&info->priv[*offset], itr, cpu); 666 667 /* How much space was used */ 668 increment = CS_ETMV4_PRIV_MAX; 669 nr_trc_params = CS_ETMV4_PRIV_MAX - CS_ETMV4_TRCCONFIGR; 670 } else { 671 magic = __perf_cs_etmv3_magic; 672 /* Get configuration register */ 673 info->priv[*offset + CS_ETM_ETMCR] = cs_etm_get_config(itr); 674 /* Get traceID from the framework */ 675 info->priv[*offset + CS_ETM_ETMTRACEIDR] = 676 coresight_get_trace_id(cpu); 677 /* Get read-only information from sysFS */ 678 info->priv[*offset + CS_ETM_ETMCCER] = 679 cs_etm_get_ro(cs_etm_pmu, cpu, 680 metadata_etmv3_ro[CS_ETM_ETMCCER]); 681 info->priv[*offset + CS_ETM_ETMIDR] = 682 cs_etm_get_ro(cs_etm_pmu, cpu, 683 metadata_etmv3_ro[CS_ETM_ETMIDR]); 684 685 /* How much space was used */ 686 increment = CS_ETM_PRIV_MAX; 687 nr_trc_params = CS_ETM_PRIV_MAX - CS_ETM_ETMCR; 688 } 689 690 /* Build generic header portion */ 691 info->priv[*offset + CS_ETM_MAGIC] = magic; 692 info->priv[*offset + CS_ETM_CPU] = cpu; 693 info->priv[*offset + CS_ETM_NR_TRC_PARAMS] = nr_trc_params; 694 /* Where the next CPU entry should start from */ 695 *offset += increment; 696 } 697 698 static int cs_etm_info_fill(struct auxtrace_record *itr, 699 struct perf_session *session, 700 struct perf_record_auxtrace_info *info, 701 size_t priv_size) 702 { 703 int i; 704 u32 offset; 705 u64 nr_cpu, type; 706 struct perf_cpu_map *cpu_map; 707 struct perf_cpu_map *event_cpus = session->evlist->core.cpus; 708 struct perf_cpu_map *online_cpus = perf_cpu_map__new(NULL); 709 struct cs_etm_recording *ptr = 710 container_of(itr, struct cs_etm_recording, itr); 711 struct perf_pmu *cs_etm_pmu = ptr->cs_etm_pmu; 712 713 if (priv_size != cs_etm_info_priv_size(itr, session->evlist)) 714 return -EINVAL; 715 716 if (!session->evlist->core.nr_mmaps) 717 return -EINVAL; 718 719 /* If the cpu_map is empty all online CPUs are involved */ 720 if (perf_cpu_map__empty(event_cpus)) { 721 cpu_map = online_cpus; 722 } else { 723 /* Make sure all specified CPUs are online */ 724 for (i = 0; i < perf_cpu_map__nr(event_cpus); i++) { 725 if (perf_cpu_map__has(event_cpus, i) && 726 !perf_cpu_map__has(online_cpus, i)) 727 return -EINVAL; 728 } 729 730 cpu_map = event_cpus; 731 } 732 733 nr_cpu = perf_cpu_map__nr(cpu_map); 734 /* Get PMU type as dynamically assigned by the core */ 735 type = cs_etm_pmu->type; 736 737 /* First fill out the session header */ 738 info->type = PERF_AUXTRACE_CS_ETM; 739 info->priv[CS_HEADER_VERSION] = CS_HEADER_CURRENT_VERSION; 740 info->priv[CS_PMU_TYPE_CPUS] = type << 32; 741 info->priv[CS_PMU_TYPE_CPUS] |= nr_cpu; 742 info->priv[CS_ETM_SNAPSHOT] = ptr->snapshot_mode; 743 744 offset = CS_ETM_SNAPSHOT + 1; 745 746 for (i = 0; i < cpu__max_cpu() && offset < priv_size; i++) 747 if (perf_cpu_map__has(cpu_map, i)) 748 cs_etm_get_metadata(i, &offset, itr, info); 749 750 perf_cpu_map__put(online_cpus); 751 752 return 0; 753 } 754 755 static int cs_etm_snapshot_start(struct auxtrace_record *itr) 756 { 757 struct cs_etm_recording *ptr = 758 container_of(itr, struct cs_etm_recording, itr); 759 struct evsel *evsel; 760 761 evlist__for_each_entry(ptr->evlist, evsel) { 762 if (evsel->core.attr.type == ptr->cs_etm_pmu->type) 763 return evsel__disable(evsel); 764 } 765 return -EINVAL; 766 } 767 768 static int cs_etm_snapshot_finish(struct auxtrace_record *itr) 769 { 770 struct cs_etm_recording *ptr = 771 container_of(itr, struct cs_etm_recording, itr); 772 struct evsel *evsel; 773 774 evlist__for_each_entry(ptr->evlist, evsel) { 775 if (evsel->core.attr.type == ptr->cs_etm_pmu->type) 776 return evsel__enable(evsel); 777 } 778 return -EINVAL; 779 } 780 781 static u64 cs_etm_reference(struct auxtrace_record *itr __maybe_unused) 782 { 783 return (((u64) rand() << 0) & 0x00000000FFFFFFFFull) | 784 (((u64) rand() << 32) & 0xFFFFFFFF00000000ull); 785 } 786 787 static void cs_etm_recording_free(struct auxtrace_record *itr) 788 { 789 struct cs_etm_recording *ptr = 790 container_of(itr, struct cs_etm_recording, itr); 791 792 free(ptr); 793 } 794 795 struct auxtrace_record *cs_etm_record_init(int *err) 796 { 797 struct perf_pmu *cs_etm_pmu; 798 struct cs_etm_recording *ptr; 799 800 cs_etm_pmu = perf_pmu__find(CORESIGHT_ETM_PMU_NAME); 801 802 if (!cs_etm_pmu) { 803 *err = -EINVAL; 804 goto out; 805 } 806 807 ptr = zalloc(sizeof(struct cs_etm_recording)); 808 if (!ptr) { 809 *err = -ENOMEM; 810 goto out; 811 } 812 813 ptr->cs_etm_pmu = cs_etm_pmu; 814 ptr->itr.pmu = cs_etm_pmu; 815 ptr->itr.parse_snapshot_options = cs_etm_parse_snapshot_options; 816 ptr->itr.recording_options = cs_etm_recording_options; 817 ptr->itr.info_priv_size = cs_etm_info_priv_size; 818 ptr->itr.info_fill = cs_etm_info_fill; 819 ptr->itr.snapshot_start = cs_etm_snapshot_start; 820 ptr->itr.snapshot_finish = cs_etm_snapshot_finish; 821 ptr->itr.reference = cs_etm_reference; 822 ptr->itr.free = cs_etm_recording_free; 823 ptr->itr.read_finish = auxtrace_record__read_finish; 824 825 *err = 0; 826 return &ptr->itr; 827 out: 828 return NULL; 829 } 830