xref: /openbmc/linux/tools/perf/arch/arm/util/cs-etm.c (revision 6db6b729)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Copyright(C) 2015 Linaro Limited. All rights reserved.
4  * Author: Mathieu Poirier <mathieu.poirier@linaro.org>
5  */
6 
7 #include <api/fs/fs.h>
8 #include <linux/bits.h>
9 #include <linux/bitops.h>
10 #include <linux/compiler.h>
11 #include <linux/coresight-pmu.h>
12 #include <linux/kernel.h>
13 #include <linux/log2.h>
14 #include <linux/string.h>
15 #include <linux/types.h>
16 #include <linux/zalloc.h>
17 
18 #include "cs-etm.h"
19 #include "../../../util/debug.h"
20 #include "../../../util/record.h"
21 #include "../../../util/auxtrace.h"
22 #include "../../../util/cpumap.h"
23 #include "../../../util/event.h"
24 #include "../../../util/evlist.h"
25 #include "../../../util/evsel.h"
26 #include "../../../util/perf_api_probe.h"
27 #include "../../../util/evsel_config.h"
28 #include "../../../util/pmus.h"
29 #include "../../../util/cs-etm.h"
30 #include <internal/lib.h> // page_size
31 #include "../../../util/session.h"
32 
33 #include <errno.h>
34 #include <stdlib.h>
35 #include <sys/stat.h>
36 
37 struct cs_etm_recording {
38 	struct auxtrace_record	itr;
39 	struct perf_pmu		*cs_etm_pmu;
40 	struct evlist		*evlist;
41 	bool			snapshot_mode;
42 	size_t			snapshot_size;
43 };
44 
45 static const char *metadata_etmv3_ro[CS_ETM_PRIV_MAX] = {
46 	[CS_ETM_ETMCCER]	= "mgmt/etmccer",
47 	[CS_ETM_ETMIDR]		= "mgmt/etmidr",
48 };
49 
50 static const char * const metadata_etmv4_ro[] = {
51 	[CS_ETMV4_TRCIDR0]		= "trcidr/trcidr0",
52 	[CS_ETMV4_TRCIDR1]		= "trcidr/trcidr1",
53 	[CS_ETMV4_TRCIDR2]		= "trcidr/trcidr2",
54 	[CS_ETMV4_TRCIDR8]		= "trcidr/trcidr8",
55 	[CS_ETMV4_TRCAUTHSTATUS]	= "mgmt/trcauthstatus",
56 	[CS_ETMV4_TS_SOURCE]		= "ts_source",
57 };
58 
59 static const char * const metadata_ete_ro[] = {
60 	[CS_ETE_TRCIDR0]		= "trcidr/trcidr0",
61 	[CS_ETE_TRCIDR1]		= "trcidr/trcidr1",
62 	[CS_ETE_TRCIDR2]		= "trcidr/trcidr2",
63 	[CS_ETE_TRCIDR8]		= "trcidr/trcidr8",
64 	[CS_ETE_TRCAUTHSTATUS]		= "mgmt/trcauthstatus",
65 	[CS_ETE_TRCDEVARCH]		= "mgmt/trcdevarch",
66 	[CS_ETE_TS_SOURCE]		= "ts_source",
67 };
68 
69 static bool cs_etm_is_etmv4(struct auxtrace_record *itr, int cpu);
70 static bool cs_etm_is_ete(struct auxtrace_record *itr, int cpu);
71 
72 static int cs_etm_validate_context_id(struct auxtrace_record *itr,
73 				      struct evsel *evsel, int cpu)
74 {
75 	struct cs_etm_recording *ptr =
76 		container_of(itr, struct cs_etm_recording, itr);
77 	struct perf_pmu *cs_etm_pmu = ptr->cs_etm_pmu;
78 	char path[PATH_MAX];
79 	int err;
80 	u32 val;
81 	u64 contextid = evsel->core.attr.config &
82 		(perf_pmu__format_bits(cs_etm_pmu, "contextid") |
83 		 perf_pmu__format_bits(cs_etm_pmu, "contextid1") |
84 		 perf_pmu__format_bits(cs_etm_pmu, "contextid2"));
85 
86 	if (!contextid)
87 		return 0;
88 
89 	/* Not supported in etmv3 */
90 	if (!cs_etm_is_etmv4(itr, cpu)) {
91 		pr_err("%s: contextid not supported in ETMv3, disable with %s/contextid=0/\n",
92 		       CORESIGHT_ETM_PMU_NAME, CORESIGHT_ETM_PMU_NAME);
93 		return -EINVAL;
94 	}
95 
96 	/* Get a handle on TRCIDR2 */
97 	snprintf(path, PATH_MAX, "cpu%d/%s",
98 		 cpu, metadata_etmv4_ro[CS_ETMV4_TRCIDR2]);
99 	err = perf_pmu__scan_file(cs_etm_pmu, path, "%x", &val);
100 
101 	/* There was a problem reading the file, bailing out */
102 	if (err != 1) {
103 		pr_err("%s: can't read file %s\n", CORESIGHT_ETM_PMU_NAME,
104 		       path);
105 		return err;
106 	}
107 
108 	if (contextid &
109 	    perf_pmu__format_bits(cs_etm_pmu, "contextid1")) {
110 		/*
111 		 * TRCIDR2.CIDSIZE, bit [9-5], indicates whether contextID
112 		 * tracing is supported:
113 		 *  0b00000 Context ID tracing is not supported.
114 		 *  0b00100 Maximum of 32-bit Context ID size.
115 		 *  All other values are reserved.
116 		 */
117 		if (BMVAL(val, 5, 9) != 0x4) {
118 			pr_err("%s: CONTEXTIDR_EL1 isn't supported, disable with %s/contextid1=0/\n",
119 			       CORESIGHT_ETM_PMU_NAME, CORESIGHT_ETM_PMU_NAME);
120 			return -EINVAL;
121 		}
122 	}
123 
124 	if (contextid &
125 	    perf_pmu__format_bits(cs_etm_pmu, "contextid2")) {
126 		/*
127 		 * TRCIDR2.VMIDOPT[30:29] != 0 and
128 		 * TRCIDR2.VMIDSIZE[14:10] == 0b00100 (32bit virtual contextid)
129 		 * We can't support CONTEXTIDR in VMID if the size of the
130 		 * virtual context id is < 32bit.
131 		 * Any value of VMIDSIZE >= 4 (i.e, > 32bit) is fine for us.
132 		 */
133 		if (!BMVAL(val, 29, 30) || BMVAL(val, 10, 14) < 4) {
134 			pr_err("%s: CONTEXTIDR_EL2 isn't supported, disable with %s/contextid2=0/\n",
135 			       CORESIGHT_ETM_PMU_NAME, CORESIGHT_ETM_PMU_NAME);
136 			return -EINVAL;
137 		}
138 	}
139 
140 	return 0;
141 }
142 
143 static int cs_etm_validate_timestamp(struct auxtrace_record *itr,
144 				     struct evsel *evsel, int cpu)
145 {
146 	struct cs_etm_recording *ptr =
147 		container_of(itr, struct cs_etm_recording, itr);
148 	struct perf_pmu *cs_etm_pmu = ptr->cs_etm_pmu;
149 	char path[PATH_MAX];
150 	int err;
151 	u32 val;
152 
153 	if (!(evsel->core.attr.config &
154 	      perf_pmu__format_bits(cs_etm_pmu, "timestamp")))
155 		return 0;
156 
157 	if (!cs_etm_is_etmv4(itr, cpu)) {
158 		pr_err("%s: timestamp not supported in ETMv3, disable with %s/timestamp=0/\n",
159 		       CORESIGHT_ETM_PMU_NAME, CORESIGHT_ETM_PMU_NAME);
160 		return -EINVAL;
161 	}
162 
163 	/* Get a handle on TRCIRD0 */
164 	snprintf(path, PATH_MAX, "cpu%d/%s",
165 		 cpu, metadata_etmv4_ro[CS_ETMV4_TRCIDR0]);
166 	err = perf_pmu__scan_file(cs_etm_pmu, path, "%x", &val);
167 
168 	/* There was a problem reading the file, bailing out */
169 	if (err != 1) {
170 		pr_err("%s: can't read file %s\n",
171 		       CORESIGHT_ETM_PMU_NAME, path);
172 		return err;
173 	}
174 
175 	/*
176 	 * TRCIDR0.TSSIZE, bit [28-24], indicates whether global timestamping
177 	 * is supported:
178 	 *  0b00000 Global timestamping is not implemented
179 	 *  0b00110 Implementation supports a maximum timestamp of 48bits.
180 	 *  0b01000 Implementation supports a maximum timestamp of 64bits.
181 	 */
182 	val &= GENMASK(28, 24);
183 	if (!val) {
184 		return -EINVAL;
185 	}
186 
187 	return 0;
188 }
189 
190 /*
191  * Check whether the requested timestamp and contextid options should be
192  * available on all requested CPUs and if not, tell the user how to override.
193  * The kernel will silently disable any unavailable options so a warning here
194  * first is better. In theory the kernel could still disable the option for
195  * some other reason so this is best effort only.
196  */
197 static int cs_etm_validate_config(struct auxtrace_record *itr,
198 				  struct evsel *evsel)
199 {
200 	int i, err = -EINVAL;
201 	struct perf_cpu_map *event_cpus = evsel->evlist->core.user_requested_cpus;
202 	struct perf_cpu_map *online_cpus = perf_cpu_map__new(NULL);
203 
204 	/* Set option of each CPU we have */
205 	for (i = 0; i < cpu__max_cpu().cpu; i++) {
206 		struct perf_cpu cpu = { .cpu = i, };
207 
208 		if (!perf_cpu_map__has(event_cpus, cpu) ||
209 		    !perf_cpu_map__has(online_cpus, cpu))
210 			continue;
211 
212 		err = cs_etm_validate_context_id(itr, evsel, i);
213 		if (err)
214 			goto out;
215 		err = cs_etm_validate_timestamp(itr, evsel, i);
216 		if (err)
217 			goto out;
218 	}
219 
220 	err = 0;
221 out:
222 	perf_cpu_map__put(online_cpus);
223 	return err;
224 }
225 
226 static int cs_etm_parse_snapshot_options(struct auxtrace_record *itr,
227 					 struct record_opts *opts,
228 					 const char *str)
229 {
230 	struct cs_etm_recording *ptr =
231 				container_of(itr, struct cs_etm_recording, itr);
232 	unsigned long long snapshot_size = 0;
233 	char *endptr;
234 
235 	if (str) {
236 		snapshot_size = strtoull(str, &endptr, 0);
237 		if (*endptr || snapshot_size > SIZE_MAX)
238 			return -1;
239 	}
240 
241 	opts->auxtrace_snapshot_mode = true;
242 	opts->auxtrace_snapshot_size = snapshot_size;
243 	ptr->snapshot_size = snapshot_size;
244 
245 	return 0;
246 }
247 
248 static int cs_etm_set_sink_attr(struct perf_pmu *pmu,
249 				struct evsel *evsel)
250 {
251 	char msg[BUFSIZ], path[PATH_MAX], *sink;
252 	struct evsel_config_term *term;
253 	int ret = -EINVAL;
254 	u32 hash;
255 
256 	if (evsel->core.attr.config2 & GENMASK(31, 0))
257 		return 0;
258 
259 	list_for_each_entry(term, &evsel->config_terms, list) {
260 		if (term->type != EVSEL__CONFIG_TERM_DRV_CFG)
261 			continue;
262 
263 		sink = term->val.str;
264 		snprintf(path, PATH_MAX, "sinks/%s", sink);
265 
266 		ret = perf_pmu__scan_file(pmu, path, "%x", &hash);
267 		if (ret != 1) {
268 			if (errno == ENOENT)
269 				pr_err("Couldn't find sink \"%s\" on event %s\n"
270 				       "Missing kernel or device support?\n\n"
271 				       "Hint: An appropriate sink will be picked automatically if one isn't specified.\n",
272 				       sink, evsel__name(evsel));
273 			else
274 				pr_err("Failed to set sink \"%s\" on event %s with %d (%s)\n",
275 				       sink, evsel__name(evsel), errno,
276 				       str_error_r(errno, msg, sizeof(msg)));
277 			return ret;
278 		}
279 
280 		evsel->core.attr.config2 |= hash;
281 		return 0;
282 	}
283 
284 	/*
285 	 * No sink was provided on the command line - allow the CoreSight
286 	 * system to look for a default
287 	 */
288 	return 0;
289 }
290 
291 static int cs_etm_recording_options(struct auxtrace_record *itr,
292 				    struct evlist *evlist,
293 				    struct record_opts *opts)
294 {
295 	int ret;
296 	struct cs_etm_recording *ptr =
297 				container_of(itr, struct cs_etm_recording, itr);
298 	struct perf_pmu *cs_etm_pmu = ptr->cs_etm_pmu;
299 	struct evsel *evsel, *cs_etm_evsel = NULL;
300 	struct perf_cpu_map *cpus = evlist->core.user_requested_cpus;
301 	bool privileged = perf_event_paranoid_check(-1);
302 	int err = 0;
303 
304 	evlist__for_each_entry(evlist, evsel) {
305 		if (evsel->core.attr.type == cs_etm_pmu->type) {
306 			if (cs_etm_evsel) {
307 				pr_err("There may be only one %s event\n",
308 				       CORESIGHT_ETM_PMU_NAME);
309 				return -EINVAL;
310 			}
311 			cs_etm_evsel = evsel;
312 		}
313 	}
314 
315 	/* no need to continue if at least one event of interest was found */
316 	if (!cs_etm_evsel)
317 		return 0;
318 
319 	ptr->evlist = evlist;
320 	ptr->snapshot_mode = opts->auxtrace_snapshot_mode;
321 
322 	if (!record_opts__no_switch_events(opts) &&
323 	    perf_can_record_switch_events())
324 		opts->record_switch_events = true;
325 
326 	cs_etm_evsel->needs_auxtrace_mmap = true;
327 	opts->full_auxtrace = true;
328 
329 	ret = cs_etm_set_sink_attr(cs_etm_pmu, cs_etm_evsel);
330 	if (ret)
331 		return ret;
332 
333 	if (opts->use_clockid) {
334 		pr_err("Cannot use clockid (-k option) with %s\n",
335 		       CORESIGHT_ETM_PMU_NAME);
336 		return -EINVAL;
337 	}
338 
339 	/* we are in snapshot mode */
340 	if (opts->auxtrace_snapshot_mode) {
341 		/*
342 		 * No size were given to '-S' or '-m,', so go with
343 		 * the default
344 		 */
345 		if (!opts->auxtrace_snapshot_size &&
346 		    !opts->auxtrace_mmap_pages) {
347 			if (privileged) {
348 				opts->auxtrace_mmap_pages = MiB(4) / page_size;
349 			} else {
350 				opts->auxtrace_mmap_pages =
351 							KiB(128) / page_size;
352 				if (opts->mmap_pages == UINT_MAX)
353 					opts->mmap_pages = KiB(256) / page_size;
354 			}
355 		} else if (!opts->auxtrace_mmap_pages && !privileged &&
356 						opts->mmap_pages == UINT_MAX) {
357 			opts->mmap_pages = KiB(256) / page_size;
358 		}
359 
360 		/*
361 		 * '-m,xyz' was specified but no snapshot size, so make the
362 		 * snapshot size as big as the auxtrace mmap area.
363 		 */
364 		if (!opts->auxtrace_snapshot_size) {
365 			opts->auxtrace_snapshot_size =
366 				opts->auxtrace_mmap_pages * (size_t)page_size;
367 		}
368 
369 		/*
370 		 * -Sxyz was specified but no auxtrace mmap area, so make the
371 		 * auxtrace mmap area big enough to fit the requested snapshot
372 		 * size.
373 		 */
374 		if (!opts->auxtrace_mmap_pages) {
375 			size_t sz = opts->auxtrace_snapshot_size;
376 
377 			sz = round_up(sz, page_size) / page_size;
378 			opts->auxtrace_mmap_pages = roundup_pow_of_two(sz);
379 		}
380 
381 		/* Snapshot size can't be bigger than the auxtrace area */
382 		if (opts->auxtrace_snapshot_size >
383 				opts->auxtrace_mmap_pages * (size_t)page_size) {
384 			pr_err("Snapshot size %zu must not be greater than AUX area tracing mmap size %zu\n",
385 			       opts->auxtrace_snapshot_size,
386 			       opts->auxtrace_mmap_pages * (size_t)page_size);
387 			return -EINVAL;
388 		}
389 
390 		/* Something went wrong somewhere - this shouldn't happen */
391 		if (!opts->auxtrace_snapshot_size ||
392 		    !opts->auxtrace_mmap_pages) {
393 			pr_err("Failed to calculate default snapshot size and/or AUX area tracing mmap pages\n");
394 			return -EINVAL;
395 		}
396 	}
397 
398 	/* Buffer sizes weren't specified with '-m,xyz' so give some defaults */
399 	if (!opts->auxtrace_mmap_pages) {
400 		if (privileged) {
401 			opts->auxtrace_mmap_pages = MiB(4) / page_size;
402 		} else {
403 			opts->auxtrace_mmap_pages = KiB(128) / page_size;
404 			if (opts->mmap_pages == UINT_MAX)
405 				opts->mmap_pages = KiB(256) / page_size;
406 		}
407 	}
408 
409 	if (opts->auxtrace_snapshot_mode)
410 		pr_debug2("%s snapshot size: %zu\n", CORESIGHT_ETM_PMU_NAME,
411 			  opts->auxtrace_snapshot_size);
412 
413 	/*
414 	 * To obtain the auxtrace buffer file descriptor, the auxtrace
415 	 * event must come first.
416 	 */
417 	evlist__to_front(evlist, cs_etm_evsel);
418 
419 	/*
420 	 * get the CPU on the sample - need it to associate trace ID in the
421 	 * AUX_OUTPUT_HW_ID event, and the AUX event for per-cpu mmaps.
422 	 */
423 	evsel__set_sample_bit(cs_etm_evsel, CPU);
424 
425 	/*
426 	 * Also the case of per-cpu mmaps, need the contextID in order to be notified
427 	 * when a context switch happened.
428 	 */
429 	if (!perf_cpu_map__empty(cpus)) {
430 		evsel__set_config_if_unset(cs_etm_pmu, cs_etm_evsel,
431 					   "timestamp", 1);
432 		evsel__set_config_if_unset(cs_etm_pmu, cs_etm_evsel,
433 					   "contextid", 1);
434 	}
435 
436 	/* Add dummy event to keep tracking */
437 	err = parse_event(evlist, "dummy:u");
438 	if (err)
439 		goto out;
440 	evsel = evlist__last(evlist);
441 	evlist__set_tracking_event(evlist, evsel);
442 	evsel->core.attr.freq = 0;
443 	evsel->core.attr.sample_period = 1;
444 
445 	/* In per-cpu case, always need the time of mmap events etc */
446 	if (!perf_cpu_map__empty(cpus))
447 		evsel__set_sample_bit(evsel, TIME);
448 
449 	err = cs_etm_validate_config(itr, cs_etm_evsel);
450 out:
451 	return err;
452 }
453 
454 static u64 cs_etm_get_config(struct auxtrace_record *itr)
455 {
456 	u64 config = 0;
457 	struct cs_etm_recording *ptr =
458 			container_of(itr, struct cs_etm_recording, itr);
459 	struct perf_pmu *cs_etm_pmu = ptr->cs_etm_pmu;
460 	struct evlist *evlist = ptr->evlist;
461 	struct evsel *evsel;
462 
463 	evlist__for_each_entry(evlist, evsel) {
464 		if (evsel->core.attr.type == cs_etm_pmu->type) {
465 			/*
466 			 * Variable perf_event_attr::config is assigned to
467 			 * ETMv3/PTM.  The bit fields have been made to match
468 			 * the ETMv3.5 ETRMCR register specification.  See the
469 			 * PMU_FORMAT_ATTR() declarations in
470 			 * drivers/hwtracing/coresight/coresight-perf.c for
471 			 * details.
472 			 */
473 			config = evsel->core.attr.config;
474 			break;
475 		}
476 	}
477 
478 	return config;
479 }
480 
481 #ifndef BIT
482 #define BIT(N) (1UL << (N))
483 #endif
484 
485 static u64 cs_etmv4_get_config(struct auxtrace_record *itr)
486 {
487 	u64 config = 0;
488 	u64 config_opts = 0;
489 
490 	/*
491 	 * The perf event variable config bits represent both
492 	 * the command line options and register programming
493 	 * bits in ETMv3/PTM. For ETMv4 we must remap options
494 	 * to real bits
495 	 */
496 	config_opts = cs_etm_get_config(itr);
497 	if (config_opts & BIT(ETM_OPT_CYCACC))
498 		config |= BIT(ETM4_CFG_BIT_CYCACC);
499 	if (config_opts & BIT(ETM_OPT_CTXTID))
500 		config |= BIT(ETM4_CFG_BIT_CTXTID);
501 	if (config_opts & BIT(ETM_OPT_TS))
502 		config |= BIT(ETM4_CFG_BIT_TS);
503 	if (config_opts & BIT(ETM_OPT_RETSTK))
504 		config |= BIT(ETM4_CFG_BIT_RETSTK);
505 	if (config_opts & BIT(ETM_OPT_CTXTID2))
506 		config |= BIT(ETM4_CFG_BIT_VMID) |
507 			  BIT(ETM4_CFG_BIT_VMID_OPT);
508 	if (config_opts & BIT(ETM_OPT_BRANCH_BROADCAST))
509 		config |= BIT(ETM4_CFG_BIT_BB);
510 
511 	return config;
512 }
513 
514 static size_t
515 cs_etm_info_priv_size(struct auxtrace_record *itr __maybe_unused,
516 		      struct evlist *evlist __maybe_unused)
517 {
518 	int i;
519 	int etmv3 = 0, etmv4 = 0, ete = 0;
520 	struct perf_cpu_map *event_cpus = evlist->core.user_requested_cpus;
521 	struct perf_cpu_map *online_cpus = perf_cpu_map__new(NULL);
522 
523 	/* cpu map is not empty, we have specific CPUs to work with */
524 	if (!perf_cpu_map__empty(event_cpus)) {
525 		for (i = 0; i < cpu__max_cpu().cpu; i++) {
526 			struct perf_cpu cpu = { .cpu = i, };
527 
528 			if (!perf_cpu_map__has(event_cpus, cpu) ||
529 			    !perf_cpu_map__has(online_cpus, cpu))
530 				continue;
531 
532 			if (cs_etm_is_ete(itr, i))
533 				ete++;
534 			else if (cs_etm_is_etmv4(itr, i))
535 				etmv4++;
536 			else
537 				etmv3++;
538 		}
539 	} else {
540 		/* get configuration for all CPUs in the system */
541 		for (i = 0; i < cpu__max_cpu().cpu; i++) {
542 			struct perf_cpu cpu = { .cpu = i, };
543 
544 			if (!perf_cpu_map__has(online_cpus, cpu))
545 				continue;
546 
547 			if (cs_etm_is_ete(itr, i))
548 				ete++;
549 			else if (cs_etm_is_etmv4(itr, i))
550 				etmv4++;
551 			else
552 				etmv3++;
553 		}
554 	}
555 
556 	perf_cpu_map__put(online_cpus);
557 
558 	return (CS_ETM_HEADER_SIZE +
559 	       (ete   * CS_ETE_PRIV_SIZE) +
560 	       (etmv4 * CS_ETMV4_PRIV_SIZE) +
561 	       (etmv3 * CS_ETMV3_PRIV_SIZE));
562 }
563 
564 static bool cs_etm_is_etmv4(struct auxtrace_record *itr, int cpu)
565 {
566 	bool ret = false;
567 	char path[PATH_MAX];
568 	int scan;
569 	unsigned int val;
570 	struct cs_etm_recording *ptr =
571 			container_of(itr, struct cs_etm_recording, itr);
572 	struct perf_pmu *cs_etm_pmu = ptr->cs_etm_pmu;
573 
574 	/* Take any of the RO files for ETMv4 and see if it present */
575 	snprintf(path, PATH_MAX, "cpu%d/%s",
576 		 cpu, metadata_etmv4_ro[CS_ETMV4_TRCIDR0]);
577 	scan = perf_pmu__scan_file(cs_etm_pmu, path, "%x", &val);
578 
579 	/* The file was read successfully, we have a winner */
580 	if (scan == 1)
581 		ret = true;
582 
583 	return ret;
584 }
585 
586 static int cs_etm_get_ro(struct perf_pmu *pmu, int cpu, const char *path)
587 {
588 	char pmu_path[PATH_MAX];
589 	int scan;
590 	unsigned int val = 0;
591 
592 	/* Get RO metadata from sysfs */
593 	snprintf(pmu_path, PATH_MAX, "cpu%d/%s", cpu, path);
594 
595 	scan = perf_pmu__scan_file(pmu, pmu_path, "%x", &val);
596 	if (scan != 1)
597 		pr_err("%s: error reading: %s\n", __func__, pmu_path);
598 
599 	return val;
600 }
601 
602 static int cs_etm_get_ro_signed(struct perf_pmu *pmu, int cpu, const char *path)
603 {
604 	char pmu_path[PATH_MAX];
605 	int scan;
606 	int val = 0;
607 
608 	/* Get RO metadata from sysfs */
609 	snprintf(pmu_path, PATH_MAX, "cpu%d/%s", cpu, path);
610 
611 	scan = perf_pmu__scan_file(pmu, pmu_path, "%d", &val);
612 	if (scan != 1)
613 		pr_err("%s: error reading: %s\n", __func__, pmu_path);
614 
615 	return val;
616 }
617 
618 static bool cs_etm_pmu_path_exists(struct perf_pmu *pmu, int cpu, const char *path)
619 {
620 	char pmu_path[PATH_MAX];
621 
622 	/* Get RO metadata from sysfs */
623 	snprintf(pmu_path, PATH_MAX, "cpu%d/%s", cpu, path);
624 
625 	return perf_pmu__file_exists(pmu, pmu_path);
626 }
627 
628 #define TRCDEVARCH_ARCHPART_SHIFT 0
629 #define TRCDEVARCH_ARCHPART_MASK  GENMASK(11, 0)
630 #define TRCDEVARCH_ARCHPART(x)    (((x) & TRCDEVARCH_ARCHPART_MASK) >> TRCDEVARCH_ARCHPART_SHIFT)
631 
632 #define TRCDEVARCH_ARCHVER_SHIFT 12
633 #define TRCDEVARCH_ARCHVER_MASK  GENMASK(15, 12)
634 #define TRCDEVARCH_ARCHVER(x)    (((x) & TRCDEVARCH_ARCHVER_MASK) >> TRCDEVARCH_ARCHVER_SHIFT)
635 
636 static bool cs_etm_is_ete(struct auxtrace_record *itr, int cpu)
637 {
638 	struct cs_etm_recording *ptr = container_of(itr, struct cs_etm_recording, itr);
639 	struct perf_pmu *cs_etm_pmu = ptr->cs_etm_pmu;
640 	int trcdevarch;
641 
642 	if (!cs_etm_pmu_path_exists(cs_etm_pmu, cpu, metadata_ete_ro[CS_ETE_TRCDEVARCH]))
643 		return false;
644 
645 	trcdevarch = cs_etm_get_ro(cs_etm_pmu, cpu, metadata_ete_ro[CS_ETE_TRCDEVARCH]);
646 	/*
647 	 * ETE if ARCHVER is 5 (ARCHVER is 4 for ETM) and ARCHPART is 0xA13.
648 	 * See ETM_DEVARCH_ETE_ARCH in coresight-etm4x.h
649 	 */
650 	return TRCDEVARCH_ARCHVER(trcdevarch) == 5 && TRCDEVARCH_ARCHPART(trcdevarch) == 0xA13;
651 }
652 
653 static void cs_etm_save_etmv4_header(__u64 data[], struct auxtrace_record *itr, int cpu)
654 {
655 	struct cs_etm_recording *ptr = container_of(itr, struct cs_etm_recording, itr);
656 	struct perf_pmu *cs_etm_pmu = ptr->cs_etm_pmu;
657 
658 	/* Get trace configuration register */
659 	data[CS_ETMV4_TRCCONFIGR] = cs_etmv4_get_config(itr);
660 	/* traceID set to legacy version, in case new perf running on older system */
661 	data[CS_ETMV4_TRCTRACEIDR] =
662 		CORESIGHT_LEGACY_CPU_TRACE_ID(cpu) | CORESIGHT_TRACE_ID_UNUSED_FLAG;
663 
664 	/* Get read-only information from sysFS */
665 	data[CS_ETMV4_TRCIDR0] = cs_etm_get_ro(cs_etm_pmu, cpu,
666 					       metadata_etmv4_ro[CS_ETMV4_TRCIDR0]);
667 	data[CS_ETMV4_TRCIDR1] = cs_etm_get_ro(cs_etm_pmu, cpu,
668 					       metadata_etmv4_ro[CS_ETMV4_TRCIDR1]);
669 	data[CS_ETMV4_TRCIDR2] = cs_etm_get_ro(cs_etm_pmu, cpu,
670 					       metadata_etmv4_ro[CS_ETMV4_TRCIDR2]);
671 	data[CS_ETMV4_TRCIDR8] = cs_etm_get_ro(cs_etm_pmu, cpu,
672 					       metadata_etmv4_ro[CS_ETMV4_TRCIDR8]);
673 	data[CS_ETMV4_TRCAUTHSTATUS] = cs_etm_get_ro(cs_etm_pmu, cpu,
674 						     metadata_etmv4_ro[CS_ETMV4_TRCAUTHSTATUS]);
675 
676 	/* Kernels older than 5.19 may not expose ts_source */
677 	if (cs_etm_pmu_path_exists(cs_etm_pmu, cpu, metadata_etmv4_ro[CS_ETMV4_TS_SOURCE]))
678 		data[CS_ETMV4_TS_SOURCE] = (__u64) cs_etm_get_ro_signed(cs_etm_pmu, cpu,
679 				metadata_etmv4_ro[CS_ETMV4_TS_SOURCE]);
680 	else {
681 		pr_debug3("[%03d] pmu file 'ts_source' not found. Fallback to safe value (-1)\n",
682 			  cpu);
683 		data[CS_ETMV4_TS_SOURCE] = (__u64) -1;
684 	}
685 }
686 
687 static void cs_etm_save_ete_header(__u64 data[], struct auxtrace_record *itr, int cpu)
688 {
689 	struct cs_etm_recording *ptr = container_of(itr, struct cs_etm_recording, itr);
690 	struct perf_pmu *cs_etm_pmu = ptr->cs_etm_pmu;
691 
692 	/* Get trace configuration register */
693 	data[CS_ETE_TRCCONFIGR] = cs_etmv4_get_config(itr);
694 	/* traceID set to legacy version, in case new perf running on older system */
695 	data[CS_ETE_TRCTRACEIDR] =
696 		CORESIGHT_LEGACY_CPU_TRACE_ID(cpu) | CORESIGHT_TRACE_ID_UNUSED_FLAG;
697 
698 	/* Get read-only information from sysFS */
699 	data[CS_ETE_TRCIDR0] = cs_etm_get_ro(cs_etm_pmu, cpu,
700 					     metadata_ete_ro[CS_ETE_TRCIDR0]);
701 	data[CS_ETE_TRCIDR1] = cs_etm_get_ro(cs_etm_pmu, cpu,
702 					     metadata_ete_ro[CS_ETE_TRCIDR1]);
703 	data[CS_ETE_TRCIDR2] = cs_etm_get_ro(cs_etm_pmu, cpu,
704 					     metadata_ete_ro[CS_ETE_TRCIDR2]);
705 	data[CS_ETE_TRCIDR8] = cs_etm_get_ro(cs_etm_pmu, cpu,
706 					     metadata_ete_ro[CS_ETE_TRCIDR8]);
707 	data[CS_ETE_TRCAUTHSTATUS] = cs_etm_get_ro(cs_etm_pmu, cpu,
708 						   metadata_ete_ro[CS_ETE_TRCAUTHSTATUS]);
709 	/* ETE uses the same registers as ETMv4 plus TRCDEVARCH */
710 	data[CS_ETE_TRCDEVARCH] = cs_etm_get_ro(cs_etm_pmu, cpu,
711 						metadata_ete_ro[CS_ETE_TRCDEVARCH]);
712 
713 	/* Kernels older than 5.19 may not expose ts_source */
714 	if (cs_etm_pmu_path_exists(cs_etm_pmu, cpu, metadata_ete_ro[CS_ETE_TS_SOURCE]))
715 		data[CS_ETE_TS_SOURCE] = (__u64) cs_etm_get_ro_signed(cs_etm_pmu, cpu,
716 				metadata_ete_ro[CS_ETE_TS_SOURCE]);
717 	else {
718 		pr_debug3("[%03d] pmu file 'ts_source' not found. Fallback to safe value (-1)\n",
719 			  cpu);
720 		data[CS_ETE_TS_SOURCE] = (__u64) -1;
721 	}
722 }
723 
724 static void cs_etm_get_metadata(int cpu, u32 *offset,
725 				struct auxtrace_record *itr,
726 				struct perf_record_auxtrace_info *info)
727 {
728 	u32 increment, nr_trc_params;
729 	u64 magic;
730 	struct cs_etm_recording *ptr =
731 			container_of(itr, struct cs_etm_recording, itr);
732 	struct perf_pmu *cs_etm_pmu = ptr->cs_etm_pmu;
733 
734 	/* first see what kind of tracer this cpu is affined to */
735 	if (cs_etm_is_ete(itr, cpu)) {
736 		magic = __perf_cs_ete_magic;
737 		cs_etm_save_ete_header(&info->priv[*offset], itr, cpu);
738 
739 		/* How much space was used */
740 		increment = CS_ETE_PRIV_MAX;
741 		nr_trc_params = CS_ETE_PRIV_MAX - CS_ETM_COMMON_BLK_MAX_V1;
742 	} else if (cs_etm_is_etmv4(itr, cpu)) {
743 		magic = __perf_cs_etmv4_magic;
744 		cs_etm_save_etmv4_header(&info->priv[*offset], itr, cpu);
745 
746 		/* How much space was used */
747 		increment = CS_ETMV4_PRIV_MAX;
748 		nr_trc_params = CS_ETMV4_PRIV_MAX - CS_ETMV4_TRCCONFIGR;
749 	} else {
750 		magic = __perf_cs_etmv3_magic;
751 		/* Get configuration register */
752 		info->priv[*offset + CS_ETM_ETMCR] = cs_etm_get_config(itr);
753 		/* traceID set to legacy value in case new perf running on old system */
754 		info->priv[*offset + CS_ETM_ETMTRACEIDR] =
755 			CORESIGHT_LEGACY_CPU_TRACE_ID(cpu) | CORESIGHT_TRACE_ID_UNUSED_FLAG;
756 		/* Get read-only information from sysFS */
757 		info->priv[*offset + CS_ETM_ETMCCER] =
758 			cs_etm_get_ro(cs_etm_pmu, cpu,
759 				      metadata_etmv3_ro[CS_ETM_ETMCCER]);
760 		info->priv[*offset + CS_ETM_ETMIDR] =
761 			cs_etm_get_ro(cs_etm_pmu, cpu,
762 				      metadata_etmv3_ro[CS_ETM_ETMIDR]);
763 
764 		/* How much space was used */
765 		increment = CS_ETM_PRIV_MAX;
766 		nr_trc_params = CS_ETM_PRIV_MAX - CS_ETM_ETMCR;
767 	}
768 
769 	/* Build generic header portion */
770 	info->priv[*offset + CS_ETM_MAGIC] = magic;
771 	info->priv[*offset + CS_ETM_CPU] = cpu;
772 	info->priv[*offset + CS_ETM_NR_TRC_PARAMS] = nr_trc_params;
773 	/* Where the next CPU entry should start from */
774 	*offset += increment;
775 }
776 
777 static int cs_etm_info_fill(struct auxtrace_record *itr,
778 			    struct perf_session *session,
779 			    struct perf_record_auxtrace_info *info,
780 			    size_t priv_size)
781 {
782 	int i;
783 	u32 offset;
784 	u64 nr_cpu, type;
785 	struct perf_cpu_map *cpu_map;
786 	struct perf_cpu_map *event_cpus = session->evlist->core.user_requested_cpus;
787 	struct perf_cpu_map *online_cpus = perf_cpu_map__new(NULL);
788 	struct cs_etm_recording *ptr =
789 			container_of(itr, struct cs_etm_recording, itr);
790 	struct perf_pmu *cs_etm_pmu = ptr->cs_etm_pmu;
791 
792 	if (priv_size != cs_etm_info_priv_size(itr, session->evlist))
793 		return -EINVAL;
794 
795 	if (!session->evlist->core.nr_mmaps)
796 		return -EINVAL;
797 
798 	/* If the cpu_map is empty all online CPUs are involved */
799 	if (perf_cpu_map__empty(event_cpus)) {
800 		cpu_map = online_cpus;
801 	} else {
802 		/* Make sure all specified CPUs are online */
803 		for (i = 0; i < perf_cpu_map__nr(event_cpus); i++) {
804 			struct perf_cpu cpu = { .cpu = i, };
805 
806 			if (perf_cpu_map__has(event_cpus, cpu) &&
807 			    !perf_cpu_map__has(online_cpus, cpu))
808 				return -EINVAL;
809 		}
810 
811 		cpu_map = event_cpus;
812 	}
813 
814 	nr_cpu = perf_cpu_map__nr(cpu_map);
815 	/* Get PMU type as dynamically assigned by the core */
816 	type = cs_etm_pmu->type;
817 
818 	/* First fill out the session header */
819 	info->type = PERF_AUXTRACE_CS_ETM;
820 	info->priv[CS_HEADER_VERSION] = CS_HEADER_CURRENT_VERSION;
821 	info->priv[CS_PMU_TYPE_CPUS] = type << 32;
822 	info->priv[CS_PMU_TYPE_CPUS] |= nr_cpu;
823 	info->priv[CS_ETM_SNAPSHOT] = ptr->snapshot_mode;
824 
825 	offset = CS_ETM_SNAPSHOT + 1;
826 
827 	for (i = 0; i < cpu__max_cpu().cpu && offset < priv_size; i++) {
828 		struct perf_cpu cpu = { .cpu = i, };
829 
830 		if (perf_cpu_map__has(cpu_map, cpu))
831 			cs_etm_get_metadata(i, &offset, itr, info);
832 	}
833 
834 	perf_cpu_map__put(online_cpus);
835 
836 	return 0;
837 }
838 
839 static int cs_etm_snapshot_start(struct auxtrace_record *itr)
840 {
841 	struct cs_etm_recording *ptr =
842 			container_of(itr, struct cs_etm_recording, itr);
843 	struct evsel *evsel;
844 
845 	evlist__for_each_entry(ptr->evlist, evsel) {
846 		if (evsel->core.attr.type == ptr->cs_etm_pmu->type)
847 			return evsel__disable(evsel);
848 	}
849 	return -EINVAL;
850 }
851 
852 static int cs_etm_snapshot_finish(struct auxtrace_record *itr)
853 {
854 	struct cs_etm_recording *ptr =
855 			container_of(itr, struct cs_etm_recording, itr);
856 	struct evsel *evsel;
857 
858 	evlist__for_each_entry(ptr->evlist, evsel) {
859 		if (evsel->core.attr.type == ptr->cs_etm_pmu->type)
860 			return evsel__enable(evsel);
861 	}
862 	return -EINVAL;
863 }
864 
865 static u64 cs_etm_reference(struct auxtrace_record *itr __maybe_unused)
866 {
867 	return (((u64) rand() <<  0) & 0x00000000FFFFFFFFull) |
868 		(((u64) rand() << 32) & 0xFFFFFFFF00000000ull);
869 }
870 
871 static void cs_etm_recording_free(struct auxtrace_record *itr)
872 {
873 	struct cs_etm_recording *ptr =
874 			container_of(itr, struct cs_etm_recording, itr);
875 
876 	free(ptr);
877 }
878 
879 struct auxtrace_record *cs_etm_record_init(int *err)
880 {
881 	struct perf_pmu *cs_etm_pmu;
882 	struct cs_etm_recording *ptr;
883 
884 	cs_etm_pmu = perf_pmus__find(CORESIGHT_ETM_PMU_NAME);
885 
886 	if (!cs_etm_pmu) {
887 		*err = -EINVAL;
888 		goto out;
889 	}
890 
891 	ptr = zalloc(sizeof(struct cs_etm_recording));
892 	if (!ptr) {
893 		*err = -ENOMEM;
894 		goto out;
895 	}
896 
897 	ptr->cs_etm_pmu			= cs_etm_pmu;
898 	ptr->itr.pmu			= cs_etm_pmu;
899 	ptr->itr.parse_snapshot_options	= cs_etm_parse_snapshot_options;
900 	ptr->itr.recording_options	= cs_etm_recording_options;
901 	ptr->itr.info_priv_size		= cs_etm_info_priv_size;
902 	ptr->itr.info_fill		= cs_etm_info_fill;
903 	ptr->itr.snapshot_start		= cs_etm_snapshot_start;
904 	ptr->itr.snapshot_finish	= cs_etm_snapshot_finish;
905 	ptr->itr.reference		= cs_etm_reference;
906 	ptr->itr.free			= cs_etm_recording_free;
907 	ptr->itr.read_finish		= auxtrace_record__read_finish;
908 
909 	*err = 0;
910 	return &ptr->itr;
911 out:
912 	return NULL;
913 }
914 
915 /*
916  * Set a default config to enable the user changed config tracking mechanism
917  * (CFG_CHG and evsel__set_config_if_unset()). If no default is set then user
918  * changes aren't tracked.
919  */
920 struct perf_event_attr *
921 cs_etm_get_default_config(struct perf_pmu *pmu __maybe_unused)
922 {
923 	struct perf_event_attr *attr;
924 
925 	attr = zalloc(sizeof(struct perf_event_attr));
926 	if (!attr)
927 		return NULL;
928 
929 	attr->sample_period = 1;
930 
931 	return attr;
932 }
933