1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright(C) 2015 Linaro Limited. All rights reserved. 4 * Author: Mathieu Poirier <mathieu.poirier@linaro.org> 5 */ 6 7 #include <api/fs/fs.h> 8 #include <linux/bits.h> 9 #include <linux/bitops.h> 10 #include <linux/compiler.h> 11 #include <linux/coresight-pmu.h> 12 #include <linux/kernel.h> 13 #include <linux/log2.h> 14 #include <linux/string.h> 15 #include <linux/types.h> 16 #include <linux/zalloc.h> 17 18 #include "cs-etm.h" 19 #include "../../../util/debug.h" 20 #include "../../../util/record.h" 21 #include "../../../util/auxtrace.h" 22 #include "../../../util/cpumap.h" 23 #include "../../../util/event.h" 24 #include "../../../util/evlist.h" 25 #include "../../../util/evsel.h" 26 #include "../../../util/perf_api_probe.h" 27 #include "../../../util/evsel_config.h" 28 #include "../../../util/pmu.h" 29 #include "../../../util/cs-etm.h" 30 #include <internal/lib.h> // page_size 31 #include "../../../util/session.h" 32 33 #include <errno.h> 34 #include <stdlib.h> 35 #include <sys/stat.h> 36 37 struct cs_etm_recording { 38 struct auxtrace_record itr; 39 struct perf_pmu *cs_etm_pmu; 40 struct evlist *evlist; 41 bool snapshot_mode; 42 size_t snapshot_size; 43 }; 44 45 static const char *metadata_etmv3_ro[CS_ETM_PRIV_MAX] = { 46 [CS_ETM_ETMCCER] = "mgmt/etmccer", 47 [CS_ETM_ETMIDR] = "mgmt/etmidr", 48 }; 49 50 static const char * const metadata_etmv4_ro[] = { 51 [CS_ETMV4_TRCIDR0] = "trcidr/trcidr0", 52 [CS_ETMV4_TRCIDR1] = "trcidr/trcidr1", 53 [CS_ETMV4_TRCIDR2] = "trcidr/trcidr2", 54 [CS_ETMV4_TRCIDR8] = "trcidr/trcidr8", 55 [CS_ETMV4_TRCAUTHSTATUS] = "mgmt/trcauthstatus", 56 [CS_ETE_TRCDEVARCH] = "mgmt/trcdevarch" 57 }; 58 59 static bool cs_etm_is_etmv4(struct auxtrace_record *itr, int cpu); 60 static bool cs_etm_is_ete(struct auxtrace_record *itr, int cpu); 61 62 static int cs_etm_set_context_id(struct auxtrace_record *itr, 63 struct evsel *evsel, int cpu) 64 { 65 struct cs_etm_recording *ptr; 66 struct perf_pmu *cs_etm_pmu; 67 char path[PATH_MAX]; 68 int err = -EINVAL; 69 u32 val; 70 u64 contextid; 71 72 ptr = container_of(itr, struct cs_etm_recording, itr); 73 cs_etm_pmu = ptr->cs_etm_pmu; 74 75 if (!cs_etm_is_etmv4(itr, cpu)) 76 goto out; 77 78 /* Get a handle on TRCIDR2 */ 79 snprintf(path, PATH_MAX, "cpu%d/%s", 80 cpu, metadata_etmv4_ro[CS_ETMV4_TRCIDR2]); 81 err = perf_pmu__scan_file(cs_etm_pmu, path, "%x", &val); 82 83 /* There was a problem reading the file, bailing out */ 84 if (err != 1) { 85 pr_err("%s: can't read file %s\n", 86 CORESIGHT_ETM_PMU_NAME, path); 87 goto out; 88 } 89 90 /* User has configured for PID tracing, respects it. */ 91 contextid = evsel->core.attr.config & 92 (BIT(ETM_OPT_CTXTID) | BIT(ETM_OPT_CTXTID2)); 93 94 /* 95 * If user doesn't configure the contextid format, parse PMU format and 96 * enable PID tracing according to the "contextid" format bits: 97 * 98 * If bit ETM_OPT_CTXTID is set, trace CONTEXTIDR_EL1; 99 * If bit ETM_OPT_CTXTID2 is set, trace CONTEXTIDR_EL2. 100 */ 101 if (!contextid) 102 contextid = perf_pmu__format_bits(&cs_etm_pmu->format, 103 "contextid"); 104 105 if (contextid & BIT(ETM_OPT_CTXTID)) { 106 /* 107 * TRCIDR2.CIDSIZE, bit [9-5], indicates whether contextID 108 * tracing is supported: 109 * 0b00000 Context ID tracing is not supported. 110 * 0b00100 Maximum of 32-bit Context ID size. 111 * All other values are reserved. 112 */ 113 val = BMVAL(val, 5, 9); 114 if (!val || val != 0x4) { 115 pr_err("%s: CONTEXTIDR_EL1 isn't supported\n", 116 CORESIGHT_ETM_PMU_NAME); 117 err = -EINVAL; 118 goto out; 119 } 120 } 121 122 if (contextid & BIT(ETM_OPT_CTXTID2)) { 123 /* 124 * TRCIDR2.VMIDOPT[30:29] != 0 and 125 * TRCIDR2.VMIDSIZE[14:10] == 0b00100 (32bit virtual contextid) 126 * We can't support CONTEXTIDR in VMID if the size of the 127 * virtual context id is < 32bit. 128 * Any value of VMIDSIZE >= 4 (i.e, > 32bit) is fine for us. 129 */ 130 if (!BMVAL(val, 29, 30) || BMVAL(val, 10, 14) < 4) { 131 pr_err("%s: CONTEXTIDR_EL2 isn't supported\n", 132 CORESIGHT_ETM_PMU_NAME); 133 err = -EINVAL; 134 goto out; 135 } 136 } 137 138 /* All good, let the kernel know */ 139 evsel->core.attr.config |= contextid; 140 err = 0; 141 142 out: 143 return err; 144 } 145 146 static int cs_etm_set_timestamp(struct auxtrace_record *itr, 147 struct evsel *evsel, int cpu) 148 { 149 struct cs_etm_recording *ptr; 150 struct perf_pmu *cs_etm_pmu; 151 char path[PATH_MAX]; 152 int err = -EINVAL; 153 u32 val; 154 155 ptr = container_of(itr, struct cs_etm_recording, itr); 156 cs_etm_pmu = ptr->cs_etm_pmu; 157 158 if (!cs_etm_is_etmv4(itr, cpu)) 159 goto out; 160 161 /* Get a handle on TRCIRD0 */ 162 snprintf(path, PATH_MAX, "cpu%d/%s", 163 cpu, metadata_etmv4_ro[CS_ETMV4_TRCIDR0]); 164 err = perf_pmu__scan_file(cs_etm_pmu, path, "%x", &val); 165 166 /* There was a problem reading the file, bailing out */ 167 if (err != 1) { 168 pr_err("%s: can't read file %s\n", 169 CORESIGHT_ETM_PMU_NAME, path); 170 goto out; 171 } 172 173 /* 174 * TRCIDR0.TSSIZE, bit [28-24], indicates whether global timestamping 175 * is supported: 176 * 0b00000 Global timestamping is not implemented 177 * 0b00110 Implementation supports a maximum timestamp of 48bits. 178 * 0b01000 Implementation supports a maximum timestamp of 64bits. 179 */ 180 val &= GENMASK(28, 24); 181 if (!val) { 182 err = -EINVAL; 183 goto out; 184 } 185 186 /* All good, let the kernel know */ 187 evsel->core.attr.config |= (1 << ETM_OPT_TS); 188 err = 0; 189 190 out: 191 return err; 192 } 193 194 #define ETM_SET_OPT_CTXTID (1 << 0) 195 #define ETM_SET_OPT_TS (1 << 1) 196 #define ETM_SET_OPT_MASK (ETM_SET_OPT_CTXTID | ETM_SET_OPT_TS) 197 198 static int cs_etm_set_option(struct auxtrace_record *itr, 199 struct evsel *evsel, u32 option) 200 { 201 int i, err = -EINVAL; 202 struct perf_cpu_map *event_cpus = evsel->evlist->core.user_requested_cpus; 203 struct perf_cpu_map *online_cpus = perf_cpu_map__new(NULL); 204 205 /* Set option of each CPU we have */ 206 for (i = 0; i < cpu__max_cpu().cpu; i++) { 207 struct perf_cpu cpu = { .cpu = i, }; 208 209 if (!perf_cpu_map__has(event_cpus, cpu) || 210 !perf_cpu_map__has(online_cpus, cpu)) 211 continue; 212 213 if (option & BIT(ETM_OPT_CTXTID)) { 214 err = cs_etm_set_context_id(itr, evsel, i); 215 if (err) 216 goto out; 217 } 218 if (option & BIT(ETM_OPT_TS)) { 219 err = cs_etm_set_timestamp(itr, evsel, i); 220 if (err) 221 goto out; 222 } 223 if (option & ~(BIT(ETM_OPT_CTXTID) | BIT(ETM_OPT_TS))) 224 /* Nothing else is currently supported */ 225 goto out; 226 } 227 228 err = 0; 229 out: 230 perf_cpu_map__put(online_cpus); 231 return err; 232 } 233 234 static int cs_etm_parse_snapshot_options(struct auxtrace_record *itr, 235 struct record_opts *opts, 236 const char *str) 237 { 238 struct cs_etm_recording *ptr = 239 container_of(itr, struct cs_etm_recording, itr); 240 unsigned long long snapshot_size = 0; 241 char *endptr; 242 243 if (str) { 244 snapshot_size = strtoull(str, &endptr, 0); 245 if (*endptr || snapshot_size > SIZE_MAX) 246 return -1; 247 } 248 249 opts->auxtrace_snapshot_mode = true; 250 opts->auxtrace_snapshot_size = snapshot_size; 251 ptr->snapshot_size = snapshot_size; 252 253 return 0; 254 } 255 256 static int cs_etm_set_sink_attr(struct perf_pmu *pmu, 257 struct evsel *evsel) 258 { 259 char msg[BUFSIZ], path[PATH_MAX], *sink; 260 struct evsel_config_term *term; 261 int ret = -EINVAL; 262 u32 hash; 263 264 if (evsel->core.attr.config2 & GENMASK(31, 0)) 265 return 0; 266 267 list_for_each_entry(term, &evsel->config_terms, list) { 268 if (term->type != EVSEL__CONFIG_TERM_DRV_CFG) 269 continue; 270 271 sink = term->val.str; 272 snprintf(path, PATH_MAX, "sinks/%s", sink); 273 274 ret = perf_pmu__scan_file(pmu, path, "%x", &hash); 275 if (ret != 1) { 276 pr_err("failed to set sink \"%s\" on event %s with %d (%s)\n", 277 sink, evsel__name(evsel), errno, 278 str_error_r(errno, msg, sizeof(msg))); 279 return ret; 280 } 281 282 evsel->core.attr.config2 |= hash; 283 return 0; 284 } 285 286 /* 287 * No sink was provided on the command line - allow the CoreSight 288 * system to look for a default 289 */ 290 return 0; 291 } 292 293 static int cs_etm_recording_options(struct auxtrace_record *itr, 294 struct evlist *evlist, 295 struct record_opts *opts) 296 { 297 int ret; 298 struct cs_etm_recording *ptr = 299 container_of(itr, struct cs_etm_recording, itr); 300 struct perf_pmu *cs_etm_pmu = ptr->cs_etm_pmu; 301 struct evsel *evsel, *cs_etm_evsel = NULL; 302 struct perf_cpu_map *cpus = evlist->core.user_requested_cpus; 303 bool privileged = perf_event_paranoid_check(-1); 304 int err = 0; 305 306 ptr->evlist = evlist; 307 ptr->snapshot_mode = opts->auxtrace_snapshot_mode; 308 309 if (!record_opts__no_switch_events(opts) && 310 perf_can_record_switch_events()) 311 opts->record_switch_events = true; 312 313 evlist__for_each_entry(evlist, evsel) { 314 if (evsel->core.attr.type == cs_etm_pmu->type) { 315 if (cs_etm_evsel) { 316 pr_err("There may be only one %s event\n", 317 CORESIGHT_ETM_PMU_NAME); 318 return -EINVAL; 319 } 320 evsel->core.attr.freq = 0; 321 evsel->core.attr.sample_period = 1; 322 cs_etm_evsel = evsel; 323 opts->full_auxtrace = true; 324 } 325 } 326 327 /* no need to continue if at least one event of interest was found */ 328 if (!cs_etm_evsel) 329 return 0; 330 331 ret = cs_etm_set_sink_attr(cs_etm_pmu, cs_etm_evsel); 332 if (ret) 333 return ret; 334 335 if (opts->use_clockid) { 336 pr_err("Cannot use clockid (-k option) with %s\n", 337 CORESIGHT_ETM_PMU_NAME); 338 return -EINVAL; 339 } 340 341 /* we are in snapshot mode */ 342 if (opts->auxtrace_snapshot_mode) { 343 /* 344 * No size were given to '-S' or '-m,', so go with 345 * the default 346 */ 347 if (!opts->auxtrace_snapshot_size && 348 !opts->auxtrace_mmap_pages) { 349 if (privileged) { 350 opts->auxtrace_mmap_pages = MiB(4) / page_size; 351 } else { 352 opts->auxtrace_mmap_pages = 353 KiB(128) / page_size; 354 if (opts->mmap_pages == UINT_MAX) 355 opts->mmap_pages = KiB(256) / page_size; 356 } 357 } else if (!opts->auxtrace_mmap_pages && !privileged && 358 opts->mmap_pages == UINT_MAX) { 359 opts->mmap_pages = KiB(256) / page_size; 360 } 361 362 /* 363 * '-m,xyz' was specified but no snapshot size, so make the 364 * snapshot size as big as the auxtrace mmap area. 365 */ 366 if (!opts->auxtrace_snapshot_size) { 367 opts->auxtrace_snapshot_size = 368 opts->auxtrace_mmap_pages * (size_t)page_size; 369 } 370 371 /* 372 * -Sxyz was specified but no auxtrace mmap area, so make the 373 * auxtrace mmap area big enough to fit the requested snapshot 374 * size. 375 */ 376 if (!opts->auxtrace_mmap_pages) { 377 size_t sz = opts->auxtrace_snapshot_size; 378 379 sz = round_up(sz, page_size) / page_size; 380 opts->auxtrace_mmap_pages = roundup_pow_of_two(sz); 381 } 382 383 /* Snapshot size can't be bigger than the auxtrace area */ 384 if (opts->auxtrace_snapshot_size > 385 opts->auxtrace_mmap_pages * (size_t)page_size) { 386 pr_err("Snapshot size %zu must not be greater than AUX area tracing mmap size %zu\n", 387 opts->auxtrace_snapshot_size, 388 opts->auxtrace_mmap_pages * (size_t)page_size); 389 return -EINVAL; 390 } 391 392 /* Something went wrong somewhere - this shouldn't happen */ 393 if (!opts->auxtrace_snapshot_size || 394 !opts->auxtrace_mmap_pages) { 395 pr_err("Failed to calculate default snapshot size and/or AUX area tracing mmap pages\n"); 396 return -EINVAL; 397 } 398 } 399 400 /* We are in full trace mode but '-m,xyz' wasn't specified */ 401 if (opts->full_auxtrace && !opts->auxtrace_mmap_pages) { 402 if (privileged) { 403 opts->auxtrace_mmap_pages = MiB(4) / page_size; 404 } else { 405 opts->auxtrace_mmap_pages = KiB(128) / page_size; 406 if (opts->mmap_pages == UINT_MAX) 407 opts->mmap_pages = KiB(256) / page_size; 408 } 409 410 } 411 412 if (opts->auxtrace_snapshot_mode) 413 pr_debug2("%s snapshot size: %zu\n", CORESIGHT_ETM_PMU_NAME, 414 opts->auxtrace_snapshot_size); 415 416 /* 417 * To obtain the auxtrace buffer file descriptor, the auxtrace 418 * event must come first. 419 */ 420 evlist__to_front(evlist, cs_etm_evsel); 421 422 /* 423 * In the case of per-cpu mmaps, we need the CPU on the 424 * AUX event. We also need the contextID in order to be notified 425 * when a context switch happened. 426 */ 427 if (!perf_cpu_map__empty(cpus)) { 428 evsel__set_sample_bit(cs_etm_evsel, CPU); 429 430 err = cs_etm_set_option(itr, cs_etm_evsel, 431 BIT(ETM_OPT_CTXTID) | BIT(ETM_OPT_TS)); 432 if (err) 433 goto out; 434 } 435 436 /* Add dummy event to keep tracking */ 437 if (opts->full_auxtrace) { 438 struct evsel *tracking_evsel; 439 440 err = parse_events(evlist, "dummy:u", NULL); 441 if (err) 442 goto out; 443 444 tracking_evsel = evlist__last(evlist); 445 evlist__set_tracking_event(evlist, tracking_evsel); 446 447 tracking_evsel->core.attr.freq = 0; 448 tracking_evsel->core.attr.sample_period = 1; 449 450 /* In per-cpu case, always need the time of mmap events etc */ 451 if (!perf_cpu_map__empty(cpus)) 452 evsel__set_sample_bit(tracking_evsel, TIME); 453 } 454 455 out: 456 return err; 457 } 458 459 static u64 cs_etm_get_config(struct auxtrace_record *itr) 460 { 461 u64 config = 0; 462 struct cs_etm_recording *ptr = 463 container_of(itr, struct cs_etm_recording, itr); 464 struct perf_pmu *cs_etm_pmu = ptr->cs_etm_pmu; 465 struct evlist *evlist = ptr->evlist; 466 struct evsel *evsel; 467 468 evlist__for_each_entry(evlist, evsel) { 469 if (evsel->core.attr.type == cs_etm_pmu->type) { 470 /* 471 * Variable perf_event_attr::config is assigned to 472 * ETMv3/PTM. The bit fields have been made to match 473 * the ETMv3.5 ETRMCR register specification. See the 474 * PMU_FORMAT_ATTR() declarations in 475 * drivers/hwtracing/coresight/coresight-perf.c for 476 * details. 477 */ 478 config = evsel->core.attr.config; 479 break; 480 } 481 } 482 483 return config; 484 } 485 486 #ifndef BIT 487 #define BIT(N) (1UL << (N)) 488 #endif 489 490 static u64 cs_etmv4_get_config(struct auxtrace_record *itr) 491 { 492 u64 config = 0; 493 u64 config_opts = 0; 494 495 /* 496 * The perf event variable config bits represent both 497 * the command line options and register programming 498 * bits in ETMv3/PTM. For ETMv4 we must remap options 499 * to real bits 500 */ 501 config_opts = cs_etm_get_config(itr); 502 if (config_opts & BIT(ETM_OPT_CYCACC)) 503 config |= BIT(ETM4_CFG_BIT_CYCACC); 504 if (config_opts & BIT(ETM_OPT_CTXTID)) 505 config |= BIT(ETM4_CFG_BIT_CTXTID); 506 if (config_opts & BIT(ETM_OPT_TS)) 507 config |= BIT(ETM4_CFG_BIT_TS); 508 if (config_opts & BIT(ETM_OPT_RETSTK)) 509 config |= BIT(ETM4_CFG_BIT_RETSTK); 510 if (config_opts & BIT(ETM_OPT_CTXTID2)) 511 config |= BIT(ETM4_CFG_BIT_VMID) | 512 BIT(ETM4_CFG_BIT_VMID_OPT); 513 if (config_opts & BIT(ETM_OPT_BRANCH_BROADCAST)) 514 config |= BIT(ETM4_CFG_BIT_BB); 515 516 return config; 517 } 518 519 static size_t 520 cs_etm_info_priv_size(struct auxtrace_record *itr __maybe_unused, 521 struct evlist *evlist __maybe_unused) 522 { 523 int i; 524 int etmv3 = 0, etmv4 = 0, ete = 0; 525 struct perf_cpu_map *event_cpus = evlist->core.user_requested_cpus; 526 struct perf_cpu_map *online_cpus = perf_cpu_map__new(NULL); 527 528 /* cpu map is not empty, we have specific CPUs to work with */ 529 if (!perf_cpu_map__empty(event_cpus)) { 530 for (i = 0; i < cpu__max_cpu().cpu; i++) { 531 struct perf_cpu cpu = { .cpu = i, }; 532 533 if (!perf_cpu_map__has(event_cpus, cpu) || 534 !perf_cpu_map__has(online_cpus, cpu)) 535 continue; 536 537 if (cs_etm_is_ete(itr, i)) 538 ete++; 539 else if (cs_etm_is_etmv4(itr, i)) 540 etmv4++; 541 else 542 etmv3++; 543 } 544 } else { 545 /* get configuration for all CPUs in the system */ 546 for (i = 0; i < cpu__max_cpu().cpu; i++) { 547 struct perf_cpu cpu = { .cpu = i, }; 548 549 if (!perf_cpu_map__has(online_cpus, cpu)) 550 continue; 551 552 if (cs_etm_is_ete(itr, i)) 553 ete++; 554 else if (cs_etm_is_etmv4(itr, i)) 555 etmv4++; 556 else 557 etmv3++; 558 } 559 } 560 561 perf_cpu_map__put(online_cpus); 562 563 return (CS_ETM_HEADER_SIZE + 564 (ete * CS_ETE_PRIV_SIZE) + 565 (etmv4 * CS_ETMV4_PRIV_SIZE) + 566 (etmv3 * CS_ETMV3_PRIV_SIZE)); 567 } 568 569 static bool cs_etm_is_etmv4(struct auxtrace_record *itr, int cpu) 570 { 571 bool ret = false; 572 char path[PATH_MAX]; 573 int scan; 574 unsigned int val; 575 struct cs_etm_recording *ptr = 576 container_of(itr, struct cs_etm_recording, itr); 577 struct perf_pmu *cs_etm_pmu = ptr->cs_etm_pmu; 578 579 /* Take any of the RO files for ETMv4 and see if it present */ 580 snprintf(path, PATH_MAX, "cpu%d/%s", 581 cpu, metadata_etmv4_ro[CS_ETMV4_TRCIDR0]); 582 scan = perf_pmu__scan_file(cs_etm_pmu, path, "%x", &val); 583 584 /* The file was read successfully, we have a winner */ 585 if (scan == 1) 586 ret = true; 587 588 return ret; 589 } 590 591 static int cs_etm_get_ro(struct perf_pmu *pmu, int cpu, const char *path) 592 { 593 char pmu_path[PATH_MAX]; 594 int scan; 595 unsigned int val = 0; 596 597 /* Get RO metadata from sysfs */ 598 snprintf(pmu_path, PATH_MAX, "cpu%d/%s", cpu, path); 599 600 scan = perf_pmu__scan_file(pmu, pmu_path, "%x", &val); 601 if (scan != 1) 602 pr_err("%s: error reading: %s\n", __func__, pmu_path); 603 604 return val; 605 } 606 607 #define TRCDEVARCH_ARCHPART_SHIFT 0 608 #define TRCDEVARCH_ARCHPART_MASK GENMASK(11, 0) 609 #define TRCDEVARCH_ARCHPART(x) (((x) & TRCDEVARCH_ARCHPART_MASK) >> TRCDEVARCH_ARCHPART_SHIFT) 610 611 #define TRCDEVARCH_ARCHVER_SHIFT 12 612 #define TRCDEVARCH_ARCHVER_MASK GENMASK(15, 12) 613 #define TRCDEVARCH_ARCHVER(x) (((x) & TRCDEVARCH_ARCHVER_MASK) >> TRCDEVARCH_ARCHVER_SHIFT) 614 615 static bool cs_etm_is_ete(struct auxtrace_record *itr, int cpu) 616 { 617 struct cs_etm_recording *ptr = container_of(itr, struct cs_etm_recording, itr); 618 struct perf_pmu *cs_etm_pmu = ptr->cs_etm_pmu; 619 int trcdevarch = cs_etm_get_ro(cs_etm_pmu, cpu, metadata_etmv4_ro[CS_ETE_TRCDEVARCH]); 620 621 /* 622 * ETE if ARCHVER is 5 (ARCHVER is 4 for ETM) and ARCHPART is 0xA13. 623 * See ETM_DEVARCH_ETE_ARCH in coresight-etm4x.h 624 */ 625 return TRCDEVARCH_ARCHVER(trcdevarch) == 5 && TRCDEVARCH_ARCHPART(trcdevarch) == 0xA13; 626 } 627 628 static void cs_etm_save_etmv4_header(__u64 data[], struct auxtrace_record *itr, int cpu) 629 { 630 struct cs_etm_recording *ptr = container_of(itr, struct cs_etm_recording, itr); 631 struct perf_pmu *cs_etm_pmu = ptr->cs_etm_pmu; 632 633 /* Get trace configuration register */ 634 data[CS_ETMV4_TRCCONFIGR] = cs_etmv4_get_config(itr); 635 /* Get traceID from the framework */ 636 data[CS_ETMV4_TRCTRACEIDR] = coresight_get_trace_id(cpu); 637 /* Get read-only information from sysFS */ 638 data[CS_ETMV4_TRCIDR0] = cs_etm_get_ro(cs_etm_pmu, cpu, 639 metadata_etmv4_ro[CS_ETMV4_TRCIDR0]); 640 data[CS_ETMV4_TRCIDR1] = cs_etm_get_ro(cs_etm_pmu, cpu, 641 metadata_etmv4_ro[CS_ETMV4_TRCIDR1]); 642 data[CS_ETMV4_TRCIDR2] = cs_etm_get_ro(cs_etm_pmu, cpu, 643 metadata_etmv4_ro[CS_ETMV4_TRCIDR2]); 644 data[CS_ETMV4_TRCIDR8] = cs_etm_get_ro(cs_etm_pmu, cpu, 645 metadata_etmv4_ro[CS_ETMV4_TRCIDR8]); 646 data[CS_ETMV4_TRCAUTHSTATUS] = cs_etm_get_ro(cs_etm_pmu, cpu, 647 metadata_etmv4_ro[CS_ETMV4_TRCAUTHSTATUS]); 648 } 649 650 static void cs_etm_get_metadata(int cpu, u32 *offset, 651 struct auxtrace_record *itr, 652 struct perf_record_auxtrace_info *info) 653 { 654 u32 increment, nr_trc_params; 655 u64 magic; 656 struct cs_etm_recording *ptr = 657 container_of(itr, struct cs_etm_recording, itr); 658 struct perf_pmu *cs_etm_pmu = ptr->cs_etm_pmu; 659 660 /* first see what kind of tracer this cpu is affined to */ 661 if (cs_etm_is_ete(itr, cpu)) { 662 magic = __perf_cs_ete_magic; 663 /* ETE uses the same registers as ETMv4 plus TRCDEVARCH */ 664 cs_etm_save_etmv4_header(&info->priv[*offset], itr, cpu); 665 info->priv[*offset + CS_ETE_TRCDEVARCH] = 666 cs_etm_get_ro(cs_etm_pmu, cpu, 667 metadata_etmv4_ro[CS_ETE_TRCDEVARCH]); 668 669 /* How much space was used */ 670 increment = CS_ETE_PRIV_MAX; 671 nr_trc_params = CS_ETE_PRIV_MAX - CS_ETM_COMMON_BLK_MAX_V1; 672 } else if (cs_etm_is_etmv4(itr, cpu)) { 673 magic = __perf_cs_etmv4_magic; 674 cs_etm_save_etmv4_header(&info->priv[*offset], itr, cpu); 675 676 /* How much space was used */ 677 increment = CS_ETMV4_PRIV_MAX; 678 nr_trc_params = CS_ETMV4_PRIV_MAX - CS_ETMV4_TRCCONFIGR; 679 } else { 680 magic = __perf_cs_etmv3_magic; 681 /* Get configuration register */ 682 info->priv[*offset + CS_ETM_ETMCR] = cs_etm_get_config(itr); 683 /* Get traceID from the framework */ 684 info->priv[*offset + CS_ETM_ETMTRACEIDR] = 685 coresight_get_trace_id(cpu); 686 /* Get read-only information from sysFS */ 687 info->priv[*offset + CS_ETM_ETMCCER] = 688 cs_etm_get_ro(cs_etm_pmu, cpu, 689 metadata_etmv3_ro[CS_ETM_ETMCCER]); 690 info->priv[*offset + CS_ETM_ETMIDR] = 691 cs_etm_get_ro(cs_etm_pmu, cpu, 692 metadata_etmv3_ro[CS_ETM_ETMIDR]); 693 694 /* How much space was used */ 695 increment = CS_ETM_PRIV_MAX; 696 nr_trc_params = CS_ETM_PRIV_MAX - CS_ETM_ETMCR; 697 } 698 699 /* Build generic header portion */ 700 info->priv[*offset + CS_ETM_MAGIC] = magic; 701 info->priv[*offset + CS_ETM_CPU] = cpu; 702 info->priv[*offset + CS_ETM_NR_TRC_PARAMS] = nr_trc_params; 703 /* Where the next CPU entry should start from */ 704 *offset += increment; 705 } 706 707 static int cs_etm_info_fill(struct auxtrace_record *itr, 708 struct perf_session *session, 709 struct perf_record_auxtrace_info *info, 710 size_t priv_size) 711 { 712 int i; 713 u32 offset; 714 u64 nr_cpu, type; 715 struct perf_cpu_map *cpu_map; 716 struct perf_cpu_map *event_cpus = session->evlist->core.user_requested_cpus; 717 struct perf_cpu_map *online_cpus = perf_cpu_map__new(NULL); 718 struct cs_etm_recording *ptr = 719 container_of(itr, struct cs_etm_recording, itr); 720 struct perf_pmu *cs_etm_pmu = ptr->cs_etm_pmu; 721 722 if (priv_size != cs_etm_info_priv_size(itr, session->evlist)) 723 return -EINVAL; 724 725 if (!session->evlist->core.nr_mmaps) 726 return -EINVAL; 727 728 /* If the cpu_map is empty all online CPUs are involved */ 729 if (perf_cpu_map__empty(event_cpus)) { 730 cpu_map = online_cpus; 731 } else { 732 /* Make sure all specified CPUs are online */ 733 for (i = 0; i < perf_cpu_map__nr(event_cpus); i++) { 734 struct perf_cpu cpu = { .cpu = i, }; 735 736 if (perf_cpu_map__has(event_cpus, cpu) && 737 !perf_cpu_map__has(online_cpus, cpu)) 738 return -EINVAL; 739 } 740 741 cpu_map = event_cpus; 742 } 743 744 nr_cpu = perf_cpu_map__nr(cpu_map); 745 /* Get PMU type as dynamically assigned by the core */ 746 type = cs_etm_pmu->type; 747 748 /* First fill out the session header */ 749 info->type = PERF_AUXTRACE_CS_ETM; 750 info->priv[CS_HEADER_VERSION] = CS_HEADER_CURRENT_VERSION; 751 info->priv[CS_PMU_TYPE_CPUS] = type << 32; 752 info->priv[CS_PMU_TYPE_CPUS] |= nr_cpu; 753 info->priv[CS_ETM_SNAPSHOT] = ptr->snapshot_mode; 754 755 offset = CS_ETM_SNAPSHOT + 1; 756 757 for (i = 0; i < cpu__max_cpu().cpu && offset < priv_size; i++) { 758 struct perf_cpu cpu = { .cpu = i, }; 759 760 if (perf_cpu_map__has(cpu_map, cpu)) 761 cs_etm_get_metadata(i, &offset, itr, info); 762 } 763 764 perf_cpu_map__put(online_cpus); 765 766 return 0; 767 } 768 769 static int cs_etm_snapshot_start(struct auxtrace_record *itr) 770 { 771 struct cs_etm_recording *ptr = 772 container_of(itr, struct cs_etm_recording, itr); 773 struct evsel *evsel; 774 775 evlist__for_each_entry(ptr->evlist, evsel) { 776 if (evsel->core.attr.type == ptr->cs_etm_pmu->type) 777 return evsel__disable(evsel); 778 } 779 return -EINVAL; 780 } 781 782 static int cs_etm_snapshot_finish(struct auxtrace_record *itr) 783 { 784 struct cs_etm_recording *ptr = 785 container_of(itr, struct cs_etm_recording, itr); 786 struct evsel *evsel; 787 788 evlist__for_each_entry(ptr->evlist, evsel) { 789 if (evsel->core.attr.type == ptr->cs_etm_pmu->type) 790 return evsel__enable(evsel); 791 } 792 return -EINVAL; 793 } 794 795 static u64 cs_etm_reference(struct auxtrace_record *itr __maybe_unused) 796 { 797 return (((u64) rand() << 0) & 0x00000000FFFFFFFFull) | 798 (((u64) rand() << 32) & 0xFFFFFFFF00000000ull); 799 } 800 801 static void cs_etm_recording_free(struct auxtrace_record *itr) 802 { 803 struct cs_etm_recording *ptr = 804 container_of(itr, struct cs_etm_recording, itr); 805 806 free(ptr); 807 } 808 809 struct auxtrace_record *cs_etm_record_init(int *err) 810 { 811 struct perf_pmu *cs_etm_pmu; 812 struct cs_etm_recording *ptr; 813 814 cs_etm_pmu = perf_pmu__find(CORESIGHT_ETM_PMU_NAME); 815 816 if (!cs_etm_pmu) { 817 *err = -EINVAL; 818 goto out; 819 } 820 821 ptr = zalloc(sizeof(struct cs_etm_recording)); 822 if (!ptr) { 823 *err = -ENOMEM; 824 goto out; 825 } 826 827 ptr->cs_etm_pmu = cs_etm_pmu; 828 ptr->itr.pmu = cs_etm_pmu; 829 ptr->itr.parse_snapshot_options = cs_etm_parse_snapshot_options; 830 ptr->itr.recording_options = cs_etm_recording_options; 831 ptr->itr.info_priv_size = cs_etm_info_priv_size; 832 ptr->itr.info_fill = cs_etm_info_fill; 833 ptr->itr.snapshot_start = cs_etm_snapshot_start; 834 ptr->itr.snapshot_finish = cs_etm_snapshot_finish; 835 ptr->itr.reference = cs_etm_reference; 836 ptr->itr.free = cs_etm_recording_free; 837 ptr->itr.read_finish = auxtrace_record__read_finish; 838 839 *err = 0; 840 return &ptr->itr; 841 out: 842 return NULL; 843 } 844