1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright(C) 2015 Linaro Limited. All rights reserved. 4 * Author: Mathieu Poirier <mathieu.poirier@linaro.org> 5 */ 6 7 #include <stdbool.h> 8 #include <linux/coresight-pmu.h> 9 #include <linux/zalloc.h> 10 11 #include "../../util/auxtrace.h" 12 #include "../../util/debug.h" 13 #include "../../util/evlist.h" 14 #include "../../util/pmu.h" 15 #include "cs-etm.h" 16 #include "arm-spe.h" 17 18 static struct perf_pmu **find_all_arm_spe_pmus(int *nr_spes, int *err) 19 { 20 struct perf_pmu **arm_spe_pmus = NULL; 21 int ret, i, nr_cpus = sysconf(_SC_NPROCESSORS_CONF); 22 /* arm_spe_xxxxxxxxx\0 */ 23 char arm_spe_pmu_name[sizeof(ARM_SPE_PMU_NAME) + 10]; 24 25 arm_spe_pmus = zalloc(sizeof(struct perf_pmu *) * nr_cpus); 26 if (!arm_spe_pmus) { 27 pr_err("spes alloc failed\n"); 28 *err = -ENOMEM; 29 return NULL; 30 } 31 32 for (i = 0; i < nr_cpus; i++) { 33 ret = sprintf(arm_spe_pmu_name, "%s%d", ARM_SPE_PMU_NAME, i); 34 if (ret < 0) { 35 pr_err("sprintf failed\n"); 36 *err = -ENOMEM; 37 return NULL; 38 } 39 40 arm_spe_pmus[*nr_spes] = perf_pmu__find(arm_spe_pmu_name); 41 if (arm_spe_pmus[*nr_spes]) { 42 pr_debug2("%s %d: arm_spe_pmu %d type %d name %s\n", 43 __func__, __LINE__, *nr_spes, 44 arm_spe_pmus[*nr_spes]->type, 45 arm_spe_pmus[*nr_spes]->name); 46 (*nr_spes)++; 47 } 48 } 49 50 return arm_spe_pmus; 51 } 52 53 struct auxtrace_record 54 *auxtrace_record__init(struct evlist *evlist, int *err) 55 { 56 struct perf_pmu *cs_etm_pmu; 57 struct evsel *evsel; 58 bool found_etm = false; 59 bool found_spe = false; 60 static struct perf_pmu **arm_spe_pmus = NULL; 61 static int nr_spes = 0; 62 int i = 0; 63 64 if (!evlist) 65 return NULL; 66 67 cs_etm_pmu = perf_pmu__find(CORESIGHT_ETM_PMU_NAME); 68 69 if (!arm_spe_pmus) 70 arm_spe_pmus = find_all_arm_spe_pmus(&nr_spes, err); 71 72 evlist__for_each_entry(evlist, evsel) { 73 if (cs_etm_pmu && 74 evsel->core.attr.type == cs_etm_pmu->type) 75 found_etm = true; 76 77 if (!nr_spes) 78 continue; 79 80 for (i = 0; i < nr_spes; i++) { 81 if (evsel->core.attr.type == arm_spe_pmus[i]->type) { 82 found_spe = true; 83 break; 84 } 85 } 86 } 87 88 if (found_etm && found_spe) { 89 pr_err("Concurrent ARM Coresight ETM and SPE operation not currently supported\n"); 90 *err = -EOPNOTSUPP; 91 return NULL; 92 } 93 94 if (found_etm) 95 return cs_etm_record_init(err); 96 97 #if defined(__aarch64__) 98 if (found_spe) 99 return arm_spe_recording_init(err, arm_spe_pmus[i]); 100 #endif 101 102 /* 103 * Clear 'err' even if we haven't found an event - that way perf 104 * record can still be used even if tracers aren't present. The NULL 105 * return value will take care of telling the infrastructure HW tracing 106 * isn't available. 107 */ 108 *err = 0; 109 return NULL; 110 } 111