1perf-intel-pt(1) 2================ 3 4NAME 5---- 6perf-intel-pt - Support for Intel Processor Trace within perf tools 7 8SYNOPSIS 9-------- 10[verse] 11'perf record' -e intel_pt// 12 13DESCRIPTION 14----------- 15 16Intel Processor Trace (Intel PT) is an extension of Intel Architecture that 17collects information about software execution such as control flow, execution 18modes and timings and formats it into highly compressed binary packets. 19Technical details are documented in the Intel 64 and IA-32 Architectures 20Software Developer Manuals, Chapter 36 Intel Processor Trace. 21 22Intel PT is first supported in Intel Core M and 5th generation Intel Core 23processors that are based on the Intel micro-architecture code name Broadwell. 24 25Trace data is collected by 'perf record' and stored within the perf.data file. 26See below for options to 'perf record'. 27 28Trace data must be 'decoded' which involves walking the object code and matching 29the trace data packets. For example a TNT packet only tells whether a 30conditional branch was taken or not taken, so to make use of that packet the 31decoder must know precisely which instruction was being executed. 32 33Decoding is done on-the-fly. The decoder outputs samples in the same format as 34samples output by perf hardware events, for example as though the "instructions" 35or "branches" events had been recorded. Presently 3 tools support this: 36'perf script', 'perf report' and 'perf inject'. See below for more information 37on using those tools. 38 39The main distinguishing feature of Intel PT is that the decoder can determine 40the exact flow of software execution. Intel PT can be used to understand why 41and how did software get to a certain point, or behave a certain way. The 42software does not have to be recompiled, so Intel PT works with debug or release 43builds, however the executed images are needed - which makes use in JIT-compiled 44environments, or with self-modified code, a challenge. Also symbols need to be 45provided to make sense of addresses. 46 47A limitation of Intel PT is that it produces huge amounts of trace data 48(hundreds of megabytes per second per core) which takes a long time to decode, 49for example two or three orders of magnitude longer than it took to collect. 50Another limitation is the performance impact of tracing, something that will 51vary depending on the use-case and architecture. 52 53 54Quickstart 55---------- 56 57It is important to start small. That is because it is easy to capture vastly 58more data than can possibly be processed. 59 60The simplest thing to do with Intel PT is userspace profiling of small programs. 61Data is captured with 'perf record' e.g. to trace 'ls' userspace-only: 62 63 perf record -e intel_pt//u ls 64 65And profiled with 'perf report' e.g. 66 67 perf report 68 69To also trace kernel space presents a problem, namely kernel self-modifying 70code. A fairly good kernel image is available in /proc/kcore but to get an 71accurate image a copy of /proc/kcore needs to be made under the same conditions 72as the data capture. 'perf record' can make a copy of /proc/kcore if the option 73--kcore is used, but access to /proc/kcore is restricted e.g. 74 75 sudo perf record -o pt_ls --kcore -e intel_pt// -- ls 76 77which will create a directory named 'pt_ls' and put the perf.data file (named 78simply 'data') and copies of /proc/kcore, /proc/kallsyms and /proc/modules into 79it. The other tools understand the directory format, so to use 'perf report' 80becomes: 81 82 sudo perf report -i pt_ls 83 84Because samples are synthesized after-the-fact, the sampling period can be 85selected for reporting. e.g. sample every microsecond 86 87 sudo perf report pt_ls --itrace=i1usge 88 89See the sections below for more information about the --itrace option. 90 91Beware the smaller the period, the more samples that are produced, and the 92longer it takes to process them. 93 94Also note that the coarseness of Intel PT timing information will start to 95distort the statistical value of the sampling as the sampling period becomes 96smaller. 97 98To represent software control flow, "branches" samples are produced. By default 99a branch sample is synthesized for every single branch. To get an idea what 100data is available you can use the 'perf script' tool with all itrace sampling 101options, which will list all the samples. 102 103 perf record -e intel_pt//u ls 104 perf script --itrace=iybxwpe 105 106An interesting field that is not printed by default is 'flags' which can be 107displayed as follows: 108 109 perf script --itrace=iybxwpe -F+flags 110 111The flags are "bcrosyiABExghDt" which stand for branch, call, return, conditional, 112system, asynchronous, interrupt, transaction abort, trace begin, trace end, 113in transaction, VM-entry, VM-exit, interrupt disabled, and interrupt disable 114toggle respectively. 115 116perf script also supports higher level ways to dump instruction traces: 117 118 perf script --insn-trace --xed 119 120Dump all instructions. This requires installing the xed tool (see XED below) 121Dumping all instructions in a long trace can be fairly slow. It is usually better 122to start with higher level decoding, like 123 124 perf script --call-trace 125 126or 127 128 perf script --call-ret-trace 129 130and then select a time range of interest. The time range can then be examined 131in detail with 132 133 perf script --time starttime,stoptime --insn-trace --xed 134 135While examining the trace it's also useful to filter on specific CPUs using 136the -C option 137 138 perf script --time starttime,stoptime --insn-trace --xed -C 1 139 140Dump all instructions in time range on CPU 1. 141 142Another interesting field that is not printed by default is 'ipc' which can be 143displayed as follows: 144 145 perf script --itrace=be -F+ipc 146 147There are two ways that instructions-per-cycle (IPC) can be calculated depending 148on the recording. 149 150If the 'cyc' config term (see config terms section below) was used, then IPC 151and cycle events are calculated using the cycle count from CYC packets, otherwise 152MTC packets are used - refer to the 'mtc' config term. When MTC is used, however, 153the values are less accurate because the timing is less accurate. 154 155Because Intel PT does not update the cycle count on every branch or instruction, 156the values will often be zero. When there are values, they will be the number 157of instructions and number of cycles since the last update, and thus represent 158the average IPC cycle count since the last IPC for that event type. 159Note IPC for "branches" events is calculated separately from IPC for "instructions" 160events. 161 162Even with the 'cyc' config term, it is possible to produce IPC information for 163every change of timestamp, but at the expense of accuracy. That is selected by 164specifying the itrace 'A' option. Due to the granularity of timestamps, the 165actual number of cycles increases even though the cycles reported does not. 166The number of instructions is known, but if IPC is reported, cycles can be too 167low and so IPC is too high. Note that inaccuracy decreases as the period of 168sampling increases i.e. if the number of cycles is too low by a small amount, 169that becomes less significant if the number of cycles is large. It may also be 170useful to use the 'A' option in conjunction with dlfilter-show-cycles.so to 171provide higher granularity cycle information. 172 173Also note that the IPC instruction count may or may not include the current 174instruction. If the cycle count is associated with an asynchronous branch 175(e.g. page fault or interrupt), then the instruction count does not include the 176current instruction, otherwise it does. That is consistent with whether or not 177that instruction has retired when the cycle count is updated. 178 179Another note, in the case of "branches" events, non-taken branches are not 180presently sampled, so IPC values for them do not appear e.g. a CYC packet with a 181TNT packet that starts with a non-taken branch. To see every possible IPC 182value, "instructions" events can be used e.g. --itrace=i0ns 183 184While it is possible to create scripts to analyze the data, an alternative 185approach is available to export the data to a sqlite or postgresql database. 186Refer to script export-to-sqlite.py or export-to-postgresql.py for more details, 187and to script exported-sql-viewer.py for an example of using the database. 188 189There is also script intel-pt-events.py which provides an example of how to 190unpack the raw data for power events and PTWRITE. The script also displays 191branches, and supports 2 additional modes selected by option: 192 193 - --insn-trace - instruction trace 194 - --src-trace - source trace 195 196The intel-pt-events.py script also has options: 197 198 - --all-switch-events - display all switch events, not only the last consecutive. 199 - --interleave [<n>] - interleave sample output for the same timestamp so that 200 no more than n samples for a CPU are displayed in a row. 'n' defaults to 4. 201 Note this only affects the order of output, and only when the timestamp is the 202 same. 203 204As mentioned above, it is easy to capture too much data. One way to limit the 205data captured is to use 'snapshot' mode which is explained further below. 206Refer to 'new snapshot option' and 'Intel PT modes of operation' further below. 207 208Another problem that will be experienced is decoder errors. They can be caused 209by inability to access the executed image, self-modified or JIT-ed code, or the 210inability to match side-band information (such as context switches and mmaps) 211which results in the decoder not knowing what code was executed. 212 213There is also the problem of perf not being able to copy the data fast enough, 214resulting in data lost because the buffer was full. See 'Buffer handling' below 215for more details. 216 217 218perf record 219----------- 220 221new event 222~~~~~~~~~ 223 224The Intel PT kernel driver creates a new PMU for Intel PT. PMU events are 225selected by providing the PMU name followed by the "config" separated by slashes. 226An enhancement has been made to allow default "config" e.g. the option 227 228 -e intel_pt// 229 230will use a default config value. Currently that is the same as 231 232 -e intel_pt/tsc,noretcomp=0/ 233 234which is the same as 235 236 -e intel_pt/tsc=1,noretcomp=0/ 237 238Note there are now new config terms - see section 'config terms' further below. 239 240The config terms are listed in /sys/devices/intel_pt/format. They are bit 241fields within the config member of the struct perf_event_attr which is 242passed to the kernel by the perf_event_open system call. They correspond to bit 243fields in the IA32_RTIT_CTL MSR. Here is a list of them and their definitions: 244 245 $ grep -H . /sys/bus/event_source/devices/intel_pt/format/* 246 /sys/bus/event_source/devices/intel_pt/format/cyc:config:1 247 /sys/bus/event_source/devices/intel_pt/format/cyc_thresh:config:19-22 248 /sys/bus/event_source/devices/intel_pt/format/mtc:config:9 249 /sys/bus/event_source/devices/intel_pt/format/mtc_period:config:14-17 250 /sys/bus/event_source/devices/intel_pt/format/noretcomp:config:11 251 /sys/bus/event_source/devices/intel_pt/format/psb_period:config:24-27 252 /sys/bus/event_source/devices/intel_pt/format/tsc:config:10 253 254Note that the default config must be overridden for each term i.e. 255 256 -e intel_pt/noretcomp=0/ 257 258is the same as: 259 260 -e intel_pt/tsc=1,noretcomp=0/ 261 262So, to disable TSC packets use: 263 264 -e intel_pt/tsc=0/ 265 266It is also possible to specify the config value explicitly: 267 268 -e intel_pt/config=0x400/ 269 270Note that, as with all events, the event is suffixed with event modifiers: 271 272 u userspace 273 k kernel 274 h hypervisor 275 G guest 276 H host 277 p precise ip 278 279'h', 'G' and 'H' are for virtualization which are not used by Intel PT. 280'p' is also not relevant to Intel PT. So only options 'u' and 'k' are 281meaningful for Intel PT. 282 283perf_event_attr is displayed if the -vv option is used e.g. 284 285 ------------------------------------------------------------ 286 perf_event_attr: 287 type 6 288 size 112 289 config 0x400 290 { sample_period, sample_freq } 1 291 sample_type IP|TID|TIME|CPU|IDENTIFIER 292 read_format ID 293 disabled 1 294 inherit 1 295 exclude_kernel 1 296 exclude_hv 1 297 enable_on_exec 1 298 sample_id_all 1 299 ------------------------------------------------------------ 300 sys_perf_event_open: pid 31104 cpu 0 group_fd -1 flags 0x8 301 sys_perf_event_open: pid 31104 cpu 1 group_fd -1 flags 0x8 302 sys_perf_event_open: pid 31104 cpu 2 group_fd -1 flags 0x8 303 sys_perf_event_open: pid 31104 cpu 3 group_fd -1 flags 0x8 304 ------------------------------------------------------------ 305 306 307config terms 308~~~~~~~~~~~~ 309 310The June 2015 version of Intel 64 and IA-32 Architectures Software Developer 311Manuals, Chapter 36 Intel Processor Trace, defined new Intel PT features. 312Some of the features are reflect in new config terms. All the config terms are 313described below. 314 315tsc Always supported. Produces TSC timestamp packets to provide 316 timing information. In some cases it is possible to decode 317 without timing information, for example a per-thread context 318 that does not overlap executable memory maps. 319 320 The default config selects tsc (i.e. tsc=1). 321 322noretcomp Always supported. Disables "return compression" so a TIP packet 323 is produced when a function returns. Causes more packets to be 324 produced but might make decoding more reliable. 325 326 The default config does not select noretcomp (i.e. noretcomp=0). 327 328psb_period Allows the frequency of PSB packets to be specified. 329 330 The PSB packet is a synchronization packet that provides a 331 starting point for decoding or recovery from errors. 332 333 Support for psb_period is indicated by: 334 335 /sys/bus/event_source/devices/intel_pt/caps/psb_cyc 336 337 which contains "1" if the feature is supported and "0" 338 otherwise. 339 340 Valid values are given by: 341 342 /sys/bus/event_source/devices/intel_pt/caps/psb_periods 343 344 which contains a hexadecimal value, the bits of which represent 345 valid values e.g. bit 2 set means value 2 is valid. 346 347 The psb_period value is converted to the approximate number of 348 trace bytes between PSB packets as: 349 350 2 ^ (value + 11) 351 352 e.g. value 3 means 16KiB bytes between PSBs 353 354 If an invalid value is entered, the error message 355 will give a list of valid values e.g. 356 357 $ perf record -e intel_pt/psb_period=15/u uname 358 Invalid psb_period for intel_pt. Valid values are: 0-5 359 360 If MTC packets are selected, the default config selects a value 361 of 3 (i.e. psb_period=3) or the nearest lower value that is 362 supported (0 is always supported). Otherwise the default is 0. 363 364 If decoding is expected to be reliable and the buffer is large 365 then a large PSB period can be used. 366 367 Because a TSC packet is produced with PSB, the PSB period can 368 also affect the granularity to timing information in the absence 369 of MTC or CYC. 370 371mtc Produces MTC timing packets. 372 373 MTC packets provide finer grain timestamp information than TSC 374 packets. MTC packets record time using the hardware crystal 375 clock (CTC) which is related to TSC packets using a TMA packet. 376 377 Support for this feature is indicated by: 378 379 /sys/bus/event_source/devices/intel_pt/caps/mtc 380 381 which contains "1" if the feature is supported and 382 "0" otherwise. 383 384 The frequency of MTC packets can also be specified - see 385 mtc_period below. 386 387mtc_period Specifies how frequently MTC packets are produced - see mtc 388 above for how to determine if MTC packets are supported. 389 390 Valid values are given by: 391 392 /sys/bus/event_source/devices/intel_pt/caps/mtc_periods 393 394 which contains a hexadecimal value, the bits of which represent 395 valid values e.g. bit 2 set means value 2 is valid. 396 397 The mtc_period value is converted to the MTC frequency as: 398 399 CTC-frequency / (2 ^ value) 400 401 e.g. value 3 means one eighth of CTC-frequency 402 403 Where CTC is the hardware crystal clock, the frequency of which 404 can be related to TSC via values provided in cpuid leaf 0x15. 405 406 If an invalid value is entered, the error message 407 will give a list of valid values e.g. 408 409 $ perf record -e intel_pt/mtc_period=15/u uname 410 Invalid mtc_period for intel_pt. Valid values are: 0,3,6,9 411 412 The default value is 3 or the nearest lower value 413 that is supported (0 is always supported). 414 415cyc Produces CYC timing packets. 416 417 CYC packets provide even finer grain timestamp information than 418 MTC and TSC packets. A CYC packet contains the number of CPU 419 cycles since the last CYC packet. Unlike MTC and TSC packets, 420 CYC packets are only sent when another packet is also sent. 421 422 Support for this feature is indicated by: 423 424 /sys/bus/event_source/devices/intel_pt/caps/psb_cyc 425 426 which contains "1" if the feature is supported and 427 "0" otherwise. 428 429 The number of CYC packets produced can be reduced by specifying 430 a threshold - see cyc_thresh below. 431 432cyc_thresh Specifies how frequently CYC packets are produced - see cyc 433 above for how to determine if CYC packets are supported. 434 435 Valid cyc_thresh values are given by: 436 437 /sys/bus/event_source/devices/intel_pt/caps/cycle_thresholds 438 439 which contains a hexadecimal value, the bits of which represent 440 valid values e.g. bit 2 set means value 2 is valid. 441 442 The cyc_thresh value represents the minimum number of CPU cycles 443 that must have passed before a CYC packet can be sent. The 444 number of CPU cycles is: 445 446 2 ^ (value - 1) 447 448 e.g. value 4 means 8 CPU cycles must pass before a CYC packet 449 can be sent. Note a CYC packet is still only sent when another 450 packet is sent, not at, e.g. every 8 CPU cycles. 451 452 If an invalid value is entered, the error message 453 will give a list of valid values e.g. 454 455 $ perf record -e intel_pt/cyc,cyc_thresh=15/u uname 456 Invalid cyc_thresh for intel_pt. Valid values are: 0-12 457 458 CYC packets are not requested by default. 459 460pt Specifies pass-through which enables the 'branch' config term. 461 462 The default config selects 'pt' if it is available, so a user will 463 never need to specify this term. 464 465branch Enable branch tracing. Branch tracing is enabled by default so to 466 disable branch tracing use 'branch=0'. 467 468 The default config selects 'branch' if it is available. 469 470ptw Enable PTWRITE packets which are produced when a ptwrite instruction 471 is executed. 472 473 Support for this feature is indicated by: 474 475 /sys/bus/event_source/devices/intel_pt/caps/ptwrite 476 477 which contains "1" if the feature is supported and 478 "0" otherwise. 479 480 As an alternative, refer to "Emulated PTWRITE" further below. 481 482fup_on_ptw Enable a FUP packet to follow the PTWRITE packet. The FUP packet 483 provides the address of the ptwrite instruction. In the absence of 484 fup_on_ptw, the decoder will use the address of the previous branch 485 if branch tracing is enabled, otherwise the address will be zero. 486 Note that fup_on_ptw will work even when branch tracing is disabled. 487 488pwr_evt Enable power events. The power events provide information about 489 changes to the CPU C-state. 490 491 Support for this feature is indicated by: 492 493 /sys/bus/event_source/devices/intel_pt/caps/power_event_trace 494 495 which contains "1" if the feature is supported and 496 "0" otherwise. 497 498event Enable Event Trace. The events provide information about asynchronous 499 events. 500 501 Support for this feature is indicated by: 502 503 /sys/bus/event_source/devices/intel_pt/caps/event_trace 504 505 which contains "1" if the feature is supported and 506 "0" otherwise. 507 508notnt Disable TNT packets. Without TNT packets, it is not possible to walk 509 executable code to reconstruct control flow, however FUP, TIP, TIP.PGE 510 and TIP.PGD packets still indicate asynchronous control flow, and (if 511 return compression is disabled - see noretcomp) return statements. 512 The advantage of eliminating TNT packets is reducing the size of the 513 trace and corresponding tracing overhead. 514 515 Support for this feature is indicated by: 516 517 /sys/bus/event_source/devices/intel_pt/caps/tnt_disable 518 519 which contains "1" if the feature is supported and 520 "0" otherwise. 521 522 523AUX area sampling option 524~~~~~~~~~~~~~~~~~~~~~~~~ 525 526To select Intel PT "sampling" the AUX area sampling option can be used: 527 528 --aux-sample 529 530Optionally it can be followed by the sample size in bytes e.g. 531 532 --aux-sample=8192 533 534In addition, the Intel PT event to sample must be defined e.g. 535 536 -e intel_pt//u 537 538Samples on other events will be created containing Intel PT data e.g. the 539following will create Intel PT samples on the branch-misses event, note the 540events must be grouped using {}: 541 542 perf record --aux-sample -e '{intel_pt//u,branch-misses:u}' 543 544An alternative to '--aux-sample' is to add the config term 'aux-sample-size' to 545events. In this case, the grouping is implied e.g. 546 547 perf record -e intel_pt//u -e branch-misses/aux-sample-size=8192/u 548 549is the same as: 550 551 perf record -e '{intel_pt//u,branch-misses/aux-sample-size=8192/u}' 552 553but allows for also using an address filter e.g.: 554 555 perf record -e intel_pt//u --filter 'filter * @/bin/ls' -e branch-misses/aux-sample-size=8192/u -- ls 556 557It is important to select a sample size that is big enough to contain at least 558one PSB packet. If not a warning will be displayed: 559 560 Intel PT sample size (%zu) may be too small for PSB period (%zu) 561 562The calculation used for that is: if sample_size <= psb_period + 256 display the 563warning. When sampling is used, psb_period defaults to 0 (2KiB). 564 565The default sample size is 4KiB. 566 567The sample size is passed in aux_sample_size in struct perf_event_attr. The 568sample size is limited by the maximum event size which is 64KiB. It is 569difficult to know how big the event might be without the trace sample attached, 570but the tool validates that the sample size is not greater than 60KiB. 571 572 573new snapshot option 574~~~~~~~~~~~~~~~~~~~ 575 576The difference between full trace and snapshot from the kernel's perspective is 577that in full trace we don't overwrite trace data that the user hasn't collected 578yet (and indicated that by advancing aux_tail), whereas in snapshot mode we let 579the trace run and overwrite older data in the buffer so that whenever something 580interesting happens, we can stop it and grab a snapshot of what was going on 581around that interesting moment. 582 583To select snapshot mode a new option has been added: 584 585 -S 586 587Optionally it can be followed by the snapshot size e.g. 588 589 -S0x100000 590 591The default snapshot size is the auxtrace mmap size. If neither auxtrace mmap size 592nor snapshot size is specified, then the default is 4MiB for privileged users 593(or if /proc/sys/kernel/perf_event_paranoid < 0), 128KiB for unprivileged users. 594If an unprivileged user does not specify mmap pages, the mmap pages will be 595reduced as described in the 'new auxtrace mmap size option' section below. 596 597The snapshot size is displayed if the option -vv is used e.g. 598 599 Intel PT snapshot size: %zu 600 601 602new auxtrace mmap size option 603~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 604 605Intel PT buffer size is specified by an addition to the -m option e.g. 606 607 -m,16 608 609selects a buffer size of 16 pages i.e. 64KiB. 610 611Note that the existing functionality of -m is unchanged. The auxtrace mmap size 612is specified by the optional addition of a comma and the value. 613 614The default auxtrace mmap size for Intel PT is 4MiB/page_size for privileged users 615(or if /proc/sys/kernel/perf_event_paranoid < 0), 128KiB for unprivileged users. 616If an unprivileged user does not specify mmap pages, the mmap pages will be 617reduced from the default 512KiB/page_size to 256KiB/page_size, otherwise the 618user is likely to get an error as they exceed their mlock limit (Max locked 619memory as shown in /proc/self/limits). Note that perf does not count the first 620512KiB (actually /proc/sys/kernel/perf_event_mlock_kb minus 1 page) per cpu 621against the mlock limit so an unprivileged user is allowed 512KiB per cpu plus 622their mlock limit (which defaults to 64KiB but is not multiplied by the number 623of cpus). 624 625In full-trace mode, powers of two are allowed for buffer size, with a minimum 626size of 2 pages. In snapshot mode or sampling mode, it is the same but the 627minimum size is 1 page. 628 629The mmap size and auxtrace mmap size are displayed if the -vv option is used e.g. 630 631 mmap length 528384 632 auxtrace mmap length 4198400 633 634 635Intel PT modes of operation 636~~~~~~~~~~~~~~~~~~~~~~~~~~~ 637 638Intel PT can be used in 3 modes: 639 full-trace mode 640 sample mode 641 snapshot mode 642 643Full-trace mode traces continuously e.g. 644 645 perf record -e intel_pt//u uname 646 647Sample mode attaches a Intel PT sample to other events e.g. 648 649 perf record --aux-sample -e intel_pt//u -e branch-misses:u 650 651Snapshot mode captures the available data when a signal is sent or "snapshot" 652control command is issued. e.g. using a signal 653 654 perf record -v -e intel_pt//u -S ./loopy 1000000000 & 655 [1] 11435 656 kill -USR2 11435 657 Recording AUX area tracing snapshot 658 659Note that the signal sent is SIGUSR2. 660Note that "Recording AUX area tracing snapshot" is displayed because the -v 661option is used. 662 663The advantage of using "snapshot" control command is that the access is 664controlled by access to a FIFO e.g. 665 666 $ mkfifo perf.control 667 $ mkfifo perf.ack 668 $ cat perf.ack & 669 [1] 15235 670 $ sudo ~/bin/perf record --control fifo:perf.control,perf.ack -S -e intel_pt//u -- sleep 60 & 671 [2] 15243 672 $ ps -e | grep perf 673 15244 pts/1 00:00:00 perf 674 $ kill -USR2 15244 675 bash: kill: (15244) - Operation not permitted 676 $ echo snapshot > perf.control 677 ack 678 679The 3 Intel PT modes of operation cannot be used together. 680 681 682Buffer handling 683~~~~~~~~~~~~~~~ 684 685There may be buffer limitations (i.e. single ToPa entry) which means that actual 686buffer sizes are limited to powers of 2 up to 4MiB (MAX_ORDER). In order to 687provide other sizes, and in particular an arbitrarily large size, multiple 688buffers are logically concatenated. However an interrupt must be used to switch 689between buffers. That has two potential problems: 690 a) the interrupt may not be handled in time so that the current buffer 691 becomes full and some trace data is lost. 692 b) the interrupts may slow the system and affect the performance 693 results. 694 695If trace data is lost, the driver sets 'truncated' in the PERF_RECORD_AUX event 696which the tools report as an error. 697 698In full-trace mode, the driver waits for data to be copied out before allowing 699the (logical) buffer to wrap-around. If data is not copied out quickly enough, 700again 'truncated' is set in the PERF_RECORD_AUX event. If the driver has to 701wait, the intel_pt event gets disabled. Because it is difficult to know when 702that happens, perf tools always re-enable the intel_pt event after copying out 703data. 704 705 706Intel PT and build ids 707~~~~~~~~~~~~~~~~~~~~~~ 708 709By default "perf record" post-processes the event stream to find all build ids 710for executables for all addresses sampled. Deliberately, Intel PT is not 711decoded for that purpose (it would take too long). Instead the build ids for 712all executables encountered (due to mmap, comm or task events) are included 713in the perf.data file. 714 715To see buildids included in the perf.data file use the command: 716 717 perf buildid-list 718 719If the perf.data file contains Intel PT data, that is the same as: 720 721 perf buildid-list --with-hits 722 723 724Snapshot mode and event disabling 725~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 726 727In order to make a snapshot, the intel_pt event is disabled using an IOCTL, 728namely PERF_EVENT_IOC_DISABLE. However doing that can also disable the 729collection of side-band information. In order to prevent that, a dummy 730software event has been introduced that permits tracking events (like mmaps) to 731continue to be recorded while intel_pt is disabled. That is important to ensure 732there is complete side-band information to allow the decoding of subsequent 733snapshots. 734 735A test has been created for that. To find the test: 736 737 perf test list 738 ... 739 23: Test using a dummy software event to keep tracking 740 741To run the test: 742 743 perf test 23 744 23: Test using a dummy software event to keep tracking : Ok 745 746 747perf record modes (nothing new here) 748~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 749 750perf record essentially operates in one of three modes: 751 per thread 752 per cpu 753 workload only 754 755"per thread" mode is selected by -t or by --per-thread (with -p or -u or just a 756workload). 757"per cpu" is selected by -C or -a. 758"workload only" mode is selected by not using the other options but providing a 759command to run (i.e. the workload). 760 761In per-thread mode an exact list of threads is traced. There is no inheritance. 762Each thread has its own event buffer. 763 764In per-cpu mode all processes (or processes from the selected cgroup i.e. -G 765option, or processes selected with -p or -u) are traced. Each cpu has its own 766buffer. Inheritance is allowed. 767 768In workload-only mode, the workload is traced but with per-cpu buffers. 769Inheritance is allowed. Note that you can now trace a workload in per-thread 770mode by using the --per-thread option. 771 772 773Privileged vs non-privileged users 774~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 775 776Unless /proc/sys/kernel/perf_event_paranoid is set to -1, unprivileged users 777have memory limits imposed upon them. That affects what buffer sizes they can 778have as outlined above. 779 780The v4.2 kernel introduced support for a context switch metadata event, 781PERF_RECORD_SWITCH, which allows unprivileged users to see when their processes 782are scheduled out and in, just not by whom, which is left for the 783PERF_RECORD_SWITCH_CPU_WIDE, that is only accessible in system wide context, 784which in turn requires CAP_PERFMON or CAP_SYS_ADMIN. 785 786Please see the 45ac1403f564 ("perf: Add PERF_RECORD_SWITCH to indicate context 787switches") commit, that introduces these metadata events for further info. 788 789When working with kernels < v4.2, the following considerations must be taken, 790as the sched:sched_switch tracepoints will be used to receive such information: 791 792Unless /proc/sys/kernel/perf_event_paranoid is set to -1, unprivileged users are 793not permitted to use tracepoints which means there is insufficient side-band 794information to decode Intel PT in per-cpu mode, and potentially workload-only 795mode too if the workload creates new processes. 796 797Note also, that to use tracepoints, read-access to debugfs is required. So if 798debugfs is not mounted or the user does not have read-access, it will again not 799be possible to decode Intel PT in per-cpu mode. 800 801 802sched_switch tracepoint 803~~~~~~~~~~~~~~~~~~~~~~~ 804 805The sched_switch tracepoint is used to provide side-band data for Intel PT 806decoding in kernels where the PERF_RECORD_SWITCH metadata event isn't 807available. 808 809The sched_switch events are automatically added. e.g. the second event shown 810below: 811 812 $ perf record -vv -e intel_pt//u uname 813 ------------------------------------------------------------ 814 perf_event_attr: 815 type 6 816 size 112 817 config 0x400 818 { sample_period, sample_freq } 1 819 sample_type IP|TID|TIME|CPU|IDENTIFIER 820 read_format ID 821 disabled 1 822 inherit 1 823 exclude_kernel 1 824 exclude_hv 1 825 enable_on_exec 1 826 sample_id_all 1 827 ------------------------------------------------------------ 828 sys_perf_event_open: pid 31104 cpu 0 group_fd -1 flags 0x8 829 sys_perf_event_open: pid 31104 cpu 1 group_fd -1 flags 0x8 830 sys_perf_event_open: pid 31104 cpu 2 group_fd -1 flags 0x8 831 sys_perf_event_open: pid 31104 cpu 3 group_fd -1 flags 0x8 832 ------------------------------------------------------------ 833 perf_event_attr: 834 type 2 835 size 112 836 config 0x108 837 { sample_period, sample_freq } 1 838 sample_type IP|TID|TIME|CPU|PERIOD|RAW|IDENTIFIER 839 read_format ID 840 inherit 1 841 sample_id_all 1 842 exclude_guest 1 843 ------------------------------------------------------------ 844 sys_perf_event_open: pid -1 cpu 0 group_fd -1 flags 0x8 845 sys_perf_event_open: pid -1 cpu 1 group_fd -1 flags 0x8 846 sys_perf_event_open: pid -1 cpu 2 group_fd -1 flags 0x8 847 sys_perf_event_open: pid -1 cpu 3 group_fd -1 flags 0x8 848 ------------------------------------------------------------ 849 perf_event_attr: 850 type 1 851 size 112 852 config 0x9 853 { sample_period, sample_freq } 1 854 sample_type IP|TID|TIME|IDENTIFIER 855 read_format ID 856 disabled 1 857 inherit 1 858 exclude_kernel 1 859 exclude_hv 1 860 mmap 1 861 comm 1 862 enable_on_exec 1 863 task 1 864 sample_id_all 1 865 mmap2 1 866 comm_exec 1 867 ------------------------------------------------------------ 868 sys_perf_event_open: pid 31104 cpu 0 group_fd -1 flags 0x8 869 sys_perf_event_open: pid 31104 cpu 1 group_fd -1 flags 0x8 870 sys_perf_event_open: pid 31104 cpu 2 group_fd -1 flags 0x8 871 sys_perf_event_open: pid 31104 cpu 3 group_fd -1 flags 0x8 872 mmap size 528384B 873 AUX area mmap length 4194304 874 perf event ring buffer mmapped per cpu 875 Synthesizing auxtrace information 876 Linux 877 [ perf record: Woken up 1 times to write data ] 878 [ perf record: Captured and wrote 0.042 MB perf.data ] 879 880Note, the sched_switch event is only added if the user is permitted to use it 881and only in per-cpu mode. 882 883Note also, the sched_switch event is only added if TSC packets are requested. 884That is because, in the absence of timing information, the sched_switch events 885cannot be matched against the Intel PT trace. 886 887 888perf script 889----------- 890 891By default, perf script will decode trace data found in the perf.data file. 892This can be further controlled by new option --itrace. 893 894 895New --itrace option 896~~~~~~~~~~~~~~~~~~~ 897 898Having no option is the same as 899 900 --itrace 901 902which, in turn, is the same as 903 904 --itrace=cepwxy 905 906The letters are: 907 908 i synthesize "instructions" events 909 y synthesize "cycles" events 910 b synthesize "branches" events 911 x synthesize "transactions" events 912 w synthesize "ptwrite" events 913 p synthesize "power" events (incl. PSB events) 914 c synthesize branches events (calls only) 915 r synthesize branches events (returns only) 916 o synthesize PEBS-via-PT events 917 I synthesize Event Trace events 918 e synthesize tracing error events 919 d create a debug log 920 g synthesize a call chain (use with i or x) 921 G synthesize a call chain on existing event records 922 l synthesize last branch entries (use with i or x) 923 L synthesize last branch entries on existing event records 924 s skip initial number of events 925 q quicker (less detailed) decoding 926 A approximate IPC 927 Z prefer to ignore timestamps (so-called "timeless" decoding) 928 929"Instructions" events look like they were recorded by "perf record -e 930instructions". 931 932"Cycles" events look like they were recorded by "perf record -e cycles" 933(ie., the default). Note that even with CYC packets enabled and no sampling, 934these are not fully accurate, since CYC packets are not emitted for each 935instruction, only when some other event (like an indirect branch, or a 936TNT packet representing multiple branches) happens causes a packet to 937be emitted. Thus, it is more effective for attributing cycles to functions 938(and possibly basic blocks) than to individual instructions, although it 939is not even perfect for functions (although it becomes better if the noretcomp 940option is active). 941 942"Branches" events look like they were recorded by "perf record -e branches". "c" 943and "r" can be combined to get calls and returns. 944 945"Transactions" events correspond to the start or end of transactions. The 946'flags' field can be used in perf script to determine whether the event is a 947transaction start, commit or abort. 948 949Note that "instructions", "cycles", "branches" and "transactions" events 950depend on code flow packets which can be disabled by using the config term 951"branch=0". Refer to the config terms section above. 952 953"ptwrite" events record the payload of the ptwrite instruction and whether 954"fup_on_ptw" was used. "ptwrite" events depend on PTWRITE packets which are 955recorded only if the "ptw" config term was used. Refer to the config terms 956section above. perf script "synth" field displays "ptwrite" information like 957this: "ip: 0 payload: 0x123456789abcdef0" where "ip" is 1 if "fup_on_ptw" was 958used. 959 960"Power" events correspond to power event packets and CBR (core-to-bus ratio) 961packets. While CBR packets are always recorded when tracing is enabled, power 962event packets are recorded only if the "pwr_evt" config term was used. Refer to 963the config terms section above. The power events record information about 964C-state changes, whereas CBR is indicative of CPU frequency. perf script 965"event,synth" fields display information like this: 966 967 cbr: cbr: 22 freq: 2189 MHz (200%) 968 mwait: hints: 0x60 extensions: 0x1 969 pwre: hw: 0 cstate: 2 sub-cstate: 0 970 exstop: ip: 1 971 pwrx: deepest cstate: 2 last cstate: 2 wake reason: 0x4 972 973Where: 974 975 "cbr" includes the frequency and the percentage of maximum non-turbo 976 "mwait" shows mwait hints and extensions 977 "pwre" shows C-state transitions (to a C-state deeper than C0) and 978 whether initiated by hardware 979 "exstop" indicates execution stopped and whether the IP was recorded 980 exactly, 981 "pwrx" indicates return to C0 982 983For more details refer to the Intel 64 and IA-32 Architectures Software 984Developer Manuals. 985 986PSB events show when a PSB+ occurred and also the byte-offset in the trace. 987Emitting a PSB+ can cause a CPU a slight delay. When doing timing analysis 988of code with Intel PT, it is useful to know if a timing bubble was caused 989by Intel PT or not. 990 991Error events show where the decoder lost the trace. Error events 992are quite important. Users must know if what they are seeing is a complete 993picture or not. The "e" option may be followed by flags which affect what errors 994will or will not be reported. Each flag must be preceded by either '+' or '-'. 995The flags supported by Intel PT are: 996 997 -o Suppress overflow errors 998 -l Suppress trace data lost errors 999 1000For example, for errors but not overflow or data lost errors: 1001 1002 --itrace=e-o-l 1003 1004The "d" option will cause the creation of a file "intel_pt.log" containing all 1005decoded packets and instructions. Note that this option slows down the decoder 1006and that the resulting file may be very large. The "d" option may be followed 1007by flags which affect what debug messages will or will not be logged. Each flag 1008must be preceded by either '+' or '-'. The flags support by Intel PT are: 1009 1010 -a Suppress logging of perf events 1011 +a Log all perf events 1012 +e Output only on decoding errors (size configurable) 1013 +o Output to stdout instead of "intel_pt.log" 1014 1015By default, logged perf events are filtered by any specified time ranges, but 1016flag +a overrides that. The +e flag can be useful for analyzing errors. By 1017default, the log size in that case is 16384 bytes, but can be altered by 1018linkperf:perf-config[1] e.g. perf config itrace.debug-log-buffer-size=30000 1019 1020In addition, the period of the "instructions" event can be specified. e.g. 1021 1022 --itrace=i10us 1023 1024sets the period to 10us i.e. one instruction sample is synthesized for each 10 1025microseconds of trace. Alternatives to "us" are "ms" (milliseconds), 1026"ns" (nanoseconds), "t" (TSC ticks) or "i" (instructions). 1027 1028"ms", "us" and "ns" are converted to TSC ticks. 1029 1030The timing information included with Intel PT does not give the time of every 1031instruction. Consequently, for the purpose of sampling, the decoder estimates 1032the time since the last timing packet based on 1 tick per instruction. The time 1033on the sample is *not* adjusted and reflects the last known value of TSC. 1034 1035For Intel PT, the default period is 100us. 1036 1037Setting it to a zero period means "as often as possible". 1038 1039In the case of Intel PT that is the same as a period of 1 and a unit of 1040'instructions' (i.e. --itrace=i1i). 1041 1042Also the call chain size (default 16, max. 1024) for instructions or 1043transactions events can be specified. e.g. 1044 1045 --itrace=ig32 1046 --itrace=xg32 1047 1048Also the number of last branch entries (default 64, max. 1024) for instructions or 1049transactions events can be specified. e.g. 1050 1051 --itrace=il10 1052 --itrace=xl10 1053 1054Note that last branch entries are cleared for each sample, so there is no overlap 1055from one sample to the next. 1056 1057The G and L options are designed in particular for sample mode, and work much 1058like g and l but add call chain and branch stack to the other selected events 1059instead of synthesized events. For example, to record branch-misses events for 1060'ls' and then add a call chain derived from the Intel PT trace: 1061 1062 perf record --aux-sample -e '{intel_pt//u,branch-misses:u}' -- ls 1063 perf report --itrace=Ge 1064 1065Although in fact G is a default for perf report, so that is the same as just: 1066 1067 perf report 1068 1069One caveat with the G and L options is that they work poorly with "Large PEBS". 1070Large PEBS means PEBS records will be accumulated by hardware and the written 1071into the event buffer in one go. That reduces interrupts, but can give very 1072late timestamps. Because the Intel PT trace is synchronized by timestamps, 1073the PEBS events do not match the trace. Currently, Large PEBS is used only in 1074certain circumstances: 1075 - hardware supports it 1076 - PEBS is used 1077 - event period is specified, instead of frequency 1078 - the sample type is limited to the following flags: 1079 PERF_SAMPLE_IP | PERF_SAMPLE_TID | PERF_SAMPLE_ADDR | 1080 PERF_SAMPLE_ID | PERF_SAMPLE_CPU | PERF_SAMPLE_STREAM_ID | 1081 PERF_SAMPLE_DATA_SRC | PERF_SAMPLE_IDENTIFIER | 1082 PERF_SAMPLE_TRANSACTION | PERF_SAMPLE_PHYS_ADDR | 1083 PERF_SAMPLE_REGS_INTR | PERF_SAMPLE_REGS_USER | 1084 PERF_SAMPLE_PERIOD (and sometimes) | PERF_SAMPLE_TIME 1085Because Intel PT sample mode uses a different sample type to the list above, 1086Large PEBS is not used with Intel PT sample mode. To avoid Large PEBS in other 1087cases, avoid specifying the event period i.e. avoid the 'perf record' -c option, 1088--count option, or 'period' config term. 1089 1090To disable trace decoding entirely, use the option --no-itrace. 1091 1092It is also possible to skip events generated (instructions, branches, transactions) 1093at the beginning. This is useful to ignore initialization code. 1094 1095 --itrace=i0nss1000000 1096 1097skips the first million instructions. 1098 1099The q option changes the way the trace is decoded. The decoding is much faster 1100but much less detailed. Specifically, with the q option, the decoder does not 1101decode TNT packets, and does not walk object code, but gets the ip from FUP and 1102TIP packets. The q option can be used with the b and i options but the period 1103is not used. The q option decodes more quickly, but is useful only if the 1104control flow of interest is represented or indicated by FUP, TIP, TIP.PGE, or 1105TIP.PGD packets (refer below). However the q option could be used to find time 1106ranges that could then be decoded fully using the --time option. 1107 1108What will *not* be decoded with the (single) q option: 1109 1110 - direct calls and jmps 1111 - conditional branches 1112 - non-branch instructions 1113 1114What *will* be decoded with the (single) q option: 1115 1116 - asynchronous branches such as interrupts 1117 - indirect branches 1118 - function return target address *if* the noretcomp config term (refer 1119 config terms section) was used 1120 - start of (control-flow) tracing 1121 - end of (control-flow) tracing, if it is not out of context 1122 - power events, ptwrite, transaction start and abort 1123 - instruction pointer associated with PSB packets 1124 1125Note the q option does not specify what events will be synthesized e.g. the p 1126option must be used also to show power events. 1127 1128Repeating the q option (double-q i.e. qq) results in even faster decoding and even 1129less detail. The decoder decodes only extended PSB (PSB+) packets, getting the 1130instruction pointer if there is a FUP packet within PSB+ (i.e. between PSB and 1131PSBEND). Note PSB packets occur regularly in the trace based on the psb_period 1132config term (refer config terms section). There will be a FUP packet if the 1133PSB+ occurs while control flow is being traced. 1134 1135What will *not* be decoded with the qq option: 1136 1137 - everything except instruction pointer associated with PSB packets 1138 1139What *will* be decoded with the qq option: 1140 1141 - instruction pointer associated with PSB packets 1142 1143The Z option is equivalent to having recorded a trace without TSC 1144(i.e. config term tsc=0). It can be useful to avoid timestamp issues when 1145decoding a trace of a virtual machine. 1146 1147 1148dlfilter-show-cycles.so 1149~~~~~~~~~~~~~~~~~~~~~~~ 1150 1151Cycles can be displayed using dlfilter-show-cycles.so in which case the itrace A 1152option can be useful to provide higher granularity cycle information: 1153 1154 perf script --itrace=A --call-trace --dlfilter dlfilter-show-cycles.so 1155 1156To see a list of dlfilters: 1157 1158 perf script -v --list-dlfilters 1159 1160See also linkperf:perf-dlfilters[1] 1161 1162 1163dump option 1164~~~~~~~~~~~ 1165 1166perf script has an option (-D) to "dump" the events i.e. display the binary 1167data. 1168 1169When -D is used, Intel PT packets are displayed. The packet decoder does not 1170pay attention to PSB packets, but just decodes the bytes - so the packets seen 1171by the actual decoder may not be identical in places where the data is corrupt. 1172One example of that would be when the buffer-switching interrupt has been too 1173slow, and the buffer has been filled completely. In that case, the last packet 1174in the buffer might be truncated and immediately followed by a PSB as the trace 1175continues in the next buffer. 1176 1177To disable the display of Intel PT packets, combine the -D option with 1178--no-itrace. 1179 1180 1181perf report 1182----------- 1183 1184By default, perf report will decode trace data found in the perf.data file. 1185This can be further controlled by new option --itrace exactly the same as 1186perf script, with the exception that the default is --itrace=igxe. 1187 1188 1189perf inject 1190----------- 1191 1192perf inject also accepts the --itrace option in which case tracing data is 1193removed and replaced with the synthesized events. e.g. 1194 1195 perf inject --itrace -i perf.data -o perf.data.new 1196 1197Below is an example of using Intel PT with autofdo. It requires autofdo 1198(https://github.com/google/autofdo) and gcc version 5. The bubble 1199sort example is from the AutoFDO tutorial (https://gcc.gnu.org/wiki/AutoFDO/Tutorial) 1200amended to take the number of elements as a parameter. 1201 1202 $ gcc-5 -O3 sort.c -o sort_optimized 1203 $ ./sort_optimized 30000 1204 Bubble sorting array of 30000 elements 1205 2254 ms 1206 1207 $ cat ~/.perfconfig 1208 [intel-pt] 1209 mispred-all = on 1210 1211 $ perf record -e intel_pt//u ./sort 3000 1212 Bubble sorting array of 3000 elements 1213 58 ms 1214 [ perf record: Woken up 2 times to write data ] 1215 [ perf record: Captured and wrote 3.939 MB perf.data ] 1216 $ perf inject -i perf.data -o inj --itrace=i100usle --strip 1217 $ ./create_gcov --binary=./sort --profile=inj --gcov=sort.gcov -gcov_version=1 1218 $ gcc-5 -O3 -fauto-profile=sort.gcov sort.c -o sort_autofdo 1219 $ ./sort_autofdo 30000 1220 Bubble sorting array of 30000 elements 1221 2155 ms 1222 1223Note there is currently no advantage to using Intel PT instead of LBR, but 1224that may change in the future if greater use is made of the data. 1225 1226 1227PEBS via Intel PT 1228----------------- 1229 1230Some hardware has the feature to redirect PEBS records to the Intel PT trace. 1231Recording is selected by using the aux-output config term e.g. 1232 1233 perf record -c 10000 -e '{intel_pt/branch=0/,cycles/aux-output/ppp}' uname 1234 1235Originally, software only supported redirecting at most one PEBS event because it 1236was not able to differentiate one event from another. To overcome that, more recent 1237kernels and perf tools add support for the PERF_RECORD_AUX_OUTPUT_HW_ID side-band event. 1238To check for the presence of that event in a PEBS-via-PT trace: 1239 1240 perf script -D --no-itrace | grep PERF_RECORD_AUX_OUTPUT_HW_ID 1241 1242To display PEBS events from the Intel PT trace, use the itrace 'o' option e.g. 1243 1244 perf script --itrace=oe 1245 1246XED 1247--- 1248 1249include::build-xed.txt[] 1250 1251 1252Tracing Virtual Machines (kernel only) 1253-------------------------------------- 1254 1255Currently, kernel tracing is supported with either "timeless" decoding 1256(i.e. no TSC timestamps) or VM Time Correlation. VM Time Correlation is an extra step 1257using 'perf inject' and requires unchanging VMX TSC Offset and no VMX TSC Scaling. 1258 1259Other limitations and caveats 1260 1261 VMX controls may suppress packets needed for decoding resulting in decoding errors 1262 VMX controls may block the perf NMI to the host potentially resulting in lost trace data 1263 Guest kernel self-modifying code (e.g. jump labels or JIT-compiled eBPF) will result in decoding errors 1264 Guest thread information is unknown 1265 Guest VCPU is unknown but may be able to be inferred from the host thread 1266 Callchains are not supported 1267 1268Example using "timeless" decoding 1269 1270Start VM 1271 1272 $ sudo virsh start kubuntu20.04 1273 Domain kubuntu20.04 started 1274 1275Mount the guest file system. Note sshfs needs -o direct_io to enable reading of proc files. root access is needed to read /proc/kcore. 1276 1277 $ mkdir vm0 1278 $ sshfs -o direct_io root@vm0:/ vm0 1279 1280Copy the guest /proc/kallsyms, /proc/modules and /proc/kcore 1281 1282 $ perf buildid-cache -v --kcore vm0/proc/kcore 1283 kcore added to build-id cache directory /home/user/.debug/[kernel.kcore]/9600f316a53a0f54278885e8d9710538ec5f6a08/2021021807494306 1284 $ KALLSYMS=/home/user/.debug/[kernel.kcore]/9600f316a53a0f54278885e8d9710538ec5f6a08/2021021807494306/kallsyms 1285 1286Find the VM process 1287 1288 $ ps -eLl | grep 'KVM\|PID' 1289 F S UID PID PPID LWP C PRI NI ADDR SZ WCHAN TTY TIME CMD 1290 3 S 64055 1430 1 1440 1 80 0 - 1921718 - ? 00:02:47 CPU 0/KVM 1291 3 S 64055 1430 1 1441 1 80 0 - 1921718 - ? 00:02:41 CPU 1/KVM 1292 3 S 64055 1430 1 1442 1 80 0 - 1921718 - ? 00:02:38 CPU 2/KVM 1293 3 S 64055 1430 1 1443 2 80 0 - 1921718 - ? 00:03:18 CPU 3/KVM 1294 1295Start an open-ended perf record, tracing the VM process, do something on the VM, and then ctrl-C to stop. 1296TSC is not supported and tsc=0 must be specified. That means mtc is useless, so add mtc=0. 1297However, IPC can still be determined, hence cyc=1 can be added. 1298Only kernel decoding is supported, so 'k' must be specified. 1299Intel PT traces both the host and the guest so --guest and --host need to be specified. 1300Without timestamps, --per-thread must be specified to distinguish threads. 1301 1302 $ sudo perf kvm --guest --host --guestkallsyms $KALLSYMS record --kcore -e intel_pt/tsc=0,mtc=0,cyc=1/k -p 1430 --per-thread 1303 ^C 1304 [ perf record: Woken up 1 times to write data ] 1305 [ perf record: Captured and wrote 5.829 MB ] 1306 1307perf script can be used to provide an instruction trace 1308 1309 $ perf script --guestkallsyms $KALLSYMS --insn-trace --xed -F+ipc | grep -C10 vmresume | head -21 1310 CPU 0/KVM 1440 ffffffff82133cdd __vmx_vcpu_run+0x3d ([kernel.kallsyms]) movq 0x48(%rax), %r9 1311 CPU 0/KVM 1440 ffffffff82133ce1 __vmx_vcpu_run+0x41 ([kernel.kallsyms]) movq 0x50(%rax), %r10 1312 CPU 0/KVM 1440 ffffffff82133ce5 __vmx_vcpu_run+0x45 ([kernel.kallsyms]) movq 0x58(%rax), %r11 1313 CPU 0/KVM 1440 ffffffff82133ce9 __vmx_vcpu_run+0x49 ([kernel.kallsyms]) movq 0x60(%rax), %r12 1314 CPU 0/KVM 1440 ffffffff82133ced __vmx_vcpu_run+0x4d ([kernel.kallsyms]) movq 0x68(%rax), %r13 1315 CPU 0/KVM 1440 ffffffff82133cf1 __vmx_vcpu_run+0x51 ([kernel.kallsyms]) movq 0x70(%rax), %r14 1316 CPU 0/KVM 1440 ffffffff82133cf5 __vmx_vcpu_run+0x55 ([kernel.kallsyms]) movq 0x78(%rax), %r15 1317 CPU 0/KVM 1440 ffffffff82133cf9 __vmx_vcpu_run+0x59 ([kernel.kallsyms]) movq (%rax), %rax 1318 CPU 0/KVM 1440 ffffffff82133cfc __vmx_vcpu_run+0x5c ([kernel.kallsyms]) callq 0xffffffff82133c40 1319 CPU 0/KVM 1440 ffffffff82133c40 vmx_vmenter+0x0 ([kernel.kallsyms]) jz 0xffffffff82133c46 1320 CPU 0/KVM 1440 ffffffff82133c42 vmx_vmenter+0x2 ([kernel.kallsyms]) vmresume IPC: 0.11 (50/445) 1321 :1440 1440 ffffffffbb678b06 native_write_msr+0x6 ([guest.kernel.kallsyms]) nopl %eax, (%rax,%rax,1) 1322 :1440 1440 ffffffffbb678b0b native_write_msr+0xb ([guest.kernel.kallsyms]) retq IPC: 0.04 (2/41) 1323 :1440 1440 ffffffffbb666646 lapic_next_deadline+0x26 ([guest.kernel.kallsyms]) data16 nop 1324 :1440 1440 ffffffffbb666648 lapic_next_deadline+0x28 ([guest.kernel.kallsyms]) xor %eax, %eax 1325 :1440 1440 ffffffffbb66664a lapic_next_deadline+0x2a ([guest.kernel.kallsyms]) popq %rbp 1326 :1440 1440 ffffffffbb66664b lapic_next_deadline+0x2b ([guest.kernel.kallsyms]) retq IPC: 0.16 (4/25) 1327 :1440 1440 ffffffffbb74607f clockevents_program_event+0x8f ([guest.kernel.kallsyms]) test %eax, %eax 1328 :1440 1440 ffffffffbb746081 clockevents_program_event+0x91 ([guest.kernel.kallsyms]) jz 0xffffffffbb74603c IPC: 0.06 (2/30) 1329 :1440 1440 ffffffffbb74603c clockevents_program_event+0x4c ([guest.kernel.kallsyms]) popq %rbx 1330 :1440 1440 ffffffffbb74603d clockevents_program_event+0x4d ([guest.kernel.kallsyms]) popq %r12 1331 1332Example using VM Time Correlation 1333 1334Start VM 1335 1336 $ sudo virsh start kubuntu20.04 1337 Domain kubuntu20.04 started 1338 1339Mount the guest file system. Note sshfs needs -o direct_io to enable reading of proc files. root access is needed to read /proc/kcore. 1340 1341 $ mkdir -p vm0 1342 $ sshfs -o direct_io root@vm0:/ vm0 1343 1344Copy the guest /proc/kallsyms, /proc/modules and /proc/kcore 1345 1346 $ perf buildid-cache -v --kcore vm0/proc/kcore 1347 same kcore found in /home/user/.debug/[kernel.kcore]/cc9c55a98c5e4ec0aeda69302554aabed5cd6491/2021021312450777 1348 $ KALLSYMS=/home/user/.debug/\[kernel.kcore\]/cc9c55a98c5e4ec0aeda69302554aabed5cd6491/2021021312450777/kallsyms 1349 1350Find the VM process 1351 1352 $ ps -eLl | grep 'KVM\|PID' 1353 F S UID PID PPID LWP C PRI NI ADDR SZ WCHAN TTY TIME CMD 1354 3 S 64055 16998 1 17005 13 80 0 - 1818189 - ? 00:00:16 CPU 0/KVM 1355 3 S 64055 16998 1 17006 4 80 0 - 1818189 - ? 00:00:05 CPU 1/KVM 1356 3 S 64055 16998 1 17007 3 80 0 - 1818189 - ? 00:00:04 CPU 2/KVM 1357 3 S 64055 16998 1 17008 4 80 0 - 1818189 - ? 00:00:05 CPU 3/KVM 1358 1359Start an open-ended perf record, tracing the VM process, do something on the VM, and then ctrl-C to stop. 1360IPC can be determined, hence cyc=1 can be added. 1361Only kernel decoding is supported, so 'k' must be specified. 1362Intel PT traces both the host and the guest so --guest and --host need to be specified. 1363 1364 $ sudo perf kvm --guest --host --guestkallsyms $KALLSYMS record --kcore -e intel_pt/cyc=1/k -p 16998 1365 ^C[ perf record: Woken up 1 times to write data ] 1366 [ perf record: Captured and wrote 9.041 MB perf.data.kvm ] 1367 1368Now 'perf inject' can be used to determine the VMX TCS Offset. Note, Intel PT TSC packets are 1369only 7-bytes, so the TSC Offset might differ from the actual value in the 8th byte. That will 1370have no effect i.e. the resulting timestamps will be correct anyway. 1371 1372 $ perf inject -i perf.data.kvm --vm-time-correlation=dry-run 1373 ERROR: Unknown TSC Offset for VMCS 0x1bff6a 1374 VMCS: 0x1bff6a TSC Offset 0xffffe42722c64c41 1375 ERROR: Unknown TSC Offset for VMCS 0x1cbc08 1376 VMCS: 0x1cbc08 TSC Offset 0xffffe42722c64c41 1377 ERROR: Unknown TSC Offset for VMCS 0x1c3ce8 1378 VMCS: 0x1c3ce8 TSC Offset 0xffffe42722c64c41 1379 ERROR: Unknown TSC Offset for VMCS 0x1cbce9 1380 VMCS: 0x1cbce9 TSC Offset 0xffffe42722c64c41 1381 1382Each virtual CPU has a different Virtual Machine Control Structure (VMCS) 1383shown above with the calculated TSC Offset. For an unchanging TSC Offset 1384they should all be the same for the same virtual machine. 1385 1386Now that the TSC Offset is known, it can be provided to 'perf inject' 1387 1388 $ perf inject -i perf.data.kvm --vm-time-correlation="dry-run 0xffffe42722c64c41" 1389 1390Note the options for 'perf inject' --vm-time-correlation are: 1391 1392 [ dry-run ] [ <TSC Offset> [ : <VMCS> [ , <VMCS> ]... ] ]... 1393 1394So it is possible to specify different TSC Offsets for different VMCS. 1395The option "dry-run" will cause the file to be processed but without updating it. 1396Note it is also possible to get a intel_pt.log file by adding option --itrace=d 1397 1398There were no errors so, do it for real 1399 1400 $ perf inject -i perf.data.kvm --vm-time-correlation=0xffffe42722c64c41 --force 1401 1402'perf script' can be used to see if there are any decoder errors 1403 1404 $ perf script -i perf.data.kvm --guestkallsyms $KALLSYMS --itrace=e-o 1405 1406There were none. 1407 1408'perf script' can be used to provide an instruction trace showing timestamps 1409 1410 $ perf script -i perf.data.kvm --guestkallsyms $KALLSYMS --insn-trace --xed -F+ipc | grep -C10 vmresume | head -21 1411 CPU 1/KVM 17006 [001] 11500.262865593: ffffffff82133cdd __vmx_vcpu_run+0x3d ([kernel.kallsyms]) movq 0x48(%rax), %r9 1412 CPU 1/KVM 17006 [001] 11500.262865593: ffffffff82133ce1 __vmx_vcpu_run+0x41 ([kernel.kallsyms]) movq 0x50(%rax), %r10 1413 CPU 1/KVM 17006 [001] 11500.262865593: ffffffff82133ce5 __vmx_vcpu_run+0x45 ([kernel.kallsyms]) movq 0x58(%rax), %r11 1414 CPU 1/KVM 17006 [001] 11500.262865593: ffffffff82133ce9 __vmx_vcpu_run+0x49 ([kernel.kallsyms]) movq 0x60(%rax), %r12 1415 CPU 1/KVM 17006 [001] 11500.262865593: ffffffff82133ced __vmx_vcpu_run+0x4d ([kernel.kallsyms]) movq 0x68(%rax), %r13 1416 CPU 1/KVM 17006 [001] 11500.262865593: ffffffff82133cf1 __vmx_vcpu_run+0x51 ([kernel.kallsyms]) movq 0x70(%rax), %r14 1417 CPU 1/KVM 17006 [001] 11500.262865593: ffffffff82133cf5 __vmx_vcpu_run+0x55 ([kernel.kallsyms]) movq 0x78(%rax), %r15 1418 CPU 1/KVM 17006 [001] 11500.262865593: ffffffff82133cf9 __vmx_vcpu_run+0x59 ([kernel.kallsyms]) movq (%rax), %rax 1419 CPU 1/KVM 17006 [001] 11500.262865593: ffffffff82133cfc __vmx_vcpu_run+0x5c ([kernel.kallsyms]) callq 0xffffffff82133c40 1420 CPU 1/KVM 17006 [001] 11500.262865593: ffffffff82133c40 vmx_vmenter+0x0 ([kernel.kallsyms]) jz 0xffffffff82133c46 1421 CPU 1/KVM 17006 [001] 11500.262866075: ffffffff82133c42 vmx_vmenter+0x2 ([kernel.kallsyms]) vmresume IPC: 0.05 (40/769) 1422 :17006 17006 [001] 11500.262869216: ffffffff82200cb0 asm_sysvec_apic_timer_interrupt+0x0 ([guest.kernel.kallsyms]) clac 1423 :17006 17006 [001] 11500.262869216: ffffffff82200cb3 asm_sysvec_apic_timer_interrupt+0x3 ([guest.kernel.kallsyms]) pushq $0xffffffffffffffff 1424 :17006 17006 [001] 11500.262869216: ffffffff82200cb5 asm_sysvec_apic_timer_interrupt+0x5 ([guest.kernel.kallsyms]) callq 0xffffffff82201160 1425 :17006 17006 [001] 11500.262869216: ffffffff82201160 error_entry+0x0 ([guest.kernel.kallsyms]) cld 1426 :17006 17006 [001] 11500.262869216: ffffffff82201161 error_entry+0x1 ([guest.kernel.kallsyms]) pushq %rsi 1427 :17006 17006 [001] 11500.262869216: ffffffff82201162 error_entry+0x2 ([guest.kernel.kallsyms]) movq 0x8(%rsp), %rsi 1428 :17006 17006 [001] 11500.262869216: ffffffff82201167 error_entry+0x7 ([guest.kernel.kallsyms]) movq %rdi, 0x8(%rsp) 1429 :17006 17006 [001] 11500.262869216: ffffffff8220116c error_entry+0xc ([guest.kernel.kallsyms]) pushq %rdx 1430 :17006 17006 [001] 11500.262869216: ffffffff8220116d error_entry+0xd ([guest.kernel.kallsyms]) pushq %rcx 1431 :17006 17006 [001] 11500.262869216: ffffffff8220116e error_entry+0xe ([guest.kernel.kallsyms]) pushq %rax 1432 1433 1434Tracing Virtual Machines (including user space) 1435----------------------------------------------- 1436 1437It is possible to use perf record to record sideband events within a virtual machine, so that an Intel PT trace on the host can be decoded. 1438Sideband events from the guest perf.data file can be injected into the host perf.data file using perf inject. 1439 1440Here is an example of the steps needed: 1441 1442On the guest machine: 1443 1444Check that no-kvmclock kernel command line option was used to boot: 1445 1446Note, this is essential to enable time correlation between host and guest machines. 1447 1448 $ cat /proc/cmdline 1449 BOOT_IMAGE=/boot/vmlinuz-5.10.0-16-amd64 root=UUID=cb49c910-e573-47e0-bce7-79e293df8e1d ro no-kvmclock 1450 1451There is no BPF support at present so, if possible, disable JIT compiling: 1452 1453 $ echo 0 | sudo tee /proc/sys/net/core/bpf_jit_enable 1454 0 1455 1456Start perf record to collect sideband events: 1457 1458 $ sudo perf record -o guest-sideband-testing-guest-perf.data --sample-identifier --buildid-all --switch-events --kcore -a -e dummy 1459 1460On the host machine: 1461 1462Start perf record to collect Intel PT trace: 1463 1464Note, the host trace will get very big, very fast, so the steps from starting to stopping the host trace really need to be done so that they happen in the shortest time possible. 1465 1466 $ sudo perf record -o guest-sideband-testing-host-perf.data -m,64M --kcore -a -e intel_pt/cyc/ 1467 1468On the guest machine: 1469 1470Run a small test case, just 'uname' in this example: 1471 1472 $ uname 1473 Linux 1474 1475On the host machine: 1476 1477Stop the Intel PT trace: 1478 1479 ^C 1480 [ perf record: Woken up 1 times to write data ] 1481 [ perf record: Captured and wrote 76.122 MB guest-sideband-testing-host-perf.data ] 1482 1483On the guest machine: 1484 1485Stop the Intel PT trace: 1486 1487 ^C 1488 [ perf record: Woken up 1 times to write data ] 1489 [ perf record: Captured and wrote 1.247 MB guest-sideband-testing-guest-perf.data ] 1490 1491And then copy guest-sideband-testing-guest-perf.data to the host (not shown here). 1492 1493On the host machine: 1494 1495With the 2 perf.data recordings, and with their ownership changed to the user. 1496 1497Identify the TSC Offset: 1498 1499 $ perf inject -i guest-sideband-testing-host-perf.data --vm-time-correlation=dry-run 1500 VMCS: 0x103fc6 TSC Offset 0xfffffa6ae070cb20 1501 VMCS: 0x103ff2 TSC Offset 0xfffffa6ae070cb20 1502 VMCS: 0x10fdaa TSC Offset 0xfffffa6ae070cb20 1503 VMCS: 0x24d57c TSC Offset 0xfffffa6ae070cb20 1504 1505Correct Intel PT TSC timestamps for the guest machine: 1506 1507 $ perf inject -i guest-sideband-testing-host-perf.data --vm-time-correlation=0xfffffa6ae070cb20 --force 1508 1509Identify the guest machine PID: 1510 1511 $ perf script -i guest-sideband-testing-host-perf.data --no-itrace --show-task-events | grep KVM 1512 CPU 0/KVM 0 [000] 0.000000: PERF_RECORD_COMM: CPU 0/KVM:13376/13381 1513 CPU 1/KVM 0 [000] 0.000000: PERF_RECORD_COMM: CPU 1/KVM:13376/13382 1514 CPU 2/KVM 0 [000] 0.000000: PERF_RECORD_COMM: CPU 2/KVM:13376/13383 1515 CPU 3/KVM 0 [000] 0.000000: PERF_RECORD_COMM: CPU 3/KVM:13376/13384 1516 1517Note, the QEMU option -name debug-threads=on is needed so that thread names 1518can be used to determine which thread is running which VCPU as above. libvirt seems to use this by default. 1519 1520Create a guestmount, assuming the guest machine is 'vm_to_test': 1521 1522 $ mkdir -p ~/guestmount/13376 1523 $ sshfs -o direct_io vm_to_test:/ ~/guestmount/13376 1524 1525Inject the guest perf.data file into the host perf.data file: 1526 1527Note, due to the guestmount option, guest object files and debug files will be copied into the build ID cache from the guest machine, with the notable exception of VDSO. 1528If needed, VDSO can be copied manually in a fashion similar to that used by the perf-archive script. 1529 1530 $ perf inject -i guest-sideband-testing-host-perf.data -o inj --guestmount ~/guestmount --guest-data=guest-sideband-testing-guest-perf.data,13376,0xfffffa6ae070cb20 1531 1532Show an excerpt from the result. In this case the CPU and time range have been to chosen to show interaction between guest and host when 'uname' is starting to run on the guest machine: 1533 1534Notes: 1535 1536 - the CPU displayed, [002] in this case, is always the host CPU 1537 - events happening in the virtual machine start with VM:13376 VCPU:003, which shows the hypervisor PID 13376 and the VCPU number 1538 - only calls and errors are displayed i.e. --itrace=ce 1539 - branches entering and exiting the virtual machine are split, and show as 2 branches to/from "0 [unknown] ([unknown])" 1540 1541 $ perf script -i inj --itrace=ce -F+machine_pid,+vcpu,+addr,+pid,+tid,-period --ns --time 7919.408803365,7919.408804631 -C 2 1542 CPU 3/KVM 13376/13384 [002] 7919.408803365: branches: ffffffffc0f8ebe0 vmx_vcpu_enter_exit+0xc0 ([kernel.kallsyms]) => ffffffffc0f8edc0 __vmx_vcpu_run+0x0 ([kernel.kallsyms]) 1543 CPU 3/KVM 13376/13384 [002] 7919.408803365: branches: ffffffffc0f8edd5 __vmx_vcpu_run+0x15 ([kernel.kallsyms]) => ffffffffc0f8eca0 vmx_update_host_rsp+0x0 ([kernel.kallsyms]) 1544 CPU 3/KVM 13376/13384 [002] 7919.408803365: branches: ffffffffc0f8ee1b __vmx_vcpu_run+0x5b ([kernel.kallsyms]) => ffffffffc0f8ed60 vmx_vmenter+0x0 ([kernel.kallsyms]) 1545 CPU 3/KVM 13376/13384 [002] 7919.408803461: branches: ffffffffc0f8ed62 vmx_vmenter+0x2 ([kernel.kallsyms]) => 0 [unknown] ([unknown]) 1546 VM:13376 VCPU:003 uname 3404/3404 [002] 7919.408803461: branches: 0 [unknown] ([unknown]) => 7f851c9b5a5c init_cacheinfo+0x3ac (/usr/lib/x86_64-linux-gnu/libc-2.31.so) 1547 VM:13376 VCPU:003 uname 3404/3404 [002] 7919.408803567: branches: 7f851c9b5a5a init_cacheinfo+0x3aa (/usr/lib/x86_64-linux-gnu/libc-2.31.so) => 0 [unknown] ([unknown]) 1548 CPU 3/KVM 13376/13384 [002] 7919.408803567: branches: 0 [unknown] ([unknown]) => ffffffffc0f8ed80 vmx_vmexit+0x0 ([kernel.kallsyms]) 1549 CPU 3/KVM 13376/13384 [002] 7919.408803596: branches: ffffffffc0f6619a vmx_vcpu_run+0x26a ([kernel.kallsyms]) => ffffffffb2255c60 x86_virt_spec_ctrl+0x0 ([kernel.kallsyms]) 1550 CPU 3/KVM 13376/13384 [002] 7919.408803801: branches: ffffffffc0f66445 vmx_vcpu_run+0x515 ([kernel.kallsyms]) => ffffffffb2290b30 native_write_msr+0x0 ([kernel.kallsyms]) 1551 CPU 3/KVM 13376/13384 [002] 7919.408803850: branches: ffffffffc0f661f8 vmx_vcpu_run+0x2c8 ([kernel.kallsyms]) => ffffffffc1092300 kvm_load_host_xsave_state+0x0 ([kernel.kallsyms]) 1552 CPU 3/KVM 13376/13384 [002] 7919.408803850: branches: ffffffffc1092327 kvm_load_host_xsave_state+0x27 ([kernel.kallsyms]) => ffffffffc1092220 kvm_load_host_xsave_state.part.0+0x0 ([kernel.kallsyms]) 1553 CPU 3/KVM 13376/13384 [002] 7919.408803862: branches: ffffffffc0f662cf vmx_vcpu_run+0x39f ([kernel.kallsyms]) => ffffffffc0f63f90 vmx_recover_nmi_blocking+0x0 ([kernel.kallsyms]) 1554 CPU 3/KVM 13376/13384 [002] 7919.408803862: branches: ffffffffc0f662e9 vmx_vcpu_run+0x3b9 ([kernel.kallsyms]) => ffffffffc0f619a0 __vmx_complete_interrupts+0x0 ([kernel.kallsyms]) 1555 CPU 3/KVM 13376/13384 [002] 7919.408803872: branches: ffffffffc109cfb2 vcpu_enter_guest+0x752 ([kernel.kallsyms]) => ffffffffc0f5f570 vmx_handle_exit_irqoff+0x0 ([kernel.kallsyms]) 1556 CPU 3/KVM 13376/13384 [002] 7919.408803881: branches: ffffffffc109d028 vcpu_enter_guest+0x7c8 ([kernel.kallsyms]) => ffffffffb234f900 __srcu_read_lock+0x0 ([kernel.kallsyms]) 1557 CPU 3/KVM 13376/13384 [002] 7919.408803897: branches: ffffffffc109d06f vcpu_enter_guest+0x80f ([kernel.kallsyms]) => ffffffffc0f72e30 vmx_handle_exit+0x0 ([kernel.kallsyms]) 1558 CPU 3/KVM 13376/13384 [002] 7919.408803897: branches: ffffffffc0f72e3d vmx_handle_exit+0xd ([kernel.kallsyms]) => ffffffffc0f727c0 __vmx_handle_exit+0x0 ([kernel.kallsyms]) 1559 CPU 3/KVM 13376/13384 [002] 7919.408803897: branches: ffffffffc0f72b15 __vmx_handle_exit+0x355 ([kernel.kallsyms]) => ffffffffc0f60ae0 vmx_flush_pml_buffer+0x0 ([kernel.kallsyms]) 1560 CPU 3/KVM 13376/13384 [002] 7919.408803903: branches: ffffffffc0f72994 __vmx_handle_exit+0x1d4 ([kernel.kallsyms]) => ffffffffc10b7090 kvm_emulate_cpuid+0x0 ([kernel.kallsyms]) 1561 CPU 3/KVM 13376/13384 [002] 7919.408803903: branches: ffffffffc10b70f1 kvm_emulate_cpuid+0x61 ([kernel.kallsyms]) => ffffffffc10b6e10 kvm_cpuid+0x0 ([kernel.kallsyms]) 1562 CPU 3/KVM 13376/13384 [002] 7919.408803941: branches: ffffffffc10b7125 kvm_emulate_cpuid+0x95 ([kernel.kallsyms]) => ffffffffc1093110 kvm_skip_emulated_instruction+0x0 ([kernel.kallsyms]) 1563 CPU 3/KVM 13376/13384 [002] 7919.408803941: branches: ffffffffc109311f kvm_skip_emulated_instruction+0xf ([kernel.kallsyms]) => ffffffffc0f5e180 vmx_get_rflags+0x0 ([kernel.kallsyms]) 1564 CPU 3/KVM 13376/13384 [002] 7919.408803951: branches: ffffffffc109312a kvm_skip_emulated_instruction+0x1a ([kernel.kallsyms]) => ffffffffc0f5fd30 vmx_skip_emulated_instruction+0x0 ([kernel.kallsyms]) 1565 CPU 3/KVM 13376/13384 [002] 7919.408803951: branches: ffffffffc0f5fd79 vmx_skip_emulated_instruction+0x49 ([kernel.kallsyms]) => ffffffffc0f5fb50 skip_emulated_instruction+0x0 ([kernel.kallsyms]) 1566 CPU 3/KVM 13376/13384 [002] 7919.408803956: branches: ffffffffc0f5fc68 skip_emulated_instruction+0x118 ([kernel.kallsyms]) => ffffffffc0f6a940 vmx_cache_reg+0x0 ([kernel.kallsyms]) 1567 CPU 3/KVM 13376/13384 [002] 7919.408803964: branches: ffffffffc0f5fc11 skip_emulated_instruction+0xc1 ([kernel.kallsyms]) => ffffffffc0f5f9e0 vmx_set_interrupt_shadow+0x0 ([kernel.kallsyms]) 1568 CPU 3/KVM 13376/13384 [002] 7919.408803980: branches: ffffffffc109f8b1 vcpu_run+0x71 ([kernel.kallsyms]) => ffffffffc10ad2f0 kvm_cpu_has_pending_timer+0x0 ([kernel.kallsyms]) 1569 CPU 3/KVM 13376/13384 [002] 7919.408803980: branches: ffffffffc10ad2fb kvm_cpu_has_pending_timer+0xb ([kernel.kallsyms]) => ffffffffc10b0490 apic_has_pending_timer+0x0 ([kernel.kallsyms]) 1570 CPU 3/KVM 13376/13384 [002] 7919.408803991: branches: ffffffffc109f899 vcpu_run+0x59 ([kernel.kallsyms]) => ffffffffc109c860 vcpu_enter_guest+0x0 ([kernel.kallsyms]) 1571 CPU 3/KVM 13376/13384 [002] 7919.408803993: branches: ffffffffc109cd4c vcpu_enter_guest+0x4ec ([kernel.kallsyms]) => ffffffffc0f69140 vmx_prepare_switch_to_guest+0x0 ([kernel.kallsyms]) 1572 CPU 3/KVM 13376/13384 [002] 7919.408803996: branches: ffffffffc109cd7d vcpu_enter_guest+0x51d ([kernel.kallsyms]) => ffffffffb234f930 __srcu_read_unlock+0x0 ([kernel.kallsyms]) 1573 CPU 3/KVM 13376/13384 [002] 7919.408803996: branches: ffffffffc109cd9c vcpu_enter_guest+0x53c ([kernel.kallsyms]) => ffffffffc0f609b0 vmx_sync_pir_to_irr+0x0 ([kernel.kallsyms]) 1574 CPU 3/KVM 13376/13384 [002] 7919.408803996: branches: ffffffffc0f60a6d vmx_sync_pir_to_irr+0xbd ([kernel.kallsyms]) => ffffffffc10adc20 kvm_lapic_find_highest_irr+0x0 ([kernel.kallsyms]) 1575 CPU 3/KVM 13376/13384 [002] 7919.408804010: branches: ffffffffc0f60abd vmx_sync_pir_to_irr+0x10d ([kernel.kallsyms]) => ffffffffc0f60820 vmx_set_rvi+0x0 ([kernel.kallsyms]) 1576 CPU 3/KVM 13376/13384 [002] 7919.408804019: branches: ffffffffc109ceca vcpu_enter_guest+0x66a ([kernel.kallsyms]) => ffffffffb2249840 fpregs_assert_state_consistent+0x0 ([kernel.kallsyms]) 1577 CPU 3/KVM 13376/13384 [002] 7919.408804021: branches: ffffffffc109cf10 vcpu_enter_guest+0x6b0 ([kernel.kallsyms]) => ffffffffc0f65f30 vmx_vcpu_run+0x0 ([kernel.kallsyms]) 1578 CPU 3/KVM 13376/13384 [002] 7919.408804024: branches: ffffffffc0f6603b vmx_vcpu_run+0x10b ([kernel.kallsyms]) => ffffffffb229bed0 __get_current_cr3_fast+0x0 ([kernel.kallsyms]) 1579 CPU 3/KVM 13376/13384 [002] 7919.408804024: branches: ffffffffc0f66055 vmx_vcpu_run+0x125 ([kernel.kallsyms]) => ffffffffb2253050 cr4_read_shadow+0x0 ([kernel.kallsyms]) 1580 CPU 3/KVM 13376/13384 [002] 7919.408804030: branches: ffffffffc0f6608d vmx_vcpu_run+0x15d ([kernel.kallsyms]) => ffffffffc10921e0 kvm_load_guest_xsave_state+0x0 ([kernel.kallsyms]) 1581 CPU 3/KVM 13376/13384 [002] 7919.408804030: branches: ffffffffc1092207 kvm_load_guest_xsave_state+0x27 ([kernel.kallsyms]) => ffffffffc1092110 kvm_load_guest_xsave_state.part.0+0x0 ([kernel.kallsyms]) 1582 CPU 3/KVM 13376/13384 [002] 7919.408804032: branches: ffffffffc0f660c6 vmx_vcpu_run+0x196 ([kernel.kallsyms]) => ffffffffb22061a0 perf_guest_get_msrs+0x0 ([kernel.kallsyms]) 1583 CPU 3/KVM 13376/13384 [002] 7919.408804032: branches: ffffffffb22061a9 perf_guest_get_msrs+0x9 ([kernel.kallsyms]) => ffffffffb220cda0 intel_guest_get_msrs+0x0 ([kernel.kallsyms]) 1584 CPU 3/KVM 13376/13384 [002] 7919.408804039: branches: ffffffffc0f66109 vmx_vcpu_run+0x1d9 ([kernel.kallsyms]) => ffffffffc0f652c0 clear_atomic_switch_msr+0x0 ([kernel.kallsyms]) 1585 CPU 3/KVM 13376/13384 [002] 7919.408804040: branches: ffffffffc0f66119 vmx_vcpu_run+0x1e9 ([kernel.kallsyms]) => ffffffffc0f73f60 intel_pmu_lbr_is_enabled+0x0 ([kernel.kallsyms]) 1586 CPU 3/KVM 13376/13384 [002] 7919.408804042: branches: ffffffffc0f73f81 intel_pmu_lbr_is_enabled+0x21 ([kernel.kallsyms]) => ffffffffc10b68e0 kvm_find_cpuid_entry+0x0 ([kernel.kallsyms]) 1587 CPU 3/KVM 13376/13384 [002] 7919.408804045: branches: ffffffffc0f66454 vmx_vcpu_run+0x524 ([kernel.kallsyms]) => ffffffffc0f61ff0 vmx_update_hv_timer+0x0 ([kernel.kallsyms]) 1588 CPU 3/KVM 13376/13384 [002] 7919.408804057: branches: ffffffffc0f66142 vmx_vcpu_run+0x212 ([kernel.kallsyms]) => ffffffffc10af100 kvm_wait_lapic_expire+0x0 ([kernel.kallsyms]) 1589 CPU 3/KVM 13376/13384 [002] 7919.408804057: branches: ffffffffc0f66156 vmx_vcpu_run+0x226 ([kernel.kallsyms]) => ffffffffb2255c60 x86_virt_spec_ctrl+0x0 ([kernel.kallsyms]) 1590 CPU 3/KVM 13376/13384 [002] 7919.408804057: branches: ffffffffc0f66161 vmx_vcpu_run+0x231 ([kernel.kallsyms]) => ffffffffc0f8eb20 vmx_vcpu_enter_exit+0x0 ([kernel.kallsyms]) 1591 CPU 3/KVM 13376/13384 [002] 7919.408804057: branches: ffffffffc0f8eb44 vmx_vcpu_enter_exit+0x24 ([kernel.kallsyms]) => ffffffffb2353e10 rcu_note_context_switch+0x0 ([kernel.kallsyms]) 1592 CPU 3/KVM 13376/13384 [002] 7919.408804057: branches: ffffffffb2353e1c rcu_note_context_switch+0xc ([kernel.kallsyms]) => ffffffffb2353db0 rcu_qs+0x0 ([kernel.kallsyms]) 1593 CPU 3/KVM 13376/13384 [002] 7919.408804066: branches: ffffffffc0f8ebe0 vmx_vcpu_enter_exit+0xc0 ([kernel.kallsyms]) => ffffffffc0f8edc0 __vmx_vcpu_run+0x0 ([kernel.kallsyms]) 1594 CPU 3/KVM 13376/13384 [002] 7919.408804066: branches: ffffffffc0f8edd5 __vmx_vcpu_run+0x15 ([kernel.kallsyms]) => ffffffffc0f8eca0 vmx_update_host_rsp+0x0 ([kernel.kallsyms]) 1595 CPU 3/KVM 13376/13384 [002] 7919.408804066: branches: ffffffffc0f8ee1b __vmx_vcpu_run+0x5b ([kernel.kallsyms]) => ffffffffc0f8ed60 vmx_vmenter+0x0 ([kernel.kallsyms]) 1596 CPU 3/KVM 13376/13384 [002] 7919.408804162: branches: ffffffffc0f8ed62 vmx_vmenter+0x2 ([kernel.kallsyms]) => 0 [unknown] ([unknown]) 1597 VM:13376 VCPU:003 uname 3404/3404 [002] 7919.408804162: branches: 0 [unknown] ([unknown]) => 7f851c9b5a5c init_cacheinfo+0x3ac (/usr/lib/x86_64-linux-gnu/libc-2.31.so) 1598 VM:13376 VCPU:003 uname 3404/3404 [002] 7919.408804273: branches: 7f851cb7c0e4 _dl_init+0x74 (/usr/lib/x86_64-linux-gnu/ld-2.31.so) => 7f851cb7bf50 call_init.part.0+0x0 (/usr/lib/x86_64-linux-gnu/ld-2.31.so) 1599 VM:13376 VCPU:003 uname 3404/3404 [002] 7919.408804526: branches: 55e0c00136f0 _start+0x0 (/usr/bin/uname) => ffffffff83200ac0 asm_exc_page_fault+0x0 ([kernel.kallsyms]) 1600 VM:13376 VCPU:003 uname 3404/3404 [002] 7919.408804526: branches: ffffffff83200ac3 asm_exc_page_fault+0x3 ([kernel.kallsyms]) => ffffffff83201290 error_entry+0x0 ([kernel.kallsyms]) 1601 VM:13376 VCPU:003 uname 3404/3404 [002] 7919.408804534: branches: ffffffff832012fa error_entry+0x6a ([kernel.kallsyms]) => ffffffff830b59a0 sync_regs+0x0 ([kernel.kallsyms]) 1602 VM:13376 VCPU:003 uname 3404/3404 [002] 7919.408804631: branches: ffffffff83200ad9 asm_exc_page_fault+0x19 ([kernel.kallsyms]) => ffffffff830b8210 exc_page_fault+0x0 ([kernel.kallsyms]) 1603 VM:13376 VCPU:003 uname 3404/3404 [002] 7919.408804631: branches: ffffffff830b82a4 exc_page_fault+0x94 ([kernel.kallsyms]) => ffffffff830b80e0 __kvm_handle_async_pf+0x0 ([kernel.kallsyms]) 1604 VM:13376 VCPU:003 uname 3404/3404 [002] 7919.408804631: branches: ffffffff830b80ed __kvm_handle_async_pf+0xd ([kernel.kallsyms]) => ffffffff830b80c0 kvm_read_and_reset_apf_flags+0x0 ([kernel.kallsyms]) 1605 1606 1607Tracing Virtual Machines - Guest Code 1608------------------------------------- 1609 1610A common case for KVM test programs is that the test program acts as the 1611hypervisor, creating, running and destroying the virtual machine, and 1612providing the guest object code from its own object code. In this case, 1613the VM is not running an OS, but only the functions loaded into it by the 1614hypervisor test program, and conveniently, loaded at the same virtual 1615addresses. To support that, option "--guest-code" has been added to perf script 1616and perf kvm report. 1617 1618Here is an example tracing a test program from the kernel's KVM selftests: 1619 1620 # perf record --kcore -e intel_pt/cyc/ -- tools/testing/selftests/kselftest_install/kvm/tsc_msrs_test 1621 [ perf record: Woken up 1 times to write data ] 1622 [ perf record: Captured and wrote 0.280 MB perf.data ] 1623 # perf script --guest-code --itrace=bep --ns -F-period,+addr,+flags 1624 [SNIP] 1625 tsc_msrs_test 18436 [007] 10897.962087733: branches: call ffffffffc13b2ff5 __vmx_vcpu_run+0x15 (vmlinux) => ffffffffc13b2f50 vmx_update_host_rsp+0x0 (vmlinux) 1626 tsc_msrs_test 18436 [007] 10897.962087733: branches: return ffffffffc13b2f5d vmx_update_host_rsp+0xd (vmlinux) => ffffffffc13b2ffa __vmx_vcpu_run+0x1a (vmlinux) 1627 tsc_msrs_test 18436 [007] 10897.962087733: branches: call ffffffffc13b303b __vmx_vcpu_run+0x5b (vmlinux) => ffffffffc13b2f80 vmx_vmenter+0x0 (vmlinux) 1628 tsc_msrs_test 18436 [007] 10897.962087836: branches: vmentry ffffffffc13b2f82 vmx_vmenter+0x2 (vmlinux) => 0 [unknown] ([unknown]) 1629 [guest/18436] 18436 [007] 10897.962087836: branches: vmentry 0 [unknown] ([unknown]) => 402c81 guest_code+0x131 (/home/user/git/work/tools/testing/selftests/kselftest_install/kvm/tsc_msrs_test) 1630 [guest/18436] 18436 [007] 10897.962087836: branches: call 402c81 guest_code+0x131 (/home/user/git/work/tools/testing/selftests/kselftest_install/kvm/tsc_msrs_test) => 40dba0 ucall+0x0 (/home/user/git/work/tools/testing/selftests/kselftest_install/kvm/tsc_msrs_test) 1631 [guest/18436] 18436 [007] 10897.962088248: branches: vmexit 40dba0 ucall+0x0 (/home/user/git/work/tools/testing/selftests/kselftest_install/kvm/tsc_msrs_test) => 0 [unknown] ([unknown]) 1632 tsc_msrs_test 18436 [007] 10897.962088248: branches: vmexit 0 [unknown] ([unknown]) => ffffffffc13b2fa0 vmx_vmexit+0x0 (vmlinux) 1633 tsc_msrs_test 18436 [007] 10897.962088248: branches: jmp ffffffffc13b2fa0 vmx_vmexit+0x0 (vmlinux) => ffffffffc13b2fd2 vmx_vmexit+0x32 (vmlinux) 1634 tsc_msrs_test 18436 [007] 10897.962088256: branches: return ffffffffc13b2fd2 vmx_vmexit+0x32 (vmlinux) => ffffffffc13b3040 __vmx_vcpu_run+0x60 (vmlinux) 1635 tsc_msrs_test 18436 [007] 10897.962088270: branches: return ffffffffc13b30b6 __vmx_vcpu_run+0xd6 (vmlinux) => ffffffffc13b2f2e vmx_vcpu_enter_exit+0x4e (vmlinux) 1636 [SNIP] 1637 tsc_msrs_test 18436 [007] 10897.962089321: branches: call ffffffffc13b2ff5 __vmx_vcpu_run+0x15 (vmlinux) => ffffffffc13b2f50 vmx_update_host_rsp+0x0 (vmlinux) 1638 tsc_msrs_test 18436 [007] 10897.962089321: branches: return ffffffffc13b2f5d vmx_update_host_rsp+0xd (vmlinux) => ffffffffc13b2ffa __vmx_vcpu_run+0x1a (vmlinux) 1639 tsc_msrs_test 18436 [007] 10897.962089321: branches: call ffffffffc13b303b __vmx_vcpu_run+0x5b (vmlinux) => ffffffffc13b2f80 vmx_vmenter+0x0 (vmlinux) 1640 tsc_msrs_test 18436 [007] 10897.962089424: branches: vmentry ffffffffc13b2f82 vmx_vmenter+0x2 (vmlinux) => 0 [unknown] ([unknown]) 1641 [guest/18436] 18436 [007] 10897.962089424: branches: vmentry 0 [unknown] ([unknown]) => 40dba0 ucall+0x0 (/home/user/git/work/tools/testing/selftests/kselftest_install/kvm/tsc_msrs_test) 1642 [guest/18436] 18436 [007] 10897.962089701: branches: jmp 40dc1b ucall+0x7b (/home/user/git/work/tools/testing/selftests/kselftest_install/kvm/tsc_msrs_test) => 40dc39 ucall+0x99 (/home/user/git/work/tools/testing/selftests/kselftest_install/kvm/tsc_msrs_test) 1643 [guest/18436] 18436 [007] 10897.962089701: branches: jcc 40dc3c ucall+0x9c (/home/user/git/work/tools/testing/selftests/kselftest_install/kvm/tsc_msrs_test) => 40dc20 ucall+0x80 (/home/user/git/work/tools/testing/selftests/kselftest_install/kvm/tsc_msrs_test) 1644 [guest/18436] 18436 [007] 10897.962089701: branches: jcc 40dc3c ucall+0x9c (/home/user/git/work/tools/testing/selftests/kselftest_install/kvm/tsc_msrs_test) => 40dc20 ucall+0x80 (/home/user/git/work/tools/testing/selftests/kselftest_install/kvm/tsc_msrs_test) 1645 [guest/18436] 18436 [007] 10897.962089701: branches: jcc 40dc37 ucall+0x97 (/home/user/git/work/tools/testing/selftests/kselftest_install/kvm/tsc_msrs_test) => 40dc50 ucall+0xb0 (/home/user/git/work/tools/testing/selftests/kselftest_install/kvm/tsc_msrs_test) 1646 [guest/18436] 18436 [007] 10897.962089878: branches: vmexit 40dc55 ucall+0xb5 (/home/user/git/work/tools/testing/selftests/kselftest_install/kvm/tsc_msrs_test) => 0 [unknown] ([unknown]) 1647 tsc_msrs_test 18436 [007] 10897.962089878: branches: vmexit 0 [unknown] ([unknown]) => ffffffffc13b2fa0 vmx_vmexit+0x0 (vmlinux) 1648 tsc_msrs_test 18436 [007] 10897.962089878: branches: jmp ffffffffc13b2fa0 vmx_vmexit+0x0 (vmlinux) => ffffffffc13b2fd2 vmx_vmexit+0x32 (vmlinux) 1649 tsc_msrs_test 18436 [007] 10897.962089887: branches: return ffffffffc13b2fd2 vmx_vmexit+0x32 (vmlinux) => ffffffffc13b3040 __vmx_vcpu_run+0x60 (vmlinux) 1650 tsc_msrs_test 18436 [007] 10897.962089901: branches: return ffffffffc13b30b6 __vmx_vcpu_run+0xd6 (vmlinux) => ffffffffc13b2f2e vmx_vcpu_enter_exit+0x4e (vmlinux) 1651 [SNIP] 1652 1653 # perf kvm --guest-code --guest --host report -i perf.data --stdio | head -20 1654 1655 # To display the perf.data header info, please use --header/--header-only options. 1656 # 1657 # 1658 # Total Lost Samples: 0 1659 # 1660 # Samples: 12 of event 'instructions' 1661 # Event count (approx.): 2274583 1662 # 1663 # Children Self Command Shared Object Symbol 1664 # ........ ........ ............. .................... ........................................... 1665 # 1666 54.70% 0.00% tsc_msrs_test [kernel.vmlinux] [k] entry_SYSCALL_64_after_hwframe 1667 | 1668 ---entry_SYSCALL_64_after_hwframe 1669 do_syscall_64 1670 | 1671 |--29.44%--syscall_exit_to_user_mode 1672 | exit_to_user_mode_prepare 1673 | task_work_run 1674 | __fput 1675 1676 1677Event Trace 1678----------- 1679 1680Event Trace records information about asynchronous events, for example interrupts, 1681faults, VM exits and entries. The information is recorded in CFE and EVD packets, 1682and also the Interrupt Flag is recorded on the MODE.Exec packet. The CFE packet 1683contains a type field to identify one of the following: 1684 1685 1 INTR interrupt, fault, exception, NMI 1686 2 IRET interrupt return 1687 3 SMI system management interrupt 1688 4 RSM resume from system management mode 1689 5 SIPI startup interprocessor interrupt 1690 6 INIT INIT signal 1691 7 VMENTRY VM-Entry 1692 8 VMEXIT VM-Entry 1693 9 VMEXIT_INTR VM-Exit due to interrupt 1694 10 SHUTDOWN Shutdown 1695 1696For more details, refer to the Intel 64 and IA-32 Architectures Software 1697Developer Manuals (version 076 or later). 1698 1699The capability to do Event Trace is indicated by the 1700/sys/bus/event_source/devices/intel_pt/caps/event_trace file. 1701 1702Event trace is selected for recording using the "event" config term. e.g. 1703 1704 perf record -e intel_pt/event/u uname 1705 1706Event trace events are output using the --itrace I option. e.g. 1707 1708 perf script --itrace=Ie 1709 1710perf script displays events containing CFE type, vector and event data, 1711in the form: 1712 1713 evt: hw int (t) cfe: INTR IP: 1 vector: 3 PFA: 0x8877665544332211 1714 1715The IP flag indicates if the event binds to an IP, which includes any case where 1716flow control packet generation is enabled, as well as when CFE packet IP bit is 1717set. 1718 1719perf script displays events containing changes to the Interrupt Flag in the form: 1720 1721 iflag: t IFLAG: 1->0 via branch 1722 1723where "via branch" indicates a branch (interrupt or return from interrupt) and 1724"non branch" indicates an instruction such as CFI, STI or POPF). 1725 1726In addition, the current state of the interrupt flag is indicated by the presence 1727or absence of the "D" (interrupt disabled) perf script flag. If the interrupt 1728flag is changed, then the "t" flag is also included i.e. 1729 1730 no flag, interrupts enabled IF=1 1731 t interrupts become disabled IF=1 -> IF=0 1732 D interrupts are disabled IF=0 1733 Dt interrupts become enabled IF=0 -> IF=1 1734 1735The intel-pt-events.py script illustrates how to access Event Trace information 1736using a Python script. 1737 1738 1739TNT Disable 1740----------- 1741 1742TNT packets are disabled using the "notnt" config term. e.g. 1743 1744 perf record -e intel_pt/notnt/u uname 1745 1746In that case the --itrace q option is forced because walking executable code 1747to reconstruct the control flow is not possible. 1748 1749 1750Emulated PTWRITE 1751---------------- 1752 1753Later perf tools support a method to emulate the ptwrite instruction, which 1754can be useful if hardware does not support the ptwrite instruction. 1755 1756Instead of using the ptwrite instruction, a function is used which produces 1757a trace that encodes the payload data into TNT packets. Here is an example 1758of the function: 1759 1760 #include <stdint.h> 1761 1762 void perf_emulate_ptwrite(uint64_t x) 1763 __attribute__((externally_visible, noipa, no_instrument_function, naked)); 1764 1765 #define PERF_EMULATE_PTWRITE_8_BITS \ 1766 "1: shl %rax\n" \ 1767 " jc 1f\n" \ 1768 "1: shl %rax\n" \ 1769 " jc 1f\n" \ 1770 "1: shl %rax\n" \ 1771 " jc 1f\n" \ 1772 "1: shl %rax\n" \ 1773 " jc 1f\n" \ 1774 "1: shl %rax\n" \ 1775 " jc 1f\n" \ 1776 "1: shl %rax\n" \ 1777 " jc 1f\n" \ 1778 "1: shl %rax\n" \ 1779 " jc 1f\n" \ 1780 "1: shl %rax\n" \ 1781 " jc 1f\n" 1782 1783 /* Undefined instruction */ 1784 #define PERF_EMULATE_PTWRITE_UD2 ".byte 0x0f, 0x0b\n" 1785 1786 #define PERF_EMULATE_PTWRITE_MAGIC PERF_EMULATE_PTWRITE_UD2 ".ascii \"perf,ptwrite \"\n" 1787 1788 void perf_emulate_ptwrite(uint64_t x __attribute__ ((__unused__))) 1789 { 1790 /* Assumes SysV ABI : x passed in rdi */ 1791 __asm__ volatile ( 1792 "jmp 1f\n" 1793 PERF_EMULATE_PTWRITE_MAGIC 1794 "1: mov %rdi, %rax\n" 1795 PERF_EMULATE_PTWRITE_8_BITS 1796 PERF_EMULATE_PTWRITE_8_BITS 1797 PERF_EMULATE_PTWRITE_8_BITS 1798 PERF_EMULATE_PTWRITE_8_BITS 1799 PERF_EMULATE_PTWRITE_8_BITS 1800 PERF_EMULATE_PTWRITE_8_BITS 1801 PERF_EMULATE_PTWRITE_8_BITS 1802 PERF_EMULATE_PTWRITE_8_BITS 1803 "1: ret\n" 1804 ); 1805 } 1806 1807For example, a test program with the function above: 1808 1809 #include <stdio.h> 1810 #include <stdint.h> 1811 #include <stdlib.h> 1812 1813 #include "perf_emulate_ptwrite.h" 1814 1815 int main(int argc, char *argv[]) 1816 { 1817 uint64_t x = 0; 1818 1819 if (argc > 1) 1820 x = strtoull(argv[1], NULL, 0); 1821 perf_emulate_ptwrite(x); 1822 return 0; 1823 } 1824 1825Can be compiled and traced: 1826 1827 $ gcc -Wall -Wextra -O3 -g -o eg_ptw eg_ptw.c 1828 $ perf record -e intel_pt//u ./eg_ptw 0x1234567890abcdef 1829 [ perf record: Woken up 1 times to write data ] 1830 [ perf record: Captured and wrote 0.017 MB perf.data ] 1831 $ perf script --itrace=ew 1832 eg_ptw 19875 [007] 8061.235912: ptwrite: IP: 0 payload: 0x1234567890abcdef 55701249a196 perf_emulate_ptwrite+0x16 (/home/user/eg_ptw) 1833 $ 1834 1835 1836Pipe mode 1837--------- 1838Pipe mode is a problem for Intel PT and possibly other auxtrace users. 1839It's not recommended to use a pipe as data output with Intel PT because 1840of the following reason. 1841 1842Essentially the auxtrace buffers do not behave like the regular perf 1843event buffers. That is because the head and tail are updated by 1844software, but in the auxtrace case the data is written by hardware. 1845So the head and tail do not get updated as data is written. 1846 1847In the Intel PT case, the head and tail are updated only when the trace 1848is disabled by software, for example: 1849 - full-trace, system wide : when buffer passes watermark 1850 - full-trace, not system-wide : when buffer passes watermark or 1851 context switches 1852 - snapshot mode : as above but also when a snapshot is made 1853 - sample mode : as above but also when a sample is made 1854 1855That means finished-round ordering doesn't work. An auxtrace buffer 1856can turn up that has data that extends back in time, possibly to the 1857very beginning of tracing. 1858 1859For a perf.data file, that problem is solved by going through the trace 1860and queuing up the auxtrace buffers in advance. 1861 1862For pipe mode, the order of events and timestamps can presumably 1863be messed up. 1864 1865 1866EXAMPLE 1867------- 1868 1869Examples can be found on perf wiki page "Perf tools support for Intel® Processor Trace": 1870 1871https://perf.wiki.kernel.org/index.php/Perf_tools_support_for_Intel%C2%AE_Processor_Trace 1872 1873 1874SEE ALSO 1875-------- 1876 1877linkperf:perf-record[1], linkperf:perf-script[1], linkperf:perf-report[1], 1878linkperf:perf-inject[1] 1879