1perf-intel-pt(1) 2================ 3 4NAME 5---- 6perf-intel-pt - Support for Intel Processor Trace within perf tools 7 8SYNOPSIS 9-------- 10[verse] 11'perf record' -e intel_pt// 12 13DESCRIPTION 14----------- 15 16Intel Processor Trace (Intel PT) is an extension of Intel Architecture that 17collects information about software execution such as control flow, execution 18modes and timings and formats it into highly compressed binary packets. 19Technical details are documented in the Intel 64 and IA-32 Architectures 20Software Developer Manuals, Chapter 36 Intel Processor Trace. 21 22Intel PT is first supported in Intel Core M and 5th generation Intel Core 23processors that are based on the Intel micro-architecture code name Broadwell. 24 25Trace data is collected by 'perf record' and stored within the perf.data file. 26See below for options to 'perf record'. 27 28Trace data must be 'decoded' which involves walking the object code and matching 29the trace data packets. For example a TNT packet only tells whether a 30conditional branch was taken or not taken, so to make use of that packet the 31decoder must know precisely which instruction was being executed. 32 33Decoding is done on-the-fly. The decoder outputs samples in the same format as 34samples output by perf hardware events, for example as though the "instructions" 35or "branches" events had been recorded. Presently 3 tools support this: 36'perf script', 'perf report' and 'perf inject'. See below for more information 37on using those tools. 38 39The main distinguishing feature of Intel PT is that the decoder can determine 40the exact flow of software execution. Intel PT can be used to understand why 41and how did software get to a certain point, or behave a certain way. The 42software does not have to be recompiled, so Intel PT works with debug or release 43builds, however the executed images are needed - which makes use in JIT-compiled 44environments, or with self-modified code, a challenge. Also symbols need to be 45provided to make sense of addresses. 46 47A limitation of Intel PT is that it produces huge amounts of trace data 48(hundreds of megabytes per second per core) which takes a long time to decode, 49for example two or three orders of magnitude longer than it took to collect. 50Another limitation is the performance impact of tracing, something that will 51vary depending on the use-case and architecture. 52 53 54Quickstart 55---------- 56 57It is important to start small. That is because it is easy to capture vastly 58more data than can possibly be processed. 59 60The simplest thing to do with Intel PT is userspace profiling of small programs. 61Data is captured with 'perf record' e.g. to trace 'ls' userspace-only: 62 63 perf record -e intel_pt//u ls 64 65And profiled with 'perf report' e.g. 66 67 perf report 68 69To also trace kernel space presents a problem, namely kernel self-modifying 70code. A fairly good kernel image is available in /proc/kcore but to get an 71accurate image a copy of /proc/kcore needs to be made under the same conditions 72as the data capture. 'perf record' can make a copy of /proc/kcore if the option 73--kcore is used, but access to /proc/kcore is restricted e.g. 74 75 sudo perf record -o pt_ls --kcore -e intel_pt// -- ls 76 77which will create a directory named 'pt_ls' and put the perf.data file (named 78simply 'data') and copies of /proc/kcore, /proc/kallsyms and /proc/modules into 79it. The other tools understand the directory format, so to use 'perf report' 80becomes: 81 82 sudo perf report -i pt_ls 83 84Because samples are synthesized after-the-fact, the sampling period can be 85selected for reporting. e.g. sample every microsecond 86 87 sudo perf report pt_ls --itrace=i1usge 88 89See the sections below for more information about the --itrace option. 90 91Beware the smaller the period, the more samples that are produced, and the 92longer it takes to process them. 93 94Also note that the coarseness of Intel PT timing information will start to 95distort the statistical value of the sampling as the sampling period becomes 96smaller. 97 98To represent software control flow, "branches" samples are produced. By default 99a branch sample is synthesized for every single branch. To get an idea what 100data is available you can use the 'perf script' tool with all itrace sampling 101options, which will list all the samples. 102 103 perf record -e intel_pt//u ls 104 perf script --itrace=ibxwpe 105 106An interesting field that is not printed by default is 'flags' which can be 107displayed as follows: 108 109 perf script --itrace=ibxwpe -F+flags 110 111The flags are "bcrosyiABExghDt" which stand for branch, call, return, conditional, 112system, asynchronous, interrupt, transaction abort, trace begin, trace end, 113in transaction, VM-entry, VM-exit, interrupt disabled, and interrupt disable 114toggle respectively. 115 116perf script also supports higher level ways to dump instruction traces: 117 118 perf script --insn-trace --xed 119 120Dump all instructions. This requires installing the xed tool (see XED below) 121Dumping all instructions in a long trace can be fairly slow. It is usually better 122to start with higher level decoding, like 123 124 perf script --call-trace 125 126or 127 128 perf script --call-ret-trace 129 130and then select a time range of interest. The time range can then be examined 131in detail with 132 133 perf script --time starttime,stoptime --insn-trace --xed 134 135While examining the trace it's also useful to filter on specific CPUs using 136the -C option 137 138 perf script --time starttime,stoptime --insn-trace --xed -C 1 139 140Dump all instructions in time range on CPU 1. 141 142Another interesting field that is not printed by default is 'ipc' which can be 143displayed as follows: 144 145 perf script --itrace=be -F+ipc 146 147There are two ways that instructions-per-cycle (IPC) can be calculated depending 148on the recording. 149 150If the 'cyc' config term (see config terms section below) was used, then IPC is 151calculated using the cycle count from CYC packets, otherwise MTC packets are 152used - refer to the 'mtc' config term. When MTC is used, however, the values 153are less accurate because the timing is less accurate. 154 155Because Intel PT does not update the cycle count on every branch or instruction, 156the values will often be zero. When there are values, they will be the number 157of instructions and number of cycles since the last update, and thus represent 158the average IPC since the last IPC for that event type. Note IPC for "branches" 159events is calculated separately from IPC for "instructions" events. 160 161Even with the 'cyc' config term, it is possible to produce IPC information for 162every change of timestamp, but at the expense of accuracy. That is selected by 163specifying the itrace 'A' option. Due to the granularity of timestamps, the 164actual number of cycles increases even though the cycles reported does not. 165The number of instructions is known, but if IPC is reported, cycles can be too 166low and so IPC is too high. Note that inaccuracy decreases as the period of 167sampling increases i.e. if the number of cycles is too low by a small amount, 168that becomes less significant if the number of cycles is large. It may also be 169useful to use the 'A' option in conjunction with dlfilter-show-cycles.so to 170provide higher granularity cycle information. 171 172Also note that the IPC instruction count may or may not include the current 173instruction. If the cycle count is associated with an asynchronous branch 174(e.g. page fault or interrupt), then the instruction count does not include the 175current instruction, otherwise it does. That is consistent with whether or not 176that instruction has retired when the cycle count is updated. 177 178Another note, in the case of "branches" events, non-taken branches are not 179presently sampled, so IPC values for them do not appear e.g. a CYC packet with a 180TNT packet that starts with a non-taken branch. To see every possible IPC 181value, "instructions" events can be used e.g. --itrace=i0ns 182 183While it is possible to create scripts to analyze the data, an alternative 184approach is available to export the data to a sqlite or postgresql database. 185Refer to script export-to-sqlite.py or export-to-postgresql.py for more details, 186and to script exported-sql-viewer.py for an example of using the database. 187 188There is also script intel-pt-events.py which provides an example of how to 189unpack the raw data for power events and PTWRITE. The script also displays 190branches, and supports 2 additional modes selected by option: 191 192 --insn-trace - instruction trace 193 --src-trace - source trace 194 195As mentioned above, it is easy to capture too much data. One way to limit the 196data captured is to use 'snapshot' mode which is explained further below. 197Refer to 'new snapshot option' and 'Intel PT modes of operation' further below. 198 199Another problem that will be experienced is decoder errors. They can be caused 200by inability to access the executed image, self-modified or JIT-ed code, or the 201inability to match side-band information (such as context switches and mmaps) 202which results in the decoder not knowing what code was executed. 203 204There is also the problem of perf not being able to copy the data fast enough, 205resulting in data lost because the buffer was full. See 'Buffer handling' below 206for more details. 207 208 209perf record 210----------- 211 212new event 213~~~~~~~~~ 214 215The Intel PT kernel driver creates a new PMU for Intel PT. PMU events are 216selected by providing the PMU name followed by the "config" separated by slashes. 217An enhancement has been made to allow default "config" e.g. the option 218 219 -e intel_pt// 220 221will use a default config value. Currently that is the same as 222 223 -e intel_pt/tsc,noretcomp=0/ 224 225which is the same as 226 227 -e intel_pt/tsc=1,noretcomp=0/ 228 229Note there are now new config terms - see section 'config terms' further below. 230 231The config terms are listed in /sys/devices/intel_pt/format. They are bit 232fields within the config member of the struct perf_event_attr which is 233passed to the kernel by the perf_event_open system call. They correspond to bit 234fields in the IA32_RTIT_CTL MSR. Here is a list of them and their definitions: 235 236 $ grep -H . /sys/bus/event_source/devices/intel_pt/format/* 237 /sys/bus/event_source/devices/intel_pt/format/cyc:config:1 238 /sys/bus/event_source/devices/intel_pt/format/cyc_thresh:config:19-22 239 /sys/bus/event_source/devices/intel_pt/format/mtc:config:9 240 /sys/bus/event_source/devices/intel_pt/format/mtc_period:config:14-17 241 /sys/bus/event_source/devices/intel_pt/format/noretcomp:config:11 242 /sys/bus/event_source/devices/intel_pt/format/psb_period:config:24-27 243 /sys/bus/event_source/devices/intel_pt/format/tsc:config:10 244 245Note that the default config must be overridden for each term i.e. 246 247 -e intel_pt/noretcomp=0/ 248 249is the same as: 250 251 -e intel_pt/tsc=1,noretcomp=0/ 252 253So, to disable TSC packets use: 254 255 -e intel_pt/tsc=0/ 256 257It is also possible to specify the config value explicitly: 258 259 -e intel_pt/config=0x400/ 260 261Note that, as with all events, the event is suffixed with event modifiers: 262 263 u userspace 264 k kernel 265 h hypervisor 266 G guest 267 H host 268 p precise ip 269 270'h', 'G' and 'H' are for virtualization which is not supported by Intel PT. 271'p' is also not relevant to Intel PT. So only options 'u' and 'k' are 272meaningful for Intel PT. 273 274perf_event_attr is displayed if the -vv option is used e.g. 275 276 ------------------------------------------------------------ 277 perf_event_attr: 278 type 6 279 size 112 280 config 0x400 281 { sample_period, sample_freq } 1 282 sample_type IP|TID|TIME|CPU|IDENTIFIER 283 read_format ID 284 disabled 1 285 inherit 1 286 exclude_kernel 1 287 exclude_hv 1 288 enable_on_exec 1 289 sample_id_all 1 290 ------------------------------------------------------------ 291 sys_perf_event_open: pid 31104 cpu 0 group_fd -1 flags 0x8 292 sys_perf_event_open: pid 31104 cpu 1 group_fd -1 flags 0x8 293 sys_perf_event_open: pid 31104 cpu 2 group_fd -1 flags 0x8 294 sys_perf_event_open: pid 31104 cpu 3 group_fd -1 flags 0x8 295 ------------------------------------------------------------ 296 297 298config terms 299~~~~~~~~~~~~ 300 301The June 2015 version of Intel 64 and IA-32 Architectures Software Developer 302Manuals, Chapter 36 Intel Processor Trace, defined new Intel PT features. 303Some of the features are reflect in new config terms. All the config terms are 304described below. 305 306tsc Always supported. Produces TSC timestamp packets to provide 307 timing information. In some cases it is possible to decode 308 without timing information, for example a per-thread context 309 that does not overlap executable memory maps. 310 311 The default config selects tsc (i.e. tsc=1). 312 313noretcomp Always supported. Disables "return compression" so a TIP packet 314 is produced when a function returns. Causes more packets to be 315 produced but might make decoding more reliable. 316 317 The default config does not select noretcomp (i.e. noretcomp=0). 318 319psb_period Allows the frequency of PSB packets to be specified. 320 321 The PSB packet is a synchronization packet that provides a 322 starting point for decoding or recovery from errors. 323 324 Support for psb_period is indicated by: 325 326 /sys/bus/event_source/devices/intel_pt/caps/psb_cyc 327 328 which contains "1" if the feature is supported and "0" 329 otherwise. 330 331 Valid values are given by: 332 333 /sys/bus/event_source/devices/intel_pt/caps/psb_periods 334 335 which contains a hexadecimal value, the bits of which represent 336 valid values e.g. bit 2 set means value 2 is valid. 337 338 The psb_period value is converted to the approximate number of 339 trace bytes between PSB packets as: 340 341 2 ^ (value + 11) 342 343 e.g. value 3 means 16KiB bytes between PSBs 344 345 If an invalid value is entered, the error message 346 will give a list of valid values e.g. 347 348 $ perf record -e intel_pt/psb_period=15/u uname 349 Invalid psb_period for intel_pt. Valid values are: 0-5 350 351 If MTC packets are selected, the default config selects a value 352 of 3 (i.e. psb_period=3) or the nearest lower value that is 353 supported (0 is always supported). Otherwise the default is 0. 354 355 If decoding is expected to be reliable and the buffer is large 356 then a large PSB period can be used. 357 358 Because a TSC packet is produced with PSB, the PSB period can 359 also affect the granularity to timing information in the absence 360 of MTC or CYC. 361 362mtc Produces MTC timing packets. 363 364 MTC packets provide finer grain timestamp information than TSC 365 packets. MTC packets record time using the hardware crystal 366 clock (CTC) which is related to TSC packets using a TMA packet. 367 368 Support for this feature is indicated by: 369 370 /sys/bus/event_source/devices/intel_pt/caps/mtc 371 372 which contains "1" if the feature is supported and 373 "0" otherwise. 374 375 The frequency of MTC packets can also be specified - see 376 mtc_period below. 377 378mtc_period Specifies how frequently MTC packets are produced - see mtc 379 above for how to determine if MTC packets are supported. 380 381 Valid values are given by: 382 383 /sys/bus/event_source/devices/intel_pt/caps/mtc_periods 384 385 which contains a hexadecimal value, the bits of which represent 386 valid values e.g. bit 2 set means value 2 is valid. 387 388 The mtc_period value is converted to the MTC frequency as: 389 390 CTC-frequency / (2 ^ value) 391 392 e.g. value 3 means one eighth of CTC-frequency 393 394 Where CTC is the hardware crystal clock, the frequency of which 395 can be related to TSC via values provided in cpuid leaf 0x15. 396 397 If an invalid value is entered, the error message 398 will give a list of valid values e.g. 399 400 $ perf record -e intel_pt/mtc_period=15/u uname 401 Invalid mtc_period for intel_pt. Valid values are: 0,3,6,9 402 403 The default value is 3 or the nearest lower value 404 that is supported (0 is always supported). 405 406cyc Produces CYC timing packets. 407 408 CYC packets provide even finer grain timestamp information than 409 MTC and TSC packets. A CYC packet contains the number of CPU 410 cycles since the last CYC packet. Unlike MTC and TSC packets, 411 CYC packets are only sent when another packet is also sent. 412 413 Support for this feature is indicated by: 414 415 /sys/bus/event_source/devices/intel_pt/caps/psb_cyc 416 417 which contains "1" if the feature is supported and 418 "0" otherwise. 419 420 The number of CYC packets produced can be reduced by specifying 421 a threshold - see cyc_thresh below. 422 423cyc_thresh Specifies how frequently CYC packets are produced - see cyc 424 above for how to determine if CYC packets are supported. 425 426 Valid cyc_thresh values are given by: 427 428 /sys/bus/event_source/devices/intel_pt/caps/cycle_thresholds 429 430 which contains a hexadecimal value, the bits of which represent 431 valid values e.g. bit 2 set means value 2 is valid. 432 433 The cyc_thresh value represents the minimum number of CPU cycles 434 that must have passed before a CYC packet can be sent. The 435 number of CPU cycles is: 436 437 2 ^ (value - 1) 438 439 e.g. value 4 means 8 CPU cycles must pass before a CYC packet 440 can be sent. Note a CYC packet is still only sent when another 441 packet is sent, not at, e.g. every 8 CPU cycles. 442 443 If an invalid value is entered, the error message 444 will give a list of valid values e.g. 445 446 $ perf record -e intel_pt/cyc,cyc_thresh=15/u uname 447 Invalid cyc_thresh for intel_pt. Valid values are: 0-12 448 449 CYC packets are not requested by default. 450 451pt Specifies pass-through which enables the 'branch' config term. 452 453 The default config selects 'pt' if it is available, so a user will 454 never need to specify this term. 455 456branch Enable branch tracing. Branch tracing is enabled by default so to 457 disable branch tracing use 'branch=0'. 458 459 The default config selects 'branch' if it is available. 460 461ptw Enable PTWRITE packets which are produced when a ptwrite instruction 462 is executed. 463 464 Support for this feature is indicated by: 465 466 /sys/bus/event_source/devices/intel_pt/caps/ptwrite 467 468 which contains "1" if the feature is supported and 469 "0" otherwise. 470 471fup_on_ptw Enable a FUP packet to follow the PTWRITE packet. The FUP packet 472 provides the address of the ptwrite instruction. In the absence of 473 fup_on_ptw, the decoder will use the address of the previous branch 474 if branch tracing is enabled, otherwise the address will be zero. 475 Note that fup_on_ptw will work even when branch tracing is disabled. 476 477pwr_evt Enable power events. The power events provide information about 478 changes to the CPU C-state. 479 480 Support for this feature is indicated by: 481 482 /sys/bus/event_source/devices/intel_pt/caps/power_event_trace 483 484 which contains "1" if the feature is supported and 485 "0" otherwise. 486 487event Enable Event Trace. The events provide information about asynchronous 488 events. 489 490 Support for this feature is indicated by: 491 492 /sys/bus/event_source/devices/intel_pt/caps/event_trace 493 494 which contains "1" if the feature is supported and 495 "0" otherwise. 496 497notnt Disable TNT packets. Without TNT packets, it is not possible to walk 498 executable code to reconstruct control flow, however FUP, TIP, TIP.PGE 499 and TIP.PGD packets still indicate asynchronous control flow, and (if 500 return compression is disabled - see noretcomp) return statements. 501 The advantage of eliminating TNT packets is reducing the size of the 502 trace and corresponding tracing overhead. 503 504 Support for this feature is indicated by: 505 506 /sys/bus/event_source/devices/intel_pt/caps/tnt_disable 507 508 which contains "1" if the feature is supported and 509 "0" otherwise. 510 511 512AUX area sampling option 513~~~~~~~~~~~~~~~~~~~~~~~~ 514 515To select Intel PT "sampling" the AUX area sampling option can be used: 516 517 --aux-sample 518 519Optionally it can be followed by the sample size in bytes e.g. 520 521 --aux-sample=8192 522 523In addition, the Intel PT event to sample must be defined e.g. 524 525 -e intel_pt//u 526 527Samples on other events will be created containing Intel PT data e.g. the 528following will create Intel PT samples on the branch-misses event, note the 529events must be grouped using {}: 530 531 perf record --aux-sample -e '{intel_pt//u,branch-misses:u}' 532 533An alternative to '--aux-sample' is to add the config term 'aux-sample-size' to 534events. In this case, the grouping is implied e.g. 535 536 perf record -e intel_pt//u -e branch-misses/aux-sample-size=8192/u 537 538is the same as: 539 540 perf record -e '{intel_pt//u,branch-misses/aux-sample-size=8192/u}' 541 542but allows for also using an address filter e.g.: 543 544 perf record -e intel_pt//u --filter 'filter * @/bin/ls' -e branch-misses/aux-sample-size=8192/u -- ls 545 546It is important to select a sample size that is big enough to contain at least 547one PSB packet. If not a warning will be displayed: 548 549 Intel PT sample size (%zu) may be too small for PSB period (%zu) 550 551The calculation used for that is: if sample_size <= psb_period + 256 display the 552warning. When sampling is used, psb_period defaults to 0 (2KiB). 553 554The default sample size is 4KiB. 555 556The sample size is passed in aux_sample_size in struct perf_event_attr. The 557sample size is limited by the maximum event size which is 64KiB. It is 558difficult to know how big the event might be without the trace sample attached, 559but the tool validates that the sample size is not greater than 60KiB. 560 561 562new snapshot option 563~~~~~~~~~~~~~~~~~~~ 564 565The difference between full trace and snapshot from the kernel's perspective is 566that in full trace we don't overwrite trace data that the user hasn't collected 567yet (and indicated that by advancing aux_tail), whereas in snapshot mode we let 568the trace run and overwrite older data in the buffer so that whenever something 569interesting happens, we can stop it and grab a snapshot of what was going on 570around that interesting moment. 571 572To select snapshot mode a new option has been added: 573 574 -S 575 576Optionally it can be followed by the snapshot size e.g. 577 578 -S0x100000 579 580The default snapshot size is the auxtrace mmap size. If neither auxtrace mmap size 581nor snapshot size is specified, then the default is 4MiB for privileged users 582(or if /proc/sys/kernel/perf_event_paranoid < 0), 128KiB for unprivileged users. 583If an unprivileged user does not specify mmap pages, the mmap pages will be 584reduced as described in the 'new auxtrace mmap size option' section below. 585 586The snapshot size is displayed if the option -vv is used e.g. 587 588 Intel PT snapshot size: %zu 589 590 591new auxtrace mmap size option 592~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 593 594Intel PT buffer size is specified by an addition to the -m option e.g. 595 596 -m,16 597 598selects a buffer size of 16 pages i.e. 64KiB. 599 600Note that the existing functionality of -m is unchanged. The auxtrace mmap size 601is specified by the optional addition of a comma and the value. 602 603The default auxtrace mmap size for Intel PT is 4MiB/page_size for privileged users 604(or if /proc/sys/kernel/perf_event_paranoid < 0), 128KiB for unprivileged users. 605If an unprivileged user does not specify mmap pages, the mmap pages will be 606reduced from the default 512KiB/page_size to 256KiB/page_size, otherwise the 607user is likely to get an error as they exceed their mlock limit (Max locked 608memory as shown in /proc/self/limits). Note that perf does not count the first 609512KiB (actually /proc/sys/kernel/perf_event_mlock_kb minus 1 page) per cpu 610against the mlock limit so an unprivileged user is allowed 512KiB per cpu plus 611their mlock limit (which defaults to 64KiB but is not multiplied by the number 612of cpus). 613 614In full-trace mode, powers of two are allowed for buffer size, with a minimum 615size of 2 pages. In snapshot mode or sampling mode, it is the same but the 616minimum size is 1 page. 617 618The mmap size and auxtrace mmap size are displayed if the -vv option is used e.g. 619 620 mmap length 528384 621 auxtrace mmap length 4198400 622 623 624Intel PT modes of operation 625~~~~~~~~~~~~~~~~~~~~~~~~~~~ 626 627Intel PT can be used in 3 modes: 628 full-trace mode 629 sample mode 630 snapshot mode 631 632Full-trace mode traces continuously e.g. 633 634 perf record -e intel_pt//u uname 635 636Sample mode attaches a Intel PT sample to other events e.g. 637 638 perf record --aux-sample -e intel_pt//u -e branch-misses:u 639 640Snapshot mode captures the available data when a signal is sent or "snapshot" 641control command is issued. e.g. using a signal 642 643 perf record -v -e intel_pt//u -S ./loopy 1000000000 & 644 [1] 11435 645 kill -USR2 11435 646 Recording AUX area tracing snapshot 647 648Note that the signal sent is SIGUSR2. 649Note that "Recording AUX area tracing snapshot" is displayed because the -v 650option is used. 651 652The advantage of using "snapshot" control command is that the access is 653controlled by access to a FIFO e.g. 654 655 $ mkfifo perf.control 656 $ mkfifo perf.ack 657 $ cat perf.ack & 658 [1] 15235 659 $ sudo ~/bin/perf record --control fifo:perf.control,perf.ack -S -e intel_pt//u -- sleep 60 & 660 [2] 15243 661 $ ps -e | grep perf 662 15244 pts/1 00:00:00 perf 663 $ kill -USR2 15244 664 bash: kill: (15244) - Operation not permitted 665 $ echo snapshot > perf.control 666 ack 667 668The 3 Intel PT modes of operation cannot be used together. 669 670 671Buffer handling 672~~~~~~~~~~~~~~~ 673 674There may be buffer limitations (i.e. single ToPa entry) which means that actual 675buffer sizes are limited to powers of 2 up to 4MiB (MAX_ORDER). In order to 676provide other sizes, and in particular an arbitrarily large size, multiple 677buffers are logically concatenated. However an interrupt must be used to switch 678between buffers. That has two potential problems: 679 a) the interrupt may not be handled in time so that the current buffer 680 becomes full and some trace data is lost. 681 b) the interrupts may slow the system and affect the performance 682 results. 683 684If trace data is lost, the driver sets 'truncated' in the PERF_RECORD_AUX event 685which the tools report as an error. 686 687In full-trace mode, the driver waits for data to be copied out before allowing 688the (logical) buffer to wrap-around. If data is not copied out quickly enough, 689again 'truncated' is set in the PERF_RECORD_AUX event. If the driver has to 690wait, the intel_pt event gets disabled. Because it is difficult to know when 691that happens, perf tools always re-enable the intel_pt event after copying out 692data. 693 694 695Intel PT and build ids 696~~~~~~~~~~~~~~~~~~~~~~ 697 698By default "perf record" post-processes the event stream to find all build ids 699for executables for all addresses sampled. Deliberately, Intel PT is not 700decoded for that purpose (it would take too long). Instead the build ids for 701all executables encountered (due to mmap, comm or task events) are included 702in the perf.data file. 703 704To see buildids included in the perf.data file use the command: 705 706 perf buildid-list 707 708If the perf.data file contains Intel PT data, that is the same as: 709 710 perf buildid-list --with-hits 711 712 713Snapshot mode and event disabling 714~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 715 716In order to make a snapshot, the intel_pt event is disabled using an IOCTL, 717namely PERF_EVENT_IOC_DISABLE. However doing that can also disable the 718collection of side-band information. In order to prevent that, a dummy 719software event has been introduced that permits tracking events (like mmaps) to 720continue to be recorded while intel_pt is disabled. That is important to ensure 721there is complete side-band information to allow the decoding of subsequent 722snapshots. 723 724A test has been created for that. To find the test: 725 726 perf test list 727 ... 728 23: Test using a dummy software event to keep tracking 729 730To run the test: 731 732 perf test 23 733 23: Test using a dummy software event to keep tracking : Ok 734 735 736perf record modes (nothing new here) 737~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 738 739perf record essentially operates in one of three modes: 740 per thread 741 per cpu 742 workload only 743 744"per thread" mode is selected by -t or by --per-thread (with -p or -u or just a 745workload). 746"per cpu" is selected by -C or -a. 747"workload only" mode is selected by not using the other options but providing a 748command to run (i.e. the workload). 749 750In per-thread mode an exact list of threads is traced. There is no inheritance. 751Each thread has its own event buffer. 752 753In per-cpu mode all processes (or processes from the selected cgroup i.e. -G 754option, or processes selected with -p or -u) are traced. Each cpu has its own 755buffer. Inheritance is allowed. 756 757In workload-only mode, the workload is traced but with per-cpu buffers. 758Inheritance is allowed. Note that you can now trace a workload in per-thread 759mode by using the --per-thread option. 760 761 762Privileged vs non-privileged users 763~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 764 765Unless /proc/sys/kernel/perf_event_paranoid is set to -1, unprivileged users 766have memory limits imposed upon them. That affects what buffer sizes they can 767have as outlined above. 768 769The v4.2 kernel introduced support for a context switch metadata event, 770PERF_RECORD_SWITCH, which allows unprivileged users to see when their processes 771are scheduled out and in, just not by whom, which is left for the 772PERF_RECORD_SWITCH_CPU_WIDE, that is only accessible in system wide context, 773which in turn requires CAP_PERFMON or CAP_SYS_ADMIN. 774 775Please see the 45ac1403f564 ("perf: Add PERF_RECORD_SWITCH to indicate context 776switches") commit, that introduces these metadata events for further info. 777 778When working with kernels < v4.2, the following considerations must be taken, 779as the sched:sched_switch tracepoints will be used to receive such information: 780 781Unless /proc/sys/kernel/perf_event_paranoid is set to -1, unprivileged users are 782not permitted to use tracepoints which means there is insufficient side-band 783information to decode Intel PT in per-cpu mode, and potentially workload-only 784mode too if the workload creates new processes. 785 786Note also, that to use tracepoints, read-access to debugfs is required. So if 787debugfs is not mounted or the user does not have read-access, it will again not 788be possible to decode Intel PT in per-cpu mode. 789 790 791sched_switch tracepoint 792~~~~~~~~~~~~~~~~~~~~~~~ 793 794The sched_switch tracepoint is used to provide side-band data for Intel PT 795decoding in kernels where the PERF_RECORD_SWITCH metadata event isn't 796available. 797 798The sched_switch events are automatically added. e.g. the second event shown 799below: 800 801 $ perf record -vv -e intel_pt//u uname 802 ------------------------------------------------------------ 803 perf_event_attr: 804 type 6 805 size 112 806 config 0x400 807 { sample_period, sample_freq } 1 808 sample_type IP|TID|TIME|CPU|IDENTIFIER 809 read_format ID 810 disabled 1 811 inherit 1 812 exclude_kernel 1 813 exclude_hv 1 814 enable_on_exec 1 815 sample_id_all 1 816 ------------------------------------------------------------ 817 sys_perf_event_open: pid 31104 cpu 0 group_fd -1 flags 0x8 818 sys_perf_event_open: pid 31104 cpu 1 group_fd -1 flags 0x8 819 sys_perf_event_open: pid 31104 cpu 2 group_fd -1 flags 0x8 820 sys_perf_event_open: pid 31104 cpu 3 group_fd -1 flags 0x8 821 ------------------------------------------------------------ 822 perf_event_attr: 823 type 2 824 size 112 825 config 0x108 826 { sample_period, sample_freq } 1 827 sample_type IP|TID|TIME|CPU|PERIOD|RAW|IDENTIFIER 828 read_format ID 829 inherit 1 830 sample_id_all 1 831 exclude_guest 1 832 ------------------------------------------------------------ 833 sys_perf_event_open: pid -1 cpu 0 group_fd -1 flags 0x8 834 sys_perf_event_open: pid -1 cpu 1 group_fd -1 flags 0x8 835 sys_perf_event_open: pid -1 cpu 2 group_fd -1 flags 0x8 836 sys_perf_event_open: pid -1 cpu 3 group_fd -1 flags 0x8 837 ------------------------------------------------------------ 838 perf_event_attr: 839 type 1 840 size 112 841 config 0x9 842 { sample_period, sample_freq } 1 843 sample_type IP|TID|TIME|IDENTIFIER 844 read_format ID 845 disabled 1 846 inherit 1 847 exclude_kernel 1 848 exclude_hv 1 849 mmap 1 850 comm 1 851 enable_on_exec 1 852 task 1 853 sample_id_all 1 854 mmap2 1 855 comm_exec 1 856 ------------------------------------------------------------ 857 sys_perf_event_open: pid 31104 cpu 0 group_fd -1 flags 0x8 858 sys_perf_event_open: pid 31104 cpu 1 group_fd -1 flags 0x8 859 sys_perf_event_open: pid 31104 cpu 2 group_fd -1 flags 0x8 860 sys_perf_event_open: pid 31104 cpu 3 group_fd -1 flags 0x8 861 mmap size 528384B 862 AUX area mmap length 4194304 863 perf event ring buffer mmapped per cpu 864 Synthesizing auxtrace information 865 Linux 866 [ perf record: Woken up 1 times to write data ] 867 [ perf record: Captured and wrote 0.042 MB perf.data ] 868 869Note, the sched_switch event is only added if the user is permitted to use it 870and only in per-cpu mode. 871 872Note also, the sched_switch event is only added if TSC packets are requested. 873That is because, in the absence of timing information, the sched_switch events 874cannot be matched against the Intel PT trace. 875 876 877perf script 878----------- 879 880By default, perf script will decode trace data found in the perf.data file. 881This can be further controlled by new option --itrace. 882 883 884New --itrace option 885~~~~~~~~~~~~~~~~~~~ 886 887Having no option is the same as 888 889 --itrace 890 891which, in turn, is the same as 892 893 --itrace=cepwx 894 895The letters are: 896 897 i synthesize "instructions" events 898 b synthesize "branches" events 899 x synthesize "transactions" events 900 w synthesize "ptwrite" events 901 p synthesize "power" events (incl. PSB events) 902 c synthesize branches events (calls only) 903 r synthesize branches events (returns only) 904 o synthesize PEBS-via-PT events 905 I synthesize Event Trace events 906 e synthesize tracing error events 907 d create a debug log 908 g synthesize a call chain (use with i or x) 909 G synthesize a call chain on existing event records 910 l synthesize last branch entries (use with i or x) 911 L synthesize last branch entries on existing event records 912 s skip initial number of events 913 q quicker (less detailed) decoding 914 A approximate IPC 915 Z prefer to ignore timestamps (so-called "timeless" decoding) 916 917"Instructions" events look like they were recorded by "perf record -e 918instructions". 919 920"Branches" events look like they were recorded by "perf record -e branches". "c" 921and "r" can be combined to get calls and returns. 922 923"Transactions" events correspond to the start or end of transactions. The 924'flags' field can be used in perf script to determine whether the event is a 925transaction start, commit or abort. 926 927Note that "instructions", "branches" and "transactions" events depend on code 928flow packets which can be disabled by using the config term "branch=0". Refer 929to the config terms section above. 930 931"ptwrite" events record the payload of the ptwrite instruction and whether 932"fup_on_ptw" was used. "ptwrite" events depend on PTWRITE packets which are 933recorded only if the "ptw" config term was used. Refer to the config terms 934section above. perf script "synth" field displays "ptwrite" information like 935this: "ip: 0 payload: 0x123456789abcdef0" where "ip" is 1 if "fup_on_ptw" was 936used. 937 938"Power" events correspond to power event packets and CBR (core-to-bus ratio) 939packets. While CBR packets are always recorded when tracing is enabled, power 940event packets are recorded only if the "pwr_evt" config term was used. Refer to 941the config terms section above. The power events record information about 942C-state changes, whereas CBR is indicative of CPU frequency. perf script 943"event,synth" fields display information like this: 944 cbr: cbr: 22 freq: 2189 MHz (200%) 945 mwait: hints: 0x60 extensions: 0x1 946 pwre: hw: 0 cstate: 2 sub-cstate: 0 947 exstop: ip: 1 948 pwrx: deepest cstate: 2 last cstate: 2 wake reason: 0x4 949Where: 950 "cbr" includes the frequency and the percentage of maximum non-turbo 951 "mwait" shows mwait hints and extensions 952 "pwre" shows C-state transitions (to a C-state deeper than C0) and 953 whether initiated by hardware 954 "exstop" indicates execution stopped and whether the IP was recorded 955 exactly, 956 "pwrx" indicates return to C0 957For more details refer to the Intel 64 and IA-32 Architectures Software 958Developer Manuals. 959 960PSB events show when a PSB+ occurred and also the byte-offset in the trace. 961Emitting a PSB+ can cause a CPU a slight delay. When doing timing analysis 962of code with Intel PT, it is useful to know if a timing bubble was caused 963by Intel PT or not. 964 965Error events show where the decoder lost the trace. Error events 966are quite important. Users must know if what they are seeing is a complete 967picture or not. The "e" option may be followed by flags which affect what errors 968will or will not be reported. Each flag must be preceded by either '+' or '-'. 969The flags supported by Intel PT are: 970 -o Suppress overflow errors 971 -l Suppress trace data lost errors 972For example, for errors but not overflow or data lost errors: 973 974 --itrace=e-o-l 975 976The "d" option will cause the creation of a file "intel_pt.log" containing all 977decoded packets and instructions. Note that this option slows down the decoder 978and that the resulting file may be very large. The "d" option may be followed 979by flags which affect what debug messages will or will not be logged. Each flag 980must be preceded by either '+' or '-'. The flags support by Intel PT are: 981 -a Suppress logging of perf events 982 +a Log all perf events 983 +o Output to stdout instead of "intel_pt.log" 984By default, logged perf events are filtered by any specified time ranges, but 985flag +a overrides that. 986 987In addition, the period of the "instructions" event can be specified. e.g. 988 989 --itrace=i10us 990 991sets the period to 10us i.e. one instruction sample is synthesized for each 10 992microseconds of trace. Alternatives to "us" are "ms" (milliseconds), 993"ns" (nanoseconds), "t" (TSC ticks) or "i" (instructions). 994 995"ms", "us" and "ns" are converted to TSC ticks. 996 997The timing information included with Intel PT does not give the time of every 998instruction. Consequently, for the purpose of sampling, the decoder estimates 999the time since the last timing packet based on 1 tick per instruction. The time 1000on the sample is *not* adjusted and reflects the last known value of TSC. 1001 1002For Intel PT, the default period is 100us. 1003 1004Setting it to a zero period means "as often as possible". 1005 1006In the case of Intel PT that is the same as a period of 1 and a unit of 1007'instructions' (i.e. --itrace=i1i). 1008 1009Also the call chain size (default 16, max. 1024) for instructions or 1010transactions events can be specified. e.g. 1011 1012 --itrace=ig32 1013 --itrace=xg32 1014 1015Also the number of last branch entries (default 64, max. 1024) for instructions or 1016transactions events can be specified. e.g. 1017 1018 --itrace=il10 1019 --itrace=xl10 1020 1021Note that last branch entries are cleared for each sample, so there is no overlap 1022from one sample to the next. 1023 1024The G and L options are designed in particular for sample mode, and work much 1025like g and l but add call chain and branch stack to the other selected events 1026instead of synthesized events. For example, to record branch-misses events for 1027'ls' and then add a call chain derived from the Intel PT trace: 1028 1029 perf record --aux-sample -e '{intel_pt//u,branch-misses:u}' -- ls 1030 perf report --itrace=Ge 1031 1032Although in fact G is a default for perf report, so that is the same as just: 1033 1034 perf report 1035 1036One caveat with the G and L options is that they work poorly with "Large PEBS". 1037Large PEBS means PEBS records will be accumulated by hardware and the written 1038into the event buffer in one go. That reduces interrupts, but can give very 1039late timestamps. Because the Intel PT trace is synchronized by timestamps, 1040the PEBS events do not match the trace. Currently, Large PEBS is used only in 1041certain circumstances: 1042 - hardware supports it 1043 - PEBS is used 1044 - event period is specified, instead of frequency 1045 - the sample type is limited to the following flags: 1046 PERF_SAMPLE_IP | PERF_SAMPLE_TID | PERF_SAMPLE_ADDR | 1047 PERF_SAMPLE_ID | PERF_SAMPLE_CPU | PERF_SAMPLE_STREAM_ID | 1048 PERF_SAMPLE_DATA_SRC | PERF_SAMPLE_IDENTIFIER | 1049 PERF_SAMPLE_TRANSACTION | PERF_SAMPLE_PHYS_ADDR | 1050 PERF_SAMPLE_REGS_INTR | PERF_SAMPLE_REGS_USER | 1051 PERF_SAMPLE_PERIOD (and sometimes) | PERF_SAMPLE_TIME 1052Because Intel PT sample mode uses a different sample type to the list above, 1053Large PEBS is not used with Intel PT sample mode. To avoid Large PEBS in other 1054cases, avoid specifying the event period i.e. avoid the 'perf record' -c option, 1055--count option, or 'period' config term. 1056 1057To disable trace decoding entirely, use the option --no-itrace. 1058 1059It is also possible to skip events generated (instructions, branches, transactions) 1060at the beginning. This is useful to ignore initialization code. 1061 1062 --itrace=i0nss1000000 1063 1064skips the first million instructions. 1065 1066The q option changes the way the trace is decoded. The decoding is much faster 1067but much less detailed. Specifically, with the q option, the decoder does not 1068decode TNT packets, and does not walk object code, but gets the ip from FUP and 1069TIP packets. The q option can be used with the b and i options but the period 1070is not used. The q option decodes more quickly, but is useful only if the 1071control flow of interest is represented or indicated by FUP, TIP, TIP.PGE, or 1072TIP.PGD packets (refer below). However the q option could be used to find time 1073ranges that could then be decoded fully using the --time option. 1074 1075What will *not* be decoded with the (single) q option: 1076 1077 - direct calls and jmps 1078 - conditional branches 1079 - non-branch instructions 1080 1081What *will* be decoded with the (single) q option: 1082 1083 - asynchronous branches such as interrupts 1084 - indirect branches 1085 - function return target address *if* the noretcomp config term (refer 1086 config terms section) was used 1087 - start of (control-flow) tracing 1088 - end of (control-flow) tracing, if it is not out of context 1089 - power events, ptwrite, transaction start and abort 1090 - instruction pointer associated with PSB packets 1091 1092Note the q option does not specify what events will be synthesized e.g. the p 1093option must be used also to show power events. 1094 1095Repeating the q option (double-q i.e. qq) results in even faster decoding and even 1096less detail. The decoder decodes only extended PSB (PSB+) packets, getting the 1097instruction pointer if there is a FUP packet within PSB+ (i.e. between PSB and 1098PSBEND). Note PSB packets occur regularly in the trace based on the psb_period 1099config term (refer config terms section). There will be a FUP packet if the 1100PSB+ occurs while control flow is being traced. 1101 1102What will *not* be decoded with the qq option: 1103 1104 - everything except instruction pointer associated with PSB packets 1105 1106What *will* be decoded with the qq option: 1107 1108 - instruction pointer associated with PSB packets 1109 1110The Z option is equivalent to having recorded a trace without TSC 1111(i.e. config term tsc=0). It can be useful to avoid timestamp issues when 1112decoding a trace of a virtual machine. 1113 1114 1115dlfilter-show-cycles.so 1116~~~~~~~~~~~~~~~~~~~~~~~ 1117 1118Cycles can be displayed using dlfilter-show-cycles.so in which case the itrace A 1119option can be useful to provide higher granularity cycle information: 1120 1121 perf script --itrace=A --call-trace --dlfilter dlfilter-show-cycles.so 1122 1123To see a list of dlfilters: 1124 1125 perf script -v --list-dlfilters 1126 1127See also linkperf:perf-dlfilters[1] 1128 1129 1130dump option 1131~~~~~~~~~~~ 1132 1133perf script has an option (-D) to "dump" the events i.e. display the binary 1134data. 1135 1136When -D is used, Intel PT packets are displayed. The packet decoder does not 1137pay attention to PSB packets, but just decodes the bytes - so the packets seen 1138by the actual decoder may not be identical in places where the data is corrupt. 1139One example of that would be when the buffer-switching interrupt has been too 1140slow, and the buffer has been filled completely. In that case, the last packet 1141in the buffer might be truncated and immediately followed by a PSB as the trace 1142continues in the next buffer. 1143 1144To disable the display of Intel PT packets, combine the -D option with 1145--no-itrace. 1146 1147 1148perf report 1149----------- 1150 1151By default, perf report will decode trace data found in the perf.data file. 1152This can be further controlled by new option --itrace exactly the same as 1153perf script, with the exception that the default is --itrace=igxe. 1154 1155 1156perf inject 1157----------- 1158 1159perf inject also accepts the --itrace option in which case tracing data is 1160removed and replaced with the synthesized events. e.g. 1161 1162 perf inject --itrace -i perf.data -o perf.data.new 1163 1164Below is an example of using Intel PT with autofdo. It requires autofdo 1165(https://github.com/google/autofdo) and gcc version 5. The bubble 1166sort example is from the AutoFDO tutorial (https://gcc.gnu.org/wiki/AutoFDO/Tutorial) 1167amended to take the number of elements as a parameter. 1168 1169 $ gcc-5 -O3 sort.c -o sort_optimized 1170 $ ./sort_optimized 30000 1171 Bubble sorting array of 30000 elements 1172 2254 ms 1173 1174 $ cat ~/.perfconfig 1175 [intel-pt] 1176 mispred-all = on 1177 1178 $ perf record -e intel_pt//u ./sort 3000 1179 Bubble sorting array of 3000 elements 1180 58 ms 1181 [ perf record: Woken up 2 times to write data ] 1182 [ perf record: Captured and wrote 3.939 MB perf.data ] 1183 $ perf inject -i perf.data -o inj --itrace=i100usle --strip 1184 $ ./create_gcov --binary=./sort --profile=inj --gcov=sort.gcov -gcov_version=1 1185 $ gcc-5 -O3 -fauto-profile=sort.gcov sort.c -o sort_autofdo 1186 $ ./sort_autofdo 30000 1187 Bubble sorting array of 30000 elements 1188 2155 ms 1189 1190Note there is currently no advantage to using Intel PT instead of LBR, but 1191that may change in the future if greater use is made of the data. 1192 1193 1194PEBS via Intel PT 1195----------------- 1196 1197Some hardware has the feature to redirect PEBS records to the Intel PT trace. 1198Recording is selected by using the aux-output config term e.g. 1199 1200 perf record -c 10000 -e '{intel_pt/branch=0/,cycles/aux-output/ppp}' uname 1201 1202Originally, software only supported redirecting at most one PEBS event because it 1203was not able to differentiate one event from another. To overcome that, more recent 1204kernels and perf tools add support for the PERF_RECORD_AUX_OUTPUT_HW_ID side-band event. 1205To check for the presence of that event in a PEBS-via-PT trace: 1206 1207 perf script -D --no-itrace | grep PERF_RECORD_AUX_OUTPUT_HW_ID 1208 1209To display PEBS events from the Intel PT trace, use the itrace 'o' option e.g. 1210 1211 perf script --itrace=oe 1212 1213XED 1214--- 1215 1216include::build-xed.txt[] 1217 1218 1219Tracing Virtual Machines 1220------------------------ 1221 1222Currently, only kernel tracing is supported and only with either "timeless" decoding 1223(i.e. no TSC timestamps) or VM Time Correlation. VM Time Correlation is an extra step 1224using 'perf inject' and requires unchanging VMX TSC Offset and no VMX TSC Scaling. 1225 1226Other limitations and caveats 1227 1228 VMX controls may suppress packets needed for decoding resulting in decoding errors 1229 VMX controls may block the perf NMI to the host potentially resulting in lost trace data 1230 Guest kernel self-modifying code (e.g. jump labels or JIT-compiled eBPF) will result in decoding errors 1231 Guest thread information is unknown 1232 Guest VCPU is unknown but may be able to be inferred from the host thread 1233 Callchains are not supported 1234 1235Example using "timeless" decoding 1236 1237Start VM 1238 1239 $ sudo virsh start kubuntu20.04 1240 Domain kubuntu20.04 started 1241 1242Mount the guest file system. Note sshfs needs -o direct_io to enable reading of proc files. root access is needed to read /proc/kcore. 1243 1244 $ mkdir vm0 1245 $ sshfs -o direct_io root@vm0:/ vm0 1246 1247Copy the guest /proc/kallsyms, /proc/modules and /proc/kcore 1248 1249 $ perf buildid-cache -v --kcore vm0/proc/kcore 1250 kcore added to build-id cache directory /home/user/.debug/[kernel.kcore]/9600f316a53a0f54278885e8d9710538ec5f6a08/2021021807494306 1251 $ KALLSYMS=/home/user/.debug/[kernel.kcore]/9600f316a53a0f54278885e8d9710538ec5f6a08/2021021807494306/kallsyms 1252 1253Find the VM process 1254 1255 $ ps -eLl | grep 'KVM\|PID' 1256 F S UID PID PPID LWP C PRI NI ADDR SZ WCHAN TTY TIME CMD 1257 3 S 64055 1430 1 1440 1 80 0 - 1921718 - ? 00:02:47 CPU 0/KVM 1258 3 S 64055 1430 1 1441 1 80 0 - 1921718 - ? 00:02:41 CPU 1/KVM 1259 3 S 64055 1430 1 1442 1 80 0 - 1921718 - ? 00:02:38 CPU 2/KVM 1260 3 S 64055 1430 1 1443 2 80 0 - 1921718 - ? 00:03:18 CPU 3/KVM 1261 1262Start an open-ended perf record, tracing the VM process, do something on the VM, and then ctrl-C to stop. 1263TSC is not supported and tsc=0 must be specified. That means mtc is useless, so add mtc=0. 1264However, IPC can still be determined, hence cyc=1 can be added. 1265Only kernel decoding is supported, so 'k' must be specified. 1266Intel PT traces both the host and the guest so --guest and --host need to be specified. 1267Without timestamps, --per-thread must be specified to distinguish threads. 1268 1269 $ sudo perf kvm --guest --host --guestkallsyms $KALLSYMS record --kcore -e intel_pt/tsc=0,mtc=0,cyc=1/k -p 1430 --per-thread 1270 ^C 1271 [ perf record: Woken up 1 times to write data ] 1272 [ perf record: Captured and wrote 5.829 MB ] 1273 1274perf script can be used to provide an instruction trace 1275 1276 $ perf script --guestkallsyms $KALLSYMS --insn-trace --xed -F+ipc | grep -C10 vmresume | head -21 1277 CPU 0/KVM 1440 ffffffff82133cdd __vmx_vcpu_run+0x3d ([kernel.kallsyms]) movq 0x48(%rax), %r9 1278 CPU 0/KVM 1440 ffffffff82133ce1 __vmx_vcpu_run+0x41 ([kernel.kallsyms]) movq 0x50(%rax), %r10 1279 CPU 0/KVM 1440 ffffffff82133ce5 __vmx_vcpu_run+0x45 ([kernel.kallsyms]) movq 0x58(%rax), %r11 1280 CPU 0/KVM 1440 ffffffff82133ce9 __vmx_vcpu_run+0x49 ([kernel.kallsyms]) movq 0x60(%rax), %r12 1281 CPU 0/KVM 1440 ffffffff82133ced __vmx_vcpu_run+0x4d ([kernel.kallsyms]) movq 0x68(%rax), %r13 1282 CPU 0/KVM 1440 ffffffff82133cf1 __vmx_vcpu_run+0x51 ([kernel.kallsyms]) movq 0x70(%rax), %r14 1283 CPU 0/KVM 1440 ffffffff82133cf5 __vmx_vcpu_run+0x55 ([kernel.kallsyms]) movq 0x78(%rax), %r15 1284 CPU 0/KVM 1440 ffffffff82133cf9 __vmx_vcpu_run+0x59 ([kernel.kallsyms]) movq (%rax), %rax 1285 CPU 0/KVM 1440 ffffffff82133cfc __vmx_vcpu_run+0x5c ([kernel.kallsyms]) callq 0xffffffff82133c40 1286 CPU 0/KVM 1440 ffffffff82133c40 vmx_vmenter+0x0 ([kernel.kallsyms]) jz 0xffffffff82133c46 1287 CPU 0/KVM 1440 ffffffff82133c42 vmx_vmenter+0x2 ([kernel.kallsyms]) vmresume IPC: 0.11 (50/445) 1288 :1440 1440 ffffffffbb678b06 native_write_msr+0x6 ([guest.kernel.kallsyms]) nopl %eax, (%rax,%rax,1) 1289 :1440 1440 ffffffffbb678b0b native_write_msr+0xb ([guest.kernel.kallsyms]) retq IPC: 0.04 (2/41) 1290 :1440 1440 ffffffffbb666646 lapic_next_deadline+0x26 ([guest.kernel.kallsyms]) data16 nop 1291 :1440 1440 ffffffffbb666648 lapic_next_deadline+0x28 ([guest.kernel.kallsyms]) xor %eax, %eax 1292 :1440 1440 ffffffffbb66664a lapic_next_deadline+0x2a ([guest.kernel.kallsyms]) popq %rbp 1293 :1440 1440 ffffffffbb66664b lapic_next_deadline+0x2b ([guest.kernel.kallsyms]) retq IPC: 0.16 (4/25) 1294 :1440 1440 ffffffffbb74607f clockevents_program_event+0x8f ([guest.kernel.kallsyms]) test %eax, %eax 1295 :1440 1440 ffffffffbb746081 clockevents_program_event+0x91 ([guest.kernel.kallsyms]) jz 0xffffffffbb74603c IPC: 0.06 (2/30) 1296 :1440 1440 ffffffffbb74603c clockevents_program_event+0x4c ([guest.kernel.kallsyms]) popq %rbx 1297 :1440 1440 ffffffffbb74603d clockevents_program_event+0x4d ([guest.kernel.kallsyms]) popq %r12 1298 1299Example using VM Time Correlation 1300 1301Start VM 1302 1303 $ sudo virsh start kubuntu20.04 1304 Domain kubuntu20.04 started 1305 1306Mount the guest file system. Note sshfs needs -o direct_io to enable reading of proc files. root access is needed to read /proc/kcore. 1307 1308 $ mkdir -p vm0 1309 $ sshfs -o direct_io root@vm0:/ vm0 1310 1311Copy the guest /proc/kallsyms, /proc/modules and /proc/kcore 1312 1313 $ perf buildid-cache -v --kcore vm0/proc/kcore 1314 same kcore found in /home/user/.debug/[kernel.kcore]/cc9c55a98c5e4ec0aeda69302554aabed5cd6491/2021021312450777 1315 $ KALLSYMS=/home/user/.debug/\[kernel.kcore\]/cc9c55a98c5e4ec0aeda69302554aabed5cd6491/2021021312450777/kallsyms 1316 1317Find the VM process 1318 1319 $ ps -eLl | grep 'KVM\|PID' 1320 F S UID PID PPID LWP C PRI NI ADDR SZ WCHAN TTY TIME CMD 1321 3 S 64055 16998 1 17005 13 80 0 - 1818189 - ? 00:00:16 CPU 0/KVM 1322 3 S 64055 16998 1 17006 4 80 0 - 1818189 - ? 00:00:05 CPU 1/KVM 1323 3 S 64055 16998 1 17007 3 80 0 - 1818189 - ? 00:00:04 CPU 2/KVM 1324 3 S 64055 16998 1 17008 4 80 0 - 1818189 - ? 00:00:05 CPU 3/KVM 1325 1326Start an open-ended perf record, tracing the VM process, do something on the VM, and then ctrl-C to stop. 1327IPC can be determined, hence cyc=1 can be added. 1328Only kernel decoding is supported, so 'k' must be specified. 1329Intel PT traces both the host and the guest so --guest and --host need to be specified. 1330 1331 $ sudo perf kvm --guest --host --guestkallsyms $KALLSYMS record --kcore -e intel_pt/cyc=1/k -p 16998 1332 ^C[ perf record: Woken up 1 times to write data ] 1333 [ perf record: Captured and wrote 9.041 MB perf.data.kvm ] 1334 1335Now 'perf inject' can be used to determine the VMX TCS Offset. Note, Intel PT TSC packets are 1336only 7-bytes, so the TSC Offset might differ from the actual value in the 8th byte. That will 1337have no effect i.e. the resulting timestamps will be correct anyway. 1338 1339 $ perf inject -i perf.data.kvm --vm-time-correlation=dry-run 1340 ERROR: Unknown TSC Offset for VMCS 0x1bff6a 1341 VMCS: 0x1bff6a TSC Offset 0xffffe42722c64c41 1342 ERROR: Unknown TSC Offset for VMCS 0x1cbc08 1343 VMCS: 0x1cbc08 TSC Offset 0xffffe42722c64c41 1344 ERROR: Unknown TSC Offset for VMCS 0x1c3ce8 1345 VMCS: 0x1c3ce8 TSC Offset 0xffffe42722c64c41 1346 ERROR: Unknown TSC Offset for VMCS 0x1cbce9 1347 VMCS: 0x1cbce9 TSC Offset 0xffffe42722c64c41 1348 1349Each virtual CPU has a different Virtual Machine Control Structure (VMCS) 1350shown above with the calculated TSC Offset. For an unchanging TSC Offset 1351they should all be the same for the same virtual machine. 1352 1353Now that the TSC Offset is known, it can be provided to 'perf inject' 1354 1355 $ perf inject -i perf.data.kvm --vm-time-correlation="dry-run 0xffffe42722c64c41" 1356 1357Note the options for 'perf inject' --vm-time-correlation are: 1358 1359 [ dry-run ] [ <TSC Offset> [ : <VMCS> [ , <VMCS> ]... ] ]... 1360 1361So it is possible to specify different TSC Offsets for different VMCS. 1362The option "dry-run" will cause the file to be processed but without updating it. 1363Note it is also possible to get a intel_pt.log file by adding option --itrace=d 1364 1365There were no errors so, do it for real 1366 1367 $ perf inject -i perf.data.kvm --vm-time-correlation=0xffffe42722c64c41 --force 1368 1369'perf script' can be used to see if there are any decoder errors 1370 1371 $ perf script -i perf.data.kvm --guestkallsyms $KALLSYMS --itrace=e-o 1372 1373There were none. 1374 1375'perf script' can be used to provide an instruction trace showing timestamps 1376 1377 $ perf script -i perf.data.kvm --guestkallsyms $KALLSYMS --insn-trace --xed -F+ipc | grep -C10 vmresume | head -21 1378 CPU 1/KVM 17006 [001] 11500.262865593: ffffffff82133cdd __vmx_vcpu_run+0x3d ([kernel.kallsyms]) movq 0x48(%rax), %r9 1379 CPU 1/KVM 17006 [001] 11500.262865593: ffffffff82133ce1 __vmx_vcpu_run+0x41 ([kernel.kallsyms]) movq 0x50(%rax), %r10 1380 CPU 1/KVM 17006 [001] 11500.262865593: ffffffff82133ce5 __vmx_vcpu_run+0x45 ([kernel.kallsyms]) movq 0x58(%rax), %r11 1381 CPU 1/KVM 17006 [001] 11500.262865593: ffffffff82133ce9 __vmx_vcpu_run+0x49 ([kernel.kallsyms]) movq 0x60(%rax), %r12 1382 CPU 1/KVM 17006 [001] 11500.262865593: ffffffff82133ced __vmx_vcpu_run+0x4d ([kernel.kallsyms]) movq 0x68(%rax), %r13 1383 CPU 1/KVM 17006 [001] 11500.262865593: ffffffff82133cf1 __vmx_vcpu_run+0x51 ([kernel.kallsyms]) movq 0x70(%rax), %r14 1384 CPU 1/KVM 17006 [001] 11500.262865593: ffffffff82133cf5 __vmx_vcpu_run+0x55 ([kernel.kallsyms]) movq 0x78(%rax), %r15 1385 CPU 1/KVM 17006 [001] 11500.262865593: ffffffff82133cf9 __vmx_vcpu_run+0x59 ([kernel.kallsyms]) movq (%rax), %rax 1386 CPU 1/KVM 17006 [001] 11500.262865593: ffffffff82133cfc __vmx_vcpu_run+0x5c ([kernel.kallsyms]) callq 0xffffffff82133c40 1387 CPU 1/KVM 17006 [001] 11500.262865593: ffffffff82133c40 vmx_vmenter+0x0 ([kernel.kallsyms]) jz 0xffffffff82133c46 1388 CPU 1/KVM 17006 [001] 11500.262866075: ffffffff82133c42 vmx_vmenter+0x2 ([kernel.kallsyms]) vmresume IPC: 0.05 (40/769) 1389 :17006 17006 [001] 11500.262869216: ffffffff82200cb0 asm_sysvec_apic_timer_interrupt+0x0 ([guest.kernel.kallsyms]) clac 1390 :17006 17006 [001] 11500.262869216: ffffffff82200cb3 asm_sysvec_apic_timer_interrupt+0x3 ([guest.kernel.kallsyms]) pushq $0xffffffffffffffff 1391 :17006 17006 [001] 11500.262869216: ffffffff82200cb5 asm_sysvec_apic_timer_interrupt+0x5 ([guest.kernel.kallsyms]) callq 0xffffffff82201160 1392 :17006 17006 [001] 11500.262869216: ffffffff82201160 error_entry+0x0 ([guest.kernel.kallsyms]) cld 1393 :17006 17006 [001] 11500.262869216: ffffffff82201161 error_entry+0x1 ([guest.kernel.kallsyms]) pushq %rsi 1394 :17006 17006 [001] 11500.262869216: ffffffff82201162 error_entry+0x2 ([guest.kernel.kallsyms]) movq 0x8(%rsp), %rsi 1395 :17006 17006 [001] 11500.262869216: ffffffff82201167 error_entry+0x7 ([guest.kernel.kallsyms]) movq %rdi, 0x8(%rsp) 1396 :17006 17006 [001] 11500.262869216: ffffffff8220116c error_entry+0xc ([guest.kernel.kallsyms]) pushq %rdx 1397 :17006 17006 [001] 11500.262869216: ffffffff8220116d error_entry+0xd ([guest.kernel.kallsyms]) pushq %rcx 1398 :17006 17006 [001] 11500.262869216: ffffffff8220116e error_entry+0xe ([guest.kernel.kallsyms]) pushq %rax 1399 1400 1401Event Trace 1402----------- 1403 1404Event Trace records information about asynchronous events, for example interrupts, 1405faults, VM exits and entries. The information is recorded in CFE and EVD packets, 1406and also the Interrupt Flag is recorded on the MODE.Exec packet. The CFE packet 1407contains a type field to identify one of the following: 1408 1409 1 INTR interrupt, fault, exception, NMI 1410 2 IRET interrupt return 1411 3 SMI system management interrupt 1412 4 RSM resume from system management mode 1413 5 SIPI startup interprocessor interrupt 1414 6 INIT INIT signal 1415 7 VMENTRY VM-Entry 1416 8 VMEXIT VM-Entry 1417 9 VMEXIT_INTR VM-Exit due to interrupt 1418 10 SHUTDOWN Shutdown 1419 1420For more details, refer to the Intel 64 and IA-32 Architectures Software 1421Developer Manuals (version 076 or later). 1422 1423The capability to do Event Trace is indicated by the 1424/sys/bus/event_source/devices/intel_pt/caps/event_trace file. 1425 1426Event trace is selected for recording using the "event" config term. e.g. 1427 1428 perf record -e intel_pt/event/u uname 1429 1430Event trace events are output using the --itrace I option. e.g. 1431 1432 perf script --itrace=Ie 1433 1434perf script displays events containing CFE type, vector and event data, 1435in the form: 1436 1437 evt: hw int (t) cfe: INTR IP: 1 vector: 3 PFA: 0x8877665544332211 1438 1439The IP flag indicates if the event binds to an IP, which includes any case where 1440flow control packet generation is enabled, as well as when CFE packet IP bit is 1441set. 1442 1443perf script displays events containing changes to the Interrupt Flag in the form: 1444 1445 iflag: t IFLAG: 1->0 via branch 1446 1447where "via branch" indicates a branch (interrupt or return from interrupt) and 1448"non branch" indicates an instruction such as CFI, STI or POPF). 1449 1450In addition, the current state of the interrupt flag is indicated by the presence 1451or absence of the "D" (interrupt disabled) perf script flag. If the interrupt 1452flag is changed, then the "t" flag is also included i.e. 1453 1454 no flag, interrupts enabled IF=1 1455 t interrupts become disabled IF=1 -> IF=0 1456 D interrupts are disabled IF=0 1457 Dt interrupts become enabled IF=0 -> IF=1 1458 1459The intel-pt-events.py script illustrates how to access Event Trace information 1460using a Python script. 1461 1462 1463TNT Disable 1464----------- 1465 1466TNT packets are disabled using the "notnt" config term. e.g. 1467 1468 perf record -e intel_pt/notnt/u uname 1469 1470In that case the --itrace q option is forced because walking executable code 1471to reconstruct the control flow is not possible. 1472 1473 1474 1475SEE ALSO 1476-------- 1477 1478linkperf:perf-record[1], linkperf:perf-script[1], linkperf:perf-report[1], 1479linkperf:perf-inject[1] 1480