1271661c1SWilly Tarreau /* SPDX-License-Identifier: LGPL-2.1 OR MIT */
2271661c1SWilly Tarreau /*
3271661c1SWilly Tarreau * RISCV (32 and 64) specific definitions for NOLIBC
4271661c1SWilly Tarreau * Copyright (C) 2017-2022 Willy Tarreau <w@1wt.eu>
5271661c1SWilly Tarreau */
6271661c1SWilly Tarreau
7271661c1SWilly Tarreau #ifndef _NOLIBC_ARCH_RISCV_H
8271661c1SWilly Tarreau #define _NOLIBC_ARCH_RISCV_H
9271661c1SWilly Tarreau
10818924d1SThomas Weißschuh #include "compiler.h"
11*eea70cdaSZhangjin Wu #include "crt.h"
12271661c1SWilly Tarreau
13271661c1SWilly Tarreau /* Syscalls for RISCV :
14271661c1SWilly Tarreau * - stack is 16-byte aligned
15271661c1SWilly Tarreau * - syscall number is passed in a7
16271661c1SWilly Tarreau * - arguments are in a0, a1, a2, a3, a4, a5
17271661c1SWilly Tarreau * - the system call is performed by calling ecall
18271661c1SWilly Tarreau * - syscall return comes in a0
19271661c1SWilly Tarreau * - the arguments are cast to long and assigned into the target
20271661c1SWilly Tarreau * registers which are then simply passed as registers to the asm code,
21271661c1SWilly Tarreau * so that we don't have to experience issues with register constraints.
22271661c1SWilly Tarreau *
23271661c1SWilly Tarreau * On riscv, select() is not implemented so we have to use pselect6().
24271661c1SWilly Tarreau */
25271661c1SWilly Tarreau #define __ARCH_WANT_SYS_PSELECT6
26271661c1SWilly Tarreau
27271661c1SWilly Tarreau #define my_syscall0(num) \
28271661c1SWilly Tarreau ({ \
2937d62758SAmmar Faizi register long _num __asm__ ("a7") = (num); \
3037d62758SAmmar Faizi register long _arg1 __asm__ ("a0"); \
31271661c1SWilly Tarreau \
3237d62758SAmmar Faizi __asm__ volatile ( \
33271661c1SWilly Tarreau "ecall\n\t" \
34271661c1SWilly Tarreau : "=r"(_arg1) \
35271661c1SWilly Tarreau : "r"(_num) \
36271661c1SWilly Tarreau : "memory", "cc" \
37271661c1SWilly Tarreau ); \
38271661c1SWilly Tarreau _arg1; \
39271661c1SWilly Tarreau })
40271661c1SWilly Tarreau
41271661c1SWilly Tarreau #define my_syscall1(num, arg1) \
42271661c1SWilly Tarreau ({ \
4337d62758SAmmar Faizi register long _num __asm__ ("a7") = (num); \
4437d62758SAmmar Faizi register long _arg1 __asm__ ("a0") = (long)(arg1); \
45271661c1SWilly Tarreau \
4637d62758SAmmar Faizi __asm__ volatile ( \
47271661c1SWilly Tarreau "ecall\n" \
48271661c1SWilly Tarreau : "+r"(_arg1) \
49271661c1SWilly Tarreau : "r"(_num) \
50271661c1SWilly Tarreau : "memory", "cc" \
51271661c1SWilly Tarreau ); \
52271661c1SWilly Tarreau _arg1; \
53271661c1SWilly Tarreau })
54271661c1SWilly Tarreau
55271661c1SWilly Tarreau #define my_syscall2(num, arg1, arg2) \
56271661c1SWilly Tarreau ({ \
5737d62758SAmmar Faizi register long _num __asm__ ("a7") = (num); \
5837d62758SAmmar Faizi register long _arg1 __asm__ ("a0") = (long)(arg1); \
5937d62758SAmmar Faizi register long _arg2 __asm__ ("a1") = (long)(arg2); \
60271661c1SWilly Tarreau \
6137d62758SAmmar Faizi __asm__ volatile ( \
62271661c1SWilly Tarreau "ecall\n" \
63271661c1SWilly Tarreau : "+r"(_arg1) \
64271661c1SWilly Tarreau : "r"(_arg2), \
65271661c1SWilly Tarreau "r"(_num) \
66271661c1SWilly Tarreau : "memory", "cc" \
67271661c1SWilly Tarreau ); \
68271661c1SWilly Tarreau _arg1; \
69271661c1SWilly Tarreau })
70271661c1SWilly Tarreau
71271661c1SWilly Tarreau #define my_syscall3(num, arg1, arg2, arg3) \
72271661c1SWilly Tarreau ({ \
7337d62758SAmmar Faizi register long _num __asm__ ("a7") = (num); \
7437d62758SAmmar Faizi register long _arg1 __asm__ ("a0") = (long)(arg1); \
7537d62758SAmmar Faizi register long _arg2 __asm__ ("a1") = (long)(arg2); \
7637d62758SAmmar Faizi register long _arg3 __asm__ ("a2") = (long)(arg3); \
77271661c1SWilly Tarreau \
7837d62758SAmmar Faizi __asm__ volatile ( \
79271661c1SWilly Tarreau "ecall\n\t" \
80271661c1SWilly Tarreau : "+r"(_arg1) \
81271661c1SWilly Tarreau : "r"(_arg2), "r"(_arg3), \
82271661c1SWilly Tarreau "r"(_num) \
83271661c1SWilly Tarreau : "memory", "cc" \
84271661c1SWilly Tarreau ); \
85271661c1SWilly Tarreau _arg1; \
86271661c1SWilly Tarreau })
87271661c1SWilly Tarreau
88271661c1SWilly Tarreau #define my_syscall4(num, arg1, arg2, arg3, arg4) \
89271661c1SWilly Tarreau ({ \
9037d62758SAmmar Faizi register long _num __asm__ ("a7") = (num); \
9137d62758SAmmar Faizi register long _arg1 __asm__ ("a0") = (long)(arg1); \
9237d62758SAmmar Faizi register long _arg2 __asm__ ("a1") = (long)(arg2); \
9337d62758SAmmar Faizi register long _arg3 __asm__ ("a2") = (long)(arg3); \
9437d62758SAmmar Faizi register long _arg4 __asm__ ("a3") = (long)(arg4); \
95271661c1SWilly Tarreau \
9637d62758SAmmar Faizi __asm__ volatile ( \
97271661c1SWilly Tarreau "ecall\n" \
98271661c1SWilly Tarreau : "+r"(_arg1) \
99271661c1SWilly Tarreau : "r"(_arg2), "r"(_arg3), "r"(_arg4), \
100271661c1SWilly Tarreau "r"(_num) \
101271661c1SWilly Tarreau : "memory", "cc" \
102271661c1SWilly Tarreau ); \
103271661c1SWilly Tarreau _arg1; \
104271661c1SWilly Tarreau })
105271661c1SWilly Tarreau
106271661c1SWilly Tarreau #define my_syscall5(num, arg1, arg2, arg3, arg4, arg5) \
107271661c1SWilly Tarreau ({ \
10837d62758SAmmar Faizi register long _num __asm__ ("a7") = (num); \
10937d62758SAmmar Faizi register long _arg1 __asm__ ("a0") = (long)(arg1); \
11037d62758SAmmar Faizi register long _arg2 __asm__ ("a1") = (long)(arg2); \
11137d62758SAmmar Faizi register long _arg3 __asm__ ("a2") = (long)(arg3); \
11237d62758SAmmar Faizi register long _arg4 __asm__ ("a3") = (long)(arg4); \
11337d62758SAmmar Faizi register long _arg5 __asm__ ("a4") = (long)(arg5); \
114271661c1SWilly Tarreau \
11537d62758SAmmar Faizi __asm__ volatile ( \
116271661c1SWilly Tarreau "ecall\n" \
117271661c1SWilly Tarreau : "+r"(_arg1) \
118271661c1SWilly Tarreau : "r"(_arg2), "r"(_arg3), "r"(_arg4), "r"(_arg5), \
119271661c1SWilly Tarreau "r"(_num) \
120271661c1SWilly Tarreau : "memory", "cc" \
121271661c1SWilly Tarreau ); \
122271661c1SWilly Tarreau _arg1; \
123271661c1SWilly Tarreau })
124271661c1SWilly Tarreau
125271661c1SWilly Tarreau #define my_syscall6(num, arg1, arg2, arg3, arg4, arg5, arg6) \
126271661c1SWilly Tarreau ({ \
12737d62758SAmmar Faizi register long _num __asm__ ("a7") = (num); \
12837d62758SAmmar Faizi register long _arg1 __asm__ ("a0") = (long)(arg1); \
12937d62758SAmmar Faizi register long _arg2 __asm__ ("a1") = (long)(arg2); \
13037d62758SAmmar Faizi register long _arg3 __asm__ ("a2") = (long)(arg3); \
13137d62758SAmmar Faizi register long _arg4 __asm__ ("a3") = (long)(arg4); \
13237d62758SAmmar Faizi register long _arg5 __asm__ ("a4") = (long)(arg5); \
13337d62758SAmmar Faizi register long _arg6 __asm__ ("a5") = (long)(arg6); \
134271661c1SWilly Tarreau \
13537d62758SAmmar Faizi __asm__ volatile ( \
136271661c1SWilly Tarreau "ecall\n" \
137271661c1SWilly Tarreau : "+r"(_arg1) \
138271661c1SWilly Tarreau : "r"(_arg2), "r"(_arg3), "r"(_arg4), "r"(_arg5), "r"(_arg6), \
139271661c1SWilly Tarreau "r"(_num) \
140271661c1SWilly Tarreau : "memory", "cc" \
141271661c1SWilly Tarreau ); \
142271661c1SWilly Tarreau _arg1; \
143271661c1SWilly Tarreau })
144271661c1SWilly Tarreau
145271661c1SWilly Tarreau /* startup code */
_start(void)146bff60150SZhangjin Wu void __attribute__((weak, noreturn, optimize("Os", "omit-frame-pointer"))) __no_stack_protector _start(void)
1477f854858SWilly Tarreau {
1487f854858SWilly Tarreau __asm__ volatile (
149271661c1SWilly Tarreau ".option push\n"
150271661c1SWilly Tarreau ".option norelax\n"
151271661c1SWilly Tarreau "lla gp, __global_pointer$\n"
152271661c1SWilly Tarreau ".option pop\n"
153*eea70cdaSZhangjin Wu "mv a0, sp\n" /* save stack pointer to a0, as arg1 of _start_c */
154*eea70cdaSZhangjin Wu "andi sp, a0, -16\n" /* sp must be 16-byte aligned */
155*eea70cdaSZhangjin Wu "call _start_c\n" /* transfer to c runtime */
1567f854858SWilly Tarreau );
1577f854858SWilly Tarreau __builtin_unreachable();
1587f854858SWilly Tarreau }
159271661c1SWilly Tarreau
160fddc8f81SThomas Weißschuh #endif /* _NOLIBC_ARCH_RISCV_H */
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