1 /* SPDX-License-Identifier: LGPL-2.1 OR MIT */ 2 /* 3 * MIPS specific definitions for NOLIBC 4 * Copyright (C) 2017-2022 Willy Tarreau <w@1wt.eu> 5 */ 6 7 #ifndef _NOLIBC_ARCH_MIPS_H 8 #define _NOLIBC_ARCH_MIPS_H 9 10 /* The struct returned by the stat() syscall. 88 bytes are returned by the 11 * syscall. 12 */ 13 struct sys_stat_struct { 14 unsigned int st_dev; 15 long st_pad1[3]; 16 unsigned long st_ino; 17 unsigned int st_mode; 18 unsigned int st_nlink; 19 unsigned int st_uid; 20 unsigned int st_gid; 21 unsigned int st_rdev; 22 long st_pad2[2]; 23 long st_size; 24 long st_pad3; 25 26 long st_atime; 27 long st_atime_nsec; 28 long st_mtime; 29 long st_mtime_nsec; 30 31 long st_ctime; 32 long st_ctime_nsec; 33 long st_blksize; 34 long st_blocks; 35 long st_pad4[14]; 36 }; 37 38 /* Syscalls for MIPS ABI O32 : 39 * - WARNING! there's always a delayed slot! 40 * - WARNING again, the syntax is different, registers take a '$' and numbers 41 * do not. 42 * - registers are 32-bit 43 * - stack is 8-byte aligned 44 * - syscall number is passed in v0 (starts at 0xfa0). 45 * - arguments are in a0, a1, a2, a3, then the stack. The caller needs to 46 * leave some room in the stack for the callee to save a0..a3 if needed. 47 * - Many registers are clobbered, in fact only a0..a2 and s0..s8 are 48 * preserved. See: https://www.linux-mips.org/wiki/Syscall as well as 49 * scall32-o32.S in the kernel sources. 50 * - the system call is performed by calling "syscall" 51 * - syscall return comes in v0, and register a3 needs to be checked to know 52 * if an error occurred, in which case errno is in v0. 53 * - the arguments are cast to long and assigned into the target registers 54 * which are then simply passed as registers to the asm code, so that we 55 * don't have to experience issues with register constraints. 56 */ 57 58 #define my_syscall0(num) \ 59 ({ \ 60 register long _num __asm__ ("v0") = (num); \ 61 register long _arg4 __asm__ ("a3"); \ 62 \ 63 __asm__ volatile ( \ 64 "addiu $sp, $sp, -32\n" \ 65 "syscall\n" \ 66 "addiu $sp, $sp, 32\n" \ 67 : "=r"(_num), "=r"(_arg4) \ 68 : "r"(_num) \ 69 : "memory", "cc", "at", "v1", "hi", "lo", \ 70 "t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", "t8", "t9" \ 71 ); \ 72 _arg4 ? -_num : _num; \ 73 }) 74 75 #define my_syscall1(num, arg1) \ 76 ({ \ 77 register long _num __asm__ ("v0") = (num); \ 78 register long _arg1 __asm__ ("a0") = (long)(arg1); \ 79 register long _arg4 __asm__ ("a3"); \ 80 \ 81 __asm__ volatile ( \ 82 "addiu $sp, $sp, -32\n" \ 83 "syscall\n" \ 84 "addiu $sp, $sp, 32\n" \ 85 : "=r"(_num), "=r"(_arg4) \ 86 : "0"(_num), \ 87 "r"(_arg1) \ 88 : "memory", "cc", "at", "v1", "hi", "lo", \ 89 "t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", "t8", "t9" \ 90 ); \ 91 _arg4 ? -_num : _num; \ 92 }) 93 94 #define my_syscall2(num, arg1, arg2) \ 95 ({ \ 96 register long _num __asm__ ("v0") = (num); \ 97 register long _arg1 __asm__ ("a0") = (long)(arg1); \ 98 register long _arg2 __asm__ ("a1") = (long)(arg2); \ 99 register long _arg4 __asm__ ("a3"); \ 100 \ 101 __asm__ volatile ( \ 102 "addiu $sp, $sp, -32\n" \ 103 "syscall\n" \ 104 "addiu $sp, $sp, 32\n" \ 105 : "=r"(_num), "=r"(_arg4) \ 106 : "0"(_num), \ 107 "r"(_arg1), "r"(_arg2) \ 108 : "memory", "cc", "at", "v1", "hi", "lo", \ 109 "t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", "t8", "t9" \ 110 ); \ 111 _arg4 ? -_num : _num; \ 112 }) 113 114 #define my_syscall3(num, arg1, arg2, arg3) \ 115 ({ \ 116 register long _num __asm__ ("v0") = (num); \ 117 register long _arg1 __asm__ ("a0") = (long)(arg1); \ 118 register long _arg2 __asm__ ("a1") = (long)(arg2); \ 119 register long _arg3 __asm__ ("a2") = (long)(arg3); \ 120 register long _arg4 __asm__ ("a3"); \ 121 \ 122 __asm__ volatile ( \ 123 "addiu $sp, $sp, -32\n" \ 124 "syscall\n" \ 125 "addiu $sp, $sp, 32\n" \ 126 : "=r"(_num), "=r"(_arg4) \ 127 : "0"(_num), \ 128 "r"(_arg1), "r"(_arg2), "r"(_arg3) \ 129 : "memory", "cc", "at", "v1", "hi", "lo", \ 130 "t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", "t8", "t9" \ 131 ); \ 132 _arg4 ? -_num : _num; \ 133 }) 134 135 #define my_syscall4(num, arg1, arg2, arg3, arg4) \ 136 ({ \ 137 register long _num __asm__ ("v0") = (num); \ 138 register long _arg1 __asm__ ("a0") = (long)(arg1); \ 139 register long _arg2 __asm__ ("a1") = (long)(arg2); \ 140 register long _arg3 __asm__ ("a2") = (long)(arg3); \ 141 register long _arg4 __asm__ ("a3") = (long)(arg4); \ 142 \ 143 __asm__ volatile ( \ 144 "addiu $sp, $sp, -32\n" \ 145 "syscall\n" \ 146 "addiu $sp, $sp, 32\n" \ 147 : "=r" (_num), "=r"(_arg4) \ 148 : "0"(_num), \ 149 "r"(_arg1), "r"(_arg2), "r"(_arg3), "r"(_arg4) \ 150 : "memory", "cc", "at", "v1", "hi", "lo", \ 151 "t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", "t8", "t9" \ 152 ); \ 153 _arg4 ? -_num : _num; \ 154 }) 155 156 #define my_syscall5(num, arg1, arg2, arg3, arg4, arg5) \ 157 ({ \ 158 register long _num __asm__ ("v0") = (num); \ 159 register long _arg1 __asm__ ("a0") = (long)(arg1); \ 160 register long _arg2 __asm__ ("a1") = (long)(arg2); \ 161 register long _arg3 __asm__ ("a2") = (long)(arg3); \ 162 register long _arg4 __asm__ ("a3") = (long)(arg4); \ 163 register long _arg5 = (long)(arg5); \ 164 \ 165 __asm__ volatile ( \ 166 "addiu $sp, $sp, -32\n" \ 167 "sw %7, 16($sp)\n" \ 168 "syscall\n " \ 169 "addiu $sp, $sp, 32\n" \ 170 : "=r" (_num), "=r"(_arg4) \ 171 : "0"(_num), \ 172 "r"(_arg1), "r"(_arg2), "r"(_arg3), "r"(_arg4), "r"(_arg5) \ 173 : "memory", "cc", "at", "v1", "hi", "lo", \ 174 "t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", "t8", "t9" \ 175 ); \ 176 _arg4 ? -_num : _num; \ 177 }) 178 179 char **environ __attribute__((weak)); 180 const unsigned long *_auxv __attribute__((weak)); 181 182 /* startup code, note that it's called __start on MIPS */ 183 void __attribute__((weak,noreturn,optimize("omit-frame-pointer"))) __start(void) 184 { 185 __asm__ volatile ( 186 //".set nomips16\n" 187 ".set push\n" 188 ".set noreorder\n" 189 ".option pic0\n" 190 //".ent __start\n" 191 //"__start:\n" 192 "lw $a0,($sp)\n" // argc was in the stack 193 "addiu $a1, $sp, 4\n" // argv = sp + 4 194 "sll $a2, $a0, 2\n" // a2 = argc * 4 195 "add $a2, $a2, $a1\n" // envp = argv + 4*argc ... 196 "addiu $a2, $a2, 4\n" // ... + 4 197 "lui $a3, %hi(environ)\n" // load environ into a3 (hi) 198 "addiu $a3, %lo(environ)\n" // load environ into a3 (lo) 199 "sw $a2,($a3)\n" // store envp(a2) into environ 200 201 "move $t0, $a2\n" // iterate t0 over envp, look for NULL 202 "0:" // do { 203 "lw $a3, ($t0)\n" // a3=*(t0); 204 "bne $a3, $0, 0b\n" // } while (a3); 205 "addiu $t0, $t0, 4\n" // delayed slot: t0+=4; 206 "lui $a3, %hi(_auxv)\n" // load _auxv into a3 (hi) 207 "addiu $a3, %lo(_auxv)\n" // load _auxv into a3 (lo) 208 "sw $t0, ($a3)\n" // store t0 into _auxv 209 210 "li $t0, -8\n" 211 "and $sp, $sp, $t0\n" // sp must be 8-byte aligned 212 "addiu $sp,$sp,-16\n" // the callee expects to save a0..a3 there! 213 "jal main\n" // main() returns the status code, we'll exit with it. 214 "nop\n" // delayed slot 215 "move $a0, $v0\n" // retrieve 32-bit exit code from v0 216 "li $v0, 4001\n" // NR_exit == 4001 217 "syscall\n" 218 //".end __start\n" 219 ".set pop\n" 220 ); 221 __builtin_unreachable(); 222 } 223 224 #endif // _NOLIBC_ARCH_MIPS_H 225