xref: /openbmc/linux/tools/build/Makefile.build (revision 23c2b932) 
1###
2# Main build makefile.
3#
4#  Lots of this code have been borrowed or heavily inspired from parts
5#  of kbuild code, which is not credited, but mostly developed by:
6#
7#  Copyright (C) Sam Ravnborg <sam@mars.ravnborg.org>, 2015
8#  Copyright (C) Linus Torvalds <torvalds@linux-foundation.org>, 2015
9#
10
11PHONY := __build
12__build:
13
14ifeq ($(V),1)
15  quiet =
16  Q =
17else
18  quiet=quiet_
19  Q=@
20endif
21
22build-dir := $(srctree)/tools/build
23
24# Define $(fixdep) for dep-cmd function
25ifeq ($(OUTPUT),)
26  fixdep := $(build-dir)/fixdep
27else
28  fixdep := $(OUTPUT)/fixdep
29endif
30
31# Generic definitions
32include $(build-dir)/Build.include
33
34# do not force detected configuration
35-include $(OUTPUT).config-detected
36
37# Init all relevant variables used in build files so
38# 1) they have correct type
39# 2) they do not inherit any value from the environment
40subdir-y     :=
41obj-y        :=
42subdir-y     :=
43subdir-obj-y :=
44
45# Build definitions
46build-file := $(dir)/Build
47-include $(build-file)
48
49quiet_cmd_flex  = FLEX     $@
50quiet_cmd_bison = BISON    $@
51
52# Create directory unless it exists
53quiet_cmd_mkdir = MKDIR    $(dir $@)
54      cmd_mkdir = mkdir -p $(dir $@)
55     rule_mkdir = $(if $(wildcard $(dir $@)),,@$(call echo-cmd,mkdir) $(cmd_mkdir))
56
57# Compile command
58quiet_cmd_cc_o_c = CC       $@
59      cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $<
60
61quiet_cmd_cpp_i_c = CPP      $@
62      cmd_cpp_i_c = $(CC) $(c_flags) -E -o $@ $<
63
64quiet_cmd_cc_s_c = AS       $@
65      cmd_cc_s_c = $(CC) $(c_flags) -S -o $@ $<
66
67quiet_cmd_gen = GEN      $@
68
69# Link agregate command
70# If there's nothing to link, create empty $@ object.
71quiet_cmd_ld_multi = LD       $@
72      cmd_ld_multi = $(if $(strip $(obj-y)),\
73		       $(LD) -r -o $@  $(filter $(obj-y),$^),rm -f $@; $(AR) rcs $@)
74
75# Build rules
76$(OUTPUT)%.o: %.c FORCE
77	$(call rule_mkdir)
78	$(call if_changed_dep,cc_o_c)
79
80$(OUTPUT)%.o: %.S FORCE
81	$(call rule_mkdir)
82	$(call if_changed_dep,cc_o_c)
83
84$(OUTPUT)%.i: %.c FORCE
85	$(call rule_mkdir)
86	$(call if_changed_dep,cpp_i_c)
87
88$(OUTPUT)%.s: %.S FORCE
89	$(call rule_mkdir)
90	$(call if_changed_dep,cpp_i_c)
91
92$(OUTPUT)%.s: %.c FORCE
93	$(call rule_mkdir)
94	$(call if_changed_dep,cc_s_c)
95
96# Gather build data:
97#   obj-y        - list of build objects
98#   subdir-y     - list of directories to nest
99#   subdir-obj-y - list of directories objects 'dir/$(obj)-in.o'
100obj-y        := $($(obj)-y)
101subdir-y     := $(patsubst %/,%,$(filter %/, $(obj-y)))
102obj-y        := $(patsubst %/, %/$(obj)-in.o, $(obj-y))
103subdir-obj-y := $(filter %/$(obj)-in.o, $(obj-y))
104
105# '$(OUTPUT)/dir' prefix to all objects
106objprefix    := $(subst ./,,$(OUTPUT)$(dir)/)
107obj-y        := $(addprefix $(objprefix),$(obj-y))
108subdir-obj-y := $(addprefix $(objprefix),$(subdir-obj-y))
109
110# Final '$(obj)-in.o' object
111in-target := $(objprefix)$(obj)-in.o
112
113PHONY += $(subdir-y)
114
115$(subdir-y):
116	$(Q)$(MAKE) -f $(build-dir)/Makefile.build dir=$(dir)/$@ obj=$(obj)
117
118$(sort $(subdir-obj-y)): $(subdir-y) ;
119
120$(in-target): $(obj-y) FORCE
121	$(call rule_mkdir)
122	$(call if_changed,ld_multi)
123
124__build: $(in-target)
125	@:
126
127PHONY += FORCE
128FORCE:
129
130# Include all cmd files to get all the dependency rules
131# for all objects included
132targets   := $(wildcard $(sort $(obj-y) $(in-target) $(MAKECMDGOALS)))
133cmd_files := $(wildcard $(foreach f,$(targets),$(dir $(f)).$(notdir $(f)).cmd))
134
135ifneq ($(cmd_files),)
136  include $(cmd_files)
137endif
138
139.PHONY: $(PHONY)
140