xref: /openbmc/linux/tools/arch/x86/include/uapi/asm/kvm.h (revision e8254a8e)
1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
2 #ifndef _ASM_X86_KVM_H
3 #define _ASM_X86_KVM_H
4 
5 /*
6  * KVM x86 specific structures and definitions
7  *
8  */
9 
10 #include <linux/types.h>
11 #include <linux/ioctl.h>
12 
13 #define KVM_PIO_PAGE_OFFSET 1
14 #define KVM_COALESCED_MMIO_PAGE_OFFSET 2
15 #define KVM_DIRTY_LOG_PAGE_OFFSET 64
16 
17 #define DE_VECTOR 0
18 #define DB_VECTOR 1
19 #define BP_VECTOR 3
20 #define OF_VECTOR 4
21 #define BR_VECTOR 5
22 #define UD_VECTOR 6
23 #define NM_VECTOR 7
24 #define DF_VECTOR 8
25 #define TS_VECTOR 10
26 #define NP_VECTOR 11
27 #define SS_VECTOR 12
28 #define GP_VECTOR 13
29 #define PF_VECTOR 14
30 #define MF_VECTOR 16
31 #define AC_VECTOR 17
32 #define MC_VECTOR 18
33 #define XM_VECTOR 19
34 #define VE_VECTOR 20
35 
36 /* Select x86 specific features in <linux/kvm.h> */
37 #define __KVM_HAVE_PIT
38 #define __KVM_HAVE_IOAPIC
39 #define __KVM_HAVE_IRQ_LINE
40 #define __KVM_HAVE_MSI
41 #define __KVM_HAVE_USER_NMI
42 #define __KVM_HAVE_GUEST_DEBUG
43 #define __KVM_HAVE_MSIX
44 #define __KVM_HAVE_MCE
45 #define __KVM_HAVE_PIT_STATE2
46 #define __KVM_HAVE_XEN_HVM
47 #define __KVM_HAVE_VCPU_EVENTS
48 #define __KVM_HAVE_DEBUGREGS
49 #define __KVM_HAVE_XSAVE
50 #define __KVM_HAVE_XCRS
51 #define __KVM_HAVE_READONLY_MEM
52 
53 /* Architectural interrupt line count. */
54 #define KVM_NR_INTERRUPTS 256
55 
56 /* for KVM_GET_IRQCHIP and KVM_SET_IRQCHIP */
57 struct kvm_pic_state {
58 	__u8 last_irr;	/* edge detection */
59 	__u8 irr;		/* interrupt request register */
60 	__u8 imr;		/* interrupt mask register */
61 	__u8 isr;		/* interrupt service register */
62 	__u8 priority_add;	/* highest irq priority */
63 	__u8 irq_base;
64 	__u8 read_reg_select;
65 	__u8 poll;
66 	__u8 special_mask;
67 	__u8 init_state;
68 	__u8 auto_eoi;
69 	__u8 rotate_on_auto_eoi;
70 	__u8 special_fully_nested_mode;
71 	__u8 init4;		/* true if 4 byte init */
72 	__u8 elcr;		/* PIIX edge/trigger selection */
73 	__u8 elcr_mask;
74 };
75 
76 #define KVM_IOAPIC_NUM_PINS  24
77 struct kvm_ioapic_state {
78 	__u64 base_address;
79 	__u32 ioregsel;
80 	__u32 id;
81 	__u32 irr;
82 	__u32 pad;
83 	union {
84 		__u64 bits;
85 		struct {
86 			__u8 vector;
87 			__u8 delivery_mode:3;
88 			__u8 dest_mode:1;
89 			__u8 delivery_status:1;
90 			__u8 polarity:1;
91 			__u8 remote_irr:1;
92 			__u8 trig_mode:1;
93 			__u8 mask:1;
94 			__u8 reserve:7;
95 			__u8 reserved[4];
96 			__u8 dest_id;
97 		} fields;
98 	} redirtbl[KVM_IOAPIC_NUM_PINS];
99 };
100 
101 #define KVM_IRQCHIP_PIC_MASTER   0
102 #define KVM_IRQCHIP_PIC_SLAVE    1
103 #define KVM_IRQCHIP_IOAPIC       2
104 #define KVM_NR_IRQCHIPS          3
105 
106 #define KVM_RUN_X86_SMM		 (1 << 0)
107 #define KVM_RUN_X86_BUS_LOCK     (1 << 1)
108 
109 /* for KVM_GET_REGS and KVM_SET_REGS */
110 struct kvm_regs {
111 	/* out (KVM_GET_REGS) / in (KVM_SET_REGS) */
112 	__u64 rax, rbx, rcx, rdx;
113 	__u64 rsi, rdi, rsp, rbp;
114 	__u64 r8,  r9,  r10, r11;
115 	__u64 r12, r13, r14, r15;
116 	__u64 rip, rflags;
117 };
118 
119 /* for KVM_GET_LAPIC and KVM_SET_LAPIC */
120 #define KVM_APIC_REG_SIZE 0x400
121 struct kvm_lapic_state {
122 	char regs[KVM_APIC_REG_SIZE];
123 };
124 
125 struct kvm_segment {
126 	__u64 base;
127 	__u32 limit;
128 	__u16 selector;
129 	__u8  type;
130 	__u8  present, dpl, db, s, l, g, avl;
131 	__u8  unusable;
132 	__u8  padding;
133 };
134 
135 struct kvm_dtable {
136 	__u64 base;
137 	__u16 limit;
138 	__u16 padding[3];
139 };
140 
141 
142 /* for KVM_GET_SREGS and KVM_SET_SREGS */
143 struct kvm_sregs {
144 	/* out (KVM_GET_SREGS) / in (KVM_SET_SREGS) */
145 	struct kvm_segment cs, ds, es, fs, gs, ss;
146 	struct kvm_segment tr, ldt;
147 	struct kvm_dtable gdt, idt;
148 	__u64 cr0, cr2, cr3, cr4, cr8;
149 	__u64 efer;
150 	__u64 apic_base;
151 	__u64 interrupt_bitmap[(KVM_NR_INTERRUPTS + 63) / 64];
152 };
153 
154 struct kvm_sregs2 {
155 	/* out (KVM_GET_SREGS2) / in (KVM_SET_SREGS2) */
156 	struct kvm_segment cs, ds, es, fs, gs, ss;
157 	struct kvm_segment tr, ldt;
158 	struct kvm_dtable gdt, idt;
159 	__u64 cr0, cr2, cr3, cr4, cr8;
160 	__u64 efer;
161 	__u64 apic_base;
162 	__u64 flags;
163 	__u64 pdptrs[4];
164 };
165 #define KVM_SREGS2_FLAGS_PDPTRS_VALID 1
166 
167 /* for KVM_GET_FPU and KVM_SET_FPU */
168 struct kvm_fpu {
169 	__u8  fpr[8][16];
170 	__u16 fcw;
171 	__u16 fsw;
172 	__u8  ftwx;  /* in fxsave format */
173 	__u8  pad1;
174 	__u16 last_opcode;
175 	__u64 last_ip;
176 	__u64 last_dp;
177 	__u8  xmm[16][16];
178 	__u32 mxcsr;
179 	__u32 pad2;
180 };
181 
182 struct kvm_msr_entry {
183 	__u32 index;
184 	__u32 reserved;
185 	__u64 data;
186 };
187 
188 /* for KVM_GET_MSRS and KVM_SET_MSRS */
189 struct kvm_msrs {
190 	__u32 nmsrs; /* number of msrs in entries */
191 	__u32 pad;
192 
193 	struct kvm_msr_entry entries[];
194 };
195 
196 /* for KVM_GET_MSR_INDEX_LIST */
197 struct kvm_msr_list {
198 	__u32 nmsrs; /* number of msrs in entries */
199 	__u32 indices[];
200 };
201 
202 /* Maximum size of any access bitmap in bytes */
203 #define KVM_MSR_FILTER_MAX_BITMAP_SIZE 0x600
204 
205 /* for KVM_X86_SET_MSR_FILTER */
206 struct kvm_msr_filter_range {
207 #define KVM_MSR_FILTER_READ  (1 << 0)
208 #define KVM_MSR_FILTER_WRITE (1 << 1)
209 	__u32 flags;
210 	__u32 nmsrs; /* number of msrs in bitmap */
211 	__u32 base;  /* MSR index the bitmap starts at */
212 	__u8 *bitmap; /* a 1 bit allows the operations in flags, 0 denies */
213 };
214 
215 #define KVM_MSR_FILTER_MAX_RANGES 16
216 struct kvm_msr_filter {
217 #define KVM_MSR_FILTER_DEFAULT_ALLOW (0 << 0)
218 #define KVM_MSR_FILTER_DEFAULT_DENY  (1 << 0)
219 	__u32 flags;
220 	struct kvm_msr_filter_range ranges[KVM_MSR_FILTER_MAX_RANGES];
221 };
222 
223 struct kvm_cpuid_entry {
224 	__u32 function;
225 	__u32 eax;
226 	__u32 ebx;
227 	__u32 ecx;
228 	__u32 edx;
229 	__u32 padding;
230 };
231 
232 /* for KVM_SET_CPUID */
233 struct kvm_cpuid {
234 	__u32 nent;
235 	__u32 padding;
236 	struct kvm_cpuid_entry entries[];
237 };
238 
239 struct kvm_cpuid_entry2 {
240 	__u32 function;
241 	__u32 index;
242 	__u32 flags;
243 	__u32 eax;
244 	__u32 ebx;
245 	__u32 ecx;
246 	__u32 edx;
247 	__u32 padding[3];
248 };
249 
250 #define KVM_CPUID_FLAG_SIGNIFCANT_INDEX		(1 << 0)
251 #define KVM_CPUID_FLAG_STATEFUL_FUNC		(1 << 1)
252 #define KVM_CPUID_FLAG_STATE_READ_NEXT		(1 << 2)
253 
254 /* for KVM_SET_CPUID2 */
255 struct kvm_cpuid2 {
256 	__u32 nent;
257 	__u32 padding;
258 	struct kvm_cpuid_entry2 entries[];
259 };
260 
261 /* for KVM_GET_PIT and KVM_SET_PIT */
262 struct kvm_pit_channel_state {
263 	__u32 count; /* can be 65536 */
264 	__u16 latched_count;
265 	__u8 count_latched;
266 	__u8 status_latched;
267 	__u8 status;
268 	__u8 read_state;
269 	__u8 write_state;
270 	__u8 write_latch;
271 	__u8 rw_mode;
272 	__u8 mode;
273 	__u8 bcd;
274 	__u8 gate;
275 	__s64 count_load_time;
276 };
277 
278 struct kvm_debug_exit_arch {
279 	__u32 exception;
280 	__u32 pad;
281 	__u64 pc;
282 	__u64 dr6;
283 	__u64 dr7;
284 };
285 
286 #define KVM_GUESTDBG_USE_SW_BP		0x00010000
287 #define KVM_GUESTDBG_USE_HW_BP		0x00020000
288 #define KVM_GUESTDBG_INJECT_DB		0x00040000
289 #define KVM_GUESTDBG_INJECT_BP		0x00080000
290 #define KVM_GUESTDBG_BLOCKIRQ		0x00100000
291 
292 /* for KVM_SET_GUEST_DEBUG */
293 struct kvm_guest_debug_arch {
294 	__u64 debugreg[8];
295 };
296 
297 struct kvm_pit_state {
298 	struct kvm_pit_channel_state channels[3];
299 };
300 
301 #define KVM_PIT_FLAGS_HPET_LEGACY     0x00000001
302 #define KVM_PIT_FLAGS_SPEAKER_DATA_ON 0x00000002
303 
304 struct kvm_pit_state2 {
305 	struct kvm_pit_channel_state channels[3];
306 	__u32 flags;
307 	__u32 reserved[9];
308 };
309 
310 struct kvm_reinject_control {
311 	__u8 pit_reinject;
312 	__u8 reserved[31];
313 };
314 
315 /* When set in flags, include corresponding fields on KVM_SET_VCPU_EVENTS */
316 #define KVM_VCPUEVENT_VALID_NMI_PENDING	0x00000001
317 #define KVM_VCPUEVENT_VALID_SIPI_VECTOR	0x00000002
318 #define KVM_VCPUEVENT_VALID_SHADOW	0x00000004
319 #define KVM_VCPUEVENT_VALID_SMM		0x00000008
320 #define KVM_VCPUEVENT_VALID_PAYLOAD	0x00000010
321 #define KVM_VCPUEVENT_VALID_TRIPLE_FAULT	0x00000020
322 
323 /* Interrupt shadow states */
324 #define KVM_X86_SHADOW_INT_MOV_SS	0x01
325 #define KVM_X86_SHADOW_INT_STI		0x02
326 
327 /* for KVM_GET/SET_VCPU_EVENTS */
328 struct kvm_vcpu_events {
329 	struct {
330 		__u8 injected;
331 		__u8 nr;
332 		__u8 has_error_code;
333 		__u8 pending;
334 		__u32 error_code;
335 	} exception;
336 	struct {
337 		__u8 injected;
338 		__u8 nr;
339 		__u8 soft;
340 		__u8 shadow;
341 	} interrupt;
342 	struct {
343 		__u8 injected;
344 		__u8 pending;
345 		__u8 masked;
346 		__u8 pad;
347 	} nmi;
348 	__u32 sipi_vector;
349 	__u32 flags;
350 	struct {
351 		__u8 smm;
352 		__u8 pending;
353 		__u8 smm_inside_nmi;
354 		__u8 latched_init;
355 	} smi;
356 	struct {
357 		__u8 pending;
358 	} triple_fault;
359 	__u8 reserved[26];
360 	__u8 exception_has_payload;
361 	__u64 exception_payload;
362 };
363 
364 /* for KVM_GET/SET_DEBUGREGS */
365 struct kvm_debugregs {
366 	__u64 db[4];
367 	__u64 dr6;
368 	__u64 dr7;
369 	__u64 flags;
370 	__u64 reserved[9];
371 };
372 
373 /* for KVM_CAP_XSAVE and KVM_CAP_XSAVE2 */
374 struct kvm_xsave {
375 	/*
376 	 * KVM_GET_XSAVE2 and KVM_SET_XSAVE write and read as many bytes
377 	 * as are returned by KVM_CHECK_EXTENSION(KVM_CAP_XSAVE2)
378 	 * respectively, when invoked on the vm file descriptor.
379 	 *
380 	 * The size value returned by KVM_CHECK_EXTENSION(KVM_CAP_XSAVE2)
381 	 * will always be at least 4096. Currently, it is only greater
382 	 * than 4096 if a dynamic feature has been enabled with
383 	 * ``arch_prctl()``, but this may change in the future.
384 	 *
385 	 * The offsets of the state save areas in struct kvm_xsave follow
386 	 * the contents of CPUID leaf 0xD on the host.
387 	 */
388 	__u32 region[1024];
389 	__u32 extra[];
390 };
391 
392 #define KVM_MAX_XCRS	16
393 
394 struct kvm_xcr {
395 	__u32 xcr;
396 	__u32 reserved;
397 	__u64 value;
398 };
399 
400 struct kvm_xcrs {
401 	__u32 nr_xcrs;
402 	__u32 flags;
403 	struct kvm_xcr xcrs[KVM_MAX_XCRS];
404 	__u64 padding[16];
405 };
406 
407 #define KVM_SYNC_X86_REGS      (1UL << 0)
408 #define KVM_SYNC_X86_SREGS     (1UL << 1)
409 #define KVM_SYNC_X86_EVENTS    (1UL << 2)
410 
411 #define KVM_SYNC_X86_VALID_FIELDS \
412 	(KVM_SYNC_X86_REGS| \
413 	 KVM_SYNC_X86_SREGS| \
414 	 KVM_SYNC_X86_EVENTS)
415 
416 /* kvm_sync_regs struct included by kvm_run struct */
417 struct kvm_sync_regs {
418 	/* Members of this structure are potentially malicious.
419 	 * Care must be taken by code reading, esp. interpreting,
420 	 * data fields from them inside KVM to prevent TOCTOU and
421 	 * double-fetch types of vulnerabilities.
422 	 */
423 	struct kvm_regs regs;
424 	struct kvm_sregs sregs;
425 	struct kvm_vcpu_events events;
426 };
427 
428 #define KVM_X86_QUIRK_LINT0_REENABLED		(1 << 0)
429 #define KVM_X86_QUIRK_CD_NW_CLEARED		(1 << 1)
430 #define KVM_X86_QUIRK_LAPIC_MMIO_HOLE		(1 << 2)
431 #define KVM_X86_QUIRK_OUT_7E_INC_RIP		(1 << 3)
432 #define KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT	(1 << 4)
433 #define KVM_X86_QUIRK_FIX_HYPERCALL_INSN	(1 << 5)
434 #define KVM_X86_QUIRK_MWAIT_NEVER_UD_FAULTS	(1 << 6)
435 
436 #define KVM_STATE_NESTED_FORMAT_VMX	0
437 #define KVM_STATE_NESTED_FORMAT_SVM	1
438 
439 #define KVM_STATE_NESTED_GUEST_MODE	0x00000001
440 #define KVM_STATE_NESTED_RUN_PENDING	0x00000002
441 #define KVM_STATE_NESTED_EVMCS		0x00000004
442 #define KVM_STATE_NESTED_MTF_PENDING	0x00000008
443 #define KVM_STATE_NESTED_GIF_SET	0x00000100
444 
445 #define KVM_STATE_NESTED_SMM_GUEST_MODE	0x00000001
446 #define KVM_STATE_NESTED_SMM_VMXON	0x00000002
447 
448 #define KVM_STATE_NESTED_VMX_VMCS_SIZE	0x1000
449 
450 #define KVM_STATE_NESTED_SVM_VMCB_SIZE	0x1000
451 
452 #define KVM_STATE_VMX_PREEMPTION_TIMER_DEADLINE	0x00000001
453 
454 /* attributes for system fd (group 0) */
455 #define KVM_X86_XCOMP_GUEST_SUPP	0
456 
457 struct kvm_vmx_nested_state_data {
458 	__u8 vmcs12[KVM_STATE_NESTED_VMX_VMCS_SIZE];
459 	__u8 shadow_vmcs12[KVM_STATE_NESTED_VMX_VMCS_SIZE];
460 };
461 
462 struct kvm_vmx_nested_state_hdr {
463 	__u64 vmxon_pa;
464 	__u64 vmcs12_pa;
465 
466 	struct {
467 		__u16 flags;
468 	} smm;
469 
470 	__u16 pad;
471 
472 	__u32 flags;
473 	__u64 preemption_timer_deadline;
474 };
475 
476 struct kvm_svm_nested_state_data {
477 	/* Save area only used if KVM_STATE_NESTED_RUN_PENDING.  */
478 	__u8 vmcb12[KVM_STATE_NESTED_SVM_VMCB_SIZE];
479 };
480 
481 struct kvm_svm_nested_state_hdr {
482 	__u64 vmcb_pa;
483 };
484 
485 /* for KVM_CAP_NESTED_STATE */
486 struct kvm_nested_state {
487 	__u16 flags;
488 	__u16 format;
489 	__u32 size;
490 
491 	union {
492 		struct kvm_vmx_nested_state_hdr vmx;
493 		struct kvm_svm_nested_state_hdr svm;
494 
495 		/* Pad the header to 128 bytes.  */
496 		__u8 pad[120];
497 	} hdr;
498 
499 	/*
500 	 * Define data region as 0 bytes to preserve backwards-compatability
501 	 * to old definition of kvm_nested_state in order to avoid changing
502 	 * KVM_{GET,PUT}_NESTED_STATE ioctl values.
503 	 */
504 	union {
505 		struct kvm_vmx_nested_state_data vmx[0];
506 		struct kvm_svm_nested_state_data svm[0];
507 	} data;
508 };
509 
510 /* for KVM_CAP_PMU_EVENT_FILTER */
511 struct kvm_pmu_event_filter {
512 	__u32 action;
513 	__u32 nevents;
514 	__u32 fixed_counter_bitmap;
515 	__u32 flags;
516 	__u32 pad[4];
517 	__u64 events[];
518 };
519 
520 #define KVM_PMU_EVENT_ALLOW 0
521 #define KVM_PMU_EVENT_DENY 1
522 
523 /* for KVM_{GET,SET,HAS}_DEVICE_ATTR */
524 #define KVM_VCPU_TSC_CTRL 0 /* control group for the timestamp counter (TSC) */
525 #define   KVM_VCPU_TSC_OFFSET 0 /* attribute for the TSC offset */
526 
527 #endif /* _ASM_X86_KVM_H */
528