1 #ifndef _ASM_X86_DISABLED_FEATURES_H 2 #define _ASM_X86_DISABLED_FEATURES_H 3 4 /* These features, although they might be available in a CPU 5 * will not be used because the compile options to support 6 * them are not present. 7 * 8 * This code allows them to be checked and disabled at 9 * compile time without an explicit #ifdef. Use 10 * cpu_feature_enabled(). 11 */ 12 13 #ifdef CONFIG_X86_INTEL_MPX 14 # define DISABLE_MPX 0 15 #else 16 # define DISABLE_MPX (1<<(X86_FEATURE_MPX & 31)) 17 #endif 18 19 #ifdef CONFIG_X86_SMAP 20 # define DISABLE_SMAP 0 21 #else 22 # define DISABLE_SMAP (1<<(X86_FEATURE_SMAP & 31)) 23 #endif 24 25 #ifdef CONFIG_X86_INTEL_UMIP 26 # define DISABLE_UMIP 0 27 #else 28 # define DISABLE_UMIP (1<<(X86_FEATURE_UMIP & 31)) 29 #endif 30 31 #ifdef CONFIG_X86_64 32 # define DISABLE_VME (1<<(X86_FEATURE_VME & 31)) 33 # define DISABLE_K6_MTRR (1<<(X86_FEATURE_K6_MTRR & 31)) 34 # define DISABLE_CYRIX_ARR (1<<(X86_FEATURE_CYRIX_ARR & 31)) 35 # define DISABLE_CENTAUR_MCR (1<<(X86_FEATURE_CENTAUR_MCR & 31)) 36 # define DISABLE_PCID 0 37 #else 38 # define DISABLE_VME 0 39 # define DISABLE_K6_MTRR 0 40 # define DISABLE_CYRIX_ARR 0 41 # define DISABLE_CENTAUR_MCR 0 42 # define DISABLE_PCID (1<<(X86_FEATURE_PCID & 31)) 43 #endif /* CONFIG_X86_64 */ 44 45 #ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS 46 # define DISABLE_PKU 0 47 # define DISABLE_OSPKE 0 48 #else 49 # define DISABLE_PKU (1<<(X86_FEATURE_PKU & 31)) 50 # define DISABLE_OSPKE (1<<(X86_FEATURE_OSPKE & 31)) 51 #endif /* CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS */ 52 53 #ifdef CONFIG_X86_5LEVEL 54 # define DISABLE_LA57 0 55 #else 56 # define DISABLE_LA57 (1<<(X86_FEATURE_LA57 & 31)) 57 #endif 58 59 #ifdef CONFIG_PAGE_TABLE_ISOLATION 60 # define DISABLE_PTI 0 61 #else 62 # define DISABLE_PTI (1 << (X86_FEATURE_PTI & 31)) 63 #endif 64 65 /* 66 * Make sure to add features to the correct mask 67 */ 68 #define DISABLED_MASK0 (DISABLE_VME) 69 #define DISABLED_MASK1 0 70 #define DISABLED_MASK2 0 71 #define DISABLED_MASK3 (DISABLE_CYRIX_ARR|DISABLE_CENTAUR_MCR|DISABLE_K6_MTRR) 72 #define DISABLED_MASK4 (DISABLE_PCID) 73 #define DISABLED_MASK5 0 74 #define DISABLED_MASK6 0 75 #define DISABLED_MASK7 (DISABLE_PTI) 76 #define DISABLED_MASK8 0 77 #define DISABLED_MASK9 (DISABLE_MPX|DISABLE_SMAP) 78 #define DISABLED_MASK10 0 79 #define DISABLED_MASK11 0 80 #define DISABLED_MASK12 0 81 #define DISABLED_MASK13 0 82 #define DISABLED_MASK14 0 83 #define DISABLED_MASK15 0 84 #define DISABLED_MASK16 (DISABLE_PKU|DISABLE_OSPKE|DISABLE_LA57|DISABLE_UMIP) 85 #define DISABLED_MASK17 0 86 #define DISABLED_MASK18 0 87 #define DISABLED_MASK_CHECK BUILD_BUG_ON_ZERO(NCAPINTS != 19) 88 89 #endif /* _ASM_X86_DISABLED_FEATURES_H */ 90