xref: /openbmc/linux/sound/sparc/cs4231.c (revision c0264468)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Driver for CS4231 sound chips found on Sparcs.
4  * Copyright (C) 2002, 2008 David S. Miller <davem@davemloft.net>
5  *
6  * Based entirely upon drivers/sbus/audio/cs4231.c which is:
7  * Copyright (C) 1996, 1997, 1998 Derrick J Brashear (shadow@andrew.cmu.edu)
8  * and also sound/isa/cs423x/cs4231_lib.c which is:
9  * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
10  */
11 
12 #include <linux/module.h>
13 #include <linux/kernel.h>
14 #include <linux/delay.h>
15 #include <linux/init.h>
16 #include <linux/interrupt.h>
17 #include <linux/moduleparam.h>
18 #include <linux/irq.h>
19 #include <linux/io.h>
20 #include <linux/of.h>
21 #include <linux/of_device.h>
22 
23 #include <sound/core.h>
24 #include <sound/pcm.h>
25 #include <sound/info.h>
26 #include <sound/control.h>
27 #include <sound/timer.h>
28 #include <sound/initval.h>
29 #include <sound/pcm_params.h>
30 
31 #ifdef CONFIG_SBUS
32 #define SBUS_SUPPORT
33 #endif
34 
35 #if defined(CONFIG_PCI) && defined(CONFIG_SPARC64)
36 #define EBUS_SUPPORT
37 #include <linux/pci.h>
38 #include <asm/ebus_dma.h>
39 #endif
40 
41 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;	/* Index 0-MAX */
42 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;	/* ID for this card */
43 /* Enable this card */
44 static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
45 
46 module_param_array(index, int, NULL, 0444);
47 MODULE_PARM_DESC(index, "Index value for Sun CS4231 soundcard.");
48 module_param_array(id, charp, NULL, 0444);
49 MODULE_PARM_DESC(id, "ID string for Sun CS4231 soundcard.");
50 module_param_array(enable, bool, NULL, 0444);
51 MODULE_PARM_DESC(enable, "Enable Sun CS4231 soundcard.");
52 MODULE_AUTHOR("Jaroslav Kysela, Derrick J. Brashear and David S. Miller");
53 MODULE_DESCRIPTION("Sun CS4231");
54 MODULE_LICENSE("GPL");
55 MODULE_SUPPORTED_DEVICE("{{Sun,CS4231}}");
56 
57 #ifdef SBUS_SUPPORT
58 struct sbus_dma_info {
59        spinlock_t	lock;	/* DMA access lock */
60        int		dir;
61        void __iomem	*regs;
62 };
63 #endif
64 
65 struct snd_cs4231;
66 struct cs4231_dma_control {
67 	void		(*prepare)(struct cs4231_dma_control *dma_cont,
68 				   int dir);
69 	void		(*enable)(struct cs4231_dma_control *dma_cont, int on);
70 	int		(*request)(struct cs4231_dma_control *dma_cont,
71 				   dma_addr_t bus_addr, size_t len);
72 	unsigned int	(*address)(struct cs4231_dma_control *dma_cont);
73 #ifdef EBUS_SUPPORT
74 	struct		ebus_dma_info	ebus_info;
75 #endif
76 #ifdef SBUS_SUPPORT
77 	struct		sbus_dma_info	sbus_info;
78 #endif
79 };
80 
81 struct snd_cs4231 {
82 	spinlock_t		lock;	/* registers access lock */
83 	void __iomem		*port;
84 
85 	struct cs4231_dma_control	p_dma;
86 	struct cs4231_dma_control	c_dma;
87 
88 	u32			flags;
89 #define CS4231_FLAG_EBUS	0x00000001
90 #define CS4231_FLAG_PLAYBACK	0x00000002
91 #define CS4231_FLAG_CAPTURE	0x00000004
92 
93 	struct snd_card		*card;
94 	struct snd_pcm		*pcm;
95 	struct snd_pcm_substream	*playback_substream;
96 	unsigned int		p_periods_sent;
97 	struct snd_pcm_substream	*capture_substream;
98 	unsigned int		c_periods_sent;
99 	struct snd_timer	*timer;
100 
101 	unsigned short mode;
102 #define CS4231_MODE_NONE	0x0000
103 #define CS4231_MODE_PLAY	0x0001
104 #define CS4231_MODE_RECORD	0x0002
105 #define CS4231_MODE_TIMER	0x0004
106 #define CS4231_MODE_OPEN	(CS4231_MODE_PLAY | CS4231_MODE_RECORD | \
107 				 CS4231_MODE_TIMER)
108 
109 	unsigned char		image[32];	/* registers image */
110 	int			mce_bit;
111 	int			calibrate_mute;
112 	struct mutex		mce_mutex;	/* mutex for mce register */
113 	struct mutex		open_mutex;	/* mutex for ALSA open/close */
114 
115 	struct platform_device	*op;
116 	unsigned int		irq[2];
117 	unsigned int		regs_size;
118 	struct snd_cs4231	*next;
119 };
120 
121 /* Eventually we can use sound/isa/cs423x/cs4231_lib.c directly, but for
122  * now....  -DaveM
123  */
124 
125 /* IO ports */
126 #include <sound/cs4231-regs.h>
127 
128 /* XXX offsets are different than PC ISA chips... */
129 #define CS4231U(chip, x)	((chip)->port + ((c_d_c_CS4231##x) << 2))
130 
131 /* SBUS DMA register defines.  */
132 
133 #define APCCSR	0x10UL	/* APC DMA CSR */
134 #define APCCVA	0x20UL	/* APC Capture DMA Address */
135 #define APCCC	0x24UL	/* APC Capture Count */
136 #define APCCNVA	0x28UL	/* APC Capture DMA Next Address */
137 #define APCCNC	0x2cUL	/* APC Capture Next Count */
138 #define APCPVA	0x30UL	/* APC Play DMA Address */
139 #define APCPC	0x34UL	/* APC Play Count */
140 #define APCPNVA	0x38UL	/* APC Play DMA Next Address */
141 #define APCPNC	0x3cUL	/* APC Play Next Count */
142 
143 /* Defines for SBUS DMA-routines */
144 
145 #define APCVA  0x0UL	/* APC DMA Address */
146 #define APCC   0x4UL	/* APC Count */
147 #define APCNVA 0x8UL	/* APC DMA Next Address */
148 #define APCNC  0xcUL	/* APC Next Count */
149 #define APC_PLAY 0x30UL	/* Play registers start at 0x30 */
150 #define APC_RECORD 0x20UL /* Record registers start at 0x20 */
151 
152 /* APCCSR bits */
153 
154 #define APC_INT_PENDING 0x800000 /* Interrupt Pending */
155 #define APC_PLAY_INT    0x400000 /* Playback interrupt */
156 #define APC_CAPT_INT    0x200000 /* Capture interrupt */
157 #define APC_GENL_INT    0x100000 /* General interrupt */
158 #define APC_XINT_ENA    0x80000  /* General ext int. enable */
159 #define APC_XINT_PLAY   0x40000  /* Playback ext intr */
160 #define APC_XINT_CAPT   0x20000  /* Capture ext intr */
161 #define APC_XINT_GENL   0x10000  /* Error ext intr */
162 #define APC_XINT_EMPT   0x8000   /* Pipe empty interrupt (0 write to pva) */
163 #define APC_XINT_PEMP   0x4000   /* Play pipe empty (pva and pnva not set) */
164 #define APC_XINT_PNVA   0x2000   /* Playback NVA dirty */
165 #define APC_XINT_PENA   0x1000   /* play pipe empty Int enable */
166 #define APC_XINT_COVF   0x800    /* Cap data dropped on floor */
167 #define APC_XINT_CNVA   0x400    /* Capture NVA dirty */
168 #define APC_XINT_CEMP   0x200    /* Capture pipe empty (cva and cnva not set) */
169 #define APC_XINT_CENA   0x100    /* Cap. pipe empty int enable */
170 #define APC_PPAUSE      0x80     /* Pause the play DMA */
171 #define APC_CPAUSE      0x40     /* Pause the capture DMA */
172 #define APC_CDC_RESET   0x20     /* CODEC RESET */
173 #define APC_PDMA_READY  0x08     /* Play DMA Go */
174 #define APC_CDMA_READY  0x04     /* Capture DMA Go */
175 #define APC_CHIP_RESET  0x01     /* Reset the chip */
176 
177 /* EBUS DMA register offsets  */
178 
179 #define EBDMA_CSR	0x00UL	/* Control/Status */
180 #define EBDMA_ADDR	0x04UL	/* DMA Address */
181 #define EBDMA_COUNT	0x08UL	/* DMA Count */
182 
183 /*
184  *  Some variables
185  */
186 
187 static unsigned char freq_bits[14] = {
188 	/* 5510 */	0x00 | CS4231_XTAL2,
189 	/* 6620 */	0x0E | CS4231_XTAL2,
190 	/* 8000 */	0x00 | CS4231_XTAL1,
191 	/* 9600 */	0x0E | CS4231_XTAL1,
192 	/* 11025 */	0x02 | CS4231_XTAL2,
193 	/* 16000 */	0x02 | CS4231_XTAL1,
194 	/* 18900 */	0x04 | CS4231_XTAL2,
195 	/* 22050 */	0x06 | CS4231_XTAL2,
196 	/* 27042 */	0x04 | CS4231_XTAL1,
197 	/* 32000 */	0x06 | CS4231_XTAL1,
198 	/* 33075 */	0x0C | CS4231_XTAL2,
199 	/* 37800 */	0x08 | CS4231_XTAL2,
200 	/* 44100 */	0x0A | CS4231_XTAL2,
201 	/* 48000 */	0x0C | CS4231_XTAL1
202 };
203 
204 static const unsigned int rates[14] = {
205 	5510, 6620, 8000, 9600, 11025, 16000, 18900, 22050,
206 	27042, 32000, 33075, 37800, 44100, 48000
207 };
208 
209 static const struct snd_pcm_hw_constraint_list hw_constraints_rates = {
210 	.count	= ARRAY_SIZE(rates),
211 	.list	= rates,
212 };
213 
214 static int snd_cs4231_xrate(struct snd_pcm_runtime *runtime)
215 {
216 	return snd_pcm_hw_constraint_list(runtime, 0,
217 					  SNDRV_PCM_HW_PARAM_RATE,
218 					  &hw_constraints_rates);
219 }
220 
221 static unsigned char snd_cs4231_original_image[32] =
222 {
223 	0x00,			/* 00/00 - lic */
224 	0x00,			/* 01/01 - ric */
225 	0x9f,			/* 02/02 - la1ic */
226 	0x9f,			/* 03/03 - ra1ic */
227 	0x9f,			/* 04/04 - la2ic */
228 	0x9f,			/* 05/05 - ra2ic */
229 	0xbf,			/* 06/06 - loc */
230 	0xbf,			/* 07/07 - roc */
231 	0x20,			/* 08/08 - pdfr */
232 	CS4231_AUTOCALIB,	/* 09/09 - ic */
233 	0x00,			/* 0a/10 - pc */
234 	0x00,			/* 0b/11 - ti */
235 	CS4231_MODE2,		/* 0c/12 - mi */
236 	0x00,			/* 0d/13 - lbc */
237 	0x00,			/* 0e/14 - pbru */
238 	0x00,			/* 0f/15 - pbrl */
239 	0x80,			/* 10/16 - afei */
240 	0x01,			/* 11/17 - afeii */
241 	0x9f,			/* 12/18 - llic */
242 	0x9f,			/* 13/19 - rlic */
243 	0x00,			/* 14/20 - tlb */
244 	0x00,			/* 15/21 - thb */
245 	0x00,			/* 16/22 - la3mic/reserved */
246 	0x00,			/* 17/23 - ra3mic/reserved */
247 	0x00,			/* 18/24 - afs */
248 	0x00,			/* 19/25 - lamoc/version */
249 	0x00,			/* 1a/26 - mioc */
250 	0x00,			/* 1b/27 - ramoc/reserved */
251 	0x20,			/* 1c/28 - cdfr */
252 	0x00,			/* 1d/29 - res4 */
253 	0x00,			/* 1e/30 - cbru */
254 	0x00,			/* 1f/31 - cbrl */
255 };
256 
257 static u8 __cs4231_readb(struct snd_cs4231 *cp, void __iomem *reg_addr)
258 {
259 	if (cp->flags & CS4231_FLAG_EBUS)
260 		return readb(reg_addr);
261 	else
262 		return sbus_readb(reg_addr);
263 }
264 
265 static void __cs4231_writeb(struct snd_cs4231 *cp, u8 val,
266 			    void __iomem *reg_addr)
267 {
268 	if (cp->flags & CS4231_FLAG_EBUS)
269 		return writeb(val, reg_addr);
270 	else
271 		return sbus_writeb(val, reg_addr);
272 }
273 
274 /*
275  *  Basic I/O functions
276  */
277 
278 static void snd_cs4231_ready(struct snd_cs4231 *chip)
279 {
280 	int timeout;
281 
282 	for (timeout = 250; timeout > 0; timeout--) {
283 		int val = __cs4231_readb(chip, CS4231U(chip, REGSEL));
284 		if ((val & CS4231_INIT) == 0)
285 			break;
286 		udelay(100);
287 	}
288 }
289 
290 static void snd_cs4231_dout(struct snd_cs4231 *chip, unsigned char reg,
291 			    unsigned char value)
292 {
293 	snd_cs4231_ready(chip);
294 #ifdef CONFIG_SND_DEBUG
295 	if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT)
296 		snd_printdd("out: auto calibration time out - reg = 0x%x, "
297 			    "value = 0x%x\n",
298 			    reg, value);
299 #endif
300 	__cs4231_writeb(chip, chip->mce_bit | reg, CS4231U(chip, REGSEL));
301 	wmb();
302 	__cs4231_writeb(chip, value, CS4231U(chip, REG));
303 	mb();
304 }
305 
306 static inline void snd_cs4231_outm(struct snd_cs4231 *chip, unsigned char reg,
307 		     unsigned char mask, unsigned char value)
308 {
309 	unsigned char tmp = (chip->image[reg] & mask) | value;
310 
311 	chip->image[reg] = tmp;
312 	if (!chip->calibrate_mute)
313 		snd_cs4231_dout(chip, reg, tmp);
314 }
315 
316 static void snd_cs4231_out(struct snd_cs4231 *chip, unsigned char reg,
317 			   unsigned char value)
318 {
319 	snd_cs4231_dout(chip, reg, value);
320 	chip->image[reg] = value;
321 	mb();
322 }
323 
324 static unsigned char snd_cs4231_in(struct snd_cs4231 *chip, unsigned char reg)
325 {
326 	snd_cs4231_ready(chip);
327 #ifdef CONFIG_SND_DEBUG
328 	if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT)
329 		snd_printdd("in: auto calibration time out - reg = 0x%x\n",
330 			    reg);
331 #endif
332 	__cs4231_writeb(chip, chip->mce_bit | reg, CS4231U(chip, REGSEL));
333 	mb();
334 	return __cs4231_readb(chip, CS4231U(chip, REG));
335 }
336 
337 /*
338  *  CS4231 detection / MCE routines
339  */
340 
341 static void snd_cs4231_busy_wait(struct snd_cs4231 *chip)
342 {
343 	int timeout;
344 
345 	/* looks like this sequence is proper for CS4231A chip (GUS MAX) */
346 	for (timeout = 5; timeout > 0; timeout--)
347 		__cs4231_readb(chip, CS4231U(chip, REGSEL));
348 
349 	/* end of cleanup sequence */
350 	for (timeout = 500; timeout > 0; timeout--) {
351 		int val = __cs4231_readb(chip, CS4231U(chip, REGSEL));
352 		if ((val & CS4231_INIT) == 0)
353 			break;
354 		msleep(1);
355 	}
356 }
357 
358 static void snd_cs4231_mce_up(struct snd_cs4231 *chip)
359 {
360 	unsigned long flags;
361 	int timeout;
362 
363 	spin_lock_irqsave(&chip->lock, flags);
364 	snd_cs4231_ready(chip);
365 #ifdef CONFIG_SND_DEBUG
366 	if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT)
367 		snd_printdd("mce_up - auto calibration time out (0)\n");
368 #endif
369 	chip->mce_bit |= CS4231_MCE;
370 	timeout = __cs4231_readb(chip, CS4231U(chip, REGSEL));
371 	if (timeout == 0x80)
372 		snd_printdd("mce_up [%p]: serious init problem - "
373 			    "codec still busy\n",
374 			    chip->port);
375 	if (!(timeout & CS4231_MCE))
376 		__cs4231_writeb(chip, chip->mce_bit | (timeout & 0x1f),
377 				CS4231U(chip, REGSEL));
378 	spin_unlock_irqrestore(&chip->lock, flags);
379 }
380 
381 static void snd_cs4231_mce_down(struct snd_cs4231 *chip)
382 {
383 	unsigned long flags, timeout;
384 	int reg;
385 
386 	snd_cs4231_busy_wait(chip);
387 	spin_lock_irqsave(&chip->lock, flags);
388 #ifdef CONFIG_SND_DEBUG
389 	if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT)
390 		snd_printdd("mce_down [%p] - auto calibration time out (0)\n",
391 			    CS4231U(chip, REGSEL));
392 #endif
393 	chip->mce_bit &= ~CS4231_MCE;
394 	reg = __cs4231_readb(chip, CS4231U(chip, REGSEL));
395 	__cs4231_writeb(chip, chip->mce_bit | (reg & 0x1f),
396 			CS4231U(chip, REGSEL));
397 	if (reg == 0x80)
398 		snd_printdd("mce_down [%p]: serious init problem "
399 			    "- codec still busy\n", chip->port);
400 	if ((reg & CS4231_MCE) == 0) {
401 		spin_unlock_irqrestore(&chip->lock, flags);
402 		return;
403 	}
404 
405 	/*
406 	 * Wait for auto-calibration (AC) process to finish, i.e. ACI to go low.
407 	 */
408 	timeout = jiffies + msecs_to_jiffies(250);
409 	do {
410 		spin_unlock_irqrestore(&chip->lock, flags);
411 		msleep(1);
412 		spin_lock_irqsave(&chip->lock, flags);
413 		reg = snd_cs4231_in(chip, CS4231_TEST_INIT);
414 		reg &= CS4231_CALIB_IN_PROGRESS;
415 	} while (reg && time_before(jiffies, timeout));
416 	spin_unlock_irqrestore(&chip->lock, flags);
417 
418 	if (reg)
419 		snd_printk(KERN_ERR
420 			   "mce_down - auto calibration time out (2)\n");
421 }
422 
423 static void snd_cs4231_advance_dma(struct cs4231_dma_control *dma_cont,
424 				   struct snd_pcm_substream *substream,
425 				   unsigned int *periods_sent)
426 {
427 	struct snd_pcm_runtime *runtime = substream->runtime;
428 
429 	while (1) {
430 		unsigned int period_size = snd_pcm_lib_period_bytes(substream);
431 		unsigned int offset = period_size * (*periods_sent);
432 
433 		if (WARN_ON(period_size >= (1 << 24)))
434 			return;
435 
436 		if (dma_cont->request(dma_cont,
437 				      runtime->dma_addr + offset, period_size))
438 			return;
439 		(*periods_sent) = ((*periods_sent) + 1) % runtime->periods;
440 	}
441 }
442 
443 static void cs4231_dma_trigger(struct snd_pcm_substream *substream,
444 			       unsigned int what, int on)
445 {
446 	struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
447 	struct cs4231_dma_control *dma_cont;
448 
449 	if (what & CS4231_PLAYBACK_ENABLE) {
450 		dma_cont = &chip->p_dma;
451 		if (on) {
452 			dma_cont->prepare(dma_cont, 0);
453 			dma_cont->enable(dma_cont, 1);
454 			snd_cs4231_advance_dma(dma_cont,
455 				chip->playback_substream,
456 				&chip->p_periods_sent);
457 		} else {
458 			dma_cont->enable(dma_cont, 0);
459 		}
460 	}
461 	if (what & CS4231_RECORD_ENABLE) {
462 		dma_cont = &chip->c_dma;
463 		if (on) {
464 			dma_cont->prepare(dma_cont, 1);
465 			dma_cont->enable(dma_cont, 1);
466 			snd_cs4231_advance_dma(dma_cont,
467 				chip->capture_substream,
468 				&chip->c_periods_sent);
469 		} else {
470 			dma_cont->enable(dma_cont, 0);
471 		}
472 	}
473 }
474 
475 static int snd_cs4231_trigger(struct snd_pcm_substream *substream, int cmd)
476 {
477 	struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
478 	int result = 0;
479 
480 	switch (cmd) {
481 	case SNDRV_PCM_TRIGGER_START:
482 	case SNDRV_PCM_TRIGGER_STOP:
483 	{
484 		unsigned int what = 0;
485 		struct snd_pcm_substream *s;
486 		unsigned long flags;
487 
488 		snd_pcm_group_for_each_entry(s, substream) {
489 			if (s == chip->playback_substream) {
490 				what |= CS4231_PLAYBACK_ENABLE;
491 				snd_pcm_trigger_done(s, substream);
492 			} else if (s == chip->capture_substream) {
493 				what |= CS4231_RECORD_ENABLE;
494 				snd_pcm_trigger_done(s, substream);
495 			}
496 		}
497 
498 		spin_lock_irqsave(&chip->lock, flags);
499 		if (cmd == SNDRV_PCM_TRIGGER_START) {
500 			cs4231_dma_trigger(substream, what, 1);
501 			chip->image[CS4231_IFACE_CTRL] |= what;
502 		} else {
503 			cs4231_dma_trigger(substream, what, 0);
504 			chip->image[CS4231_IFACE_CTRL] &= ~what;
505 		}
506 		snd_cs4231_out(chip, CS4231_IFACE_CTRL,
507 			       chip->image[CS4231_IFACE_CTRL]);
508 		spin_unlock_irqrestore(&chip->lock, flags);
509 		break;
510 	}
511 	default:
512 		result = -EINVAL;
513 		break;
514 	}
515 
516 	return result;
517 }
518 
519 /*
520  *  CODEC I/O
521  */
522 
523 static unsigned char snd_cs4231_get_rate(unsigned int rate)
524 {
525 	int i;
526 
527 	for (i = 0; i < 14; i++)
528 		if (rate == rates[i])
529 			return freq_bits[i];
530 
531 	return freq_bits[13];
532 }
533 
534 static unsigned char snd_cs4231_get_format(struct snd_cs4231 *chip, int format,
535 					   int channels)
536 {
537 	unsigned char rformat;
538 
539 	rformat = CS4231_LINEAR_8;
540 	switch (format) {
541 	case SNDRV_PCM_FORMAT_MU_LAW:
542 		rformat = CS4231_ULAW_8;
543 		break;
544 	case SNDRV_PCM_FORMAT_A_LAW:
545 		rformat = CS4231_ALAW_8;
546 		break;
547 	case SNDRV_PCM_FORMAT_S16_LE:
548 		rformat = CS4231_LINEAR_16;
549 		break;
550 	case SNDRV_PCM_FORMAT_S16_BE:
551 		rformat = CS4231_LINEAR_16_BIG;
552 		break;
553 	case SNDRV_PCM_FORMAT_IMA_ADPCM:
554 		rformat = CS4231_ADPCM_16;
555 		break;
556 	}
557 	if (channels > 1)
558 		rformat |= CS4231_STEREO;
559 	return rformat;
560 }
561 
562 static void snd_cs4231_calibrate_mute(struct snd_cs4231 *chip, int mute)
563 {
564 	unsigned long flags;
565 
566 	mute = mute ? 1 : 0;
567 	spin_lock_irqsave(&chip->lock, flags);
568 	if (chip->calibrate_mute == mute) {
569 		spin_unlock_irqrestore(&chip->lock, flags);
570 		return;
571 	}
572 	if (!mute) {
573 		snd_cs4231_dout(chip, CS4231_LEFT_INPUT,
574 				chip->image[CS4231_LEFT_INPUT]);
575 		snd_cs4231_dout(chip, CS4231_RIGHT_INPUT,
576 				chip->image[CS4231_RIGHT_INPUT]);
577 		snd_cs4231_dout(chip, CS4231_LOOPBACK,
578 				chip->image[CS4231_LOOPBACK]);
579 	}
580 	snd_cs4231_dout(chip, CS4231_AUX1_LEFT_INPUT,
581 			mute ? 0x80 : chip->image[CS4231_AUX1_LEFT_INPUT]);
582 	snd_cs4231_dout(chip, CS4231_AUX1_RIGHT_INPUT,
583 			mute ? 0x80 : chip->image[CS4231_AUX1_RIGHT_INPUT]);
584 	snd_cs4231_dout(chip, CS4231_AUX2_LEFT_INPUT,
585 			mute ? 0x80 : chip->image[CS4231_AUX2_LEFT_INPUT]);
586 	snd_cs4231_dout(chip, CS4231_AUX2_RIGHT_INPUT,
587 			mute ? 0x80 : chip->image[CS4231_AUX2_RIGHT_INPUT]);
588 	snd_cs4231_dout(chip, CS4231_LEFT_OUTPUT,
589 			mute ? 0x80 : chip->image[CS4231_LEFT_OUTPUT]);
590 	snd_cs4231_dout(chip, CS4231_RIGHT_OUTPUT,
591 			mute ? 0x80 : chip->image[CS4231_RIGHT_OUTPUT]);
592 	snd_cs4231_dout(chip, CS4231_LEFT_LINE_IN,
593 			mute ? 0x80 : chip->image[CS4231_LEFT_LINE_IN]);
594 	snd_cs4231_dout(chip, CS4231_RIGHT_LINE_IN,
595 			mute ? 0x80 : chip->image[CS4231_RIGHT_LINE_IN]);
596 	snd_cs4231_dout(chip, CS4231_MONO_CTRL,
597 			mute ? 0xc0 : chip->image[CS4231_MONO_CTRL]);
598 	chip->calibrate_mute = mute;
599 	spin_unlock_irqrestore(&chip->lock, flags);
600 }
601 
602 static void snd_cs4231_playback_format(struct snd_cs4231 *chip,
603 				       struct snd_pcm_hw_params *params,
604 				       unsigned char pdfr)
605 {
606 	unsigned long flags;
607 
608 	mutex_lock(&chip->mce_mutex);
609 	snd_cs4231_calibrate_mute(chip, 1);
610 
611 	snd_cs4231_mce_up(chip);
612 
613 	spin_lock_irqsave(&chip->lock, flags);
614 	snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT,
615 		       (chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE) ?
616 		       (pdfr & 0xf0) | (chip->image[CS4231_REC_FORMAT] & 0x0f) :
617 		       pdfr);
618 	spin_unlock_irqrestore(&chip->lock, flags);
619 
620 	snd_cs4231_mce_down(chip);
621 
622 	snd_cs4231_calibrate_mute(chip, 0);
623 	mutex_unlock(&chip->mce_mutex);
624 }
625 
626 static void snd_cs4231_capture_format(struct snd_cs4231 *chip,
627 				      struct snd_pcm_hw_params *params,
628 				      unsigned char cdfr)
629 {
630 	unsigned long flags;
631 
632 	mutex_lock(&chip->mce_mutex);
633 	snd_cs4231_calibrate_mute(chip, 1);
634 
635 	snd_cs4231_mce_up(chip);
636 
637 	spin_lock_irqsave(&chip->lock, flags);
638 	if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE)) {
639 		snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT,
640 			       ((chip->image[CS4231_PLAYBK_FORMAT]) & 0xf0) |
641 			       (cdfr & 0x0f));
642 		spin_unlock_irqrestore(&chip->lock, flags);
643 		snd_cs4231_mce_down(chip);
644 		snd_cs4231_mce_up(chip);
645 		spin_lock_irqsave(&chip->lock, flags);
646 	}
647 	snd_cs4231_out(chip, CS4231_REC_FORMAT, cdfr);
648 	spin_unlock_irqrestore(&chip->lock, flags);
649 
650 	snd_cs4231_mce_down(chip);
651 
652 	snd_cs4231_calibrate_mute(chip, 0);
653 	mutex_unlock(&chip->mce_mutex);
654 }
655 
656 /*
657  *  Timer interface
658  */
659 
660 static unsigned long snd_cs4231_timer_resolution(struct snd_timer *timer)
661 {
662 	struct snd_cs4231 *chip = snd_timer_chip(timer);
663 
664 	return chip->image[CS4231_PLAYBK_FORMAT] & 1 ? 9969 : 9920;
665 }
666 
667 static int snd_cs4231_timer_start(struct snd_timer *timer)
668 {
669 	unsigned long flags;
670 	unsigned int ticks;
671 	struct snd_cs4231 *chip = snd_timer_chip(timer);
672 
673 	spin_lock_irqsave(&chip->lock, flags);
674 	ticks = timer->sticks;
675 	if ((chip->image[CS4231_ALT_FEATURE_1] & CS4231_TIMER_ENABLE) == 0 ||
676 	    (unsigned char)(ticks >> 8) != chip->image[CS4231_TIMER_HIGH] ||
677 	    (unsigned char)ticks != chip->image[CS4231_TIMER_LOW]) {
678 		snd_cs4231_out(chip, CS4231_TIMER_HIGH,
679 			       chip->image[CS4231_TIMER_HIGH] =
680 			       (unsigned char) (ticks >> 8));
681 		snd_cs4231_out(chip, CS4231_TIMER_LOW,
682 			       chip->image[CS4231_TIMER_LOW] =
683 			       (unsigned char) ticks);
684 		snd_cs4231_out(chip, CS4231_ALT_FEATURE_1,
685 			       chip->image[CS4231_ALT_FEATURE_1] |
686 					CS4231_TIMER_ENABLE);
687 	}
688 	spin_unlock_irqrestore(&chip->lock, flags);
689 
690 	return 0;
691 }
692 
693 static int snd_cs4231_timer_stop(struct snd_timer *timer)
694 {
695 	unsigned long flags;
696 	struct snd_cs4231 *chip = snd_timer_chip(timer);
697 
698 	spin_lock_irqsave(&chip->lock, flags);
699 	chip->image[CS4231_ALT_FEATURE_1] &= ~CS4231_TIMER_ENABLE;
700 	snd_cs4231_out(chip, CS4231_ALT_FEATURE_1,
701 		       chip->image[CS4231_ALT_FEATURE_1]);
702 	spin_unlock_irqrestore(&chip->lock, flags);
703 
704 	return 0;
705 }
706 
707 static void snd_cs4231_init(struct snd_cs4231 *chip)
708 {
709 	unsigned long flags;
710 
711 	snd_cs4231_mce_down(chip);
712 
713 #ifdef SNDRV_DEBUG_MCE
714 	snd_printdd("init: (1)\n");
715 #endif
716 	snd_cs4231_mce_up(chip);
717 	spin_lock_irqsave(&chip->lock, flags);
718 	chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE |
719 					    CS4231_PLAYBACK_PIO |
720 					    CS4231_RECORD_ENABLE |
721 					    CS4231_RECORD_PIO |
722 					    CS4231_CALIB_MODE);
723 	chip->image[CS4231_IFACE_CTRL] |= CS4231_AUTOCALIB;
724 	snd_cs4231_out(chip, CS4231_IFACE_CTRL, chip->image[CS4231_IFACE_CTRL]);
725 	spin_unlock_irqrestore(&chip->lock, flags);
726 	snd_cs4231_mce_down(chip);
727 
728 #ifdef SNDRV_DEBUG_MCE
729 	snd_printdd("init: (2)\n");
730 #endif
731 
732 	snd_cs4231_mce_up(chip);
733 	spin_lock_irqsave(&chip->lock, flags);
734 	snd_cs4231_out(chip, CS4231_ALT_FEATURE_1,
735 			chip->image[CS4231_ALT_FEATURE_1]);
736 	spin_unlock_irqrestore(&chip->lock, flags);
737 	snd_cs4231_mce_down(chip);
738 
739 #ifdef SNDRV_DEBUG_MCE
740 	snd_printdd("init: (3) - afei = 0x%x\n",
741 		    chip->image[CS4231_ALT_FEATURE_1]);
742 #endif
743 
744 	spin_lock_irqsave(&chip->lock, flags);
745 	snd_cs4231_out(chip, CS4231_ALT_FEATURE_2,
746 			chip->image[CS4231_ALT_FEATURE_2]);
747 	spin_unlock_irqrestore(&chip->lock, flags);
748 
749 	snd_cs4231_mce_up(chip);
750 	spin_lock_irqsave(&chip->lock, flags);
751 	snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT,
752 			chip->image[CS4231_PLAYBK_FORMAT]);
753 	spin_unlock_irqrestore(&chip->lock, flags);
754 	snd_cs4231_mce_down(chip);
755 
756 #ifdef SNDRV_DEBUG_MCE
757 	snd_printdd("init: (4)\n");
758 #endif
759 
760 	snd_cs4231_mce_up(chip);
761 	spin_lock_irqsave(&chip->lock, flags);
762 	snd_cs4231_out(chip, CS4231_REC_FORMAT, chip->image[CS4231_REC_FORMAT]);
763 	spin_unlock_irqrestore(&chip->lock, flags);
764 	snd_cs4231_mce_down(chip);
765 
766 #ifdef SNDRV_DEBUG_MCE
767 	snd_printdd("init: (5)\n");
768 #endif
769 }
770 
771 static int snd_cs4231_open(struct snd_cs4231 *chip, unsigned int mode)
772 {
773 	unsigned long flags;
774 
775 	mutex_lock(&chip->open_mutex);
776 	if ((chip->mode & mode)) {
777 		mutex_unlock(&chip->open_mutex);
778 		return -EAGAIN;
779 	}
780 	if (chip->mode & CS4231_MODE_OPEN) {
781 		chip->mode |= mode;
782 		mutex_unlock(&chip->open_mutex);
783 		return 0;
784 	}
785 	/* ok. now enable and ack CODEC IRQ */
786 	spin_lock_irqsave(&chip->lock, flags);
787 	snd_cs4231_out(chip, CS4231_IRQ_STATUS, CS4231_PLAYBACK_IRQ |
788 		       CS4231_RECORD_IRQ |
789 		       CS4231_TIMER_IRQ);
790 	snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
791 	__cs4231_writeb(chip, 0, CS4231U(chip, STATUS));	/* clear IRQ */
792 	__cs4231_writeb(chip, 0, CS4231U(chip, STATUS));	/* clear IRQ */
793 
794 	snd_cs4231_out(chip, CS4231_IRQ_STATUS, CS4231_PLAYBACK_IRQ |
795 		       CS4231_RECORD_IRQ |
796 		       CS4231_TIMER_IRQ);
797 	snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
798 
799 	spin_unlock_irqrestore(&chip->lock, flags);
800 
801 	chip->mode = mode;
802 	mutex_unlock(&chip->open_mutex);
803 	return 0;
804 }
805 
806 static void snd_cs4231_close(struct snd_cs4231 *chip, unsigned int mode)
807 {
808 	unsigned long flags;
809 
810 	mutex_lock(&chip->open_mutex);
811 	chip->mode &= ~mode;
812 	if (chip->mode & CS4231_MODE_OPEN) {
813 		mutex_unlock(&chip->open_mutex);
814 		return;
815 	}
816 	snd_cs4231_calibrate_mute(chip, 1);
817 
818 	/* disable IRQ */
819 	spin_lock_irqsave(&chip->lock, flags);
820 	snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
821 	__cs4231_writeb(chip, 0, CS4231U(chip, STATUS));	/* clear IRQ */
822 	__cs4231_writeb(chip, 0, CS4231U(chip, STATUS));	/* clear IRQ */
823 
824 	/* now disable record & playback */
825 
826 	if (chip->image[CS4231_IFACE_CTRL] &
827 	    (CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO |
828 	     CS4231_RECORD_ENABLE | CS4231_RECORD_PIO)) {
829 		spin_unlock_irqrestore(&chip->lock, flags);
830 		snd_cs4231_mce_up(chip);
831 		spin_lock_irqsave(&chip->lock, flags);
832 		chip->image[CS4231_IFACE_CTRL] &=
833 			~(CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO |
834 			  CS4231_RECORD_ENABLE | CS4231_RECORD_PIO);
835 		snd_cs4231_out(chip, CS4231_IFACE_CTRL,
836 				chip->image[CS4231_IFACE_CTRL]);
837 		spin_unlock_irqrestore(&chip->lock, flags);
838 		snd_cs4231_mce_down(chip);
839 		spin_lock_irqsave(&chip->lock, flags);
840 	}
841 
842 	/* clear IRQ again */
843 	snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
844 	__cs4231_writeb(chip, 0, CS4231U(chip, STATUS));	/* clear IRQ */
845 	__cs4231_writeb(chip, 0, CS4231U(chip, STATUS));	/* clear IRQ */
846 	spin_unlock_irqrestore(&chip->lock, flags);
847 
848 	snd_cs4231_calibrate_mute(chip, 0);
849 
850 	chip->mode = 0;
851 	mutex_unlock(&chip->open_mutex);
852 }
853 
854 /*
855  *  timer open/close
856  */
857 
858 static int snd_cs4231_timer_open(struct snd_timer *timer)
859 {
860 	struct snd_cs4231 *chip = snd_timer_chip(timer);
861 	snd_cs4231_open(chip, CS4231_MODE_TIMER);
862 	return 0;
863 }
864 
865 static int snd_cs4231_timer_close(struct snd_timer *timer)
866 {
867 	struct snd_cs4231 *chip = snd_timer_chip(timer);
868 	snd_cs4231_close(chip, CS4231_MODE_TIMER);
869 	return 0;
870 }
871 
872 static struct snd_timer_hardware snd_cs4231_timer_table = {
873 	.flags		=	SNDRV_TIMER_HW_AUTO,
874 	.resolution	=	9945,
875 	.ticks		=	65535,
876 	.open		=	snd_cs4231_timer_open,
877 	.close		=	snd_cs4231_timer_close,
878 	.c_resolution	=	snd_cs4231_timer_resolution,
879 	.start		=	snd_cs4231_timer_start,
880 	.stop		=	snd_cs4231_timer_stop,
881 };
882 
883 /*
884  *  ok.. exported functions..
885  */
886 
887 static int snd_cs4231_playback_hw_params(struct snd_pcm_substream *substream,
888 					 struct snd_pcm_hw_params *hw_params)
889 {
890 	struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
891 	unsigned char new_pdfr;
892 
893 	new_pdfr = snd_cs4231_get_format(chip, params_format(hw_params),
894 					 params_channels(hw_params)) |
895 		snd_cs4231_get_rate(params_rate(hw_params));
896 	snd_cs4231_playback_format(chip, hw_params, new_pdfr);
897 
898 	return 0;
899 }
900 
901 static int snd_cs4231_playback_prepare(struct snd_pcm_substream *substream)
902 {
903 	struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
904 	struct snd_pcm_runtime *runtime = substream->runtime;
905 	unsigned long flags;
906 	int ret = 0;
907 
908 	spin_lock_irqsave(&chip->lock, flags);
909 
910 	chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE |
911 					    CS4231_PLAYBACK_PIO);
912 
913 	if (WARN_ON(runtime->period_size > 0xffff + 1)) {
914 		ret = -EINVAL;
915 		goto out;
916 	}
917 
918 	chip->p_periods_sent = 0;
919 
920 out:
921 	spin_unlock_irqrestore(&chip->lock, flags);
922 
923 	return ret;
924 }
925 
926 static int snd_cs4231_capture_hw_params(struct snd_pcm_substream *substream,
927 					struct snd_pcm_hw_params *hw_params)
928 {
929 	struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
930 	unsigned char new_cdfr;
931 
932 	new_cdfr = snd_cs4231_get_format(chip, params_format(hw_params),
933 					 params_channels(hw_params)) |
934 		snd_cs4231_get_rate(params_rate(hw_params));
935 	snd_cs4231_capture_format(chip, hw_params, new_cdfr);
936 
937 	return 0;
938 }
939 
940 static int snd_cs4231_capture_prepare(struct snd_pcm_substream *substream)
941 {
942 	struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
943 	unsigned long flags;
944 
945 	spin_lock_irqsave(&chip->lock, flags);
946 	chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_RECORD_ENABLE |
947 					    CS4231_RECORD_PIO);
948 
949 
950 	chip->c_periods_sent = 0;
951 	spin_unlock_irqrestore(&chip->lock, flags);
952 
953 	return 0;
954 }
955 
956 static void snd_cs4231_overrange(struct snd_cs4231 *chip)
957 {
958 	unsigned long flags;
959 	unsigned char res;
960 
961 	spin_lock_irqsave(&chip->lock, flags);
962 	res = snd_cs4231_in(chip, CS4231_TEST_INIT);
963 	spin_unlock_irqrestore(&chip->lock, flags);
964 
965 	/* detect overrange only above 0dB; may be user selectable? */
966 	if (res & (0x08 | 0x02))
967 		chip->capture_substream->runtime->overrange++;
968 }
969 
970 static void snd_cs4231_play_callback(struct snd_cs4231 *chip)
971 {
972 	if (chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE) {
973 		snd_pcm_period_elapsed(chip->playback_substream);
974 		snd_cs4231_advance_dma(&chip->p_dma, chip->playback_substream,
975 					    &chip->p_periods_sent);
976 	}
977 }
978 
979 static void snd_cs4231_capture_callback(struct snd_cs4231 *chip)
980 {
981 	if (chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE) {
982 		snd_pcm_period_elapsed(chip->capture_substream);
983 		snd_cs4231_advance_dma(&chip->c_dma, chip->capture_substream,
984 					    &chip->c_periods_sent);
985 	}
986 }
987 
988 static snd_pcm_uframes_t snd_cs4231_playback_pointer(
989 					struct snd_pcm_substream *substream)
990 {
991 	struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
992 	struct cs4231_dma_control *dma_cont = &chip->p_dma;
993 	size_t ptr;
994 
995 	if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE))
996 		return 0;
997 	ptr = dma_cont->address(dma_cont);
998 	if (ptr != 0)
999 		ptr -= substream->runtime->dma_addr;
1000 
1001 	return bytes_to_frames(substream->runtime, ptr);
1002 }
1003 
1004 static snd_pcm_uframes_t snd_cs4231_capture_pointer(
1005 					struct snd_pcm_substream *substream)
1006 {
1007 	struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1008 	struct cs4231_dma_control *dma_cont = &chip->c_dma;
1009 	size_t ptr;
1010 
1011 	if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE))
1012 		return 0;
1013 	ptr = dma_cont->address(dma_cont);
1014 	if (ptr != 0)
1015 		ptr -= substream->runtime->dma_addr;
1016 
1017 	return bytes_to_frames(substream->runtime, ptr);
1018 }
1019 
1020 static int snd_cs4231_probe(struct snd_cs4231 *chip)
1021 {
1022 	unsigned long flags;
1023 	int i;
1024 	int id = 0;
1025 	int vers = 0;
1026 	unsigned char *ptr;
1027 
1028 	for (i = 0; i < 50; i++) {
1029 		mb();
1030 		if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT)
1031 			msleep(2);
1032 		else {
1033 			spin_lock_irqsave(&chip->lock, flags);
1034 			snd_cs4231_out(chip, CS4231_MISC_INFO, CS4231_MODE2);
1035 			id = snd_cs4231_in(chip, CS4231_MISC_INFO) & 0x0f;
1036 			vers = snd_cs4231_in(chip, CS4231_VERSION);
1037 			spin_unlock_irqrestore(&chip->lock, flags);
1038 			if (id == 0x0a)
1039 				break;	/* this is valid value */
1040 		}
1041 	}
1042 	snd_printdd("cs4231: port = %p, id = 0x%x\n", chip->port, id);
1043 	if (id != 0x0a)
1044 		return -ENODEV;	/* no valid device found */
1045 
1046 	spin_lock_irqsave(&chip->lock, flags);
1047 
1048 	/* clear any pendings IRQ */
1049 	__cs4231_readb(chip, CS4231U(chip, STATUS));
1050 	__cs4231_writeb(chip, 0, CS4231U(chip, STATUS));
1051 	mb();
1052 
1053 	spin_unlock_irqrestore(&chip->lock, flags);
1054 
1055 	chip->image[CS4231_MISC_INFO] = CS4231_MODE2;
1056 	chip->image[CS4231_IFACE_CTRL] =
1057 		chip->image[CS4231_IFACE_CTRL] & ~CS4231_SINGLE_DMA;
1058 	chip->image[CS4231_ALT_FEATURE_1] = 0x80;
1059 	chip->image[CS4231_ALT_FEATURE_2] = 0x01;
1060 	if (vers & 0x20)
1061 		chip->image[CS4231_ALT_FEATURE_2] |= 0x02;
1062 
1063 	ptr = (unsigned char *) &chip->image;
1064 
1065 	snd_cs4231_mce_down(chip);
1066 
1067 	spin_lock_irqsave(&chip->lock, flags);
1068 
1069 	for (i = 0; i < 32; i++)	/* ok.. fill all CS4231 registers */
1070 		snd_cs4231_out(chip, i, *ptr++);
1071 
1072 	spin_unlock_irqrestore(&chip->lock, flags);
1073 
1074 	snd_cs4231_mce_up(chip);
1075 
1076 	snd_cs4231_mce_down(chip);
1077 
1078 	mdelay(2);
1079 
1080 	return 0;		/* all things are ok.. */
1081 }
1082 
1083 static const struct snd_pcm_hardware snd_cs4231_playback = {
1084 	.info			= SNDRV_PCM_INFO_MMAP |
1085 				  SNDRV_PCM_INFO_INTERLEAVED |
1086 				  SNDRV_PCM_INFO_MMAP_VALID |
1087 				  SNDRV_PCM_INFO_SYNC_START,
1088 	.formats		= SNDRV_PCM_FMTBIT_MU_LAW |
1089 				  SNDRV_PCM_FMTBIT_A_LAW |
1090 				  SNDRV_PCM_FMTBIT_IMA_ADPCM |
1091 				  SNDRV_PCM_FMTBIT_U8 |
1092 				  SNDRV_PCM_FMTBIT_S16_LE |
1093 				  SNDRV_PCM_FMTBIT_S16_BE,
1094 	.rates			= SNDRV_PCM_RATE_KNOT |
1095 				  SNDRV_PCM_RATE_8000_48000,
1096 	.rate_min		= 5510,
1097 	.rate_max		= 48000,
1098 	.channels_min		= 1,
1099 	.channels_max		= 2,
1100 	.buffer_bytes_max	= 32 * 1024,
1101 	.period_bytes_min	= 64,
1102 	.period_bytes_max	= 32 * 1024,
1103 	.periods_min		= 1,
1104 	.periods_max		= 1024,
1105 };
1106 
1107 static const struct snd_pcm_hardware snd_cs4231_capture = {
1108 	.info			= SNDRV_PCM_INFO_MMAP |
1109 				  SNDRV_PCM_INFO_INTERLEAVED |
1110 				  SNDRV_PCM_INFO_MMAP_VALID |
1111 				  SNDRV_PCM_INFO_SYNC_START,
1112 	.formats		= SNDRV_PCM_FMTBIT_MU_LAW |
1113 				  SNDRV_PCM_FMTBIT_A_LAW |
1114 				  SNDRV_PCM_FMTBIT_IMA_ADPCM |
1115 				  SNDRV_PCM_FMTBIT_U8 |
1116 				  SNDRV_PCM_FMTBIT_S16_LE |
1117 				  SNDRV_PCM_FMTBIT_S16_BE,
1118 	.rates			= SNDRV_PCM_RATE_KNOT |
1119 				  SNDRV_PCM_RATE_8000_48000,
1120 	.rate_min		= 5510,
1121 	.rate_max		= 48000,
1122 	.channels_min		= 1,
1123 	.channels_max		= 2,
1124 	.buffer_bytes_max	= 32 * 1024,
1125 	.period_bytes_min	= 64,
1126 	.period_bytes_max	= 32 * 1024,
1127 	.periods_min		= 1,
1128 	.periods_max		= 1024,
1129 };
1130 
1131 static int snd_cs4231_playback_open(struct snd_pcm_substream *substream)
1132 {
1133 	struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1134 	struct snd_pcm_runtime *runtime = substream->runtime;
1135 	int err;
1136 
1137 	runtime->hw = snd_cs4231_playback;
1138 
1139 	err = snd_cs4231_open(chip, CS4231_MODE_PLAY);
1140 	if (err < 0)
1141 		return err;
1142 	chip->playback_substream = substream;
1143 	chip->p_periods_sent = 0;
1144 	snd_pcm_set_sync(substream);
1145 	snd_cs4231_xrate(runtime);
1146 
1147 	return 0;
1148 }
1149 
1150 static int snd_cs4231_capture_open(struct snd_pcm_substream *substream)
1151 {
1152 	struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1153 	struct snd_pcm_runtime *runtime = substream->runtime;
1154 	int err;
1155 
1156 	runtime->hw = snd_cs4231_capture;
1157 
1158 	err = snd_cs4231_open(chip, CS4231_MODE_RECORD);
1159 	if (err < 0)
1160 		return err;
1161 	chip->capture_substream = substream;
1162 	chip->c_periods_sent = 0;
1163 	snd_pcm_set_sync(substream);
1164 	snd_cs4231_xrate(runtime);
1165 
1166 	return 0;
1167 }
1168 
1169 static int snd_cs4231_playback_close(struct snd_pcm_substream *substream)
1170 {
1171 	struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1172 
1173 	snd_cs4231_close(chip, CS4231_MODE_PLAY);
1174 	chip->playback_substream = NULL;
1175 
1176 	return 0;
1177 }
1178 
1179 static int snd_cs4231_capture_close(struct snd_pcm_substream *substream)
1180 {
1181 	struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1182 
1183 	snd_cs4231_close(chip, CS4231_MODE_RECORD);
1184 	chip->capture_substream = NULL;
1185 
1186 	return 0;
1187 }
1188 
1189 /* XXX We can do some power-management, in particular on EBUS using
1190  * XXX the audio AUXIO register...
1191  */
1192 
1193 static const struct snd_pcm_ops snd_cs4231_playback_ops = {
1194 	.open		=	snd_cs4231_playback_open,
1195 	.close		=	snd_cs4231_playback_close,
1196 	.ioctl		=	snd_pcm_lib_ioctl,
1197 	.hw_params	=	snd_cs4231_playback_hw_params,
1198 	.prepare	=	snd_cs4231_playback_prepare,
1199 	.trigger	=	snd_cs4231_trigger,
1200 	.pointer	=	snd_cs4231_playback_pointer,
1201 };
1202 
1203 static const struct snd_pcm_ops snd_cs4231_capture_ops = {
1204 	.open		=	snd_cs4231_capture_open,
1205 	.close		=	snd_cs4231_capture_close,
1206 	.ioctl		=	snd_pcm_lib_ioctl,
1207 	.hw_params	=	snd_cs4231_capture_hw_params,
1208 	.prepare	=	snd_cs4231_capture_prepare,
1209 	.trigger	=	snd_cs4231_trigger,
1210 	.pointer	=	snd_cs4231_capture_pointer,
1211 };
1212 
1213 static int snd_cs4231_pcm(struct snd_card *card)
1214 {
1215 	struct snd_cs4231 *chip = card->private_data;
1216 	struct snd_pcm *pcm;
1217 	int err;
1218 
1219 	err = snd_pcm_new(card, "CS4231", 0, 1, 1, &pcm);
1220 	if (err < 0)
1221 		return err;
1222 
1223 	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
1224 			&snd_cs4231_playback_ops);
1225 	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
1226 			&snd_cs4231_capture_ops);
1227 
1228 	/* global setup */
1229 	pcm->private_data = chip;
1230 	pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
1231 	strcpy(pcm->name, "CS4231");
1232 
1233 	snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV,
1234 				       &chip->op->dev, 64 * 1024, 128 * 1024);
1235 
1236 	chip->pcm = pcm;
1237 
1238 	return 0;
1239 }
1240 
1241 static int snd_cs4231_timer(struct snd_card *card)
1242 {
1243 	struct snd_cs4231 *chip = card->private_data;
1244 	struct snd_timer *timer;
1245 	struct snd_timer_id tid;
1246 	int err;
1247 
1248 	/* Timer initialization */
1249 	tid.dev_class = SNDRV_TIMER_CLASS_CARD;
1250 	tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
1251 	tid.card = card->number;
1252 	tid.device = 0;
1253 	tid.subdevice = 0;
1254 	err = snd_timer_new(card, "CS4231", &tid, &timer);
1255 	if (err < 0)
1256 		return err;
1257 	strcpy(timer->name, "CS4231");
1258 	timer->private_data = chip;
1259 	timer->hw = snd_cs4231_timer_table;
1260 	chip->timer = timer;
1261 
1262 	return 0;
1263 }
1264 
1265 /*
1266  *  MIXER part
1267  */
1268 
1269 static int snd_cs4231_info_mux(struct snd_kcontrol *kcontrol,
1270 			       struct snd_ctl_elem_info *uinfo)
1271 {
1272 	static const char * const texts[4] = {
1273 		"Line", "CD", "Mic", "Mix"
1274 	};
1275 
1276 	return snd_ctl_enum_info(uinfo, 2, 4, texts);
1277 }
1278 
1279 static int snd_cs4231_get_mux(struct snd_kcontrol *kcontrol,
1280 			      struct snd_ctl_elem_value *ucontrol)
1281 {
1282 	struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1283 	unsigned long flags;
1284 
1285 	spin_lock_irqsave(&chip->lock, flags);
1286 	ucontrol->value.enumerated.item[0] =
1287 		(chip->image[CS4231_LEFT_INPUT] & CS4231_MIXS_ALL) >> 6;
1288 	ucontrol->value.enumerated.item[1] =
1289 		(chip->image[CS4231_RIGHT_INPUT] & CS4231_MIXS_ALL) >> 6;
1290 	spin_unlock_irqrestore(&chip->lock, flags);
1291 
1292 	return 0;
1293 }
1294 
1295 static int snd_cs4231_put_mux(struct snd_kcontrol *kcontrol,
1296 			      struct snd_ctl_elem_value *ucontrol)
1297 {
1298 	struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1299 	unsigned long flags;
1300 	unsigned short left, right;
1301 	int change;
1302 
1303 	if (ucontrol->value.enumerated.item[0] > 3 ||
1304 	    ucontrol->value.enumerated.item[1] > 3)
1305 		return -EINVAL;
1306 	left = ucontrol->value.enumerated.item[0] << 6;
1307 	right = ucontrol->value.enumerated.item[1] << 6;
1308 
1309 	spin_lock_irqsave(&chip->lock, flags);
1310 
1311 	left = (chip->image[CS4231_LEFT_INPUT] & ~CS4231_MIXS_ALL) | left;
1312 	right = (chip->image[CS4231_RIGHT_INPUT] & ~CS4231_MIXS_ALL) | right;
1313 	change = left != chip->image[CS4231_LEFT_INPUT] ||
1314 		 right != chip->image[CS4231_RIGHT_INPUT];
1315 	snd_cs4231_out(chip, CS4231_LEFT_INPUT, left);
1316 	snd_cs4231_out(chip, CS4231_RIGHT_INPUT, right);
1317 
1318 	spin_unlock_irqrestore(&chip->lock, flags);
1319 
1320 	return change;
1321 }
1322 
1323 static int snd_cs4231_info_single(struct snd_kcontrol *kcontrol,
1324 				  struct snd_ctl_elem_info *uinfo)
1325 {
1326 	int mask = (kcontrol->private_value >> 16) & 0xff;
1327 
1328 	uinfo->type = (mask == 1) ?
1329 		SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1330 	uinfo->count = 1;
1331 	uinfo->value.integer.min = 0;
1332 	uinfo->value.integer.max = mask;
1333 
1334 	return 0;
1335 }
1336 
1337 static int snd_cs4231_get_single(struct snd_kcontrol *kcontrol,
1338 				 struct snd_ctl_elem_value *ucontrol)
1339 {
1340 	struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1341 	unsigned long flags;
1342 	int reg = kcontrol->private_value & 0xff;
1343 	int shift = (kcontrol->private_value >> 8) & 0xff;
1344 	int mask = (kcontrol->private_value >> 16) & 0xff;
1345 	int invert = (kcontrol->private_value >> 24) & 0xff;
1346 
1347 	spin_lock_irqsave(&chip->lock, flags);
1348 
1349 	ucontrol->value.integer.value[0] = (chip->image[reg] >> shift) & mask;
1350 
1351 	spin_unlock_irqrestore(&chip->lock, flags);
1352 
1353 	if (invert)
1354 		ucontrol->value.integer.value[0] =
1355 			(mask - ucontrol->value.integer.value[0]);
1356 
1357 	return 0;
1358 }
1359 
1360 static int snd_cs4231_put_single(struct snd_kcontrol *kcontrol,
1361 				 struct snd_ctl_elem_value *ucontrol)
1362 {
1363 	struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1364 	unsigned long flags;
1365 	int reg = kcontrol->private_value & 0xff;
1366 	int shift = (kcontrol->private_value >> 8) & 0xff;
1367 	int mask = (kcontrol->private_value >> 16) & 0xff;
1368 	int invert = (kcontrol->private_value >> 24) & 0xff;
1369 	int change;
1370 	unsigned short val;
1371 
1372 	val = (ucontrol->value.integer.value[0] & mask);
1373 	if (invert)
1374 		val = mask - val;
1375 	val <<= shift;
1376 
1377 	spin_lock_irqsave(&chip->lock, flags);
1378 
1379 	val = (chip->image[reg] & ~(mask << shift)) | val;
1380 	change = val != chip->image[reg];
1381 	snd_cs4231_out(chip, reg, val);
1382 
1383 	spin_unlock_irqrestore(&chip->lock, flags);
1384 
1385 	return change;
1386 }
1387 
1388 static int snd_cs4231_info_double(struct snd_kcontrol *kcontrol,
1389 				  struct snd_ctl_elem_info *uinfo)
1390 {
1391 	int mask = (kcontrol->private_value >> 24) & 0xff;
1392 
1393 	uinfo->type = mask == 1 ?
1394 		SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1395 	uinfo->count = 2;
1396 	uinfo->value.integer.min = 0;
1397 	uinfo->value.integer.max = mask;
1398 
1399 	return 0;
1400 }
1401 
1402 static int snd_cs4231_get_double(struct snd_kcontrol *kcontrol,
1403 				 struct snd_ctl_elem_value *ucontrol)
1404 {
1405 	struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1406 	unsigned long flags;
1407 	int left_reg = kcontrol->private_value & 0xff;
1408 	int right_reg = (kcontrol->private_value >> 8) & 0xff;
1409 	int shift_left = (kcontrol->private_value >> 16) & 0x07;
1410 	int shift_right = (kcontrol->private_value >> 19) & 0x07;
1411 	int mask = (kcontrol->private_value >> 24) & 0xff;
1412 	int invert = (kcontrol->private_value >> 22) & 1;
1413 
1414 	spin_lock_irqsave(&chip->lock, flags);
1415 
1416 	ucontrol->value.integer.value[0] =
1417 		(chip->image[left_reg] >> shift_left) & mask;
1418 	ucontrol->value.integer.value[1] =
1419 		(chip->image[right_reg] >> shift_right) & mask;
1420 
1421 	spin_unlock_irqrestore(&chip->lock, flags);
1422 
1423 	if (invert) {
1424 		ucontrol->value.integer.value[0] =
1425 			(mask - ucontrol->value.integer.value[0]);
1426 		ucontrol->value.integer.value[1] =
1427 			(mask - ucontrol->value.integer.value[1]);
1428 	}
1429 
1430 	return 0;
1431 }
1432 
1433 static int snd_cs4231_put_double(struct snd_kcontrol *kcontrol,
1434 				 struct snd_ctl_elem_value *ucontrol)
1435 {
1436 	struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1437 	unsigned long flags;
1438 	int left_reg = kcontrol->private_value & 0xff;
1439 	int right_reg = (kcontrol->private_value >> 8) & 0xff;
1440 	int shift_left = (kcontrol->private_value >> 16) & 0x07;
1441 	int shift_right = (kcontrol->private_value >> 19) & 0x07;
1442 	int mask = (kcontrol->private_value >> 24) & 0xff;
1443 	int invert = (kcontrol->private_value >> 22) & 1;
1444 	int change;
1445 	unsigned short val1, val2;
1446 
1447 	val1 = ucontrol->value.integer.value[0] & mask;
1448 	val2 = ucontrol->value.integer.value[1] & mask;
1449 	if (invert) {
1450 		val1 = mask - val1;
1451 		val2 = mask - val2;
1452 	}
1453 	val1 <<= shift_left;
1454 	val2 <<= shift_right;
1455 
1456 	spin_lock_irqsave(&chip->lock, flags);
1457 
1458 	val1 = (chip->image[left_reg] & ~(mask << shift_left)) | val1;
1459 	val2 = (chip->image[right_reg] & ~(mask << shift_right)) | val2;
1460 	change = val1 != chip->image[left_reg];
1461 	change |= val2 != chip->image[right_reg];
1462 	snd_cs4231_out(chip, left_reg, val1);
1463 	snd_cs4231_out(chip, right_reg, val2);
1464 
1465 	spin_unlock_irqrestore(&chip->lock, flags);
1466 
1467 	return change;
1468 }
1469 
1470 #define CS4231_SINGLE(xname, xindex, reg, shift, mask, invert) \
1471 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), .index = (xindex), \
1472   .info = snd_cs4231_info_single,	\
1473   .get = snd_cs4231_get_single, .put = snd_cs4231_put_single,	\
1474   .private_value = (reg) | ((shift) << 8) | ((mask) << 16) | ((invert) << 24) }
1475 
1476 #define CS4231_DOUBLE(xname, xindex, left_reg, right_reg, shift_left, \
1477 			shift_right, mask, invert) \
1478 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), .index = (xindex), \
1479   .info = snd_cs4231_info_double,	\
1480   .get = snd_cs4231_get_double, .put = snd_cs4231_put_double,	\
1481   .private_value = (left_reg) | ((right_reg) << 8) | ((shift_left) << 16) | \
1482 		   ((shift_right) << 19) | ((mask) << 24) | ((invert) << 22) }
1483 
1484 static struct snd_kcontrol_new snd_cs4231_controls[] = {
1485 CS4231_DOUBLE("PCM Playback Switch", 0, CS4231_LEFT_OUTPUT,
1486 		CS4231_RIGHT_OUTPUT, 7, 7, 1, 1),
1487 CS4231_DOUBLE("PCM Playback Volume", 0, CS4231_LEFT_OUTPUT,
1488 		CS4231_RIGHT_OUTPUT, 0, 0, 63, 1),
1489 CS4231_DOUBLE("Line Playback Switch", 0, CS4231_LEFT_LINE_IN,
1490 		CS4231_RIGHT_LINE_IN, 7, 7, 1, 1),
1491 CS4231_DOUBLE("Line Playback Volume", 0, CS4231_LEFT_LINE_IN,
1492 		CS4231_RIGHT_LINE_IN, 0, 0, 31, 1),
1493 CS4231_DOUBLE("Aux Playback Switch", 0, CS4231_AUX1_LEFT_INPUT,
1494 		CS4231_AUX1_RIGHT_INPUT, 7, 7, 1, 1),
1495 CS4231_DOUBLE("Aux Playback Volume", 0, CS4231_AUX1_LEFT_INPUT,
1496 		CS4231_AUX1_RIGHT_INPUT, 0, 0, 31, 1),
1497 CS4231_DOUBLE("Aux Playback Switch", 1, CS4231_AUX2_LEFT_INPUT,
1498 		CS4231_AUX2_RIGHT_INPUT, 7, 7, 1, 1),
1499 CS4231_DOUBLE("Aux Playback Volume", 1, CS4231_AUX2_LEFT_INPUT,
1500 		CS4231_AUX2_RIGHT_INPUT, 0, 0, 31, 1),
1501 CS4231_SINGLE("Mono Playback Switch", 0, CS4231_MONO_CTRL, 7, 1, 1),
1502 CS4231_SINGLE("Mono Playback Volume", 0, CS4231_MONO_CTRL, 0, 15, 1),
1503 CS4231_SINGLE("Mono Output Playback Switch", 0, CS4231_MONO_CTRL, 6, 1, 1),
1504 CS4231_SINGLE("Mono Output Playback Bypass", 0, CS4231_MONO_CTRL, 5, 1, 0),
1505 CS4231_DOUBLE("Capture Volume", 0, CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT, 0, 0,
1506 		15, 0),
1507 {
1508 	.iface	= SNDRV_CTL_ELEM_IFACE_MIXER,
1509 	.name	= "Capture Source",
1510 	.info	= snd_cs4231_info_mux,
1511 	.get	= snd_cs4231_get_mux,
1512 	.put	= snd_cs4231_put_mux,
1513 },
1514 CS4231_DOUBLE("Mic Boost", 0, CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT, 5, 5,
1515 		1, 0),
1516 CS4231_SINGLE("Loopback Capture Switch", 0, CS4231_LOOPBACK, 0, 1, 0),
1517 CS4231_SINGLE("Loopback Capture Volume", 0, CS4231_LOOPBACK, 2, 63, 1),
1518 /* SPARC specific uses of XCTL{0,1} general purpose outputs.  */
1519 CS4231_SINGLE("Line Out Switch", 0, CS4231_PIN_CTRL, 6, 1, 1),
1520 CS4231_SINGLE("Headphone Out Switch", 0, CS4231_PIN_CTRL, 7, 1, 1)
1521 };
1522 
1523 static int snd_cs4231_mixer(struct snd_card *card)
1524 {
1525 	struct snd_cs4231 *chip = card->private_data;
1526 	int err, idx;
1527 
1528 	if (snd_BUG_ON(!chip || !chip->pcm))
1529 		return -EINVAL;
1530 
1531 	strcpy(card->mixername, chip->pcm->name);
1532 
1533 	for (idx = 0; idx < ARRAY_SIZE(snd_cs4231_controls); idx++) {
1534 		err = snd_ctl_add(card,
1535 				 snd_ctl_new1(&snd_cs4231_controls[idx], chip));
1536 		if (err < 0)
1537 			return err;
1538 	}
1539 	return 0;
1540 }
1541 
1542 static int dev;
1543 
1544 static int cs4231_attach_begin(struct platform_device *op,
1545 			       struct snd_card **rcard)
1546 {
1547 	struct snd_card *card;
1548 	struct snd_cs4231 *chip;
1549 	int err;
1550 
1551 	*rcard = NULL;
1552 
1553 	if (dev >= SNDRV_CARDS)
1554 		return -ENODEV;
1555 
1556 	if (!enable[dev]) {
1557 		dev++;
1558 		return -ENOENT;
1559 	}
1560 
1561 	err = snd_card_new(&op->dev, index[dev], id[dev], THIS_MODULE,
1562 			   sizeof(struct snd_cs4231), &card);
1563 	if (err < 0)
1564 		return err;
1565 
1566 	strcpy(card->driver, "CS4231");
1567 	strcpy(card->shortname, "Sun CS4231");
1568 
1569 	chip = card->private_data;
1570 	chip->card = card;
1571 
1572 	*rcard = card;
1573 	return 0;
1574 }
1575 
1576 static int cs4231_attach_finish(struct snd_card *card)
1577 {
1578 	struct snd_cs4231 *chip = card->private_data;
1579 	int err;
1580 
1581 	err = snd_cs4231_pcm(card);
1582 	if (err < 0)
1583 		goto out_err;
1584 
1585 	err = snd_cs4231_mixer(card);
1586 	if (err < 0)
1587 		goto out_err;
1588 
1589 	err = snd_cs4231_timer(card);
1590 	if (err < 0)
1591 		goto out_err;
1592 
1593 	err = snd_card_register(card);
1594 	if (err < 0)
1595 		goto out_err;
1596 
1597 	dev_set_drvdata(&chip->op->dev, chip);
1598 
1599 	dev++;
1600 	return 0;
1601 
1602 out_err:
1603 	snd_card_free(card);
1604 	return err;
1605 }
1606 
1607 #ifdef SBUS_SUPPORT
1608 
1609 static irqreturn_t snd_cs4231_sbus_interrupt(int irq, void *dev_id)
1610 {
1611 	unsigned long flags;
1612 	unsigned char status;
1613 	u32 csr;
1614 	struct snd_cs4231 *chip = dev_id;
1615 
1616 	/*This is IRQ is not raised by the cs4231*/
1617 	if (!(__cs4231_readb(chip, CS4231U(chip, STATUS)) & CS4231_GLOBALIRQ))
1618 		return IRQ_NONE;
1619 
1620 	/* ACK the APC interrupt. */
1621 	csr = sbus_readl(chip->port + APCCSR);
1622 
1623 	sbus_writel(csr, chip->port + APCCSR);
1624 
1625 	if ((csr & APC_PDMA_READY) &&
1626 	    (csr & APC_PLAY_INT) &&
1627 	    (csr & APC_XINT_PNVA) &&
1628 	    !(csr & APC_XINT_EMPT))
1629 			snd_cs4231_play_callback(chip);
1630 
1631 	if ((csr & APC_CDMA_READY) &&
1632 	    (csr & APC_CAPT_INT) &&
1633 	    (csr & APC_XINT_CNVA) &&
1634 	    !(csr & APC_XINT_EMPT))
1635 			snd_cs4231_capture_callback(chip);
1636 
1637 	status = snd_cs4231_in(chip, CS4231_IRQ_STATUS);
1638 
1639 	if (status & CS4231_TIMER_IRQ) {
1640 		if (chip->timer)
1641 			snd_timer_interrupt(chip->timer, chip->timer->sticks);
1642 	}
1643 
1644 	if ((status & CS4231_RECORD_IRQ) && (csr & APC_CDMA_READY))
1645 		snd_cs4231_overrange(chip);
1646 
1647 	/* ACK the CS4231 interrupt. */
1648 	spin_lock_irqsave(&chip->lock, flags);
1649 	snd_cs4231_outm(chip, CS4231_IRQ_STATUS, ~CS4231_ALL_IRQS | ~status, 0);
1650 	spin_unlock_irqrestore(&chip->lock, flags);
1651 
1652 	return IRQ_HANDLED;
1653 }
1654 
1655 /*
1656  * SBUS DMA routines
1657  */
1658 
1659 static int sbus_dma_request(struct cs4231_dma_control *dma_cont,
1660 			    dma_addr_t bus_addr, size_t len)
1661 {
1662 	unsigned long flags;
1663 	u32 test, csr;
1664 	int err;
1665 	struct sbus_dma_info *base = &dma_cont->sbus_info;
1666 
1667 	if (len >= (1 << 24))
1668 		return -EINVAL;
1669 	spin_lock_irqsave(&base->lock, flags);
1670 	csr = sbus_readl(base->regs + APCCSR);
1671 	err = -EINVAL;
1672 	test = APC_CDMA_READY;
1673 	if (base->dir == APC_PLAY)
1674 		test = APC_PDMA_READY;
1675 	if (!(csr & test))
1676 		goto out;
1677 	err = -EBUSY;
1678 	test = APC_XINT_CNVA;
1679 	if (base->dir == APC_PLAY)
1680 		test = APC_XINT_PNVA;
1681 	if (!(csr & test))
1682 		goto out;
1683 	err = 0;
1684 	sbus_writel(bus_addr, base->regs + base->dir + APCNVA);
1685 	sbus_writel(len, base->regs + base->dir + APCNC);
1686 out:
1687 	spin_unlock_irqrestore(&base->lock, flags);
1688 	return err;
1689 }
1690 
1691 static void sbus_dma_prepare(struct cs4231_dma_control *dma_cont, int d)
1692 {
1693 	unsigned long flags;
1694 	u32 csr, test;
1695 	struct sbus_dma_info *base = &dma_cont->sbus_info;
1696 
1697 	spin_lock_irqsave(&base->lock, flags);
1698 	csr = sbus_readl(base->regs + APCCSR);
1699 	test =  APC_GENL_INT | APC_PLAY_INT | APC_XINT_ENA |
1700 		APC_XINT_PLAY | APC_XINT_PEMP | APC_XINT_GENL |
1701 		 APC_XINT_PENA;
1702 	if (base->dir == APC_RECORD)
1703 		test = APC_GENL_INT | APC_CAPT_INT | APC_XINT_ENA |
1704 			APC_XINT_CAPT | APC_XINT_CEMP | APC_XINT_GENL;
1705 	csr |= test;
1706 	sbus_writel(csr, base->regs + APCCSR);
1707 	spin_unlock_irqrestore(&base->lock, flags);
1708 }
1709 
1710 static void sbus_dma_enable(struct cs4231_dma_control *dma_cont, int on)
1711 {
1712 	unsigned long flags;
1713 	u32 csr, shift;
1714 	struct sbus_dma_info *base = &dma_cont->sbus_info;
1715 
1716 	spin_lock_irqsave(&base->lock, flags);
1717 	if (!on) {
1718 		sbus_writel(0, base->regs + base->dir + APCNC);
1719 		sbus_writel(0, base->regs + base->dir + APCNVA);
1720 		if (base->dir == APC_PLAY) {
1721 			sbus_writel(0, base->regs + base->dir + APCC);
1722 			sbus_writel(0, base->regs + base->dir + APCVA);
1723 		}
1724 
1725 		udelay(1200);
1726 	}
1727 	csr = sbus_readl(base->regs + APCCSR);
1728 	shift = 0;
1729 	if (base->dir == APC_PLAY)
1730 		shift = 1;
1731 	if (on)
1732 		csr &= ~(APC_CPAUSE << shift);
1733 	else
1734 		csr |= (APC_CPAUSE << shift);
1735 	sbus_writel(csr, base->regs + APCCSR);
1736 	if (on)
1737 		csr |= (APC_CDMA_READY << shift);
1738 	else
1739 		csr &= ~(APC_CDMA_READY << shift);
1740 	sbus_writel(csr, base->regs + APCCSR);
1741 
1742 	spin_unlock_irqrestore(&base->lock, flags);
1743 }
1744 
1745 static unsigned int sbus_dma_addr(struct cs4231_dma_control *dma_cont)
1746 {
1747 	struct sbus_dma_info *base = &dma_cont->sbus_info;
1748 
1749 	return sbus_readl(base->regs + base->dir + APCVA);
1750 }
1751 
1752 /*
1753  * Init and exit routines
1754  */
1755 
1756 static int snd_cs4231_sbus_free(struct snd_cs4231 *chip)
1757 {
1758 	struct platform_device *op = chip->op;
1759 
1760 	if (chip->irq[0])
1761 		free_irq(chip->irq[0], chip);
1762 
1763 	if (chip->port)
1764 		of_iounmap(&op->resource[0], chip->port, chip->regs_size);
1765 
1766 	return 0;
1767 }
1768 
1769 static int snd_cs4231_sbus_dev_free(struct snd_device *device)
1770 {
1771 	struct snd_cs4231 *cp = device->device_data;
1772 
1773 	return snd_cs4231_sbus_free(cp);
1774 }
1775 
1776 static struct snd_device_ops snd_cs4231_sbus_dev_ops = {
1777 	.dev_free	=	snd_cs4231_sbus_dev_free,
1778 };
1779 
1780 static int snd_cs4231_sbus_create(struct snd_card *card,
1781 				  struct platform_device *op,
1782 				  int dev)
1783 {
1784 	struct snd_cs4231 *chip = card->private_data;
1785 	int err;
1786 
1787 	spin_lock_init(&chip->lock);
1788 	spin_lock_init(&chip->c_dma.sbus_info.lock);
1789 	spin_lock_init(&chip->p_dma.sbus_info.lock);
1790 	mutex_init(&chip->mce_mutex);
1791 	mutex_init(&chip->open_mutex);
1792 	chip->op = op;
1793 	chip->regs_size = resource_size(&op->resource[0]);
1794 	memcpy(&chip->image, &snd_cs4231_original_image,
1795 	       sizeof(snd_cs4231_original_image));
1796 
1797 	chip->port = of_ioremap(&op->resource[0], 0,
1798 				chip->regs_size, "cs4231");
1799 	if (!chip->port) {
1800 		snd_printdd("cs4231-%d: Unable to map chip registers.\n", dev);
1801 		return -EIO;
1802 	}
1803 
1804 	chip->c_dma.sbus_info.regs = chip->port;
1805 	chip->p_dma.sbus_info.regs = chip->port;
1806 	chip->c_dma.sbus_info.dir = APC_RECORD;
1807 	chip->p_dma.sbus_info.dir = APC_PLAY;
1808 
1809 	chip->p_dma.prepare = sbus_dma_prepare;
1810 	chip->p_dma.enable = sbus_dma_enable;
1811 	chip->p_dma.request = sbus_dma_request;
1812 	chip->p_dma.address = sbus_dma_addr;
1813 
1814 	chip->c_dma.prepare = sbus_dma_prepare;
1815 	chip->c_dma.enable = sbus_dma_enable;
1816 	chip->c_dma.request = sbus_dma_request;
1817 	chip->c_dma.address = sbus_dma_addr;
1818 
1819 	if (request_irq(op->archdata.irqs[0], snd_cs4231_sbus_interrupt,
1820 			IRQF_SHARED, "cs4231", chip)) {
1821 		snd_printdd("cs4231-%d: Unable to grab SBUS IRQ %d\n",
1822 			    dev, op->archdata.irqs[0]);
1823 		snd_cs4231_sbus_free(chip);
1824 		return -EBUSY;
1825 	}
1826 	chip->irq[0] = op->archdata.irqs[0];
1827 
1828 	if (snd_cs4231_probe(chip) < 0) {
1829 		snd_cs4231_sbus_free(chip);
1830 		return -ENODEV;
1831 	}
1832 	snd_cs4231_init(chip);
1833 
1834 	if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL,
1835 				  chip, &snd_cs4231_sbus_dev_ops)) < 0) {
1836 		snd_cs4231_sbus_free(chip);
1837 		return err;
1838 	}
1839 
1840 	return 0;
1841 }
1842 
1843 static int cs4231_sbus_probe(struct platform_device *op)
1844 {
1845 	struct resource *rp = &op->resource[0];
1846 	struct snd_card *card;
1847 	int err;
1848 
1849 	err = cs4231_attach_begin(op, &card);
1850 	if (err)
1851 		return err;
1852 
1853 	sprintf(card->longname, "%s at 0x%02lx:0x%016Lx, irq %d",
1854 		card->shortname,
1855 		rp->flags & 0xffL,
1856 		(unsigned long long)rp->start,
1857 		op->archdata.irqs[0]);
1858 
1859 	err = snd_cs4231_sbus_create(card, op, dev);
1860 	if (err < 0) {
1861 		snd_card_free(card);
1862 		return err;
1863 	}
1864 
1865 	return cs4231_attach_finish(card);
1866 }
1867 #endif
1868 
1869 #ifdef EBUS_SUPPORT
1870 
1871 static void snd_cs4231_ebus_play_callback(struct ebus_dma_info *p, int event,
1872 					  void *cookie)
1873 {
1874 	struct snd_cs4231 *chip = cookie;
1875 
1876 	snd_cs4231_play_callback(chip);
1877 }
1878 
1879 static void snd_cs4231_ebus_capture_callback(struct ebus_dma_info *p,
1880 					     int event, void *cookie)
1881 {
1882 	struct snd_cs4231 *chip = cookie;
1883 
1884 	snd_cs4231_capture_callback(chip);
1885 }
1886 
1887 /*
1888  * EBUS DMA wrappers
1889  */
1890 
1891 static int _ebus_dma_request(struct cs4231_dma_control *dma_cont,
1892 			     dma_addr_t bus_addr, size_t len)
1893 {
1894 	return ebus_dma_request(&dma_cont->ebus_info, bus_addr, len);
1895 }
1896 
1897 static void _ebus_dma_enable(struct cs4231_dma_control *dma_cont, int on)
1898 {
1899 	ebus_dma_enable(&dma_cont->ebus_info, on);
1900 }
1901 
1902 static void _ebus_dma_prepare(struct cs4231_dma_control *dma_cont, int dir)
1903 {
1904 	ebus_dma_prepare(&dma_cont->ebus_info, dir);
1905 }
1906 
1907 static unsigned int _ebus_dma_addr(struct cs4231_dma_control *dma_cont)
1908 {
1909 	return ebus_dma_addr(&dma_cont->ebus_info);
1910 }
1911 
1912 /*
1913  * Init and exit routines
1914  */
1915 
1916 static int snd_cs4231_ebus_free(struct snd_cs4231 *chip)
1917 {
1918 	struct platform_device *op = chip->op;
1919 
1920 	if (chip->c_dma.ebus_info.regs) {
1921 		ebus_dma_unregister(&chip->c_dma.ebus_info);
1922 		of_iounmap(&op->resource[2], chip->c_dma.ebus_info.regs, 0x10);
1923 	}
1924 	if (chip->p_dma.ebus_info.regs) {
1925 		ebus_dma_unregister(&chip->p_dma.ebus_info);
1926 		of_iounmap(&op->resource[1], chip->p_dma.ebus_info.regs, 0x10);
1927 	}
1928 
1929 	if (chip->port)
1930 		of_iounmap(&op->resource[0], chip->port, 0x10);
1931 
1932 	return 0;
1933 }
1934 
1935 static int snd_cs4231_ebus_dev_free(struct snd_device *device)
1936 {
1937 	struct snd_cs4231 *cp = device->device_data;
1938 
1939 	return snd_cs4231_ebus_free(cp);
1940 }
1941 
1942 static struct snd_device_ops snd_cs4231_ebus_dev_ops = {
1943 	.dev_free	=	snd_cs4231_ebus_dev_free,
1944 };
1945 
1946 static int snd_cs4231_ebus_create(struct snd_card *card,
1947 				  struct platform_device *op,
1948 				  int dev)
1949 {
1950 	struct snd_cs4231 *chip = card->private_data;
1951 	int err;
1952 
1953 	spin_lock_init(&chip->lock);
1954 	spin_lock_init(&chip->c_dma.ebus_info.lock);
1955 	spin_lock_init(&chip->p_dma.ebus_info.lock);
1956 	mutex_init(&chip->mce_mutex);
1957 	mutex_init(&chip->open_mutex);
1958 	chip->flags |= CS4231_FLAG_EBUS;
1959 	chip->op = op;
1960 	memcpy(&chip->image, &snd_cs4231_original_image,
1961 	       sizeof(snd_cs4231_original_image));
1962 	strcpy(chip->c_dma.ebus_info.name, "cs4231(capture)");
1963 	chip->c_dma.ebus_info.flags = EBUS_DMA_FLAG_USE_EBDMA_HANDLER;
1964 	chip->c_dma.ebus_info.callback = snd_cs4231_ebus_capture_callback;
1965 	chip->c_dma.ebus_info.client_cookie = chip;
1966 	chip->c_dma.ebus_info.irq = op->archdata.irqs[0];
1967 	strcpy(chip->p_dma.ebus_info.name, "cs4231(play)");
1968 	chip->p_dma.ebus_info.flags = EBUS_DMA_FLAG_USE_EBDMA_HANDLER;
1969 	chip->p_dma.ebus_info.callback = snd_cs4231_ebus_play_callback;
1970 	chip->p_dma.ebus_info.client_cookie = chip;
1971 	chip->p_dma.ebus_info.irq = op->archdata.irqs[1];
1972 
1973 	chip->p_dma.prepare = _ebus_dma_prepare;
1974 	chip->p_dma.enable = _ebus_dma_enable;
1975 	chip->p_dma.request = _ebus_dma_request;
1976 	chip->p_dma.address = _ebus_dma_addr;
1977 
1978 	chip->c_dma.prepare = _ebus_dma_prepare;
1979 	chip->c_dma.enable = _ebus_dma_enable;
1980 	chip->c_dma.request = _ebus_dma_request;
1981 	chip->c_dma.address = _ebus_dma_addr;
1982 
1983 	chip->port = of_ioremap(&op->resource[0], 0, 0x10, "cs4231");
1984 	chip->p_dma.ebus_info.regs =
1985 		of_ioremap(&op->resource[1], 0, 0x10, "cs4231_pdma");
1986 	chip->c_dma.ebus_info.regs =
1987 		of_ioremap(&op->resource[2], 0, 0x10, "cs4231_cdma");
1988 	if (!chip->port || !chip->p_dma.ebus_info.regs ||
1989 	    !chip->c_dma.ebus_info.regs) {
1990 		snd_cs4231_ebus_free(chip);
1991 		snd_printdd("cs4231-%d: Unable to map chip registers.\n", dev);
1992 		return -EIO;
1993 	}
1994 
1995 	if (ebus_dma_register(&chip->c_dma.ebus_info)) {
1996 		snd_cs4231_ebus_free(chip);
1997 		snd_printdd("cs4231-%d: Unable to register EBUS capture DMA\n",
1998 			    dev);
1999 		return -EBUSY;
2000 	}
2001 	if (ebus_dma_irq_enable(&chip->c_dma.ebus_info, 1)) {
2002 		snd_cs4231_ebus_free(chip);
2003 		snd_printdd("cs4231-%d: Unable to enable EBUS capture IRQ\n",
2004 			    dev);
2005 		return -EBUSY;
2006 	}
2007 
2008 	if (ebus_dma_register(&chip->p_dma.ebus_info)) {
2009 		snd_cs4231_ebus_free(chip);
2010 		snd_printdd("cs4231-%d: Unable to register EBUS play DMA\n",
2011 			    dev);
2012 		return -EBUSY;
2013 	}
2014 	if (ebus_dma_irq_enable(&chip->p_dma.ebus_info, 1)) {
2015 		snd_cs4231_ebus_free(chip);
2016 		snd_printdd("cs4231-%d: Unable to enable EBUS play IRQ\n", dev);
2017 		return -EBUSY;
2018 	}
2019 
2020 	if (snd_cs4231_probe(chip) < 0) {
2021 		snd_cs4231_ebus_free(chip);
2022 		return -ENODEV;
2023 	}
2024 	snd_cs4231_init(chip);
2025 
2026 	if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL,
2027 				  chip, &snd_cs4231_ebus_dev_ops)) < 0) {
2028 		snd_cs4231_ebus_free(chip);
2029 		return err;
2030 	}
2031 
2032 	return 0;
2033 }
2034 
2035 static int cs4231_ebus_probe(struct platform_device *op)
2036 {
2037 	struct snd_card *card;
2038 	int err;
2039 
2040 	err = cs4231_attach_begin(op, &card);
2041 	if (err)
2042 		return err;
2043 
2044 	sprintf(card->longname, "%s at 0x%llx, irq %d",
2045 		card->shortname,
2046 		op->resource[0].start,
2047 		op->archdata.irqs[0]);
2048 
2049 	err = snd_cs4231_ebus_create(card, op, dev);
2050 	if (err < 0) {
2051 		snd_card_free(card);
2052 		return err;
2053 	}
2054 
2055 	return cs4231_attach_finish(card);
2056 }
2057 #endif
2058 
2059 static int cs4231_probe(struct platform_device *op)
2060 {
2061 #ifdef EBUS_SUPPORT
2062 	if (of_node_name_eq(op->dev.of_node->parent, "ebus"))
2063 		return cs4231_ebus_probe(op);
2064 #endif
2065 #ifdef SBUS_SUPPORT
2066 	if (of_node_name_eq(op->dev.of_node->parent, "sbus") ||
2067 	    of_node_name_eq(op->dev.of_node->parent, "sbi"))
2068 		return cs4231_sbus_probe(op);
2069 #endif
2070 	return -ENODEV;
2071 }
2072 
2073 static int cs4231_remove(struct platform_device *op)
2074 {
2075 	struct snd_cs4231 *chip = dev_get_drvdata(&op->dev);
2076 
2077 	snd_card_free(chip->card);
2078 
2079 	return 0;
2080 }
2081 
2082 static const struct of_device_id cs4231_match[] = {
2083 	{
2084 		.name = "SUNW,CS4231",
2085 	},
2086 	{
2087 		.name = "audio",
2088 		.compatible = "SUNW,CS4231",
2089 	},
2090 	{},
2091 };
2092 
2093 MODULE_DEVICE_TABLE(of, cs4231_match);
2094 
2095 static struct platform_driver cs4231_driver = {
2096 	.driver = {
2097 		.name = "audio",
2098 		.of_match_table = cs4231_match,
2099 	},
2100 	.probe		= cs4231_probe,
2101 	.remove		= cs4231_remove,
2102 };
2103 
2104 module_platform_driver(cs4231_driver);
2105