1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Driver for CS4231 sound chips found on Sparcs. 4 * Copyright (C) 2002, 2008 David S. Miller <davem@davemloft.net> 5 * 6 * Based entirely upon drivers/sbus/audio/cs4231.c which is: 7 * Copyright (C) 1996, 1997, 1998 Derrick J Brashear (shadow@andrew.cmu.edu) 8 * and also sound/isa/cs423x/cs4231_lib.c which is: 9 * Copyright (c) by Jaroslav Kysela <perex@perex.cz> 10 */ 11 12 #include <linux/module.h> 13 #include <linux/kernel.h> 14 #include <linux/delay.h> 15 #include <linux/init.h> 16 #include <linux/interrupt.h> 17 #include <linux/moduleparam.h> 18 #include <linux/irq.h> 19 #include <linux/io.h> 20 #include <linux/of.h> 21 #include <linux/of_device.h> 22 23 #include <sound/core.h> 24 #include <sound/pcm.h> 25 #include <sound/info.h> 26 #include <sound/control.h> 27 #include <sound/timer.h> 28 #include <sound/initval.h> 29 #include <sound/pcm_params.h> 30 31 #ifdef CONFIG_SBUS 32 #define SBUS_SUPPORT 33 #endif 34 35 #if defined(CONFIG_PCI) && defined(CONFIG_SPARC64) 36 #define EBUS_SUPPORT 37 #include <linux/pci.h> 38 #include <asm/ebus_dma.h> 39 #endif 40 41 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */ 42 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */ 43 /* Enable this card */ 44 static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; 45 46 module_param_array(index, int, NULL, 0444); 47 MODULE_PARM_DESC(index, "Index value for Sun CS4231 soundcard."); 48 module_param_array(id, charp, NULL, 0444); 49 MODULE_PARM_DESC(id, "ID string for Sun CS4231 soundcard."); 50 module_param_array(enable, bool, NULL, 0444); 51 MODULE_PARM_DESC(enable, "Enable Sun CS4231 soundcard."); 52 MODULE_AUTHOR("Jaroslav Kysela, Derrick J. Brashear and David S. Miller"); 53 MODULE_DESCRIPTION("Sun CS4231"); 54 MODULE_LICENSE("GPL"); 55 MODULE_SUPPORTED_DEVICE("{{Sun,CS4231}}"); 56 57 #ifdef SBUS_SUPPORT 58 struct sbus_dma_info { 59 spinlock_t lock; /* DMA access lock */ 60 int dir; 61 void __iomem *regs; 62 }; 63 #endif 64 65 struct snd_cs4231; 66 struct cs4231_dma_control { 67 void (*prepare)(struct cs4231_dma_control *dma_cont, 68 int dir); 69 void (*enable)(struct cs4231_dma_control *dma_cont, int on); 70 int (*request)(struct cs4231_dma_control *dma_cont, 71 dma_addr_t bus_addr, size_t len); 72 unsigned int (*address)(struct cs4231_dma_control *dma_cont); 73 #ifdef EBUS_SUPPORT 74 struct ebus_dma_info ebus_info; 75 #endif 76 #ifdef SBUS_SUPPORT 77 struct sbus_dma_info sbus_info; 78 #endif 79 }; 80 81 struct snd_cs4231 { 82 spinlock_t lock; /* registers access lock */ 83 void __iomem *port; 84 85 struct cs4231_dma_control p_dma; 86 struct cs4231_dma_control c_dma; 87 88 u32 flags; 89 #define CS4231_FLAG_EBUS 0x00000001 90 #define CS4231_FLAG_PLAYBACK 0x00000002 91 #define CS4231_FLAG_CAPTURE 0x00000004 92 93 struct snd_card *card; 94 struct snd_pcm *pcm; 95 struct snd_pcm_substream *playback_substream; 96 unsigned int p_periods_sent; 97 struct snd_pcm_substream *capture_substream; 98 unsigned int c_periods_sent; 99 struct snd_timer *timer; 100 101 unsigned short mode; 102 #define CS4231_MODE_NONE 0x0000 103 #define CS4231_MODE_PLAY 0x0001 104 #define CS4231_MODE_RECORD 0x0002 105 #define CS4231_MODE_TIMER 0x0004 106 #define CS4231_MODE_OPEN (CS4231_MODE_PLAY | CS4231_MODE_RECORD | \ 107 CS4231_MODE_TIMER) 108 109 unsigned char image[32]; /* registers image */ 110 int mce_bit; 111 int calibrate_mute; 112 struct mutex mce_mutex; /* mutex for mce register */ 113 struct mutex open_mutex; /* mutex for ALSA open/close */ 114 115 struct platform_device *op; 116 unsigned int irq[2]; 117 unsigned int regs_size; 118 struct snd_cs4231 *next; 119 }; 120 121 /* Eventually we can use sound/isa/cs423x/cs4231_lib.c directly, but for 122 * now.... -DaveM 123 */ 124 125 /* IO ports */ 126 #include <sound/cs4231-regs.h> 127 128 /* XXX offsets are different than PC ISA chips... */ 129 #define CS4231U(chip, x) ((chip)->port + ((c_d_c_CS4231##x) << 2)) 130 131 /* SBUS DMA register defines. */ 132 133 #define APCCSR 0x10UL /* APC DMA CSR */ 134 #define APCCVA 0x20UL /* APC Capture DMA Address */ 135 #define APCCC 0x24UL /* APC Capture Count */ 136 #define APCCNVA 0x28UL /* APC Capture DMA Next Address */ 137 #define APCCNC 0x2cUL /* APC Capture Next Count */ 138 #define APCPVA 0x30UL /* APC Play DMA Address */ 139 #define APCPC 0x34UL /* APC Play Count */ 140 #define APCPNVA 0x38UL /* APC Play DMA Next Address */ 141 #define APCPNC 0x3cUL /* APC Play Next Count */ 142 143 /* Defines for SBUS DMA-routines */ 144 145 #define APCVA 0x0UL /* APC DMA Address */ 146 #define APCC 0x4UL /* APC Count */ 147 #define APCNVA 0x8UL /* APC DMA Next Address */ 148 #define APCNC 0xcUL /* APC Next Count */ 149 #define APC_PLAY 0x30UL /* Play registers start at 0x30 */ 150 #define APC_RECORD 0x20UL /* Record registers start at 0x20 */ 151 152 /* APCCSR bits */ 153 154 #define APC_INT_PENDING 0x800000 /* Interrupt Pending */ 155 #define APC_PLAY_INT 0x400000 /* Playback interrupt */ 156 #define APC_CAPT_INT 0x200000 /* Capture interrupt */ 157 #define APC_GENL_INT 0x100000 /* General interrupt */ 158 #define APC_XINT_ENA 0x80000 /* General ext int. enable */ 159 #define APC_XINT_PLAY 0x40000 /* Playback ext intr */ 160 #define APC_XINT_CAPT 0x20000 /* Capture ext intr */ 161 #define APC_XINT_GENL 0x10000 /* Error ext intr */ 162 #define APC_XINT_EMPT 0x8000 /* Pipe empty interrupt (0 write to pva) */ 163 #define APC_XINT_PEMP 0x4000 /* Play pipe empty (pva and pnva not set) */ 164 #define APC_XINT_PNVA 0x2000 /* Playback NVA dirty */ 165 #define APC_XINT_PENA 0x1000 /* play pipe empty Int enable */ 166 #define APC_XINT_COVF 0x800 /* Cap data dropped on floor */ 167 #define APC_XINT_CNVA 0x400 /* Capture NVA dirty */ 168 #define APC_XINT_CEMP 0x200 /* Capture pipe empty (cva and cnva not set) */ 169 #define APC_XINT_CENA 0x100 /* Cap. pipe empty int enable */ 170 #define APC_PPAUSE 0x80 /* Pause the play DMA */ 171 #define APC_CPAUSE 0x40 /* Pause the capture DMA */ 172 #define APC_CDC_RESET 0x20 /* CODEC RESET */ 173 #define APC_PDMA_READY 0x08 /* Play DMA Go */ 174 #define APC_CDMA_READY 0x04 /* Capture DMA Go */ 175 #define APC_CHIP_RESET 0x01 /* Reset the chip */ 176 177 /* EBUS DMA register offsets */ 178 179 #define EBDMA_CSR 0x00UL /* Control/Status */ 180 #define EBDMA_ADDR 0x04UL /* DMA Address */ 181 #define EBDMA_COUNT 0x08UL /* DMA Count */ 182 183 /* 184 * Some variables 185 */ 186 187 static unsigned char freq_bits[14] = { 188 /* 5510 */ 0x00 | CS4231_XTAL2, 189 /* 6620 */ 0x0E | CS4231_XTAL2, 190 /* 8000 */ 0x00 | CS4231_XTAL1, 191 /* 9600 */ 0x0E | CS4231_XTAL1, 192 /* 11025 */ 0x02 | CS4231_XTAL2, 193 /* 16000 */ 0x02 | CS4231_XTAL1, 194 /* 18900 */ 0x04 | CS4231_XTAL2, 195 /* 22050 */ 0x06 | CS4231_XTAL2, 196 /* 27042 */ 0x04 | CS4231_XTAL1, 197 /* 32000 */ 0x06 | CS4231_XTAL1, 198 /* 33075 */ 0x0C | CS4231_XTAL2, 199 /* 37800 */ 0x08 | CS4231_XTAL2, 200 /* 44100 */ 0x0A | CS4231_XTAL2, 201 /* 48000 */ 0x0C | CS4231_XTAL1 202 }; 203 204 static const unsigned int rates[14] = { 205 5510, 6620, 8000, 9600, 11025, 16000, 18900, 22050, 206 27042, 32000, 33075, 37800, 44100, 48000 207 }; 208 209 static const struct snd_pcm_hw_constraint_list hw_constraints_rates = { 210 .count = ARRAY_SIZE(rates), 211 .list = rates, 212 }; 213 214 static int snd_cs4231_xrate(struct snd_pcm_runtime *runtime) 215 { 216 return snd_pcm_hw_constraint_list(runtime, 0, 217 SNDRV_PCM_HW_PARAM_RATE, 218 &hw_constraints_rates); 219 } 220 221 static unsigned char snd_cs4231_original_image[32] = 222 { 223 0x00, /* 00/00 - lic */ 224 0x00, /* 01/01 - ric */ 225 0x9f, /* 02/02 - la1ic */ 226 0x9f, /* 03/03 - ra1ic */ 227 0x9f, /* 04/04 - la2ic */ 228 0x9f, /* 05/05 - ra2ic */ 229 0xbf, /* 06/06 - loc */ 230 0xbf, /* 07/07 - roc */ 231 0x20, /* 08/08 - pdfr */ 232 CS4231_AUTOCALIB, /* 09/09 - ic */ 233 0x00, /* 0a/10 - pc */ 234 0x00, /* 0b/11 - ti */ 235 CS4231_MODE2, /* 0c/12 - mi */ 236 0x00, /* 0d/13 - lbc */ 237 0x00, /* 0e/14 - pbru */ 238 0x00, /* 0f/15 - pbrl */ 239 0x80, /* 10/16 - afei */ 240 0x01, /* 11/17 - afeii */ 241 0x9f, /* 12/18 - llic */ 242 0x9f, /* 13/19 - rlic */ 243 0x00, /* 14/20 - tlb */ 244 0x00, /* 15/21 - thb */ 245 0x00, /* 16/22 - la3mic/reserved */ 246 0x00, /* 17/23 - ra3mic/reserved */ 247 0x00, /* 18/24 - afs */ 248 0x00, /* 19/25 - lamoc/version */ 249 0x00, /* 1a/26 - mioc */ 250 0x00, /* 1b/27 - ramoc/reserved */ 251 0x20, /* 1c/28 - cdfr */ 252 0x00, /* 1d/29 - res4 */ 253 0x00, /* 1e/30 - cbru */ 254 0x00, /* 1f/31 - cbrl */ 255 }; 256 257 static u8 __cs4231_readb(struct snd_cs4231 *cp, void __iomem *reg_addr) 258 { 259 if (cp->flags & CS4231_FLAG_EBUS) 260 return readb(reg_addr); 261 else 262 return sbus_readb(reg_addr); 263 } 264 265 static void __cs4231_writeb(struct snd_cs4231 *cp, u8 val, 266 void __iomem *reg_addr) 267 { 268 if (cp->flags & CS4231_FLAG_EBUS) 269 return writeb(val, reg_addr); 270 else 271 return sbus_writeb(val, reg_addr); 272 } 273 274 /* 275 * Basic I/O functions 276 */ 277 278 static void snd_cs4231_ready(struct snd_cs4231 *chip) 279 { 280 int timeout; 281 282 for (timeout = 250; timeout > 0; timeout--) { 283 int val = __cs4231_readb(chip, CS4231U(chip, REGSEL)); 284 if ((val & CS4231_INIT) == 0) 285 break; 286 udelay(100); 287 } 288 } 289 290 static void snd_cs4231_dout(struct snd_cs4231 *chip, unsigned char reg, 291 unsigned char value) 292 { 293 snd_cs4231_ready(chip); 294 #ifdef CONFIG_SND_DEBUG 295 if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT) 296 snd_printdd("out: auto calibration time out - reg = 0x%x, " 297 "value = 0x%x\n", 298 reg, value); 299 #endif 300 __cs4231_writeb(chip, chip->mce_bit | reg, CS4231U(chip, REGSEL)); 301 wmb(); 302 __cs4231_writeb(chip, value, CS4231U(chip, REG)); 303 mb(); 304 } 305 306 static inline void snd_cs4231_outm(struct snd_cs4231 *chip, unsigned char reg, 307 unsigned char mask, unsigned char value) 308 { 309 unsigned char tmp = (chip->image[reg] & mask) | value; 310 311 chip->image[reg] = tmp; 312 if (!chip->calibrate_mute) 313 snd_cs4231_dout(chip, reg, tmp); 314 } 315 316 static void snd_cs4231_out(struct snd_cs4231 *chip, unsigned char reg, 317 unsigned char value) 318 { 319 snd_cs4231_dout(chip, reg, value); 320 chip->image[reg] = value; 321 mb(); 322 } 323 324 static unsigned char snd_cs4231_in(struct snd_cs4231 *chip, unsigned char reg) 325 { 326 snd_cs4231_ready(chip); 327 #ifdef CONFIG_SND_DEBUG 328 if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT) 329 snd_printdd("in: auto calibration time out - reg = 0x%x\n", 330 reg); 331 #endif 332 __cs4231_writeb(chip, chip->mce_bit | reg, CS4231U(chip, REGSEL)); 333 mb(); 334 return __cs4231_readb(chip, CS4231U(chip, REG)); 335 } 336 337 /* 338 * CS4231 detection / MCE routines 339 */ 340 341 static void snd_cs4231_busy_wait(struct snd_cs4231 *chip) 342 { 343 int timeout; 344 345 /* looks like this sequence is proper for CS4231A chip (GUS MAX) */ 346 for (timeout = 5; timeout > 0; timeout--) 347 __cs4231_readb(chip, CS4231U(chip, REGSEL)); 348 349 /* end of cleanup sequence */ 350 for (timeout = 500; timeout > 0; timeout--) { 351 int val = __cs4231_readb(chip, CS4231U(chip, REGSEL)); 352 if ((val & CS4231_INIT) == 0) 353 break; 354 msleep(1); 355 } 356 } 357 358 static void snd_cs4231_mce_up(struct snd_cs4231 *chip) 359 { 360 unsigned long flags; 361 int timeout; 362 363 spin_lock_irqsave(&chip->lock, flags); 364 snd_cs4231_ready(chip); 365 #ifdef CONFIG_SND_DEBUG 366 if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT) 367 snd_printdd("mce_up - auto calibration time out (0)\n"); 368 #endif 369 chip->mce_bit |= CS4231_MCE; 370 timeout = __cs4231_readb(chip, CS4231U(chip, REGSEL)); 371 if (timeout == 0x80) 372 snd_printdd("mce_up [%p]: serious init problem - " 373 "codec still busy\n", 374 chip->port); 375 if (!(timeout & CS4231_MCE)) 376 __cs4231_writeb(chip, chip->mce_bit | (timeout & 0x1f), 377 CS4231U(chip, REGSEL)); 378 spin_unlock_irqrestore(&chip->lock, flags); 379 } 380 381 static void snd_cs4231_mce_down(struct snd_cs4231 *chip) 382 { 383 unsigned long flags, timeout; 384 int reg; 385 386 snd_cs4231_busy_wait(chip); 387 spin_lock_irqsave(&chip->lock, flags); 388 #ifdef CONFIG_SND_DEBUG 389 if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT) 390 snd_printdd("mce_down [%p] - auto calibration time out (0)\n", 391 CS4231U(chip, REGSEL)); 392 #endif 393 chip->mce_bit &= ~CS4231_MCE; 394 reg = __cs4231_readb(chip, CS4231U(chip, REGSEL)); 395 __cs4231_writeb(chip, chip->mce_bit | (reg & 0x1f), 396 CS4231U(chip, REGSEL)); 397 if (reg == 0x80) 398 snd_printdd("mce_down [%p]: serious init problem " 399 "- codec still busy\n", chip->port); 400 if ((reg & CS4231_MCE) == 0) { 401 spin_unlock_irqrestore(&chip->lock, flags); 402 return; 403 } 404 405 /* 406 * Wait for auto-calibration (AC) process to finish, i.e. ACI to go low. 407 */ 408 timeout = jiffies + msecs_to_jiffies(250); 409 do { 410 spin_unlock_irqrestore(&chip->lock, flags); 411 msleep(1); 412 spin_lock_irqsave(&chip->lock, flags); 413 reg = snd_cs4231_in(chip, CS4231_TEST_INIT); 414 reg &= CS4231_CALIB_IN_PROGRESS; 415 } while (reg && time_before(jiffies, timeout)); 416 spin_unlock_irqrestore(&chip->lock, flags); 417 418 if (reg) 419 snd_printk(KERN_ERR 420 "mce_down - auto calibration time out (2)\n"); 421 } 422 423 static void snd_cs4231_advance_dma(struct cs4231_dma_control *dma_cont, 424 struct snd_pcm_substream *substream, 425 unsigned int *periods_sent) 426 { 427 struct snd_pcm_runtime *runtime = substream->runtime; 428 429 while (1) { 430 unsigned int period_size = snd_pcm_lib_period_bytes(substream); 431 unsigned int offset = period_size * (*periods_sent); 432 433 if (WARN_ON(period_size >= (1 << 24))) 434 return; 435 436 if (dma_cont->request(dma_cont, 437 runtime->dma_addr + offset, period_size)) 438 return; 439 (*periods_sent) = ((*periods_sent) + 1) % runtime->periods; 440 } 441 } 442 443 static void cs4231_dma_trigger(struct snd_pcm_substream *substream, 444 unsigned int what, int on) 445 { 446 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); 447 struct cs4231_dma_control *dma_cont; 448 449 if (what & CS4231_PLAYBACK_ENABLE) { 450 dma_cont = &chip->p_dma; 451 if (on) { 452 dma_cont->prepare(dma_cont, 0); 453 dma_cont->enable(dma_cont, 1); 454 snd_cs4231_advance_dma(dma_cont, 455 chip->playback_substream, 456 &chip->p_periods_sent); 457 } else { 458 dma_cont->enable(dma_cont, 0); 459 } 460 } 461 if (what & CS4231_RECORD_ENABLE) { 462 dma_cont = &chip->c_dma; 463 if (on) { 464 dma_cont->prepare(dma_cont, 1); 465 dma_cont->enable(dma_cont, 1); 466 snd_cs4231_advance_dma(dma_cont, 467 chip->capture_substream, 468 &chip->c_periods_sent); 469 } else { 470 dma_cont->enable(dma_cont, 0); 471 } 472 } 473 } 474 475 static int snd_cs4231_trigger(struct snd_pcm_substream *substream, int cmd) 476 { 477 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); 478 int result = 0; 479 480 switch (cmd) { 481 case SNDRV_PCM_TRIGGER_START: 482 case SNDRV_PCM_TRIGGER_STOP: 483 { 484 unsigned int what = 0; 485 struct snd_pcm_substream *s; 486 unsigned long flags; 487 488 snd_pcm_group_for_each_entry(s, substream) { 489 if (s == chip->playback_substream) { 490 what |= CS4231_PLAYBACK_ENABLE; 491 snd_pcm_trigger_done(s, substream); 492 } else if (s == chip->capture_substream) { 493 what |= CS4231_RECORD_ENABLE; 494 snd_pcm_trigger_done(s, substream); 495 } 496 } 497 498 spin_lock_irqsave(&chip->lock, flags); 499 if (cmd == SNDRV_PCM_TRIGGER_START) { 500 cs4231_dma_trigger(substream, what, 1); 501 chip->image[CS4231_IFACE_CTRL] |= what; 502 } else { 503 cs4231_dma_trigger(substream, what, 0); 504 chip->image[CS4231_IFACE_CTRL] &= ~what; 505 } 506 snd_cs4231_out(chip, CS4231_IFACE_CTRL, 507 chip->image[CS4231_IFACE_CTRL]); 508 spin_unlock_irqrestore(&chip->lock, flags); 509 break; 510 } 511 default: 512 result = -EINVAL; 513 break; 514 } 515 516 return result; 517 } 518 519 /* 520 * CODEC I/O 521 */ 522 523 static unsigned char snd_cs4231_get_rate(unsigned int rate) 524 { 525 int i; 526 527 for (i = 0; i < 14; i++) 528 if (rate == rates[i]) 529 return freq_bits[i]; 530 531 return freq_bits[13]; 532 } 533 534 static unsigned char snd_cs4231_get_format(struct snd_cs4231 *chip, int format, 535 int channels) 536 { 537 unsigned char rformat; 538 539 rformat = CS4231_LINEAR_8; 540 switch (format) { 541 case SNDRV_PCM_FORMAT_MU_LAW: 542 rformat = CS4231_ULAW_8; 543 break; 544 case SNDRV_PCM_FORMAT_A_LAW: 545 rformat = CS4231_ALAW_8; 546 break; 547 case SNDRV_PCM_FORMAT_S16_LE: 548 rformat = CS4231_LINEAR_16; 549 break; 550 case SNDRV_PCM_FORMAT_S16_BE: 551 rformat = CS4231_LINEAR_16_BIG; 552 break; 553 case SNDRV_PCM_FORMAT_IMA_ADPCM: 554 rformat = CS4231_ADPCM_16; 555 break; 556 } 557 if (channels > 1) 558 rformat |= CS4231_STEREO; 559 return rformat; 560 } 561 562 static void snd_cs4231_calibrate_mute(struct snd_cs4231 *chip, int mute) 563 { 564 unsigned long flags; 565 566 mute = mute ? 1 : 0; 567 spin_lock_irqsave(&chip->lock, flags); 568 if (chip->calibrate_mute == mute) { 569 spin_unlock_irqrestore(&chip->lock, flags); 570 return; 571 } 572 if (!mute) { 573 snd_cs4231_dout(chip, CS4231_LEFT_INPUT, 574 chip->image[CS4231_LEFT_INPUT]); 575 snd_cs4231_dout(chip, CS4231_RIGHT_INPUT, 576 chip->image[CS4231_RIGHT_INPUT]); 577 snd_cs4231_dout(chip, CS4231_LOOPBACK, 578 chip->image[CS4231_LOOPBACK]); 579 } 580 snd_cs4231_dout(chip, CS4231_AUX1_LEFT_INPUT, 581 mute ? 0x80 : chip->image[CS4231_AUX1_LEFT_INPUT]); 582 snd_cs4231_dout(chip, CS4231_AUX1_RIGHT_INPUT, 583 mute ? 0x80 : chip->image[CS4231_AUX1_RIGHT_INPUT]); 584 snd_cs4231_dout(chip, CS4231_AUX2_LEFT_INPUT, 585 mute ? 0x80 : chip->image[CS4231_AUX2_LEFT_INPUT]); 586 snd_cs4231_dout(chip, CS4231_AUX2_RIGHT_INPUT, 587 mute ? 0x80 : chip->image[CS4231_AUX2_RIGHT_INPUT]); 588 snd_cs4231_dout(chip, CS4231_LEFT_OUTPUT, 589 mute ? 0x80 : chip->image[CS4231_LEFT_OUTPUT]); 590 snd_cs4231_dout(chip, CS4231_RIGHT_OUTPUT, 591 mute ? 0x80 : chip->image[CS4231_RIGHT_OUTPUT]); 592 snd_cs4231_dout(chip, CS4231_LEFT_LINE_IN, 593 mute ? 0x80 : chip->image[CS4231_LEFT_LINE_IN]); 594 snd_cs4231_dout(chip, CS4231_RIGHT_LINE_IN, 595 mute ? 0x80 : chip->image[CS4231_RIGHT_LINE_IN]); 596 snd_cs4231_dout(chip, CS4231_MONO_CTRL, 597 mute ? 0xc0 : chip->image[CS4231_MONO_CTRL]); 598 chip->calibrate_mute = mute; 599 spin_unlock_irqrestore(&chip->lock, flags); 600 } 601 602 static void snd_cs4231_playback_format(struct snd_cs4231 *chip, 603 struct snd_pcm_hw_params *params, 604 unsigned char pdfr) 605 { 606 unsigned long flags; 607 608 mutex_lock(&chip->mce_mutex); 609 snd_cs4231_calibrate_mute(chip, 1); 610 611 snd_cs4231_mce_up(chip); 612 613 spin_lock_irqsave(&chip->lock, flags); 614 snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT, 615 (chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE) ? 616 (pdfr & 0xf0) | (chip->image[CS4231_REC_FORMAT] & 0x0f) : 617 pdfr); 618 spin_unlock_irqrestore(&chip->lock, flags); 619 620 snd_cs4231_mce_down(chip); 621 622 snd_cs4231_calibrate_mute(chip, 0); 623 mutex_unlock(&chip->mce_mutex); 624 } 625 626 static void snd_cs4231_capture_format(struct snd_cs4231 *chip, 627 struct snd_pcm_hw_params *params, 628 unsigned char cdfr) 629 { 630 unsigned long flags; 631 632 mutex_lock(&chip->mce_mutex); 633 snd_cs4231_calibrate_mute(chip, 1); 634 635 snd_cs4231_mce_up(chip); 636 637 spin_lock_irqsave(&chip->lock, flags); 638 if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE)) { 639 snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT, 640 ((chip->image[CS4231_PLAYBK_FORMAT]) & 0xf0) | 641 (cdfr & 0x0f)); 642 spin_unlock_irqrestore(&chip->lock, flags); 643 snd_cs4231_mce_down(chip); 644 snd_cs4231_mce_up(chip); 645 spin_lock_irqsave(&chip->lock, flags); 646 } 647 snd_cs4231_out(chip, CS4231_REC_FORMAT, cdfr); 648 spin_unlock_irqrestore(&chip->lock, flags); 649 650 snd_cs4231_mce_down(chip); 651 652 snd_cs4231_calibrate_mute(chip, 0); 653 mutex_unlock(&chip->mce_mutex); 654 } 655 656 /* 657 * Timer interface 658 */ 659 660 static unsigned long snd_cs4231_timer_resolution(struct snd_timer *timer) 661 { 662 struct snd_cs4231 *chip = snd_timer_chip(timer); 663 664 return chip->image[CS4231_PLAYBK_FORMAT] & 1 ? 9969 : 9920; 665 } 666 667 static int snd_cs4231_timer_start(struct snd_timer *timer) 668 { 669 unsigned long flags; 670 unsigned int ticks; 671 struct snd_cs4231 *chip = snd_timer_chip(timer); 672 673 spin_lock_irqsave(&chip->lock, flags); 674 ticks = timer->sticks; 675 if ((chip->image[CS4231_ALT_FEATURE_1] & CS4231_TIMER_ENABLE) == 0 || 676 (unsigned char)(ticks >> 8) != chip->image[CS4231_TIMER_HIGH] || 677 (unsigned char)ticks != chip->image[CS4231_TIMER_LOW]) { 678 snd_cs4231_out(chip, CS4231_TIMER_HIGH, 679 chip->image[CS4231_TIMER_HIGH] = 680 (unsigned char) (ticks >> 8)); 681 snd_cs4231_out(chip, CS4231_TIMER_LOW, 682 chip->image[CS4231_TIMER_LOW] = 683 (unsigned char) ticks); 684 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1, 685 chip->image[CS4231_ALT_FEATURE_1] | 686 CS4231_TIMER_ENABLE); 687 } 688 spin_unlock_irqrestore(&chip->lock, flags); 689 690 return 0; 691 } 692 693 static int snd_cs4231_timer_stop(struct snd_timer *timer) 694 { 695 unsigned long flags; 696 struct snd_cs4231 *chip = snd_timer_chip(timer); 697 698 spin_lock_irqsave(&chip->lock, flags); 699 chip->image[CS4231_ALT_FEATURE_1] &= ~CS4231_TIMER_ENABLE; 700 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1, 701 chip->image[CS4231_ALT_FEATURE_1]); 702 spin_unlock_irqrestore(&chip->lock, flags); 703 704 return 0; 705 } 706 707 static void snd_cs4231_init(struct snd_cs4231 *chip) 708 { 709 unsigned long flags; 710 711 snd_cs4231_mce_down(chip); 712 713 #ifdef SNDRV_DEBUG_MCE 714 snd_printdd("init: (1)\n"); 715 #endif 716 snd_cs4231_mce_up(chip); 717 spin_lock_irqsave(&chip->lock, flags); 718 chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE | 719 CS4231_PLAYBACK_PIO | 720 CS4231_RECORD_ENABLE | 721 CS4231_RECORD_PIO | 722 CS4231_CALIB_MODE); 723 chip->image[CS4231_IFACE_CTRL] |= CS4231_AUTOCALIB; 724 snd_cs4231_out(chip, CS4231_IFACE_CTRL, chip->image[CS4231_IFACE_CTRL]); 725 spin_unlock_irqrestore(&chip->lock, flags); 726 snd_cs4231_mce_down(chip); 727 728 #ifdef SNDRV_DEBUG_MCE 729 snd_printdd("init: (2)\n"); 730 #endif 731 732 snd_cs4231_mce_up(chip); 733 spin_lock_irqsave(&chip->lock, flags); 734 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1, 735 chip->image[CS4231_ALT_FEATURE_1]); 736 spin_unlock_irqrestore(&chip->lock, flags); 737 snd_cs4231_mce_down(chip); 738 739 #ifdef SNDRV_DEBUG_MCE 740 snd_printdd("init: (3) - afei = 0x%x\n", 741 chip->image[CS4231_ALT_FEATURE_1]); 742 #endif 743 744 spin_lock_irqsave(&chip->lock, flags); 745 snd_cs4231_out(chip, CS4231_ALT_FEATURE_2, 746 chip->image[CS4231_ALT_FEATURE_2]); 747 spin_unlock_irqrestore(&chip->lock, flags); 748 749 snd_cs4231_mce_up(chip); 750 spin_lock_irqsave(&chip->lock, flags); 751 snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT, 752 chip->image[CS4231_PLAYBK_FORMAT]); 753 spin_unlock_irqrestore(&chip->lock, flags); 754 snd_cs4231_mce_down(chip); 755 756 #ifdef SNDRV_DEBUG_MCE 757 snd_printdd("init: (4)\n"); 758 #endif 759 760 snd_cs4231_mce_up(chip); 761 spin_lock_irqsave(&chip->lock, flags); 762 snd_cs4231_out(chip, CS4231_REC_FORMAT, chip->image[CS4231_REC_FORMAT]); 763 spin_unlock_irqrestore(&chip->lock, flags); 764 snd_cs4231_mce_down(chip); 765 766 #ifdef SNDRV_DEBUG_MCE 767 snd_printdd("init: (5)\n"); 768 #endif 769 } 770 771 static int snd_cs4231_open(struct snd_cs4231 *chip, unsigned int mode) 772 { 773 unsigned long flags; 774 775 mutex_lock(&chip->open_mutex); 776 if ((chip->mode & mode)) { 777 mutex_unlock(&chip->open_mutex); 778 return -EAGAIN; 779 } 780 if (chip->mode & CS4231_MODE_OPEN) { 781 chip->mode |= mode; 782 mutex_unlock(&chip->open_mutex); 783 return 0; 784 } 785 /* ok. now enable and ack CODEC IRQ */ 786 spin_lock_irqsave(&chip->lock, flags); 787 snd_cs4231_out(chip, CS4231_IRQ_STATUS, CS4231_PLAYBACK_IRQ | 788 CS4231_RECORD_IRQ | 789 CS4231_TIMER_IRQ); 790 snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0); 791 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */ 792 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */ 793 794 snd_cs4231_out(chip, CS4231_IRQ_STATUS, CS4231_PLAYBACK_IRQ | 795 CS4231_RECORD_IRQ | 796 CS4231_TIMER_IRQ); 797 snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0); 798 799 spin_unlock_irqrestore(&chip->lock, flags); 800 801 chip->mode = mode; 802 mutex_unlock(&chip->open_mutex); 803 return 0; 804 } 805 806 static void snd_cs4231_close(struct snd_cs4231 *chip, unsigned int mode) 807 { 808 unsigned long flags; 809 810 mutex_lock(&chip->open_mutex); 811 chip->mode &= ~mode; 812 if (chip->mode & CS4231_MODE_OPEN) { 813 mutex_unlock(&chip->open_mutex); 814 return; 815 } 816 snd_cs4231_calibrate_mute(chip, 1); 817 818 /* disable IRQ */ 819 spin_lock_irqsave(&chip->lock, flags); 820 snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0); 821 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */ 822 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */ 823 824 /* now disable record & playback */ 825 826 if (chip->image[CS4231_IFACE_CTRL] & 827 (CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO | 828 CS4231_RECORD_ENABLE | CS4231_RECORD_PIO)) { 829 spin_unlock_irqrestore(&chip->lock, flags); 830 snd_cs4231_mce_up(chip); 831 spin_lock_irqsave(&chip->lock, flags); 832 chip->image[CS4231_IFACE_CTRL] &= 833 ~(CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO | 834 CS4231_RECORD_ENABLE | CS4231_RECORD_PIO); 835 snd_cs4231_out(chip, CS4231_IFACE_CTRL, 836 chip->image[CS4231_IFACE_CTRL]); 837 spin_unlock_irqrestore(&chip->lock, flags); 838 snd_cs4231_mce_down(chip); 839 spin_lock_irqsave(&chip->lock, flags); 840 } 841 842 /* clear IRQ again */ 843 snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0); 844 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */ 845 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */ 846 spin_unlock_irqrestore(&chip->lock, flags); 847 848 snd_cs4231_calibrate_mute(chip, 0); 849 850 chip->mode = 0; 851 mutex_unlock(&chip->open_mutex); 852 } 853 854 /* 855 * timer open/close 856 */ 857 858 static int snd_cs4231_timer_open(struct snd_timer *timer) 859 { 860 struct snd_cs4231 *chip = snd_timer_chip(timer); 861 snd_cs4231_open(chip, CS4231_MODE_TIMER); 862 return 0; 863 } 864 865 static int snd_cs4231_timer_close(struct snd_timer *timer) 866 { 867 struct snd_cs4231 *chip = snd_timer_chip(timer); 868 snd_cs4231_close(chip, CS4231_MODE_TIMER); 869 return 0; 870 } 871 872 static struct snd_timer_hardware snd_cs4231_timer_table = { 873 .flags = SNDRV_TIMER_HW_AUTO, 874 .resolution = 9945, 875 .ticks = 65535, 876 .open = snd_cs4231_timer_open, 877 .close = snd_cs4231_timer_close, 878 .c_resolution = snd_cs4231_timer_resolution, 879 .start = snd_cs4231_timer_start, 880 .stop = snd_cs4231_timer_stop, 881 }; 882 883 /* 884 * ok.. exported functions.. 885 */ 886 887 static int snd_cs4231_playback_hw_params(struct snd_pcm_substream *substream, 888 struct snd_pcm_hw_params *hw_params) 889 { 890 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); 891 unsigned char new_pdfr; 892 int err; 893 894 err = snd_pcm_lib_malloc_pages(substream, 895 params_buffer_bytes(hw_params)); 896 if (err < 0) 897 return err; 898 new_pdfr = snd_cs4231_get_format(chip, params_format(hw_params), 899 params_channels(hw_params)) | 900 snd_cs4231_get_rate(params_rate(hw_params)); 901 snd_cs4231_playback_format(chip, hw_params, new_pdfr); 902 903 return 0; 904 } 905 906 static int snd_cs4231_playback_prepare(struct snd_pcm_substream *substream) 907 { 908 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); 909 struct snd_pcm_runtime *runtime = substream->runtime; 910 unsigned long flags; 911 int ret = 0; 912 913 spin_lock_irqsave(&chip->lock, flags); 914 915 chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE | 916 CS4231_PLAYBACK_PIO); 917 918 if (WARN_ON(runtime->period_size > 0xffff + 1)) { 919 ret = -EINVAL; 920 goto out; 921 } 922 923 chip->p_periods_sent = 0; 924 925 out: 926 spin_unlock_irqrestore(&chip->lock, flags); 927 928 return ret; 929 } 930 931 static int snd_cs4231_capture_hw_params(struct snd_pcm_substream *substream, 932 struct snd_pcm_hw_params *hw_params) 933 { 934 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); 935 unsigned char new_cdfr; 936 int err; 937 938 err = snd_pcm_lib_malloc_pages(substream, 939 params_buffer_bytes(hw_params)); 940 if (err < 0) 941 return err; 942 new_cdfr = snd_cs4231_get_format(chip, params_format(hw_params), 943 params_channels(hw_params)) | 944 snd_cs4231_get_rate(params_rate(hw_params)); 945 snd_cs4231_capture_format(chip, hw_params, new_cdfr); 946 947 return 0; 948 } 949 950 static int snd_cs4231_capture_prepare(struct snd_pcm_substream *substream) 951 { 952 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); 953 unsigned long flags; 954 955 spin_lock_irqsave(&chip->lock, flags); 956 chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_RECORD_ENABLE | 957 CS4231_RECORD_PIO); 958 959 960 chip->c_periods_sent = 0; 961 spin_unlock_irqrestore(&chip->lock, flags); 962 963 return 0; 964 } 965 966 static void snd_cs4231_overrange(struct snd_cs4231 *chip) 967 { 968 unsigned long flags; 969 unsigned char res; 970 971 spin_lock_irqsave(&chip->lock, flags); 972 res = snd_cs4231_in(chip, CS4231_TEST_INIT); 973 spin_unlock_irqrestore(&chip->lock, flags); 974 975 /* detect overrange only above 0dB; may be user selectable? */ 976 if (res & (0x08 | 0x02)) 977 chip->capture_substream->runtime->overrange++; 978 } 979 980 static void snd_cs4231_play_callback(struct snd_cs4231 *chip) 981 { 982 if (chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE) { 983 snd_pcm_period_elapsed(chip->playback_substream); 984 snd_cs4231_advance_dma(&chip->p_dma, chip->playback_substream, 985 &chip->p_periods_sent); 986 } 987 } 988 989 static void snd_cs4231_capture_callback(struct snd_cs4231 *chip) 990 { 991 if (chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE) { 992 snd_pcm_period_elapsed(chip->capture_substream); 993 snd_cs4231_advance_dma(&chip->c_dma, chip->capture_substream, 994 &chip->c_periods_sent); 995 } 996 } 997 998 static snd_pcm_uframes_t snd_cs4231_playback_pointer( 999 struct snd_pcm_substream *substream) 1000 { 1001 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); 1002 struct cs4231_dma_control *dma_cont = &chip->p_dma; 1003 size_t ptr; 1004 1005 if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE)) 1006 return 0; 1007 ptr = dma_cont->address(dma_cont); 1008 if (ptr != 0) 1009 ptr -= substream->runtime->dma_addr; 1010 1011 return bytes_to_frames(substream->runtime, ptr); 1012 } 1013 1014 static snd_pcm_uframes_t snd_cs4231_capture_pointer( 1015 struct snd_pcm_substream *substream) 1016 { 1017 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); 1018 struct cs4231_dma_control *dma_cont = &chip->c_dma; 1019 size_t ptr; 1020 1021 if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE)) 1022 return 0; 1023 ptr = dma_cont->address(dma_cont); 1024 if (ptr != 0) 1025 ptr -= substream->runtime->dma_addr; 1026 1027 return bytes_to_frames(substream->runtime, ptr); 1028 } 1029 1030 static int snd_cs4231_probe(struct snd_cs4231 *chip) 1031 { 1032 unsigned long flags; 1033 int i; 1034 int id = 0; 1035 int vers = 0; 1036 unsigned char *ptr; 1037 1038 for (i = 0; i < 50; i++) { 1039 mb(); 1040 if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT) 1041 msleep(2); 1042 else { 1043 spin_lock_irqsave(&chip->lock, flags); 1044 snd_cs4231_out(chip, CS4231_MISC_INFO, CS4231_MODE2); 1045 id = snd_cs4231_in(chip, CS4231_MISC_INFO) & 0x0f; 1046 vers = snd_cs4231_in(chip, CS4231_VERSION); 1047 spin_unlock_irqrestore(&chip->lock, flags); 1048 if (id == 0x0a) 1049 break; /* this is valid value */ 1050 } 1051 } 1052 snd_printdd("cs4231: port = %p, id = 0x%x\n", chip->port, id); 1053 if (id != 0x0a) 1054 return -ENODEV; /* no valid device found */ 1055 1056 spin_lock_irqsave(&chip->lock, flags); 1057 1058 /* clear any pendings IRQ */ 1059 __cs4231_readb(chip, CS4231U(chip, STATUS)); 1060 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); 1061 mb(); 1062 1063 spin_unlock_irqrestore(&chip->lock, flags); 1064 1065 chip->image[CS4231_MISC_INFO] = CS4231_MODE2; 1066 chip->image[CS4231_IFACE_CTRL] = 1067 chip->image[CS4231_IFACE_CTRL] & ~CS4231_SINGLE_DMA; 1068 chip->image[CS4231_ALT_FEATURE_1] = 0x80; 1069 chip->image[CS4231_ALT_FEATURE_2] = 0x01; 1070 if (vers & 0x20) 1071 chip->image[CS4231_ALT_FEATURE_2] |= 0x02; 1072 1073 ptr = (unsigned char *) &chip->image; 1074 1075 snd_cs4231_mce_down(chip); 1076 1077 spin_lock_irqsave(&chip->lock, flags); 1078 1079 for (i = 0; i < 32; i++) /* ok.. fill all CS4231 registers */ 1080 snd_cs4231_out(chip, i, *ptr++); 1081 1082 spin_unlock_irqrestore(&chip->lock, flags); 1083 1084 snd_cs4231_mce_up(chip); 1085 1086 snd_cs4231_mce_down(chip); 1087 1088 mdelay(2); 1089 1090 return 0; /* all things are ok.. */ 1091 } 1092 1093 static const struct snd_pcm_hardware snd_cs4231_playback = { 1094 .info = SNDRV_PCM_INFO_MMAP | 1095 SNDRV_PCM_INFO_INTERLEAVED | 1096 SNDRV_PCM_INFO_MMAP_VALID | 1097 SNDRV_PCM_INFO_SYNC_START, 1098 .formats = SNDRV_PCM_FMTBIT_MU_LAW | 1099 SNDRV_PCM_FMTBIT_A_LAW | 1100 SNDRV_PCM_FMTBIT_IMA_ADPCM | 1101 SNDRV_PCM_FMTBIT_U8 | 1102 SNDRV_PCM_FMTBIT_S16_LE | 1103 SNDRV_PCM_FMTBIT_S16_BE, 1104 .rates = SNDRV_PCM_RATE_KNOT | 1105 SNDRV_PCM_RATE_8000_48000, 1106 .rate_min = 5510, 1107 .rate_max = 48000, 1108 .channels_min = 1, 1109 .channels_max = 2, 1110 .buffer_bytes_max = 32 * 1024, 1111 .period_bytes_min = 64, 1112 .period_bytes_max = 32 * 1024, 1113 .periods_min = 1, 1114 .periods_max = 1024, 1115 }; 1116 1117 static const struct snd_pcm_hardware snd_cs4231_capture = { 1118 .info = SNDRV_PCM_INFO_MMAP | 1119 SNDRV_PCM_INFO_INTERLEAVED | 1120 SNDRV_PCM_INFO_MMAP_VALID | 1121 SNDRV_PCM_INFO_SYNC_START, 1122 .formats = SNDRV_PCM_FMTBIT_MU_LAW | 1123 SNDRV_PCM_FMTBIT_A_LAW | 1124 SNDRV_PCM_FMTBIT_IMA_ADPCM | 1125 SNDRV_PCM_FMTBIT_U8 | 1126 SNDRV_PCM_FMTBIT_S16_LE | 1127 SNDRV_PCM_FMTBIT_S16_BE, 1128 .rates = SNDRV_PCM_RATE_KNOT | 1129 SNDRV_PCM_RATE_8000_48000, 1130 .rate_min = 5510, 1131 .rate_max = 48000, 1132 .channels_min = 1, 1133 .channels_max = 2, 1134 .buffer_bytes_max = 32 * 1024, 1135 .period_bytes_min = 64, 1136 .period_bytes_max = 32 * 1024, 1137 .periods_min = 1, 1138 .periods_max = 1024, 1139 }; 1140 1141 static int snd_cs4231_playback_open(struct snd_pcm_substream *substream) 1142 { 1143 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); 1144 struct snd_pcm_runtime *runtime = substream->runtime; 1145 int err; 1146 1147 runtime->hw = snd_cs4231_playback; 1148 1149 err = snd_cs4231_open(chip, CS4231_MODE_PLAY); 1150 if (err < 0) 1151 return err; 1152 chip->playback_substream = substream; 1153 chip->p_periods_sent = 0; 1154 snd_pcm_set_sync(substream); 1155 snd_cs4231_xrate(runtime); 1156 1157 return 0; 1158 } 1159 1160 static int snd_cs4231_capture_open(struct snd_pcm_substream *substream) 1161 { 1162 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); 1163 struct snd_pcm_runtime *runtime = substream->runtime; 1164 int err; 1165 1166 runtime->hw = snd_cs4231_capture; 1167 1168 err = snd_cs4231_open(chip, CS4231_MODE_RECORD); 1169 if (err < 0) 1170 return err; 1171 chip->capture_substream = substream; 1172 chip->c_periods_sent = 0; 1173 snd_pcm_set_sync(substream); 1174 snd_cs4231_xrate(runtime); 1175 1176 return 0; 1177 } 1178 1179 static int snd_cs4231_playback_close(struct snd_pcm_substream *substream) 1180 { 1181 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); 1182 1183 snd_cs4231_close(chip, CS4231_MODE_PLAY); 1184 chip->playback_substream = NULL; 1185 1186 return 0; 1187 } 1188 1189 static int snd_cs4231_capture_close(struct snd_pcm_substream *substream) 1190 { 1191 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); 1192 1193 snd_cs4231_close(chip, CS4231_MODE_RECORD); 1194 chip->capture_substream = NULL; 1195 1196 return 0; 1197 } 1198 1199 /* XXX We can do some power-management, in particular on EBUS using 1200 * XXX the audio AUXIO register... 1201 */ 1202 1203 static const struct snd_pcm_ops snd_cs4231_playback_ops = { 1204 .open = snd_cs4231_playback_open, 1205 .close = snd_cs4231_playback_close, 1206 .ioctl = snd_pcm_lib_ioctl, 1207 .hw_params = snd_cs4231_playback_hw_params, 1208 .hw_free = snd_pcm_lib_free_pages, 1209 .prepare = snd_cs4231_playback_prepare, 1210 .trigger = snd_cs4231_trigger, 1211 .pointer = snd_cs4231_playback_pointer, 1212 }; 1213 1214 static const struct snd_pcm_ops snd_cs4231_capture_ops = { 1215 .open = snd_cs4231_capture_open, 1216 .close = snd_cs4231_capture_close, 1217 .ioctl = snd_pcm_lib_ioctl, 1218 .hw_params = snd_cs4231_capture_hw_params, 1219 .hw_free = snd_pcm_lib_free_pages, 1220 .prepare = snd_cs4231_capture_prepare, 1221 .trigger = snd_cs4231_trigger, 1222 .pointer = snd_cs4231_capture_pointer, 1223 }; 1224 1225 static int snd_cs4231_pcm(struct snd_card *card) 1226 { 1227 struct snd_cs4231 *chip = card->private_data; 1228 struct snd_pcm *pcm; 1229 int err; 1230 1231 err = snd_pcm_new(card, "CS4231", 0, 1, 1, &pcm); 1232 if (err < 0) 1233 return err; 1234 1235 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, 1236 &snd_cs4231_playback_ops); 1237 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, 1238 &snd_cs4231_capture_ops); 1239 1240 /* global setup */ 1241 pcm->private_data = chip; 1242 pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX; 1243 strcpy(pcm->name, "CS4231"); 1244 1245 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, 1246 &chip->op->dev, 1247 64 * 1024, 128 * 1024); 1248 1249 chip->pcm = pcm; 1250 1251 return 0; 1252 } 1253 1254 static int snd_cs4231_timer(struct snd_card *card) 1255 { 1256 struct snd_cs4231 *chip = card->private_data; 1257 struct snd_timer *timer; 1258 struct snd_timer_id tid; 1259 int err; 1260 1261 /* Timer initialization */ 1262 tid.dev_class = SNDRV_TIMER_CLASS_CARD; 1263 tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE; 1264 tid.card = card->number; 1265 tid.device = 0; 1266 tid.subdevice = 0; 1267 err = snd_timer_new(card, "CS4231", &tid, &timer); 1268 if (err < 0) 1269 return err; 1270 strcpy(timer->name, "CS4231"); 1271 timer->private_data = chip; 1272 timer->hw = snd_cs4231_timer_table; 1273 chip->timer = timer; 1274 1275 return 0; 1276 } 1277 1278 /* 1279 * MIXER part 1280 */ 1281 1282 static int snd_cs4231_info_mux(struct snd_kcontrol *kcontrol, 1283 struct snd_ctl_elem_info *uinfo) 1284 { 1285 static const char * const texts[4] = { 1286 "Line", "CD", "Mic", "Mix" 1287 }; 1288 1289 return snd_ctl_enum_info(uinfo, 2, 4, texts); 1290 } 1291 1292 static int snd_cs4231_get_mux(struct snd_kcontrol *kcontrol, 1293 struct snd_ctl_elem_value *ucontrol) 1294 { 1295 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol); 1296 unsigned long flags; 1297 1298 spin_lock_irqsave(&chip->lock, flags); 1299 ucontrol->value.enumerated.item[0] = 1300 (chip->image[CS4231_LEFT_INPUT] & CS4231_MIXS_ALL) >> 6; 1301 ucontrol->value.enumerated.item[1] = 1302 (chip->image[CS4231_RIGHT_INPUT] & CS4231_MIXS_ALL) >> 6; 1303 spin_unlock_irqrestore(&chip->lock, flags); 1304 1305 return 0; 1306 } 1307 1308 static int snd_cs4231_put_mux(struct snd_kcontrol *kcontrol, 1309 struct snd_ctl_elem_value *ucontrol) 1310 { 1311 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol); 1312 unsigned long flags; 1313 unsigned short left, right; 1314 int change; 1315 1316 if (ucontrol->value.enumerated.item[0] > 3 || 1317 ucontrol->value.enumerated.item[1] > 3) 1318 return -EINVAL; 1319 left = ucontrol->value.enumerated.item[0] << 6; 1320 right = ucontrol->value.enumerated.item[1] << 6; 1321 1322 spin_lock_irqsave(&chip->lock, flags); 1323 1324 left = (chip->image[CS4231_LEFT_INPUT] & ~CS4231_MIXS_ALL) | left; 1325 right = (chip->image[CS4231_RIGHT_INPUT] & ~CS4231_MIXS_ALL) | right; 1326 change = left != chip->image[CS4231_LEFT_INPUT] || 1327 right != chip->image[CS4231_RIGHT_INPUT]; 1328 snd_cs4231_out(chip, CS4231_LEFT_INPUT, left); 1329 snd_cs4231_out(chip, CS4231_RIGHT_INPUT, right); 1330 1331 spin_unlock_irqrestore(&chip->lock, flags); 1332 1333 return change; 1334 } 1335 1336 static int snd_cs4231_info_single(struct snd_kcontrol *kcontrol, 1337 struct snd_ctl_elem_info *uinfo) 1338 { 1339 int mask = (kcontrol->private_value >> 16) & 0xff; 1340 1341 uinfo->type = (mask == 1) ? 1342 SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER; 1343 uinfo->count = 1; 1344 uinfo->value.integer.min = 0; 1345 uinfo->value.integer.max = mask; 1346 1347 return 0; 1348 } 1349 1350 static int snd_cs4231_get_single(struct snd_kcontrol *kcontrol, 1351 struct snd_ctl_elem_value *ucontrol) 1352 { 1353 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol); 1354 unsigned long flags; 1355 int reg = kcontrol->private_value & 0xff; 1356 int shift = (kcontrol->private_value >> 8) & 0xff; 1357 int mask = (kcontrol->private_value >> 16) & 0xff; 1358 int invert = (kcontrol->private_value >> 24) & 0xff; 1359 1360 spin_lock_irqsave(&chip->lock, flags); 1361 1362 ucontrol->value.integer.value[0] = (chip->image[reg] >> shift) & mask; 1363 1364 spin_unlock_irqrestore(&chip->lock, flags); 1365 1366 if (invert) 1367 ucontrol->value.integer.value[0] = 1368 (mask - ucontrol->value.integer.value[0]); 1369 1370 return 0; 1371 } 1372 1373 static int snd_cs4231_put_single(struct snd_kcontrol *kcontrol, 1374 struct snd_ctl_elem_value *ucontrol) 1375 { 1376 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol); 1377 unsigned long flags; 1378 int reg = kcontrol->private_value & 0xff; 1379 int shift = (kcontrol->private_value >> 8) & 0xff; 1380 int mask = (kcontrol->private_value >> 16) & 0xff; 1381 int invert = (kcontrol->private_value >> 24) & 0xff; 1382 int change; 1383 unsigned short val; 1384 1385 val = (ucontrol->value.integer.value[0] & mask); 1386 if (invert) 1387 val = mask - val; 1388 val <<= shift; 1389 1390 spin_lock_irqsave(&chip->lock, flags); 1391 1392 val = (chip->image[reg] & ~(mask << shift)) | val; 1393 change = val != chip->image[reg]; 1394 snd_cs4231_out(chip, reg, val); 1395 1396 spin_unlock_irqrestore(&chip->lock, flags); 1397 1398 return change; 1399 } 1400 1401 static int snd_cs4231_info_double(struct snd_kcontrol *kcontrol, 1402 struct snd_ctl_elem_info *uinfo) 1403 { 1404 int mask = (kcontrol->private_value >> 24) & 0xff; 1405 1406 uinfo->type = mask == 1 ? 1407 SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER; 1408 uinfo->count = 2; 1409 uinfo->value.integer.min = 0; 1410 uinfo->value.integer.max = mask; 1411 1412 return 0; 1413 } 1414 1415 static int snd_cs4231_get_double(struct snd_kcontrol *kcontrol, 1416 struct snd_ctl_elem_value *ucontrol) 1417 { 1418 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol); 1419 unsigned long flags; 1420 int left_reg = kcontrol->private_value & 0xff; 1421 int right_reg = (kcontrol->private_value >> 8) & 0xff; 1422 int shift_left = (kcontrol->private_value >> 16) & 0x07; 1423 int shift_right = (kcontrol->private_value >> 19) & 0x07; 1424 int mask = (kcontrol->private_value >> 24) & 0xff; 1425 int invert = (kcontrol->private_value >> 22) & 1; 1426 1427 spin_lock_irqsave(&chip->lock, flags); 1428 1429 ucontrol->value.integer.value[0] = 1430 (chip->image[left_reg] >> shift_left) & mask; 1431 ucontrol->value.integer.value[1] = 1432 (chip->image[right_reg] >> shift_right) & mask; 1433 1434 spin_unlock_irqrestore(&chip->lock, flags); 1435 1436 if (invert) { 1437 ucontrol->value.integer.value[0] = 1438 (mask - ucontrol->value.integer.value[0]); 1439 ucontrol->value.integer.value[1] = 1440 (mask - ucontrol->value.integer.value[1]); 1441 } 1442 1443 return 0; 1444 } 1445 1446 static int snd_cs4231_put_double(struct snd_kcontrol *kcontrol, 1447 struct snd_ctl_elem_value *ucontrol) 1448 { 1449 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol); 1450 unsigned long flags; 1451 int left_reg = kcontrol->private_value & 0xff; 1452 int right_reg = (kcontrol->private_value >> 8) & 0xff; 1453 int shift_left = (kcontrol->private_value >> 16) & 0x07; 1454 int shift_right = (kcontrol->private_value >> 19) & 0x07; 1455 int mask = (kcontrol->private_value >> 24) & 0xff; 1456 int invert = (kcontrol->private_value >> 22) & 1; 1457 int change; 1458 unsigned short val1, val2; 1459 1460 val1 = ucontrol->value.integer.value[0] & mask; 1461 val2 = ucontrol->value.integer.value[1] & mask; 1462 if (invert) { 1463 val1 = mask - val1; 1464 val2 = mask - val2; 1465 } 1466 val1 <<= shift_left; 1467 val2 <<= shift_right; 1468 1469 spin_lock_irqsave(&chip->lock, flags); 1470 1471 val1 = (chip->image[left_reg] & ~(mask << shift_left)) | val1; 1472 val2 = (chip->image[right_reg] & ~(mask << shift_right)) | val2; 1473 change = val1 != chip->image[left_reg]; 1474 change |= val2 != chip->image[right_reg]; 1475 snd_cs4231_out(chip, left_reg, val1); 1476 snd_cs4231_out(chip, right_reg, val2); 1477 1478 spin_unlock_irqrestore(&chip->lock, flags); 1479 1480 return change; 1481 } 1482 1483 #define CS4231_SINGLE(xname, xindex, reg, shift, mask, invert) \ 1484 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), .index = (xindex), \ 1485 .info = snd_cs4231_info_single, \ 1486 .get = snd_cs4231_get_single, .put = snd_cs4231_put_single, \ 1487 .private_value = (reg) | ((shift) << 8) | ((mask) << 16) | ((invert) << 24) } 1488 1489 #define CS4231_DOUBLE(xname, xindex, left_reg, right_reg, shift_left, \ 1490 shift_right, mask, invert) \ 1491 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), .index = (xindex), \ 1492 .info = snd_cs4231_info_double, \ 1493 .get = snd_cs4231_get_double, .put = snd_cs4231_put_double, \ 1494 .private_value = (left_reg) | ((right_reg) << 8) | ((shift_left) << 16) | \ 1495 ((shift_right) << 19) | ((mask) << 24) | ((invert) << 22) } 1496 1497 static struct snd_kcontrol_new snd_cs4231_controls[] = { 1498 CS4231_DOUBLE("PCM Playback Switch", 0, CS4231_LEFT_OUTPUT, 1499 CS4231_RIGHT_OUTPUT, 7, 7, 1, 1), 1500 CS4231_DOUBLE("PCM Playback Volume", 0, CS4231_LEFT_OUTPUT, 1501 CS4231_RIGHT_OUTPUT, 0, 0, 63, 1), 1502 CS4231_DOUBLE("Line Playback Switch", 0, CS4231_LEFT_LINE_IN, 1503 CS4231_RIGHT_LINE_IN, 7, 7, 1, 1), 1504 CS4231_DOUBLE("Line Playback Volume", 0, CS4231_LEFT_LINE_IN, 1505 CS4231_RIGHT_LINE_IN, 0, 0, 31, 1), 1506 CS4231_DOUBLE("Aux Playback Switch", 0, CS4231_AUX1_LEFT_INPUT, 1507 CS4231_AUX1_RIGHT_INPUT, 7, 7, 1, 1), 1508 CS4231_DOUBLE("Aux Playback Volume", 0, CS4231_AUX1_LEFT_INPUT, 1509 CS4231_AUX1_RIGHT_INPUT, 0, 0, 31, 1), 1510 CS4231_DOUBLE("Aux Playback Switch", 1, CS4231_AUX2_LEFT_INPUT, 1511 CS4231_AUX2_RIGHT_INPUT, 7, 7, 1, 1), 1512 CS4231_DOUBLE("Aux Playback Volume", 1, CS4231_AUX2_LEFT_INPUT, 1513 CS4231_AUX2_RIGHT_INPUT, 0, 0, 31, 1), 1514 CS4231_SINGLE("Mono Playback Switch", 0, CS4231_MONO_CTRL, 7, 1, 1), 1515 CS4231_SINGLE("Mono Playback Volume", 0, CS4231_MONO_CTRL, 0, 15, 1), 1516 CS4231_SINGLE("Mono Output Playback Switch", 0, CS4231_MONO_CTRL, 6, 1, 1), 1517 CS4231_SINGLE("Mono Output Playback Bypass", 0, CS4231_MONO_CTRL, 5, 1, 0), 1518 CS4231_DOUBLE("Capture Volume", 0, CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT, 0, 0, 1519 15, 0), 1520 { 1521 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1522 .name = "Capture Source", 1523 .info = snd_cs4231_info_mux, 1524 .get = snd_cs4231_get_mux, 1525 .put = snd_cs4231_put_mux, 1526 }, 1527 CS4231_DOUBLE("Mic Boost", 0, CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT, 5, 5, 1528 1, 0), 1529 CS4231_SINGLE("Loopback Capture Switch", 0, CS4231_LOOPBACK, 0, 1, 0), 1530 CS4231_SINGLE("Loopback Capture Volume", 0, CS4231_LOOPBACK, 2, 63, 1), 1531 /* SPARC specific uses of XCTL{0,1} general purpose outputs. */ 1532 CS4231_SINGLE("Line Out Switch", 0, CS4231_PIN_CTRL, 6, 1, 1), 1533 CS4231_SINGLE("Headphone Out Switch", 0, CS4231_PIN_CTRL, 7, 1, 1) 1534 }; 1535 1536 static int snd_cs4231_mixer(struct snd_card *card) 1537 { 1538 struct snd_cs4231 *chip = card->private_data; 1539 int err, idx; 1540 1541 if (snd_BUG_ON(!chip || !chip->pcm)) 1542 return -EINVAL; 1543 1544 strcpy(card->mixername, chip->pcm->name); 1545 1546 for (idx = 0; idx < ARRAY_SIZE(snd_cs4231_controls); idx++) { 1547 err = snd_ctl_add(card, 1548 snd_ctl_new1(&snd_cs4231_controls[idx], chip)); 1549 if (err < 0) 1550 return err; 1551 } 1552 return 0; 1553 } 1554 1555 static int dev; 1556 1557 static int cs4231_attach_begin(struct platform_device *op, 1558 struct snd_card **rcard) 1559 { 1560 struct snd_card *card; 1561 struct snd_cs4231 *chip; 1562 int err; 1563 1564 *rcard = NULL; 1565 1566 if (dev >= SNDRV_CARDS) 1567 return -ENODEV; 1568 1569 if (!enable[dev]) { 1570 dev++; 1571 return -ENOENT; 1572 } 1573 1574 err = snd_card_new(&op->dev, index[dev], id[dev], THIS_MODULE, 1575 sizeof(struct snd_cs4231), &card); 1576 if (err < 0) 1577 return err; 1578 1579 strcpy(card->driver, "CS4231"); 1580 strcpy(card->shortname, "Sun CS4231"); 1581 1582 chip = card->private_data; 1583 chip->card = card; 1584 1585 *rcard = card; 1586 return 0; 1587 } 1588 1589 static int cs4231_attach_finish(struct snd_card *card) 1590 { 1591 struct snd_cs4231 *chip = card->private_data; 1592 int err; 1593 1594 err = snd_cs4231_pcm(card); 1595 if (err < 0) 1596 goto out_err; 1597 1598 err = snd_cs4231_mixer(card); 1599 if (err < 0) 1600 goto out_err; 1601 1602 err = snd_cs4231_timer(card); 1603 if (err < 0) 1604 goto out_err; 1605 1606 err = snd_card_register(card); 1607 if (err < 0) 1608 goto out_err; 1609 1610 dev_set_drvdata(&chip->op->dev, chip); 1611 1612 dev++; 1613 return 0; 1614 1615 out_err: 1616 snd_card_free(card); 1617 return err; 1618 } 1619 1620 #ifdef SBUS_SUPPORT 1621 1622 static irqreturn_t snd_cs4231_sbus_interrupt(int irq, void *dev_id) 1623 { 1624 unsigned long flags; 1625 unsigned char status; 1626 u32 csr; 1627 struct snd_cs4231 *chip = dev_id; 1628 1629 /*This is IRQ is not raised by the cs4231*/ 1630 if (!(__cs4231_readb(chip, CS4231U(chip, STATUS)) & CS4231_GLOBALIRQ)) 1631 return IRQ_NONE; 1632 1633 /* ACK the APC interrupt. */ 1634 csr = sbus_readl(chip->port + APCCSR); 1635 1636 sbus_writel(csr, chip->port + APCCSR); 1637 1638 if ((csr & APC_PDMA_READY) && 1639 (csr & APC_PLAY_INT) && 1640 (csr & APC_XINT_PNVA) && 1641 !(csr & APC_XINT_EMPT)) 1642 snd_cs4231_play_callback(chip); 1643 1644 if ((csr & APC_CDMA_READY) && 1645 (csr & APC_CAPT_INT) && 1646 (csr & APC_XINT_CNVA) && 1647 !(csr & APC_XINT_EMPT)) 1648 snd_cs4231_capture_callback(chip); 1649 1650 status = snd_cs4231_in(chip, CS4231_IRQ_STATUS); 1651 1652 if (status & CS4231_TIMER_IRQ) { 1653 if (chip->timer) 1654 snd_timer_interrupt(chip->timer, chip->timer->sticks); 1655 } 1656 1657 if ((status & CS4231_RECORD_IRQ) && (csr & APC_CDMA_READY)) 1658 snd_cs4231_overrange(chip); 1659 1660 /* ACK the CS4231 interrupt. */ 1661 spin_lock_irqsave(&chip->lock, flags); 1662 snd_cs4231_outm(chip, CS4231_IRQ_STATUS, ~CS4231_ALL_IRQS | ~status, 0); 1663 spin_unlock_irqrestore(&chip->lock, flags); 1664 1665 return IRQ_HANDLED; 1666 } 1667 1668 /* 1669 * SBUS DMA routines 1670 */ 1671 1672 static int sbus_dma_request(struct cs4231_dma_control *dma_cont, 1673 dma_addr_t bus_addr, size_t len) 1674 { 1675 unsigned long flags; 1676 u32 test, csr; 1677 int err; 1678 struct sbus_dma_info *base = &dma_cont->sbus_info; 1679 1680 if (len >= (1 << 24)) 1681 return -EINVAL; 1682 spin_lock_irqsave(&base->lock, flags); 1683 csr = sbus_readl(base->regs + APCCSR); 1684 err = -EINVAL; 1685 test = APC_CDMA_READY; 1686 if (base->dir == APC_PLAY) 1687 test = APC_PDMA_READY; 1688 if (!(csr & test)) 1689 goto out; 1690 err = -EBUSY; 1691 test = APC_XINT_CNVA; 1692 if (base->dir == APC_PLAY) 1693 test = APC_XINT_PNVA; 1694 if (!(csr & test)) 1695 goto out; 1696 err = 0; 1697 sbus_writel(bus_addr, base->regs + base->dir + APCNVA); 1698 sbus_writel(len, base->regs + base->dir + APCNC); 1699 out: 1700 spin_unlock_irqrestore(&base->lock, flags); 1701 return err; 1702 } 1703 1704 static void sbus_dma_prepare(struct cs4231_dma_control *dma_cont, int d) 1705 { 1706 unsigned long flags; 1707 u32 csr, test; 1708 struct sbus_dma_info *base = &dma_cont->sbus_info; 1709 1710 spin_lock_irqsave(&base->lock, flags); 1711 csr = sbus_readl(base->regs + APCCSR); 1712 test = APC_GENL_INT | APC_PLAY_INT | APC_XINT_ENA | 1713 APC_XINT_PLAY | APC_XINT_PEMP | APC_XINT_GENL | 1714 APC_XINT_PENA; 1715 if (base->dir == APC_RECORD) 1716 test = APC_GENL_INT | APC_CAPT_INT | APC_XINT_ENA | 1717 APC_XINT_CAPT | APC_XINT_CEMP | APC_XINT_GENL; 1718 csr |= test; 1719 sbus_writel(csr, base->regs + APCCSR); 1720 spin_unlock_irqrestore(&base->lock, flags); 1721 } 1722 1723 static void sbus_dma_enable(struct cs4231_dma_control *dma_cont, int on) 1724 { 1725 unsigned long flags; 1726 u32 csr, shift; 1727 struct sbus_dma_info *base = &dma_cont->sbus_info; 1728 1729 spin_lock_irqsave(&base->lock, flags); 1730 if (!on) { 1731 sbus_writel(0, base->regs + base->dir + APCNC); 1732 sbus_writel(0, base->regs + base->dir + APCNVA); 1733 if (base->dir == APC_PLAY) { 1734 sbus_writel(0, base->regs + base->dir + APCC); 1735 sbus_writel(0, base->regs + base->dir + APCVA); 1736 } 1737 1738 udelay(1200); 1739 } 1740 csr = sbus_readl(base->regs + APCCSR); 1741 shift = 0; 1742 if (base->dir == APC_PLAY) 1743 shift = 1; 1744 if (on) 1745 csr &= ~(APC_CPAUSE << shift); 1746 else 1747 csr |= (APC_CPAUSE << shift); 1748 sbus_writel(csr, base->regs + APCCSR); 1749 if (on) 1750 csr |= (APC_CDMA_READY << shift); 1751 else 1752 csr &= ~(APC_CDMA_READY << shift); 1753 sbus_writel(csr, base->regs + APCCSR); 1754 1755 spin_unlock_irqrestore(&base->lock, flags); 1756 } 1757 1758 static unsigned int sbus_dma_addr(struct cs4231_dma_control *dma_cont) 1759 { 1760 struct sbus_dma_info *base = &dma_cont->sbus_info; 1761 1762 return sbus_readl(base->regs + base->dir + APCVA); 1763 } 1764 1765 /* 1766 * Init and exit routines 1767 */ 1768 1769 static int snd_cs4231_sbus_free(struct snd_cs4231 *chip) 1770 { 1771 struct platform_device *op = chip->op; 1772 1773 if (chip->irq[0]) 1774 free_irq(chip->irq[0], chip); 1775 1776 if (chip->port) 1777 of_iounmap(&op->resource[0], chip->port, chip->regs_size); 1778 1779 return 0; 1780 } 1781 1782 static int snd_cs4231_sbus_dev_free(struct snd_device *device) 1783 { 1784 struct snd_cs4231 *cp = device->device_data; 1785 1786 return snd_cs4231_sbus_free(cp); 1787 } 1788 1789 static struct snd_device_ops snd_cs4231_sbus_dev_ops = { 1790 .dev_free = snd_cs4231_sbus_dev_free, 1791 }; 1792 1793 static int snd_cs4231_sbus_create(struct snd_card *card, 1794 struct platform_device *op, 1795 int dev) 1796 { 1797 struct snd_cs4231 *chip = card->private_data; 1798 int err; 1799 1800 spin_lock_init(&chip->lock); 1801 spin_lock_init(&chip->c_dma.sbus_info.lock); 1802 spin_lock_init(&chip->p_dma.sbus_info.lock); 1803 mutex_init(&chip->mce_mutex); 1804 mutex_init(&chip->open_mutex); 1805 chip->op = op; 1806 chip->regs_size = resource_size(&op->resource[0]); 1807 memcpy(&chip->image, &snd_cs4231_original_image, 1808 sizeof(snd_cs4231_original_image)); 1809 1810 chip->port = of_ioremap(&op->resource[0], 0, 1811 chip->regs_size, "cs4231"); 1812 if (!chip->port) { 1813 snd_printdd("cs4231-%d: Unable to map chip registers.\n", dev); 1814 return -EIO; 1815 } 1816 1817 chip->c_dma.sbus_info.regs = chip->port; 1818 chip->p_dma.sbus_info.regs = chip->port; 1819 chip->c_dma.sbus_info.dir = APC_RECORD; 1820 chip->p_dma.sbus_info.dir = APC_PLAY; 1821 1822 chip->p_dma.prepare = sbus_dma_prepare; 1823 chip->p_dma.enable = sbus_dma_enable; 1824 chip->p_dma.request = sbus_dma_request; 1825 chip->p_dma.address = sbus_dma_addr; 1826 1827 chip->c_dma.prepare = sbus_dma_prepare; 1828 chip->c_dma.enable = sbus_dma_enable; 1829 chip->c_dma.request = sbus_dma_request; 1830 chip->c_dma.address = sbus_dma_addr; 1831 1832 if (request_irq(op->archdata.irqs[0], snd_cs4231_sbus_interrupt, 1833 IRQF_SHARED, "cs4231", chip)) { 1834 snd_printdd("cs4231-%d: Unable to grab SBUS IRQ %d\n", 1835 dev, op->archdata.irqs[0]); 1836 snd_cs4231_sbus_free(chip); 1837 return -EBUSY; 1838 } 1839 chip->irq[0] = op->archdata.irqs[0]; 1840 1841 if (snd_cs4231_probe(chip) < 0) { 1842 snd_cs4231_sbus_free(chip); 1843 return -ENODEV; 1844 } 1845 snd_cs4231_init(chip); 1846 1847 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, 1848 chip, &snd_cs4231_sbus_dev_ops)) < 0) { 1849 snd_cs4231_sbus_free(chip); 1850 return err; 1851 } 1852 1853 return 0; 1854 } 1855 1856 static int cs4231_sbus_probe(struct platform_device *op) 1857 { 1858 struct resource *rp = &op->resource[0]; 1859 struct snd_card *card; 1860 int err; 1861 1862 err = cs4231_attach_begin(op, &card); 1863 if (err) 1864 return err; 1865 1866 sprintf(card->longname, "%s at 0x%02lx:0x%016Lx, irq %d", 1867 card->shortname, 1868 rp->flags & 0xffL, 1869 (unsigned long long)rp->start, 1870 op->archdata.irqs[0]); 1871 1872 err = snd_cs4231_sbus_create(card, op, dev); 1873 if (err < 0) { 1874 snd_card_free(card); 1875 return err; 1876 } 1877 1878 return cs4231_attach_finish(card); 1879 } 1880 #endif 1881 1882 #ifdef EBUS_SUPPORT 1883 1884 static void snd_cs4231_ebus_play_callback(struct ebus_dma_info *p, int event, 1885 void *cookie) 1886 { 1887 struct snd_cs4231 *chip = cookie; 1888 1889 snd_cs4231_play_callback(chip); 1890 } 1891 1892 static void snd_cs4231_ebus_capture_callback(struct ebus_dma_info *p, 1893 int event, void *cookie) 1894 { 1895 struct snd_cs4231 *chip = cookie; 1896 1897 snd_cs4231_capture_callback(chip); 1898 } 1899 1900 /* 1901 * EBUS DMA wrappers 1902 */ 1903 1904 static int _ebus_dma_request(struct cs4231_dma_control *dma_cont, 1905 dma_addr_t bus_addr, size_t len) 1906 { 1907 return ebus_dma_request(&dma_cont->ebus_info, bus_addr, len); 1908 } 1909 1910 static void _ebus_dma_enable(struct cs4231_dma_control *dma_cont, int on) 1911 { 1912 ebus_dma_enable(&dma_cont->ebus_info, on); 1913 } 1914 1915 static void _ebus_dma_prepare(struct cs4231_dma_control *dma_cont, int dir) 1916 { 1917 ebus_dma_prepare(&dma_cont->ebus_info, dir); 1918 } 1919 1920 static unsigned int _ebus_dma_addr(struct cs4231_dma_control *dma_cont) 1921 { 1922 return ebus_dma_addr(&dma_cont->ebus_info); 1923 } 1924 1925 /* 1926 * Init and exit routines 1927 */ 1928 1929 static int snd_cs4231_ebus_free(struct snd_cs4231 *chip) 1930 { 1931 struct platform_device *op = chip->op; 1932 1933 if (chip->c_dma.ebus_info.regs) { 1934 ebus_dma_unregister(&chip->c_dma.ebus_info); 1935 of_iounmap(&op->resource[2], chip->c_dma.ebus_info.regs, 0x10); 1936 } 1937 if (chip->p_dma.ebus_info.regs) { 1938 ebus_dma_unregister(&chip->p_dma.ebus_info); 1939 of_iounmap(&op->resource[1], chip->p_dma.ebus_info.regs, 0x10); 1940 } 1941 1942 if (chip->port) 1943 of_iounmap(&op->resource[0], chip->port, 0x10); 1944 1945 return 0; 1946 } 1947 1948 static int snd_cs4231_ebus_dev_free(struct snd_device *device) 1949 { 1950 struct snd_cs4231 *cp = device->device_data; 1951 1952 return snd_cs4231_ebus_free(cp); 1953 } 1954 1955 static struct snd_device_ops snd_cs4231_ebus_dev_ops = { 1956 .dev_free = snd_cs4231_ebus_dev_free, 1957 }; 1958 1959 static int snd_cs4231_ebus_create(struct snd_card *card, 1960 struct platform_device *op, 1961 int dev) 1962 { 1963 struct snd_cs4231 *chip = card->private_data; 1964 int err; 1965 1966 spin_lock_init(&chip->lock); 1967 spin_lock_init(&chip->c_dma.ebus_info.lock); 1968 spin_lock_init(&chip->p_dma.ebus_info.lock); 1969 mutex_init(&chip->mce_mutex); 1970 mutex_init(&chip->open_mutex); 1971 chip->flags |= CS4231_FLAG_EBUS; 1972 chip->op = op; 1973 memcpy(&chip->image, &snd_cs4231_original_image, 1974 sizeof(snd_cs4231_original_image)); 1975 strcpy(chip->c_dma.ebus_info.name, "cs4231(capture)"); 1976 chip->c_dma.ebus_info.flags = EBUS_DMA_FLAG_USE_EBDMA_HANDLER; 1977 chip->c_dma.ebus_info.callback = snd_cs4231_ebus_capture_callback; 1978 chip->c_dma.ebus_info.client_cookie = chip; 1979 chip->c_dma.ebus_info.irq = op->archdata.irqs[0]; 1980 strcpy(chip->p_dma.ebus_info.name, "cs4231(play)"); 1981 chip->p_dma.ebus_info.flags = EBUS_DMA_FLAG_USE_EBDMA_HANDLER; 1982 chip->p_dma.ebus_info.callback = snd_cs4231_ebus_play_callback; 1983 chip->p_dma.ebus_info.client_cookie = chip; 1984 chip->p_dma.ebus_info.irq = op->archdata.irqs[1]; 1985 1986 chip->p_dma.prepare = _ebus_dma_prepare; 1987 chip->p_dma.enable = _ebus_dma_enable; 1988 chip->p_dma.request = _ebus_dma_request; 1989 chip->p_dma.address = _ebus_dma_addr; 1990 1991 chip->c_dma.prepare = _ebus_dma_prepare; 1992 chip->c_dma.enable = _ebus_dma_enable; 1993 chip->c_dma.request = _ebus_dma_request; 1994 chip->c_dma.address = _ebus_dma_addr; 1995 1996 chip->port = of_ioremap(&op->resource[0], 0, 0x10, "cs4231"); 1997 chip->p_dma.ebus_info.regs = 1998 of_ioremap(&op->resource[1], 0, 0x10, "cs4231_pdma"); 1999 chip->c_dma.ebus_info.regs = 2000 of_ioremap(&op->resource[2], 0, 0x10, "cs4231_cdma"); 2001 if (!chip->port || !chip->p_dma.ebus_info.regs || 2002 !chip->c_dma.ebus_info.regs) { 2003 snd_cs4231_ebus_free(chip); 2004 snd_printdd("cs4231-%d: Unable to map chip registers.\n", dev); 2005 return -EIO; 2006 } 2007 2008 if (ebus_dma_register(&chip->c_dma.ebus_info)) { 2009 snd_cs4231_ebus_free(chip); 2010 snd_printdd("cs4231-%d: Unable to register EBUS capture DMA\n", 2011 dev); 2012 return -EBUSY; 2013 } 2014 if (ebus_dma_irq_enable(&chip->c_dma.ebus_info, 1)) { 2015 snd_cs4231_ebus_free(chip); 2016 snd_printdd("cs4231-%d: Unable to enable EBUS capture IRQ\n", 2017 dev); 2018 return -EBUSY; 2019 } 2020 2021 if (ebus_dma_register(&chip->p_dma.ebus_info)) { 2022 snd_cs4231_ebus_free(chip); 2023 snd_printdd("cs4231-%d: Unable to register EBUS play DMA\n", 2024 dev); 2025 return -EBUSY; 2026 } 2027 if (ebus_dma_irq_enable(&chip->p_dma.ebus_info, 1)) { 2028 snd_cs4231_ebus_free(chip); 2029 snd_printdd("cs4231-%d: Unable to enable EBUS play IRQ\n", dev); 2030 return -EBUSY; 2031 } 2032 2033 if (snd_cs4231_probe(chip) < 0) { 2034 snd_cs4231_ebus_free(chip); 2035 return -ENODEV; 2036 } 2037 snd_cs4231_init(chip); 2038 2039 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, 2040 chip, &snd_cs4231_ebus_dev_ops)) < 0) { 2041 snd_cs4231_ebus_free(chip); 2042 return err; 2043 } 2044 2045 return 0; 2046 } 2047 2048 static int cs4231_ebus_probe(struct platform_device *op) 2049 { 2050 struct snd_card *card; 2051 int err; 2052 2053 err = cs4231_attach_begin(op, &card); 2054 if (err) 2055 return err; 2056 2057 sprintf(card->longname, "%s at 0x%llx, irq %d", 2058 card->shortname, 2059 op->resource[0].start, 2060 op->archdata.irqs[0]); 2061 2062 err = snd_cs4231_ebus_create(card, op, dev); 2063 if (err < 0) { 2064 snd_card_free(card); 2065 return err; 2066 } 2067 2068 return cs4231_attach_finish(card); 2069 } 2070 #endif 2071 2072 static int cs4231_probe(struct platform_device *op) 2073 { 2074 #ifdef EBUS_SUPPORT 2075 if (of_node_name_eq(op->dev.of_node->parent, "ebus")) 2076 return cs4231_ebus_probe(op); 2077 #endif 2078 #ifdef SBUS_SUPPORT 2079 if (of_node_name_eq(op->dev.of_node->parent, "sbus") || 2080 of_node_name_eq(op->dev.of_node->parent, "sbi")) 2081 return cs4231_sbus_probe(op); 2082 #endif 2083 return -ENODEV; 2084 } 2085 2086 static int cs4231_remove(struct platform_device *op) 2087 { 2088 struct snd_cs4231 *chip = dev_get_drvdata(&op->dev); 2089 2090 snd_card_free(chip->card); 2091 2092 return 0; 2093 } 2094 2095 static const struct of_device_id cs4231_match[] = { 2096 { 2097 .name = "SUNW,CS4231", 2098 }, 2099 { 2100 .name = "audio", 2101 .compatible = "SUNW,CS4231", 2102 }, 2103 {}, 2104 }; 2105 2106 MODULE_DEVICE_TABLE(of, cs4231_match); 2107 2108 static struct platform_driver cs4231_driver = { 2109 .driver = { 2110 .name = "audio", 2111 .of_match_table = cs4231_match, 2112 }, 2113 .probe = cs4231_probe, 2114 .remove = cs4231_remove, 2115 }; 2116 2117 module_platform_driver(cs4231_driver); 2118