1 // SPDX-License-Identifier: GPL-2.0 2 // 3 // Xilinx ASoC I2S audio support 4 // 5 // Copyright (C) 2018 Xilinx, Inc. 6 // 7 // Author: Praveen Vuppala <praveenv@xilinx.com> 8 // Author: Maruthi Srinivas Bayyavarapu <maruthis@xilinx.com> 9 10 #include <linux/io.h> 11 #include <linux/module.h> 12 #include <linux/of.h> 13 #include <linux/of_platform.h> 14 #include <linux/platform_device.h> 15 #include <sound/pcm_params.h> 16 #include <sound/soc.h> 17 18 #define DRV_NAME "xlnx_i2s" 19 20 #define I2S_CORE_CTRL_OFFSET 0x08 21 #define I2S_I2STIM_OFFSET 0x20 22 #define I2S_CH0_OFFSET 0x30 23 #define I2S_I2STIM_VALID_MASK GENMASK(7, 0) 24 25 static int xlnx_i2s_set_sclkout_div(struct snd_soc_dai *cpu_dai, 26 int div_id, int div) 27 { 28 void __iomem *base = snd_soc_dai_get_drvdata(cpu_dai); 29 30 if (!div || (div & ~I2S_I2STIM_VALID_MASK)) 31 return -EINVAL; 32 33 writel(div, base + I2S_I2STIM_OFFSET); 34 35 return 0; 36 } 37 38 static int xlnx_i2s_hw_params(struct snd_pcm_substream *substream, 39 struct snd_pcm_hw_params *params, 40 struct snd_soc_dai *i2s_dai) 41 { 42 u32 reg_off, chan_id; 43 void __iomem *base = snd_soc_dai_get_drvdata(i2s_dai); 44 45 chan_id = params_channels(params) / 2; 46 47 while (chan_id > 0) { 48 reg_off = I2S_CH0_OFFSET + ((chan_id - 1) * 4); 49 writel(chan_id, base + reg_off); 50 chan_id--; 51 } 52 53 return 0; 54 } 55 56 static int xlnx_i2s_trigger(struct snd_pcm_substream *substream, int cmd, 57 struct snd_soc_dai *i2s_dai) 58 { 59 void __iomem *base = snd_soc_dai_get_drvdata(i2s_dai); 60 61 switch (cmd) { 62 case SNDRV_PCM_TRIGGER_START: 63 case SNDRV_PCM_TRIGGER_RESUME: 64 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 65 writel(1, base + I2S_CORE_CTRL_OFFSET); 66 break; 67 case SNDRV_PCM_TRIGGER_STOP: 68 case SNDRV_PCM_TRIGGER_SUSPEND: 69 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 70 writel(0, base + I2S_CORE_CTRL_OFFSET); 71 break; 72 default: 73 return -EINVAL; 74 } 75 76 return 0; 77 } 78 79 static const struct snd_soc_dai_ops xlnx_i2s_dai_ops = { 80 .trigger = xlnx_i2s_trigger, 81 .set_clkdiv = xlnx_i2s_set_sclkout_div, 82 .hw_params = xlnx_i2s_hw_params 83 }; 84 85 static const struct snd_soc_component_driver xlnx_i2s_component = { 86 .name = DRV_NAME, 87 }; 88 89 static const struct of_device_id xlnx_i2s_of_match[] = { 90 { .compatible = "xlnx,i2s-transmitter-1.0", }, 91 { .compatible = "xlnx,i2s-receiver-1.0", }, 92 {}, 93 }; 94 MODULE_DEVICE_TABLE(of, xlnx_i2s_of_match); 95 96 static int xlnx_i2s_probe(struct platform_device *pdev) 97 { 98 struct resource *res; 99 void __iomem *base; 100 struct snd_soc_dai_driver *dai_drv; 101 int ret; 102 u32 ch, format, data_width; 103 struct device *dev = &pdev->dev; 104 struct device_node *node = dev->of_node; 105 106 dai_drv = devm_kzalloc(&pdev->dev, sizeof(*dai_drv), GFP_KERNEL); 107 if (!dai_drv) 108 return -ENOMEM; 109 110 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 111 base = devm_ioremap_resource(&pdev->dev, res); 112 if (IS_ERR(base)) 113 return PTR_ERR(base); 114 115 ret = of_property_read_u32(node, "xlnx,num-channels", &ch); 116 if (ret < 0) { 117 dev_err(dev, "cannot get supported channels\n"); 118 return ret; 119 } 120 ch = ch * 2; 121 122 ret = of_property_read_u32(node, "xlnx,dwidth", &data_width); 123 if (ret < 0) { 124 dev_err(dev, "cannot get data width\n"); 125 return ret; 126 } 127 switch (data_width) { 128 case 16: 129 format = SNDRV_PCM_FMTBIT_S16_LE; 130 break; 131 case 24: 132 format = SNDRV_PCM_FMTBIT_S24_LE; 133 break; 134 default: 135 return -EINVAL; 136 } 137 138 if (of_device_is_compatible(node, "xlnx,i2s-transmitter-1.0")) { 139 dai_drv->name = "xlnx_i2s_playback"; 140 dai_drv->playback.stream_name = "Playback"; 141 dai_drv->playback.formats = format; 142 dai_drv->playback.channels_min = ch; 143 dai_drv->playback.channels_max = ch; 144 dai_drv->playback.rates = SNDRV_PCM_RATE_8000_192000; 145 dai_drv->ops = &xlnx_i2s_dai_ops; 146 } else if (of_device_is_compatible(node, "xlnx,i2s-receiver-1.0")) { 147 dai_drv->name = "xlnx_i2s_capture"; 148 dai_drv->capture.stream_name = "Capture"; 149 dai_drv->capture.formats = format; 150 dai_drv->capture.channels_min = ch; 151 dai_drv->capture.channels_max = ch; 152 dai_drv->capture.rates = SNDRV_PCM_RATE_8000_192000; 153 dai_drv->ops = &xlnx_i2s_dai_ops; 154 } else { 155 return -ENODEV; 156 } 157 158 dev_set_drvdata(&pdev->dev, base); 159 160 ret = devm_snd_soc_register_component(&pdev->dev, &xlnx_i2s_component, 161 dai_drv, 1); 162 if (ret) { 163 dev_err(&pdev->dev, "i2s component registration failed\n"); 164 return ret; 165 } 166 167 dev_info(&pdev->dev, "%s DAI registered\n", dai_drv->name); 168 169 return ret; 170 } 171 172 static struct platform_driver xlnx_i2s_aud_driver = { 173 .driver = { 174 .name = DRV_NAME, 175 .of_match_table = xlnx_i2s_of_match, 176 }, 177 .probe = xlnx_i2s_probe, 178 }; 179 180 module_platform_driver(xlnx_i2s_aud_driver); 181 182 MODULE_LICENSE("GPL v2"); 183 MODULE_AUTHOR("Praveen Vuppala <praveenv@xilinx.com>"); 184 MODULE_AUTHOR("Maruthi Srinivas Bayyavarapu <maruthis@xilinx.com>"); 185