1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * omap-mcpdm.h 4 * 5 * Copyright (C) 2009 - 2011 Texas Instruments 6 * 7 * Contact: Misael Lopez Cruz <misael.lopez@ti.com> 8 */ 9 10 #ifndef __OMAP_MCPDM_H__ 11 #define __OMAP_MCPDM_H__ 12 13 #define MCPDM_REG_REVISION 0x00 14 #define MCPDM_REG_SYSCONFIG 0x10 15 #define MCPDM_REG_IRQSTATUS_RAW 0x24 16 #define MCPDM_REG_IRQSTATUS 0x28 17 #define MCPDM_REG_IRQENABLE_SET 0x2C 18 #define MCPDM_REG_IRQENABLE_CLR 0x30 19 #define MCPDM_REG_IRQWAKE_EN 0x34 20 #define MCPDM_REG_DMAENABLE_SET 0x38 21 #define MCPDM_REG_DMAENABLE_CLR 0x3C 22 #define MCPDM_REG_DMAWAKEEN 0x40 23 #define MCPDM_REG_CTRL 0x44 24 #define MCPDM_REG_DN_DATA 0x48 25 #define MCPDM_REG_UP_DATA 0x4C 26 #define MCPDM_REG_FIFO_CTRL_DN 0x50 27 #define MCPDM_REG_FIFO_CTRL_UP 0x54 28 #define MCPDM_REG_DN_OFFSET 0x58 29 30 /* 31 * MCPDM_IRQ bit fields 32 * IRQSTATUS_RAW, IRQSTATUS, IRQENABLE_SET, IRQENABLE_CLR 33 */ 34 35 #define MCPDM_DN_IRQ (1 << 0) 36 #define MCPDM_DN_IRQ_EMPTY (1 << 1) 37 #define MCPDM_DN_IRQ_ALMST_EMPTY (1 << 2) 38 #define MCPDM_DN_IRQ_FULL (1 << 3) 39 40 #define MCPDM_UP_IRQ (1 << 8) 41 #define MCPDM_UP_IRQ_EMPTY (1 << 9) 42 #define MCPDM_UP_IRQ_ALMST_FULL (1 << 10) 43 #define MCPDM_UP_IRQ_FULL (1 << 11) 44 45 #define MCPDM_DOWNLINK_IRQ_MASK 0x00F 46 #define MCPDM_UPLINK_IRQ_MASK 0xF00 47 48 /* 49 * MCPDM_DMAENABLE bit fields 50 */ 51 52 #define MCPDM_DMA_DN_ENABLE (1 << 0) 53 #define MCPDM_DMA_UP_ENABLE (1 << 1) 54 55 /* 56 * MCPDM_CTRL bit fields 57 */ 58 59 #define MCPDM_PDM_UPLINK_EN(x) (1 << (x - 1)) /* ch1 is at bit 0 */ 60 #define MCPDM_PDM_DOWNLINK_EN(x) (1 << (x + 2)) /* ch1 is at bit 3 */ 61 #define MCPDM_PDMOUTFORMAT (1 << 8) 62 #define MCPDM_CMD_INT (1 << 9) 63 #define MCPDM_STATUS_INT (1 << 10) 64 #define MCPDM_SW_UP_RST (1 << 11) 65 #define MCPDM_SW_DN_RST (1 << 12) 66 #define MCPDM_WD_EN (1 << 14) 67 #define MCPDM_PDM_UP_MASK 0x7 68 #define MCPDM_PDM_DN_MASK (0x1f << 3) 69 70 71 #define MCPDM_PDMOUTFORMAT_LJUST (0 << 8) 72 #define MCPDM_PDMOUTFORMAT_RJUST (1 << 8) 73 74 /* 75 * MCPDM_FIFO_CTRL bit fields 76 */ 77 78 #define MCPDM_UP_THRES_MAX 0xF 79 #define MCPDM_DN_THRES_MAX 0xF 80 81 /* 82 * MCPDM_DN_OFFSET bit fields 83 */ 84 85 #define MCPDM_DN_OFST_RX1_EN (1 << 0) 86 #define MCPDM_DNOFST_RX1(x) ((x & 0x1f) << 1) 87 #define MCPDM_DN_OFST_RX2_EN (1 << 8) 88 #define MCPDM_DNOFST_RX2(x) ((x & 0x1f) << 9) 89 90 void omap_mcpdm_configure_dn_offsets(struct snd_soc_pcm_runtime *rtd, 91 u8 rx1, u8 rx2); 92 93 #endif /* End of __OMAP_MCPDM_H__ */ 94