12b27bdccSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only
2f2055e14SPeter Ujfalusi /*
3f2055e14SPeter Ujfalusi * omap-dmic.c -- OMAP ASoC DMIC DAI driver
4f2055e14SPeter Ujfalusi *
5f2055e14SPeter Ujfalusi * Copyright (C) 2010 - 2011 Texas Instruments
6f2055e14SPeter Ujfalusi *
7f2055e14SPeter Ujfalusi * Author: David Lambert <dlambert@ti.com>
8f2055e14SPeter Ujfalusi * Misael Lopez Cruz <misael.lopez@ti.com>
9f2055e14SPeter Ujfalusi * Liam Girdwood <lrg@ti.com>
10f2055e14SPeter Ujfalusi * Peter Ujfalusi <peter.ujfalusi@ti.com>
11f2055e14SPeter Ujfalusi */
12f2055e14SPeter Ujfalusi
13f2055e14SPeter Ujfalusi #include <linux/init.h>
14f2055e14SPeter Ujfalusi #include <linux/module.h>
15f2055e14SPeter Ujfalusi #include <linux/platform_device.h>
16f2055e14SPeter Ujfalusi #include <linux/err.h>
17f2055e14SPeter Ujfalusi #include <linux/clk.h>
18f2055e14SPeter Ujfalusi #include <linux/io.h>
19f2055e14SPeter Ujfalusi #include <linux/slab.h>
20f2055e14SPeter Ujfalusi #include <linux/pm_runtime.h>
21f2055e14SPeter Ujfalusi #include <linux/of_device.h>
22f2055e14SPeter Ujfalusi
23f2055e14SPeter Ujfalusi #include <sound/core.h>
24f2055e14SPeter Ujfalusi #include <sound/pcm.h>
25f2055e14SPeter Ujfalusi #include <sound/pcm_params.h>
26f2055e14SPeter Ujfalusi #include <sound/initval.h>
27f2055e14SPeter Ujfalusi #include <sound/soc.h>
28f2055e14SPeter Ujfalusi #include <sound/dmaengine_pcm.h>
29f2055e14SPeter Ujfalusi
30f2055e14SPeter Ujfalusi #include "omap-dmic.h"
31f2055e14SPeter Ujfalusi #include "sdma-pcm.h"
32f2055e14SPeter Ujfalusi
33f2055e14SPeter Ujfalusi struct omap_dmic {
34f2055e14SPeter Ujfalusi struct device *dev;
35f2055e14SPeter Ujfalusi void __iomem *io_base;
36f2055e14SPeter Ujfalusi struct clk *fclk;
37f2055e14SPeter Ujfalusi struct pm_qos_request pm_qos_req;
38f2055e14SPeter Ujfalusi int latency;
39f2055e14SPeter Ujfalusi int fclk_freq;
40f2055e14SPeter Ujfalusi int out_freq;
41f2055e14SPeter Ujfalusi int clk_div;
42f2055e14SPeter Ujfalusi int sysclk;
43f2055e14SPeter Ujfalusi int threshold;
44f2055e14SPeter Ujfalusi u32 ch_enabled;
45f2055e14SPeter Ujfalusi bool active;
46f2055e14SPeter Ujfalusi struct mutex mutex;
47f2055e14SPeter Ujfalusi
48f2055e14SPeter Ujfalusi struct snd_dmaengine_dai_dma_data dma_data;
49f2055e14SPeter Ujfalusi };
50f2055e14SPeter Ujfalusi
omap_dmic_write(struct omap_dmic * dmic,u16 reg,u32 val)51f2055e14SPeter Ujfalusi static inline void omap_dmic_write(struct omap_dmic *dmic, u16 reg, u32 val)
52f2055e14SPeter Ujfalusi {
53f2055e14SPeter Ujfalusi writel_relaxed(val, dmic->io_base + reg);
54f2055e14SPeter Ujfalusi }
55f2055e14SPeter Ujfalusi
omap_dmic_read(struct omap_dmic * dmic,u16 reg)56f2055e14SPeter Ujfalusi static inline int omap_dmic_read(struct omap_dmic *dmic, u16 reg)
57f2055e14SPeter Ujfalusi {
58f2055e14SPeter Ujfalusi return readl_relaxed(dmic->io_base + reg);
59f2055e14SPeter Ujfalusi }
60f2055e14SPeter Ujfalusi
omap_dmic_start(struct omap_dmic * dmic)61f2055e14SPeter Ujfalusi static inline void omap_dmic_start(struct omap_dmic *dmic)
62f2055e14SPeter Ujfalusi {
63f2055e14SPeter Ujfalusi u32 ctrl = omap_dmic_read(dmic, OMAP_DMIC_CTRL_REG);
64f2055e14SPeter Ujfalusi
65f2055e14SPeter Ujfalusi /* Configure DMA controller */
66f2055e14SPeter Ujfalusi omap_dmic_write(dmic, OMAP_DMIC_DMAENABLE_SET_REG,
67f2055e14SPeter Ujfalusi OMAP_DMIC_DMA_ENABLE);
68f2055e14SPeter Ujfalusi
69f2055e14SPeter Ujfalusi omap_dmic_write(dmic, OMAP_DMIC_CTRL_REG, ctrl | dmic->ch_enabled);
70f2055e14SPeter Ujfalusi }
71f2055e14SPeter Ujfalusi
omap_dmic_stop(struct omap_dmic * dmic)72f2055e14SPeter Ujfalusi static inline void omap_dmic_stop(struct omap_dmic *dmic)
73f2055e14SPeter Ujfalusi {
74f2055e14SPeter Ujfalusi u32 ctrl = omap_dmic_read(dmic, OMAP_DMIC_CTRL_REG);
75f2055e14SPeter Ujfalusi omap_dmic_write(dmic, OMAP_DMIC_CTRL_REG,
76f2055e14SPeter Ujfalusi ctrl & ~OMAP_DMIC_UP_ENABLE_MASK);
77f2055e14SPeter Ujfalusi
78f2055e14SPeter Ujfalusi /* Disable DMA request generation */
79f2055e14SPeter Ujfalusi omap_dmic_write(dmic, OMAP_DMIC_DMAENABLE_CLR_REG,
80f2055e14SPeter Ujfalusi OMAP_DMIC_DMA_ENABLE);
81f2055e14SPeter Ujfalusi
82f2055e14SPeter Ujfalusi }
83f2055e14SPeter Ujfalusi
dmic_is_enabled(struct omap_dmic * dmic)84f2055e14SPeter Ujfalusi static inline int dmic_is_enabled(struct omap_dmic *dmic)
85f2055e14SPeter Ujfalusi {
86f2055e14SPeter Ujfalusi return omap_dmic_read(dmic, OMAP_DMIC_CTRL_REG) &
87f2055e14SPeter Ujfalusi OMAP_DMIC_UP_ENABLE_MASK;
88f2055e14SPeter Ujfalusi }
89f2055e14SPeter Ujfalusi
omap_dmic_dai_startup(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)90f2055e14SPeter Ujfalusi static int omap_dmic_dai_startup(struct snd_pcm_substream *substream,
91f2055e14SPeter Ujfalusi struct snd_soc_dai *dai)
92f2055e14SPeter Ujfalusi {
93f2055e14SPeter Ujfalusi struct omap_dmic *dmic = snd_soc_dai_get_drvdata(dai);
94f2055e14SPeter Ujfalusi int ret = 0;
95f2055e14SPeter Ujfalusi
96f2055e14SPeter Ujfalusi mutex_lock(&dmic->mutex);
97f2055e14SPeter Ujfalusi
9836ad1a87SKuninori Morimoto if (!snd_soc_dai_active(dai))
99f2055e14SPeter Ujfalusi dmic->active = 1;
100f2055e14SPeter Ujfalusi else
101f2055e14SPeter Ujfalusi ret = -EBUSY;
102f2055e14SPeter Ujfalusi
103f2055e14SPeter Ujfalusi mutex_unlock(&dmic->mutex);
104f2055e14SPeter Ujfalusi
105f2055e14SPeter Ujfalusi return ret;
106f2055e14SPeter Ujfalusi }
107f2055e14SPeter Ujfalusi
omap_dmic_dai_shutdown(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)108f2055e14SPeter Ujfalusi static void omap_dmic_dai_shutdown(struct snd_pcm_substream *substream,
109f2055e14SPeter Ujfalusi struct snd_soc_dai *dai)
110f2055e14SPeter Ujfalusi {
111f2055e14SPeter Ujfalusi struct omap_dmic *dmic = snd_soc_dai_get_drvdata(dai);
112f2055e14SPeter Ujfalusi
113f2055e14SPeter Ujfalusi mutex_lock(&dmic->mutex);
114f2055e14SPeter Ujfalusi
1155371a79bSRafael J. Wysocki cpu_latency_qos_remove_request(&dmic->pm_qos_req);
116f2055e14SPeter Ujfalusi
11736ad1a87SKuninori Morimoto if (!snd_soc_dai_active(dai))
118f2055e14SPeter Ujfalusi dmic->active = 0;
119f2055e14SPeter Ujfalusi
120f2055e14SPeter Ujfalusi mutex_unlock(&dmic->mutex);
121f2055e14SPeter Ujfalusi }
122f2055e14SPeter Ujfalusi
omap_dmic_select_divider(struct omap_dmic * dmic,int sample_rate)123f2055e14SPeter Ujfalusi static int omap_dmic_select_divider(struct omap_dmic *dmic, int sample_rate)
124f2055e14SPeter Ujfalusi {
125f2055e14SPeter Ujfalusi int divider = -EINVAL;
126f2055e14SPeter Ujfalusi
127f2055e14SPeter Ujfalusi /*
128f2055e14SPeter Ujfalusi * 192KHz rate is only supported with 19.2MHz/3.84MHz clock
129f2055e14SPeter Ujfalusi * configuration.
130f2055e14SPeter Ujfalusi */
131f2055e14SPeter Ujfalusi if (sample_rate == 192000) {
132f2055e14SPeter Ujfalusi if (dmic->fclk_freq == 19200000 && dmic->out_freq == 3840000)
133f2055e14SPeter Ujfalusi divider = 0x6; /* Divider: 5 (192KHz sampling rate) */
134f2055e14SPeter Ujfalusi else
135f2055e14SPeter Ujfalusi dev_err(dmic->dev,
136f2055e14SPeter Ujfalusi "invalid clock configuration for 192KHz\n");
137f2055e14SPeter Ujfalusi
138f2055e14SPeter Ujfalusi return divider;
139f2055e14SPeter Ujfalusi }
140f2055e14SPeter Ujfalusi
141f2055e14SPeter Ujfalusi switch (dmic->out_freq) {
142f2055e14SPeter Ujfalusi case 1536000:
143f2055e14SPeter Ujfalusi if (dmic->fclk_freq != 24576000)
144f2055e14SPeter Ujfalusi goto div_err;
145f2055e14SPeter Ujfalusi divider = 0x4; /* Divider: 16 */
146f2055e14SPeter Ujfalusi break;
147f2055e14SPeter Ujfalusi case 2400000:
148f2055e14SPeter Ujfalusi switch (dmic->fclk_freq) {
149f2055e14SPeter Ujfalusi case 12000000:
150f2055e14SPeter Ujfalusi divider = 0x5; /* Divider: 5 */
151f2055e14SPeter Ujfalusi break;
152f2055e14SPeter Ujfalusi case 19200000:
153f2055e14SPeter Ujfalusi divider = 0x0; /* Divider: 8 */
154f2055e14SPeter Ujfalusi break;
155f2055e14SPeter Ujfalusi case 24000000:
156f2055e14SPeter Ujfalusi divider = 0x2; /* Divider: 10 */
157f2055e14SPeter Ujfalusi break;
158f2055e14SPeter Ujfalusi default:
159f2055e14SPeter Ujfalusi goto div_err;
160f2055e14SPeter Ujfalusi }
161f2055e14SPeter Ujfalusi break;
162f2055e14SPeter Ujfalusi case 3072000:
163f2055e14SPeter Ujfalusi if (dmic->fclk_freq != 24576000)
164f2055e14SPeter Ujfalusi goto div_err;
165f2055e14SPeter Ujfalusi divider = 0x3; /* Divider: 8 */
166f2055e14SPeter Ujfalusi break;
167f2055e14SPeter Ujfalusi case 3840000:
168f2055e14SPeter Ujfalusi if (dmic->fclk_freq != 19200000)
169f2055e14SPeter Ujfalusi goto div_err;
170f2055e14SPeter Ujfalusi divider = 0x1; /* Divider: 5 (96KHz sampling rate) */
171f2055e14SPeter Ujfalusi break;
172f2055e14SPeter Ujfalusi default:
173f2055e14SPeter Ujfalusi dev_err(dmic->dev, "invalid out frequency: %dHz\n",
174f2055e14SPeter Ujfalusi dmic->out_freq);
175f2055e14SPeter Ujfalusi break;
176f2055e14SPeter Ujfalusi }
177f2055e14SPeter Ujfalusi
178f2055e14SPeter Ujfalusi return divider;
179f2055e14SPeter Ujfalusi
180f2055e14SPeter Ujfalusi div_err:
181f2055e14SPeter Ujfalusi dev_err(dmic->dev, "invalid out frequency %dHz for %dHz input\n",
182f2055e14SPeter Ujfalusi dmic->out_freq, dmic->fclk_freq);
183f2055e14SPeter Ujfalusi return -EINVAL;
184f2055e14SPeter Ujfalusi }
185f2055e14SPeter Ujfalusi
omap_dmic_dai_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)186f2055e14SPeter Ujfalusi static int omap_dmic_dai_hw_params(struct snd_pcm_substream *substream,
187f2055e14SPeter Ujfalusi struct snd_pcm_hw_params *params,
188f2055e14SPeter Ujfalusi struct snd_soc_dai *dai)
189f2055e14SPeter Ujfalusi {
190f2055e14SPeter Ujfalusi struct omap_dmic *dmic = snd_soc_dai_get_drvdata(dai);
191f2055e14SPeter Ujfalusi struct snd_dmaengine_dai_dma_data *dma_data;
192f2055e14SPeter Ujfalusi int channels;
193f2055e14SPeter Ujfalusi
194f2055e14SPeter Ujfalusi dmic->clk_div = omap_dmic_select_divider(dmic, params_rate(params));
195f2055e14SPeter Ujfalusi if (dmic->clk_div < 0) {
196f2055e14SPeter Ujfalusi dev_err(dmic->dev, "no valid divider for %dHz from %dHz\n",
197f2055e14SPeter Ujfalusi dmic->out_freq, dmic->fclk_freq);
198f2055e14SPeter Ujfalusi return -EINVAL;
199f2055e14SPeter Ujfalusi }
200f2055e14SPeter Ujfalusi
201f2055e14SPeter Ujfalusi dmic->ch_enabled = 0;
202f2055e14SPeter Ujfalusi channels = params_channels(params);
203f2055e14SPeter Ujfalusi switch (channels) {
204f2055e14SPeter Ujfalusi case 6:
205f2055e14SPeter Ujfalusi dmic->ch_enabled |= OMAP_DMIC_UP3_ENABLE;
206df561f66SGustavo A. R. Silva fallthrough;
207f2055e14SPeter Ujfalusi case 4:
208f2055e14SPeter Ujfalusi dmic->ch_enabled |= OMAP_DMIC_UP2_ENABLE;
209df561f66SGustavo A. R. Silva fallthrough;
210f2055e14SPeter Ujfalusi case 2:
211f2055e14SPeter Ujfalusi dmic->ch_enabled |= OMAP_DMIC_UP1_ENABLE;
212f2055e14SPeter Ujfalusi break;
213f2055e14SPeter Ujfalusi default:
214f2055e14SPeter Ujfalusi dev_err(dmic->dev, "invalid number of legacy channels\n");
215f2055e14SPeter Ujfalusi return -EINVAL;
216f2055e14SPeter Ujfalusi }
217f2055e14SPeter Ujfalusi
218f2055e14SPeter Ujfalusi /* packet size is threshold * channels */
219f2055e14SPeter Ujfalusi dma_data = snd_soc_dai_get_dma_data(dai, substream);
220f2055e14SPeter Ujfalusi dma_data->maxburst = dmic->threshold * channels;
221f2055e14SPeter Ujfalusi dmic->latency = (OMAP_DMIC_THRES_MAX - dmic->threshold) * USEC_PER_SEC /
222f2055e14SPeter Ujfalusi params_rate(params);
223f2055e14SPeter Ujfalusi
224f2055e14SPeter Ujfalusi return 0;
225f2055e14SPeter Ujfalusi }
226f2055e14SPeter Ujfalusi
omap_dmic_dai_prepare(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)227f2055e14SPeter Ujfalusi static int omap_dmic_dai_prepare(struct snd_pcm_substream *substream,
228f2055e14SPeter Ujfalusi struct snd_soc_dai *dai)
229f2055e14SPeter Ujfalusi {
230f2055e14SPeter Ujfalusi struct omap_dmic *dmic = snd_soc_dai_get_drvdata(dai);
231f2055e14SPeter Ujfalusi u32 ctrl;
232f2055e14SPeter Ujfalusi
2335371a79bSRafael J. Wysocki if (cpu_latency_qos_request_active(&dmic->pm_qos_req))
2345371a79bSRafael J. Wysocki cpu_latency_qos_update_request(&dmic->pm_qos_req,
2355371a79bSRafael J. Wysocki dmic->latency);
236f2055e14SPeter Ujfalusi
237f2055e14SPeter Ujfalusi /* Configure uplink threshold */
238f2055e14SPeter Ujfalusi omap_dmic_write(dmic, OMAP_DMIC_FIFO_CTRL_REG, dmic->threshold);
239f2055e14SPeter Ujfalusi
240f2055e14SPeter Ujfalusi ctrl = omap_dmic_read(dmic, OMAP_DMIC_CTRL_REG);
241f2055e14SPeter Ujfalusi
242f2055e14SPeter Ujfalusi /* Set dmic out format */
243f2055e14SPeter Ujfalusi ctrl &= ~(OMAP_DMIC_FORMAT | OMAP_DMIC_POLAR_MASK);
244f2055e14SPeter Ujfalusi ctrl |= (OMAP_DMICOUTFORMAT_LJUST | OMAP_DMIC_POLAR1 |
245f2055e14SPeter Ujfalusi OMAP_DMIC_POLAR2 | OMAP_DMIC_POLAR3);
246f2055e14SPeter Ujfalusi
247f2055e14SPeter Ujfalusi /* Configure dmic clock divider */
248f2055e14SPeter Ujfalusi ctrl &= ~OMAP_DMIC_CLK_DIV_MASK;
249f2055e14SPeter Ujfalusi ctrl |= OMAP_DMIC_CLK_DIV(dmic->clk_div);
250f2055e14SPeter Ujfalusi
251f2055e14SPeter Ujfalusi omap_dmic_write(dmic, OMAP_DMIC_CTRL_REG, ctrl);
252f2055e14SPeter Ujfalusi
253f2055e14SPeter Ujfalusi omap_dmic_write(dmic, OMAP_DMIC_CTRL_REG,
254f2055e14SPeter Ujfalusi ctrl | OMAP_DMICOUTFORMAT_LJUST | OMAP_DMIC_POLAR1 |
255f2055e14SPeter Ujfalusi OMAP_DMIC_POLAR2 | OMAP_DMIC_POLAR3);
256f2055e14SPeter Ujfalusi
257f2055e14SPeter Ujfalusi return 0;
258f2055e14SPeter Ujfalusi }
259f2055e14SPeter Ujfalusi
omap_dmic_dai_trigger(struct snd_pcm_substream * substream,int cmd,struct snd_soc_dai * dai)260f2055e14SPeter Ujfalusi static int omap_dmic_dai_trigger(struct snd_pcm_substream *substream,
261f2055e14SPeter Ujfalusi int cmd, struct snd_soc_dai *dai)
262f2055e14SPeter Ujfalusi {
263f2055e14SPeter Ujfalusi struct omap_dmic *dmic = snd_soc_dai_get_drvdata(dai);
264f2055e14SPeter Ujfalusi
265f2055e14SPeter Ujfalusi switch (cmd) {
266f2055e14SPeter Ujfalusi case SNDRV_PCM_TRIGGER_START:
267f2055e14SPeter Ujfalusi omap_dmic_start(dmic);
268f2055e14SPeter Ujfalusi break;
269f2055e14SPeter Ujfalusi case SNDRV_PCM_TRIGGER_STOP:
270f2055e14SPeter Ujfalusi omap_dmic_stop(dmic);
271f2055e14SPeter Ujfalusi break;
272f2055e14SPeter Ujfalusi default:
273f2055e14SPeter Ujfalusi break;
274f2055e14SPeter Ujfalusi }
275f2055e14SPeter Ujfalusi
276f2055e14SPeter Ujfalusi return 0;
277f2055e14SPeter Ujfalusi }
278f2055e14SPeter Ujfalusi
omap_dmic_select_fclk(struct omap_dmic * dmic,int clk_id,unsigned int freq)279f2055e14SPeter Ujfalusi static int omap_dmic_select_fclk(struct omap_dmic *dmic, int clk_id,
280f2055e14SPeter Ujfalusi unsigned int freq)
281f2055e14SPeter Ujfalusi {
282f2055e14SPeter Ujfalusi struct clk *parent_clk, *mux;
283f2055e14SPeter Ujfalusi char *parent_clk_name;
284f2055e14SPeter Ujfalusi int ret = 0;
285f2055e14SPeter Ujfalusi
286f2055e14SPeter Ujfalusi switch (freq) {
287f2055e14SPeter Ujfalusi case 12000000:
288f2055e14SPeter Ujfalusi case 19200000:
289f2055e14SPeter Ujfalusi case 24000000:
290f2055e14SPeter Ujfalusi case 24576000:
291f2055e14SPeter Ujfalusi break;
292f2055e14SPeter Ujfalusi default:
293f2055e14SPeter Ujfalusi dev_err(dmic->dev, "invalid input frequency: %dHz\n", freq);
294f2055e14SPeter Ujfalusi dmic->fclk_freq = 0;
295f2055e14SPeter Ujfalusi return -EINVAL;
296f2055e14SPeter Ujfalusi }
297f2055e14SPeter Ujfalusi
298f2055e14SPeter Ujfalusi if (dmic->sysclk == clk_id) {
299f2055e14SPeter Ujfalusi dmic->fclk_freq = freq;
300f2055e14SPeter Ujfalusi return 0;
301f2055e14SPeter Ujfalusi }
302f2055e14SPeter Ujfalusi
303f2055e14SPeter Ujfalusi /* re-parent not allowed if a stream is ongoing */
304f2055e14SPeter Ujfalusi if (dmic->active && dmic_is_enabled(dmic)) {
305f2055e14SPeter Ujfalusi dev_err(dmic->dev, "can't re-parent when DMIC active\n");
306f2055e14SPeter Ujfalusi return -EBUSY;
307f2055e14SPeter Ujfalusi }
308f2055e14SPeter Ujfalusi
309f2055e14SPeter Ujfalusi switch (clk_id) {
310f2055e14SPeter Ujfalusi case OMAP_DMIC_SYSCLK_PAD_CLKS:
311f2055e14SPeter Ujfalusi parent_clk_name = "pad_clks_ck";
312f2055e14SPeter Ujfalusi break;
313f2055e14SPeter Ujfalusi case OMAP_DMIC_SYSCLK_SLIMBLUS_CLKS:
314f2055e14SPeter Ujfalusi parent_clk_name = "slimbus_clk";
315f2055e14SPeter Ujfalusi break;
316f2055e14SPeter Ujfalusi case OMAP_DMIC_SYSCLK_SYNC_MUX_CLKS:
317f2055e14SPeter Ujfalusi parent_clk_name = "dmic_sync_mux_ck";
318f2055e14SPeter Ujfalusi break;
319f2055e14SPeter Ujfalusi default:
320f2055e14SPeter Ujfalusi dev_err(dmic->dev, "fclk clk_id (%d) not supported\n", clk_id);
321f2055e14SPeter Ujfalusi return -EINVAL;
322f2055e14SPeter Ujfalusi }
323f2055e14SPeter Ujfalusi
324f2055e14SPeter Ujfalusi parent_clk = clk_get(dmic->dev, parent_clk_name);
325f2055e14SPeter Ujfalusi if (IS_ERR(parent_clk)) {
326f2055e14SPeter Ujfalusi dev_err(dmic->dev, "can't get %s\n", parent_clk_name);
327f2055e14SPeter Ujfalusi return -ENODEV;
328f2055e14SPeter Ujfalusi }
329f2055e14SPeter Ujfalusi
330f2055e14SPeter Ujfalusi mux = clk_get_parent(dmic->fclk);
331f2055e14SPeter Ujfalusi if (IS_ERR(mux)) {
332f2055e14SPeter Ujfalusi dev_err(dmic->dev, "can't get fck mux parent\n");
333f2055e14SPeter Ujfalusi clk_put(parent_clk);
334f2055e14SPeter Ujfalusi return -ENODEV;
335f2055e14SPeter Ujfalusi }
336f2055e14SPeter Ujfalusi
337f2055e14SPeter Ujfalusi mutex_lock(&dmic->mutex);
338f2055e14SPeter Ujfalusi if (dmic->active) {
339f2055e14SPeter Ujfalusi /* disable clock while reparenting */
340f2055e14SPeter Ujfalusi pm_runtime_put_sync(dmic->dev);
341f2055e14SPeter Ujfalusi ret = clk_set_parent(mux, parent_clk);
342f2055e14SPeter Ujfalusi pm_runtime_get_sync(dmic->dev);
343f2055e14SPeter Ujfalusi } else {
344f2055e14SPeter Ujfalusi ret = clk_set_parent(mux, parent_clk);
345f2055e14SPeter Ujfalusi }
346f2055e14SPeter Ujfalusi mutex_unlock(&dmic->mutex);
347f2055e14SPeter Ujfalusi
348f2055e14SPeter Ujfalusi if (ret < 0) {
349f2055e14SPeter Ujfalusi dev_err(dmic->dev, "re-parent failed\n");
350f2055e14SPeter Ujfalusi goto err_busy;
351f2055e14SPeter Ujfalusi }
352f2055e14SPeter Ujfalusi
353f2055e14SPeter Ujfalusi dmic->sysclk = clk_id;
354f2055e14SPeter Ujfalusi dmic->fclk_freq = freq;
355f2055e14SPeter Ujfalusi
356f2055e14SPeter Ujfalusi err_busy:
357f2055e14SPeter Ujfalusi clk_put(mux);
358f2055e14SPeter Ujfalusi clk_put(parent_clk);
359f2055e14SPeter Ujfalusi
360f2055e14SPeter Ujfalusi return ret;
361f2055e14SPeter Ujfalusi }
362f2055e14SPeter Ujfalusi
omap_dmic_select_outclk(struct omap_dmic * dmic,int clk_id,unsigned int freq)363f2055e14SPeter Ujfalusi static int omap_dmic_select_outclk(struct omap_dmic *dmic, int clk_id,
364f2055e14SPeter Ujfalusi unsigned int freq)
365f2055e14SPeter Ujfalusi {
366f2055e14SPeter Ujfalusi int ret = 0;
367f2055e14SPeter Ujfalusi
368f2055e14SPeter Ujfalusi if (clk_id != OMAP_DMIC_ABE_DMIC_CLK) {
369f2055e14SPeter Ujfalusi dev_err(dmic->dev, "output clk_id (%d) not supported\n",
370f2055e14SPeter Ujfalusi clk_id);
371f2055e14SPeter Ujfalusi return -EINVAL;
372f2055e14SPeter Ujfalusi }
373f2055e14SPeter Ujfalusi
374f2055e14SPeter Ujfalusi switch (freq) {
375f2055e14SPeter Ujfalusi case 1536000:
376f2055e14SPeter Ujfalusi case 2400000:
377f2055e14SPeter Ujfalusi case 3072000:
378f2055e14SPeter Ujfalusi case 3840000:
379f2055e14SPeter Ujfalusi dmic->out_freq = freq;
380f2055e14SPeter Ujfalusi break;
381f2055e14SPeter Ujfalusi default:
382f2055e14SPeter Ujfalusi dev_err(dmic->dev, "invalid out frequency: %dHz\n", freq);
383f2055e14SPeter Ujfalusi dmic->out_freq = 0;
384f2055e14SPeter Ujfalusi ret = -EINVAL;
385f2055e14SPeter Ujfalusi }
386f2055e14SPeter Ujfalusi
387f2055e14SPeter Ujfalusi return ret;
388f2055e14SPeter Ujfalusi }
389f2055e14SPeter Ujfalusi
omap_dmic_set_dai_sysclk(struct snd_soc_dai * dai,int clk_id,unsigned int freq,int dir)390f2055e14SPeter Ujfalusi static int omap_dmic_set_dai_sysclk(struct snd_soc_dai *dai, int clk_id,
391f2055e14SPeter Ujfalusi unsigned int freq, int dir)
392f2055e14SPeter Ujfalusi {
393f2055e14SPeter Ujfalusi struct omap_dmic *dmic = snd_soc_dai_get_drvdata(dai);
394f2055e14SPeter Ujfalusi
395f2055e14SPeter Ujfalusi if (dir == SND_SOC_CLOCK_IN)
396f2055e14SPeter Ujfalusi return omap_dmic_select_fclk(dmic, clk_id, freq);
397f2055e14SPeter Ujfalusi else if (dir == SND_SOC_CLOCK_OUT)
398f2055e14SPeter Ujfalusi return omap_dmic_select_outclk(dmic, clk_id, freq);
399f2055e14SPeter Ujfalusi
400f2055e14SPeter Ujfalusi dev_err(dmic->dev, "invalid clock direction (%d)\n", dir);
401f2055e14SPeter Ujfalusi return -EINVAL;
402f2055e14SPeter Ujfalusi }
403f2055e14SPeter Ujfalusi
omap_dmic_probe(struct snd_soc_dai * dai)404f2055e14SPeter Ujfalusi static int omap_dmic_probe(struct snd_soc_dai *dai)
405f2055e14SPeter Ujfalusi {
406f2055e14SPeter Ujfalusi struct omap_dmic *dmic = snd_soc_dai_get_drvdata(dai);
407f2055e14SPeter Ujfalusi
408f2055e14SPeter Ujfalusi pm_runtime_enable(dmic->dev);
409f2055e14SPeter Ujfalusi
410f2055e14SPeter Ujfalusi /* Disable lines while request is ongoing */
411f2055e14SPeter Ujfalusi pm_runtime_get_sync(dmic->dev);
412f2055e14SPeter Ujfalusi omap_dmic_write(dmic, OMAP_DMIC_CTRL_REG, 0x00);
413f2055e14SPeter Ujfalusi pm_runtime_put_sync(dmic->dev);
414f2055e14SPeter Ujfalusi
415f2055e14SPeter Ujfalusi /* Configure DMIC threshold value */
416f2055e14SPeter Ujfalusi dmic->threshold = OMAP_DMIC_THRES_MAX - 3;
417f2055e14SPeter Ujfalusi
418f2055e14SPeter Ujfalusi snd_soc_dai_init_dma_data(dai, NULL, &dmic->dma_data);
419f2055e14SPeter Ujfalusi
420f2055e14SPeter Ujfalusi return 0;
421f2055e14SPeter Ujfalusi }
422f2055e14SPeter Ujfalusi
omap_dmic_remove(struct snd_soc_dai * dai)423f2055e14SPeter Ujfalusi static int omap_dmic_remove(struct snd_soc_dai *dai)
424f2055e14SPeter Ujfalusi {
425f2055e14SPeter Ujfalusi struct omap_dmic *dmic = snd_soc_dai_get_drvdata(dai);
426f2055e14SPeter Ujfalusi
427f2055e14SPeter Ujfalusi pm_runtime_disable(dmic->dev);
428f2055e14SPeter Ujfalusi
429f2055e14SPeter Ujfalusi return 0;
430f2055e14SPeter Ujfalusi }
431f2055e14SPeter Ujfalusi
432*dd9d64deSKuninori Morimoto static const struct snd_soc_dai_ops omap_dmic_dai_ops = {
433f2055e14SPeter Ujfalusi .probe = omap_dmic_probe,
434f2055e14SPeter Ujfalusi .remove = omap_dmic_remove,
435*dd9d64deSKuninori Morimoto .startup = omap_dmic_dai_startup,
436*dd9d64deSKuninori Morimoto .shutdown = omap_dmic_dai_shutdown,
437*dd9d64deSKuninori Morimoto .hw_params = omap_dmic_dai_hw_params,
438*dd9d64deSKuninori Morimoto .prepare = omap_dmic_dai_prepare,
439*dd9d64deSKuninori Morimoto .trigger = omap_dmic_dai_trigger,
440*dd9d64deSKuninori Morimoto .set_sysclk = omap_dmic_set_dai_sysclk,
441*dd9d64deSKuninori Morimoto };
442*dd9d64deSKuninori Morimoto
443*dd9d64deSKuninori Morimoto static struct snd_soc_dai_driver omap_dmic_dai = {
444*dd9d64deSKuninori Morimoto .name = "omap-dmic",
445f2055e14SPeter Ujfalusi .capture = {
446f2055e14SPeter Ujfalusi .channels_min = 2,
447f2055e14SPeter Ujfalusi .channels_max = 6,
448f2055e14SPeter Ujfalusi .rates = SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_192000,
449f2055e14SPeter Ujfalusi .formats = SNDRV_PCM_FMTBIT_S32_LE,
450f2055e14SPeter Ujfalusi .sig_bits = 24,
451f2055e14SPeter Ujfalusi },
452f2055e14SPeter Ujfalusi .ops = &omap_dmic_dai_ops,
453f2055e14SPeter Ujfalusi };
454f2055e14SPeter Ujfalusi
455f2055e14SPeter Ujfalusi static const struct snd_soc_component_driver omap_dmic_component = {
456f2055e14SPeter Ujfalusi .name = "omap-dmic",
45739c84e77SCharles Keepax .legacy_dai_naming = 1,
458f2055e14SPeter Ujfalusi };
459f2055e14SPeter Ujfalusi
asoc_dmic_probe(struct platform_device * pdev)460f2055e14SPeter Ujfalusi static int asoc_dmic_probe(struct platform_device *pdev)
461f2055e14SPeter Ujfalusi {
462f2055e14SPeter Ujfalusi struct omap_dmic *dmic;
463f2055e14SPeter Ujfalusi struct resource *res;
464f2055e14SPeter Ujfalusi int ret;
465f2055e14SPeter Ujfalusi
466f2055e14SPeter Ujfalusi dmic = devm_kzalloc(&pdev->dev, sizeof(struct omap_dmic), GFP_KERNEL);
467f2055e14SPeter Ujfalusi if (!dmic)
468f2055e14SPeter Ujfalusi return -ENOMEM;
469f2055e14SPeter Ujfalusi
470f2055e14SPeter Ujfalusi platform_set_drvdata(pdev, dmic);
471f2055e14SPeter Ujfalusi dmic->dev = &pdev->dev;
472f2055e14SPeter Ujfalusi dmic->sysclk = OMAP_DMIC_SYSCLK_SYNC_MUX_CLKS;
473f2055e14SPeter Ujfalusi
474f2055e14SPeter Ujfalusi mutex_init(&dmic->mutex);
475f2055e14SPeter Ujfalusi
476f2055e14SPeter Ujfalusi dmic->fclk = devm_clk_get(dmic->dev, "fck");
477f2055e14SPeter Ujfalusi if (IS_ERR(dmic->fclk)) {
478e8ca4ceeSColin Ian King dev_err(dmic->dev, "can't get fck\n");
479f2055e14SPeter Ujfalusi return -ENODEV;
480f2055e14SPeter Ujfalusi }
481f2055e14SPeter Ujfalusi
482f2055e14SPeter Ujfalusi res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dma");
483f2055e14SPeter Ujfalusi if (!res) {
484f2055e14SPeter Ujfalusi dev_err(dmic->dev, "invalid dma memory resource\n");
485f2055e14SPeter Ujfalusi return -ENODEV;
486f2055e14SPeter Ujfalusi }
487f2055e14SPeter Ujfalusi dmic->dma_data.addr = res->start + OMAP_DMIC_DATA_REG;
488f2055e14SPeter Ujfalusi
489f2055e14SPeter Ujfalusi dmic->dma_data.filter_data = "up_link";
490f2055e14SPeter Ujfalusi
491c8b04f00SYangtao Li dmic->io_base = devm_platform_ioremap_resource_byname(pdev, "mpu");
492f2055e14SPeter Ujfalusi if (IS_ERR(dmic->io_base))
493f2055e14SPeter Ujfalusi return PTR_ERR(dmic->io_base);
494f2055e14SPeter Ujfalusi
495f2055e14SPeter Ujfalusi ret = devm_snd_soc_register_component(&pdev->dev,
496f2055e14SPeter Ujfalusi &omap_dmic_component,
497f2055e14SPeter Ujfalusi &omap_dmic_dai, 1);
498f2055e14SPeter Ujfalusi if (ret)
499f2055e14SPeter Ujfalusi return ret;
500f2055e14SPeter Ujfalusi
501f2055e14SPeter Ujfalusi ret = sdma_pcm_platform_register(&pdev->dev, NULL, "up_link");
502f2055e14SPeter Ujfalusi if (ret)
503f2055e14SPeter Ujfalusi return ret;
504f2055e14SPeter Ujfalusi
505f2055e14SPeter Ujfalusi return 0;
506f2055e14SPeter Ujfalusi }
507f2055e14SPeter Ujfalusi
508f2055e14SPeter Ujfalusi static const struct of_device_id omap_dmic_of_match[] = {
509f2055e14SPeter Ujfalusi { .compatible = "ti,omap4-dmic", },
510f2055e14SPeter Ujfalusi { }
511f2055e14SPeter Ujfalusi };
512f2055e14SPeter Ujfalusi MODULE_DEVICE_TABLE(of, omap_dmic_of_match);
513f2055e14SPeter Ujfalusi
514f2055e14SPeter Ujfalusi static struct platform_driver asoc_dmic_driver = {
515f2055e14SPeter Ujfalusi .driver = {
516f2055e14SPeter Ujfalusi .name = "omap-dmic",
517f2055e14SPeter Ujfalusi .of_match_table = omap_dmic_of_match,
518f2055e14SPeter Ujfalusi },
519f2055e14SPeter Ujfalusi .probe = asoc_dmic_probe,
520f2055e14SPeter Ujfalusi };
521f2055e14SPeter Ujfalusi
522f2055e14SPeter Ujfalusi module_platform_driver(asoc_dmic_driver);
523f2055e14SPeter Ujfalusi
524f2055e14SPeter Ujfalusi MODULE_ALIAS("platform:omap-dmic");
525f2055e14SPeter Ujfalusi MODULE_AUTHOR("Peter Ujfalusi <peter.ujfalusi@ti.com>");
526f2055e14SPeter Ujfalusi MODULE_DESCRIPTION("OMAP DMIC ASoC Interface");
527f2055e14SPeter Ujfalusi MODULE_LICENSE("GPL");
528