1 // SPDX-License-Identifier: GPL-2.0-only 2 // 3 // tegra210_mixer.c - Tegra210 MIXER driver 4 // 5 // Copyright (c) 2021 NVIDIA CORPORATION. All rights reserved. 6 7 #include <linux/clk.h> 8 #include <linux/device.h> 9 #include <linux/io.h> 10 #include <linux/module.h> 11 #include <linux/of.h> 12 #include <linux/of_device.h> 13 #include <linux/platform_device.h> 14 #include <linux/pm_runtime.h> 15 #include <linux/regmap.h> 16 #include <sound/core.h> 17 #include <sound/pcm.h> 18 #include <sound/pcm_params.h> 19 #include <sound/soc.h> 20 21 #include "tegra210_mixer.h" 22 #include "tegra_cif.h" 23 24 #define MIXER_REG(reg, id) ((reg) + ((id) * TEGRA210_MIXER_REG_STRIDE)) 25 #define MIXER_REG_BASE(reg) ((reg) % TEGRA210_MIXER_REG_STRIDE) 26 27 #define MIXER_GAIN_CFG_RAM_ADDR(id) \ 28 (TEGRA210_MIXER_GAIN_CFG_RAM_ADDR_0 + \ 29 ((id) * TEGRA210_MIXER_GAIN_CFG_RAM_ADDR_STRIDE)) 30 31 #define MIXER_RX_REG_DEFAULTS(id) \ 32 { MIXER_REG(TEGRA210_MIXER_RX1_CIF_CTRL, id), 0x00007700}, \ 33 { MIXER_REG(TEGRA210_MIXER_RX1_CTRL, id), 0x00010823}, \ 34 { MIXER_REG(TEGRA210_MIXER_RX1_PEAK_CTRL, id), 0x000012c0} 35 36 #define MIXER_TX_REG_DEFAULTS(id) \ 37 { MIXER_REG(TEGRA210_MIXER_TX1_INT_MASK, (id)), 0x00000001}, \ 38 { MIXER_REG(TEGRA210_MIXER_TX1_CIF_CTRL, (id)), 0x00007700} 39 40 #define REG_DURATION_PARAM(reg, i) ((reg) + NUM_GAIN_POLY_COEFFS + 1 + (i)) 41 42 static const struct reg_default tegra210_mixer_reg_defaults[] = { 43 /* Inputs */ 44 MIXER_RX_REG_DEFAULTS(0), 45 MIXER_RX_REG_DEFAULTS(1), 46 MIXER_RX_REG_DEFAULTS(2), 47 MIXER_RX_REG_DEFAULTS(3), 48 MIXER_RX_REG_DEFAULTS(4), 49 MIXER_RX_REG_DEFAULTS(5), 50 MIXER_RX_REG_DEFAULTS(6), 51 MIXER_RX_REG_DEFAULTS(7), 52 MIXER_RX_REG_DEFAULTS(8), 53 MIXER_RX_REG_DEFAULTS(9), 54 /* Outputs */ 55 MIXER_TX_REG_DEFAULTS(0), 56 MIXER_TX_REG_DEFAULTS(1), 57 MIXER_TX_REG_DEFAULTS(2), 58 MIXER_TX_REG_DEFAULTS(3), 59 MIXER_TX_REG_DEFAULTS(4), 60 61 { TEGRA210_MIXER_CG, 0x00000001}, 62 { TEGRA210_MIXER_GAIN_CFG_RAM_CTRL, 0x00004000}, 63 { TEGRA210_MIXER_PEAKM_RAM_CTRL, 0x00004000}, 64 { TEGRA210_MIXER_ENABLE, 0x1 }, 65 }; 66 67 /* Default gain parameters */ 68 static const struct tegra210_mixer_gain_params gain_params = { 69 /* Polynomial coefficients */ 70 { 0, 0, 0, 0, 0, 0, 0, 0x1000000, 0 }, 71 /* Gain value */ 72 0x10000, 73 /* Duration Parameters */ 74 { 0, 0, 0x400, 0x8000000 }, 75 }; 76 77 static int __maybe_unused tegra210_mixer_runtime_suspend(struct device *dev) 78 { 79 struct tegra210_mixer *mixer = dev_get_drvdata(dev); 80 81 regcache_cache_only(mixer->regmap, true); 82 regcache_mark_dirty(mixer->regmap); 83 84 return 0; 85 } 86 87 static int __maybe_unused tegra210_mixer_runtime_resume(struct device *dev) 88 { 89 struct tegra210_mixer *mixer = dev_get_drvdata(dev); 90 91 regcache_cache_only(mixer->regmap, false); 92 regcache_sync(mixer->regmap); 93 94 return 0; 95 } 96 97 static int tegra210_mixer_write_ram(struct tegra210_mixer *mixer, 98 unsigned int addr, 99 unsigned int coef) 100 { 101 unsigned int reg, val; 102 int err; 103 104 /* Check if busy */ 105 err = regmap_read_poll_timeout(mixer->regmap, 106 TEGRA210_MIXER_GAIN_CFG_RAM_CTRL, 107 val, !(val & 0x80000000), 10, 10000); 108 if (err < 0) 109 return err; 110 111 reg = (addr << TEGRA210_MIXER_GAIN_CFG_RAM_ADDR_SHIFT) & 112 TEGRA210_MIXER_GAIN_CFG_RAM_ADDR_MASK; 113 reg |= TEGRA210_MIXER_GAIN_CFG_RAM_ADDR_INIT_EN; 114 reg |= TEGRA210_MIXER_GAIN_CFG_RAM_RW_WRITE; 115 reg |= TEGRA210_MIXER_GAIN_CFG_RAM_SEQ_ACCESS_EN; 116 117 regmap_write(mixer->regmap, 118 TEGRA210_MIXER_GAIN_CFG_RAM_CTRL, 119 reg); 120 regmap_write(mixer->regmap, 121 TEGRA210_MIXER_GAIN_CFG_RAM_DATA, 122 coef); 123 124 return 0; 125 } 126 127 static int tegra210_mixer_configure_gain(struct snd_soc_component *cmpnt, 128 unsigned int id, bool instant_gain) 129 { 130 struct tegra210_mixer *mixer = snd_soc_component_get_drvdata(cmpnt); 131 unsigned int reg = MIXER_GAIN_CFG_RAM_ADDR(id); 132 int err, i; 133 134 pm_runtime_get_sync(cmpnt->dev); 135 136 /* Write default gain poly coefficients */ 137 for (i = 0; i < NUM_GAIN_POLY_COEFFS; i++) { 138 err = tegra210_mixer_write_ram(mixer, reg + i, 139 gain_params.poly_coeff[i]); 140 141 if (err < 0) 142 goto rpm_put; 143 } 144 145 /* Write stored gain value */ 146 err = tegra210_mixer_write_ram(mixer, reg + NUM_GAIN_POLY_COEFFS, 147 mixer->gain_value[id]); 148 if (err < 0) 149 goto rpm_put; 150 151 /* Write duration parameters */ 152 for (i = 0; i < NUM_DURATION_PARMS; i++) { 153 int val; 154 155 if (instant_gain) 156 val = 1; 157 else 158 val = gain_params.duration[i]; 159 160 err = tegra210_mixer_write_ram(mixer, 161 REG_DURATION_PARAM(reg, i), 162 val); 163 if (err < 0) 164 goto rpm_put; 165 } 166 167 /* Trigger to apply gain configurations */ 168 err = tegra210_mixer_write_ram(mixer, reg + REG_CFG_DONE_TRIGGER, 169 VAL_CFG_DONE_TRIGGER); 170 171 rpm_put: 172 pm_runtime_put(cmpnt->dev); 173 174 return err; 175 } 176 177 static int tegra210_mixer_get_gain(struct snd_kcontrol *kcontrol, 178 struct snd_ctl_elem_value *ucontrol) 179 { 180 struct soc_mixer_control *mc = 181 (struct soc_mixer_control *)kcontrol->private_value; 182 struct snd_soc_component *cmpnt = snd_soc_kcontrol_component(kcontrol); 183 struct tegra210_mixer *mixer = snd_soc_component_get_drvdata(cmpnt); 184 unsigned int reg = mc->reg; 185 unsigned int i; 186 187 i = (reg - TEGRA210_MIXER_GAIN_CFG_RAM_ADDR_0) / 188 TEGRA210_MIXER_GAIN_CFG_RAM_ADDR_STRIDE; 189 190 ucontrol->value.integer.value[0] = mixer->gain_value[i]; 191 192 return 0; 193 } 194 195 static int tegra210_mixer_put_gain(struct snd_kcontrol *kcontrol, 196 struct snd_ctl_elem_value *ucontrol) 197 { 198 struct soc_mixer_control *mc = 199 (struct soc_mixer_control *)kcontrol->private_value; 200 struct snd_soc_component *cmpnt = snd_soc_kcontrol_component(kcontrol); 201 struct tegra210_mixer *mixer = snd_soc_component_get_drvdata(cmpnt); 202 unsigned int reg = mc->reg, id; 203 bool instant_gain = false; 204 int err; 205 206 if (strstr(kcontrol->id.name, "Instant Gain Volume")) 207 instant_gain = true; 208 209 /* Save gain value for specific MIXER input */ 210 id = (reg - TEGRA210_MIXER_GAIN_CFG_RAM_ADDR_0) / 211 TEGRA210_MIXER_GAIN_CFG_RAM_ADDR_STRIDE; 212 213 mixer->gain_value[id] = ucontrol->value.integer.value[0]; 214 215 err = tegra210_mixer_configure_gain(cmpnt, id, instant_gain); 216 if (err) { 217 dev_err(cmpnt->dev, "Failed to apply gain\n"); 218 return err; 219 } 220 221 return 1; 222 } 223 224 static int tegra210_mixer_set_audio_cif(struct tegra210_mixer *mixer, 225 struct snd_pcm_hw_params *params, 226 unsigned int reg, 227 unsigned int id) 228 { 229 unsigned int channels, audio_bits; 230 struct tegra_cif_conf cif_conf; 231 232 memset(&cif_conf, 0, sizeof(struct tegra_cif_conf)); 233 234 channels = params_channels(params); 235 236 switch (params_format(params)) { 237 case SNDRV_PCM_FORMAT_S16_LE: 238 audio_bits = TEGRA_ACIF_BITS_16; 239 break; 240 case SNDRV_PCM_FORMAT_S32_LE: 241 audio_bits = TEGRA_ACIF_BITS_32; 242 break; 243 default: 244 return -EINVAL; 245 } 246 247 cif_conf.audio_ch = channels; 248 cif_conf.client_ch = channels; 249 cif_conf.audio_bits = audio_bits; 250 cif_conf.client_bits = audio_bits; 251 252 tegra_set_cif(mixer->regmap, 253 reg + (id * TEGRA210_MIXER_REG_STRIDE), 254 &cif_conf); 255 256 return 0; 257 } 258 259 static int tegra210_mixer_in_hw_params(struct snd_pcm_substream *substream, 260 struct snd_pcm_hw_params *params, 261 struct snd_soc_dai *dai) 262 { 263 struct tegra210_mixer *mixer = snd_soc_dai_get_drvdata(dai); 264 int err; 265 266 err = tegra210_mixer_set_audio_cif(mixer, params, 267 TEGRA210_MIXER_RX1_CIF_CTRL, 268 dai->id); 269 if (err < 0) 270 return err; 271 272 return tegra210_mixer_configure_gain(dai->component, dai->id, false); 273 } 274 275 static int tegra210_mixer_out_hw_params(struct snd_pcm_substream *substream, 276 struct snd_pcm_hw_params *params, 277 struct snd_soc_dai *dai) 278 { 279 struct tegra210_mixer *mixer = snd_soc_dai_get_drvdata(dai); 280 281 return tegra210_mixer_set_audio_cif(mixer, params, 282 TEGRA210_MIXER_TX1_CIF_CTRL, 283 dai->id - TEGRA210_MIXER_RX_MAX); 284 } 285 286 static const struct snd_soc_dai_ops tegra210_mixer_out_dai_ops = { 287 .hw_params = tegra210_mixer_out_hw_params, 288 }; 289 290 static const struct snd_soc_dai_ops tegra210_mixer_in_dai_ops = { 291 .hw_params = tegra210_mixer_in_hw_params, 292 }; 293 294 #define IN_DAI(id) \ 295 { \ 296 .name = "MIXER-RX-CIF"#id, \ 297 .playback = { \ 298 .stream_name = "RX" #id "-CIF-Playback",\ 299 .channels_min = 1, \ 300 .channels_max = 8, \ 301 .rates = SNDRV_PCM_RATE_8000_192000, \ 302 .formats = SNDRV_PCM_FMTBIT_S8 | \ 303 SNDRV_PCM_FMTBIT_S16_LE | \ 304 SNDRV_PCM_FMTBIT_S32_LE, \ 305 }, \ 306 .capture = { \ 307 .stream_name = "RX" #id "-CIF-Capture", \ 308 .channels_min = 1, \ 309 .channels_max = 8, \ 310 .rates = SNDRV_PCM_RATE_8000_192000, \ 311 .formats = SNDRV_PCM_FMTBIT_S8 | \ 312 SNDRV_PCM_FMTBIT_S16_LE | \ 313 SNDRV_PCM_FMTBIT_S32_LE, \ 314 }, \ 315 .ops = &tegra210_mixer_in_dai_ops, \ 316 } 317 318 #define OUT_DAI(id) \ 319 { \ 320 .name = "MIXER-TX-CIF" #id, \ 321 .playback = { \ 322 .stream_name = "TX" #id "-CIF-Playback",\ 323 .channels_min = 1, \ 324 .channels_max = 8, \ 325 .rates = SNDRV_PCM_RATE_8000_192000, \ 326 .formats = SNDRV_PCM_FMTBIT_S8 | \ 327 SNDRV_PCM_FMTBIT_S16_LE | \ 328 SNDRV_PCM_FMTBIT_S32_LE, \ 329 }, \ 330 .capture = { \ 331 .stream_name = "TX" #id "-CIF-Capture", \ 332 .channels_min = 1, \ 333 .channels_max = 8, \ 334 .rates = SNDRV_PCM_RATE_8000_192000, \ 335 .formats = SNDRV_PCM_FMTBIT_S8 | \ 336 SNDRV_PCM_FMTBIT_S16_LE | \ 337 SNDRV_PCM_FMTBIT_S32_LE, \ 338 }, \ 339 .ops = &tegra210_mixer_out_dai_ops, \ 340 } 341 342 static struct snd_soc_dai_driver tegra210_mixer_dais[] = { 343 /* Mixer Input */ 344 IN_DAI(1), 345 IN_DAI(2), 346 IN_DAI(3), 347 IN_DAI(4), 348 IN_DAI(5), 349 IN_DAI(6), 350 IN_DAI(7), 351 IN_DAI(8), 352 IN_DAI(9), 353 IN_DAI(10), 354 355 /* Mixer Output */ 356 OUT_DAI(1), 357 OUT_DAI(2), 358 OUT_DAI(3), 359 OUT_DAI(4), 360 OUT_DAI(5), 361 }; 362 363 #define ADDER_CTRL_DECL(name, reg) \ 364 static const struct snd_kcontrol_new name[] = { \ 365 SOC_DAPM_SINGLE("RX1", reg, 0, 1, 0), \ 366 SOC_DAPM_SINGLE("RX2", reg, 1, 1, 0), \ 367 SOC_DAPM_SINGLE("RX3", reg, 2, 1, 0), \ 368 SOC_DAPM_SINGLE("RX4", reg, 3, 1, 0), \ 369 SOC_DAPM_SINGLE("RX5", reg, 4, 1, 0), \ 370 SOC_DAPM_SINGLE("RX6", reg, 5, 1, 0), \ 371 SOC_DAPM_SINGLE("RX7", reg, 6, 1, 0), \ 372 SOC_DAPM_SINGLE("RX8", reg, 7, 1, 0), \ 373 SOC_DAPM_SINGLE("RX9", reg, 8, 1, 0), \ 374 SOC_DAPM_SINGLE("RX10", reg, 9, 1, 0), \ 375 } 376 377 ADDER_CTRL_DECL(adder1, TEGRA210_MIXER_TX1_ADDER_CONFIG); 378 ADDER_CTRL_DECL(adder2, TEGRA210_MIXER_TX2_ADDER_CONFIG); 379 ADDER_CTRL_DECL(adder3, TEGRA210_MIXER_TX3_ADDER_CONFIG); 380 ADDER_CTRL_DECL(adder4, TEGRA210_MIXER_TX4_ADDER_CONFIG); 381 ADDER_CTRL_DECL(adder5, TEGRA210_MIXER_TX5_ADDER_CONFIG); 382 383 #define GAIN_CTRL(id) \ 384 SOC_SINGLE_EXT("RX" #id " Gain Volume", \ 385 MIXER_GAIN_CFG_RAM_ADDR((id) - 1), 0, \ 386 0x20000, 0, tegra210_mixer_get_gain, \ 387 tegra210_mixer_put_gain), \ 388 SOC_SINGLE_EXT("RX" #id " Instant Gain Volume", \ 389 MIXER_GAIN_CFG_RAM_ADDR((id) - 1), 0, \ 390 0x20000, 0, tegra210_mixer_get_gain, \ 391 tegra210_mixer_put_gain), 392 393 /* Volume controls for all MIXER inputs */ 394 static const struct snd_kcontrol_new tegra210_mixer_gain_ctls[] = { 395 GAIN_CTRL(1) 396 GAIN_CTRL(2) 397 GAIN_CTRL(3) 398 GAIN_CTRL(4) 399 GAIN_CTRL(5) 400 GAIN_CTRL(6) 401 GAIN_CTRL(7) 402 GAIN_CTRL(8) 403 GAIN_CTRL(9) 404 GAIN_CTRL(10) 405 }; 406 407 static const struct snd_soc_dapm_widget tegra210_mixer_widgets[] = { 408 SND_SOC_DAPM_AIF_IN("RX1", NULL, 0, SND_SOC_NOPM, 0, 0), 409 SND_SOC_DAPM_AIF_IN("RX2", NULL, 0, SND_SOC_NOPM, 0, 0), 410 SND_SOC_DAPM_AIF_IN("RX3", NULL, 0, SND_SOC_NOPM, 0, 0), 411 SND_SOC_DAPM_AIF_IN("RX4", NULL, 0, SND_SOC_NOPM, 0, 0), 412 SND_SOC_DAPM_AIF_IN("RX5", NULL, 0, SND_SOC_NOPM, 0, 0), 413 SND_SOC_DAPM_AIF_IN("RX6", NULL, 0, SND_SOC_NOPM, 0, 0), 414 SND_SOC_DAPM_AIF_IN("RX7", NULL, 0, SND_SOC_NOPM, 0, 0), 415 SND_SOC_DAPM_AIF_IN("RX8", NULL, 0, SND_SOC_NOPM, 0, 0), 416 SND_SOC_DAPM_AIF_IN("RX9", NULL, 0, SND_SOC_NOPM, 0, 0), 417 SND_SOC_DAPM_AIF_IN("RX10", NULL, 0, SND_SOC_NOPM, 0, 0), 418 SND_SOC_DAPM_AIF_OUT("TX1", NULL, 0, TEGRA210_MIXER_TX1_ENABLE, 0, 0), 419 SND_SOC_DAPM_AIF_OUT("TX2", NULL, 0, TEGRA210_MIXER_TX2_ENABLE, 0, 0), 420 SND_SOC_DAPM_AIF_OUT("TX3", NULL, 0, TEGRA210_MIXER_TX3_ENABLE, 0, 0), 421 SND_SOC_DAPM_AIF_OUT("TX4", NULL, 0, TEGRA210_MIXER_TX4_ENABLE, 0, 0), 422 SND_SOC_DAPM_AIF_OUT("TX5", NULL, 0, TEGRA210_MIXER_TX5_ENABLE, 0, 0), 423 SND_SOC_DAPM_MIXER("Adder1", SND_SOC_NOPM, 1, 0, adder1, 424 ARRAY_SIZE(adder1)), 425 SND_SOC_DAPM_MIXER("Adder2", SND_SOC_NOPM, 1, 0, adder2, 426 ARRAY_SIZE(adder2)), 427 SND_SOC_DAPM_MIXER("Adder3", SND_SOC_NOPM, 1, 0, adder3, 428 ARRAY_SIZE(adder3)), 429 SND_SOC_DAPM_MIXER("Adder4", SND_SOC_NOPM, 1, 0, adder4, 430 ARRAY_SIZE(adder4)), 431 SND_SOC_DAPM_MIXER("Adder5", SND_SOC_NOPM, 1, 0, adder5, 432 ARRAY_SIZE(adder5)), 433 }; 434 435 #define RX_ROUTES(id, sname) \ 436 { "RX" #id " XBAR-" sname, NULL, "RX" #id " XBAR-TX" }, \ 437 { "RX" #id "-CIF-" sname, NULL, "RX" #id " XBAR-" sname }, \ 438 { "RX" #id, NULL, "RX" #id "-CIF-" sname } 439 440 #define MIXER_RX_ROUTES(id) \ 441 RX_ROUTES(id, "Playback"), \ 442 RX_ROUTES(id, "Capture") 443 444 #define ADDER_ROUTES(id, sname) \ 445 { "Adder" #id, "RX1", "RX1" }, \ 446 { "Adder" #id, "RX2", "RX2" }, \ 447 { "Adder" #id, "RX3", "RX3" }, \ 448 { "Adder" #id, "RX4", "RX4" }, \ 449 { "Adder" #id, "RX5", "RX5" }, \ 450 { "Adder" #id, "RX6", "RX6" }, \ 451 { "Adder" #id, "RX7", "RX7" }, \ 452 { "Adder" #id, "RX8", "RX8" }, \ 453 { "Adder" #id, "RX9", "RX9" }, \ 454 { "Adder" #id, "RX10", "RX10" }, \ 455 { "TX" #id, NULL, "Adder" #id }, \ 456 { "TX" #id "-CIF-" sname, NULL, "TX" #id }, \ 457 { "TX" #id " XBAR-" sname, NULL, "TX" #id "-CIF-" sname }, \ 458 { "TX" #id " XBAR-RX", NULL, "TX" #id " XBAR-" sname } \ 459 460 #define TX_ROUTES(id, sname) \ 461 ADDER_ROUTES(1, sname), \ 462 ADDER_ROUTES(2, sname), \ 463 ADDER_ROUTES(3, sname), \ 464 ADDER_ROUTES(4, sname), \ 465 ADDER_ROUTES(5, sname) 466 467 #define MIXER_TX_ROUTES(id) \ 468 TX_ROUTES(id, "Playback"), \ 469 TX_ROUTES(id, "Capture") 470 471 static const struct snd_soc_dapm_route tegra210_mixer_routes[] = { 472 /* Input */ 473 MIXER_RX_ROUTES(1), 474 MIXER_RX_ROUTES(2), 475 MIXER_RX_ROUTES(3), 476 MIXER_RX_ROUTES(4), 477 MIXER_RX_ROUTES(5), 478 MIXER_RX_ROUTES(6), 479 MIXER_RX_ROUTES(7), 480 MIXER_RX_ROUTES(8), 481 MIXER_RX_ROUTES(9), 482 MIXER_RX_ROUTES(10), 483 /* Output */ 484 MIXER_TX_ROUTES(1), 485 MIXER_TX_ROUTES(2), 486 MIXER_TX_ROUTES(3), 487 MIXER_TX_ROUTES(4), 488 MIXER_TX_ROUTES(5), 489 }; 490 491 static const struct snd_soc_component_driver tegra210_mixer_cmpnt = { 492 .dapm_widgets = tegra210_mixer_widgets, 493 .num_dapm_widgets = ARRAY_SIZE(tegra210_mixer_widgets), 494 .dapm_routes = tegra210_mixer_routes, 495 .num_dapm_routes = ARRAY_SIZE(tegra210_mixer_routes), 496 .controls = tegra210_mixer_gain_ctls, 497 .num_controls = ARRAY_SIZE(tegra210_mixer_gain_ctls), 498 }; 499 500 static bool tegra210_mixer_wr_reg(struct device *dev, 501 unsigned int reg) 502 { 503 if (reg < TEGRA210_MIXER_RX_LIMIT) 504 reg = MIXER_REG_BASE(reg); 505 else if (reg < TEGRA210_MIXER_TX_LIMIT) 506 reg = MIXER_REG_BASE(reg) + TEGRA210_MIXER_TX1_ENABLE; 507 508 switch (reg) { 509 case TEGRA210_MIXER_RX1_SOFT_RESET: 510 case TEGRA210_MIXER_RX1_CIF_CTRL ... TEGRA210_MIXER_RX1_PEAK_CTRL: 511 512 case TEGRA210_MIXER_TX1_ENABLE: 513 case TEGRA210_MIXER_TX1_SOFT_RESET: 514 case TEGRA210_MIXER_TX1_INT_MASK ... TEGRA210_MIXER_TX1_ADDER_CONFIG: 515 516 case TEGRA210_MIXER_ENABLE ... TEGRA210_MIXER_CG: 517 case TEGRA210_MIXER_GAIN_CFG_RAM_CTRL ... TEGRA210_MIXER_CTRL: 518 return true; 519 default: 520 return false; 521 } 522 } 523 524 static bool tegra210_mixer_rd_reg(struct device *dev, 525 unsigned int reg) 526 { 527 if (reg < TEGRA210_MIXER_RX_LIMIT) 528 reg = MIXER_REG_BASE(reg); 529 else if (reg < TEGRA210_MIXER_TX_LIMIT) 530 reg = MIXER_REG_BASE(reg) + TEGRA210_MIXER_TX1_ENABLE; 531 532 switch (reg) { 533 case TEGRA210_MIXER_RX1_SOFT_RESET ... TEGRA210_MIXER_RX1_SAMPLE_COUNT: 534 case TEGRA210_MIXER_TX1_ENABLE ... TEGRA210_MIXER_TX1_ADDER_CONFIG: 535 case TEGRA210_MIXER_ENABLE ... TEGRA210_MIXER_CTRL: 536 return true; 537 default: 538 return false; 539 } 540 } 541 542 static bool tegra210_mixer_volatile_reg(struct device *dev, 543 unsigned int reg) 544 { 545 if (reg < TEGRA210_MIXER_RX_LIMIT) 546 reg = MIXER_REG_BASE(reg); 547 else if (reg < TEGRA210_MIXER_TX_LIMIT) 548 reg = MIXER_REG_BASE(reg) + TEGRA210_MIXER_TX1_ENABLE; 549 550 switch (reg) { 551 case TEGRA210_MIXER_RX1_SOFT_RESET: 552 case TEGRA210_MIXER_RX1_STATUS: 553 554 case TEGRA210_MIXER_TX1_SOFT_RESET: 555 case TEGRA210_MIXER_TX1_STATUS: 556 case TEGRA210_MIXER_TX1_INT_STATUS: 557 case TEGRA210_MIXER_TX1_INT_SET: 558 559 case TEGRA210_MIXER_SOFT_RESET: 560 case TEGRA210_MIXER_STATUS: 561 case TEGRA210_MIXER_INT_STATUS: 562 case TEGRA210_MIXER_GAIN_CFG_RAM_CTRL: 563 case TEGRA210_MIXER_GAIN_CFG_RAM_DATA: 564 case TEGRA210_MIXER_PEAKM_RAM_CTRL: 565 case TEGRA210_MIXER_PEAKM_RAM_DATA: 566 return true; 567 default: 568 return false; 569 } 570 } 571 572 static bool tegra210_mixer_precious_reg(struct device *dev, 573 unsigned int reg) 574 { 575 switch (reg) { 576 case TEGRA210_MIXER_GAIN_CFG_RAM_DATA: 577 case TEGRA210_MIXER_PEAKM_RAM_DATA: 578 return true; 579 default: 580 return false; 581 } 582 } 583 584 static const struct regmap_config tegra210_mixer_regmap_config = { 585 .reg_bits = 32, 586 .reg_stride = 4, 587 .val_bits = 32, 588 .max_register = TEGRA210_MIXER_CTRL, 589 .writeable_reg = tegra210_mixer_wr_reg, 590 .readable_reg = tegra210_mixer_rd_reg, 591 .volatile_reg = tegra210_mixer_volatile_reg, 592 .precious_reg = tegra210_mixer_precious_reg, 593 .reg_defaults = tegra210_mixer_reg_defaults, 594 .num_reg_defaults = ARRAY_SIZE(tegra210_mixer_reg_defaults), 595 .cache_type = REGCACHE_FLAT, 596 }; 597 598 static const struct of_device_id tegra210_mixer_of_match[] = { 599 { .compatible = "nvidia,tegra210-amixer" }, 600 {}, 601 }; 602 MODULE_DEVICE_TABLE(of, tegra210_mixer_of_match); 603 604 static int tegra210_mixer_platform_probe(struct platform_device *pdev) 605 { 606 struct device *dev = &pdev->dev; 607 struct tegra210_mixer *mixer; 608 void __iomem *regs; 609 int err, i; 610 611 mixer = devm_kzalloc(dev, sizeof(*mixer), GFP_KERNEL); 612 if (!mixer) 613 return -ENOMEM; 614 615 dev_set_drvdata(dev, mixer); 616 617 /* Use default gain value for all MIXER inputs */ 618 for (i = 0; i < TEGRA210_MIXER_RX_MAX; i++) 619 mixer->gain_value[i] = gain_params.gain_value; 620 621 regs = devm_platform_ioremap_resource(pdev, 0); 622 if (IS_ERR(regs)) 623 return PTR_ERR(regs); 624 625 mixer->regmap = devm_regmap_init_mmio(dev, regs, 626 &tegra210_mixer_regmap_config); 627 if (IS_ERR(mixer->regmap)) { 628 dev_err(dev, "regmap init failed\n"); 629 return PTR_ERR(mixer->regmap); 630 } 631 632 regcache_cache_only(mixer->regmap, true); 633 634 err = devm_snd_soc_register_component(dev, &tegra210_mixer_cmpnt, 635 tegra210_mixer_dais, 636 ARRAY_SIZE(tegra210_mixer_dais)); 637 if (err) { 638 dev_err(dev, "can't register MIXER component, err: %d\n", err); 639 return err; 640 } 641 642 pm_runtime_enable(dev); 643 644 return 0; 645 } 646 647 static int tegra210_mixer_platform_remove(struct platform_device *pdev) 648 { 649 pm_runtime_disable(&pdev->dev); 650 651 return 0; 652 } 653 654 static const struct dev_pm_ops tegra210_mixer_pm_ops = { 655 SET_RUNTIME_PM_OPS(tegra210_mixer_runtime_suspend, 656 tegra210_mixer_runtime_resume, NULL) 657 SET_LATE_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, 658 pm_runtime_force_resume) 659 }; 660 661 static struct platform_driver tegra210_mixer_driver = { 662 .driver = { 663 .name = "tegra210_mixer", 664 .of_match_table = tegra210_mixer_of_match, 665 .pm = &tegra210_mixer_pm_ops, 666 }, 667 .probe = tegra210_mixer_platform_probe, 668 .remove = tegra210_mixer_platform_remove, 669 }; 670 module_platform_driver(tegra210_mixer_driver); 671 672 MODULE_AUTHOR("Arun Shamanna Lakshmi <aruns@nvidia.com>"); 673 MODULE_DESCRIPTION("Tegra210 MIXER ASoC driver"); 674 MODULE_LICENSE("GPL v2"); 675