xref: /openbmc/linux/sound/soc/tegra/tegra20_das.c (revision 3213486f)
1 /*
2  * tegra20_das.c - Tegra20 DAS driver
3  *
4  * Author: Stephen Warren <swarren@nvidia.com>
5  * Copyright (C) 2010 - NVIDIA, Inc.
6  *
7  * This program is free software; you can redistribute it and/or
8  * modify it under the terms of the GNU General Public License
9  * version 2 as published by the Free Software Foundation.
10  *
11  * This program is distributed in the hope that it will be useful, but
12  * WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
14  * General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with this program; if not, write to the Free Software
18  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
19  * 02110-1301 USA
20  *
21  */
22 
23 #include <linux/device.h>
24 #include <linux/io.h>
25 #include <linux/module.h>
26 #include <linux/platform_device.h>
27 #include <linux/regmap.h>
28 #include <linux/slab.h>
29 #include <sound/soc.h>
30 #include "tegra20_das.h"
31 
32 #define DRV_NAME "tegra20-das"
33 
34 static struct tegra20_das *das;
35 
36 static inline void tegra20_das_write(u32 reg, u32 val)
37 {
38 	regmap_write(das->regmap, reg, val);
39 }
40 
41 static inline u32 tegra20_das_read(u32 reg)
42 {
43 	u32 val;
44 
45 	regmap_read(das->regmap, reg, &val);
46 	return val;
47 }
48 
49 int tegra20_das_connect_dap_to_dac(int dap, int dac)
50 {
51 	u32 addr;
52 	u32 reg;
53 
54 	if (!das)
55 		return -ENODEV;
56 
57 	addr = TEGRA20_DAS_DAP_CTRL_SEL +
58 		(dap * TEGRA20_DAS_DAP_CTRL_SEL_STRIDE);
59 	reg = dac << TEGRA20_DAS_DAP_CTRL_SEL_DAP_CTRL_SEL_P;
60 
61 	tegra20_das_write(addr, reg);
62 
63 	return 0;
64 }
65 EXPORT_SYMBOL_GPL(tegra20_das_connect_dap_to_dac);
66 
67 int tegra20_das_connect_dap_to_dap(int dap, int otherdap, int master,
68 				   int sdata1rx, int sdata2rx)
69 {
70 	u32 addr;
71 	u32 reg;
72 
73 	if (!das)
74 		return -ENODEV;
75 
76 	addr = TEGRA20_DAS_DAP_CTRL_SEL +
77 		(dap * TEGRA20_DAS_DAP_CTRL_SEL_STRIDE);
78 	reg = otherdap << TEGRA20_DAS_DAP_CTRL_SEL_DAP_CTRL_SEL_P |
79 		!!sdata2rx << TEGRA20_DAS_DAP_CTRL_SEL_DAP_SDATA2_TX_RX_P |
80 		!!sdata1rx << TEGRA20_DAS_DAP_CTRL_SEL_DAP_SDATA1_TX_RX_P |
81 		!!master << TEGRA20_DAS_DAP_CTRL_SEL_DAP_MS_SEL_P;
82 
83 	tegra20_das_write(addr, reg);
84 
85 	return 0;
86 }
87 EXPORT_SYMBOL_GPL(tegra20_das_connect_dap_to_dap);
88 
89 int tegra20_das_connect_dac_to_dap(int dac, int dap)
90 {
91 	u32 addr;
92 	u32 reg;
93 
94 	if (!das)
95 		return -ENODEV;
96 
97 	addr = TEGRA20_DAS_DAC_INPUT_DATA_CLK_SEL +
98 		(dac * TEGRA20_DAS_DAC_INPUT_DATA_CLK_SEL_STRIDE);
99 	reg = dap << TEGRA20_DAS_DAC_INPUT_DATA_CLK_SEL_DAC_CLK_SEL_P |
100 		dap << TEGRA20_DAS_DAC_INPUT_DATA_CLK_SEL_DAC_SDATA1_SEL_P |
101 		dap << TEGRA20_DAS_DAC_INPUT_DATA_CLK_SEL_DAC_SDATA2_SEL_P;
102 
103 	tegra20_das_write(addr, reg);
104 
105 	return 0;
106 }
107 EXPORT_SYMBOL_GPL(tegra20_das_connect_dac_to_dap);
108 
109 #define LAST_REG(name) \
110 	(TEGRA20_DAS_##name + \
111 	 (TEGRA20_DAS_##name##_STRIDE * (TEGRA20_DAS_##name##_COUNT - 1)))
112 
113 static bool tegra20_das_wr_rd_reg(struct device *dev, unsigned int reg)
114 {
115 	if ((reg >= TEGRA20_DAS_DAP_CTRL_SEL) &&
116 	    (reg <= LAST_REG(DAP_CTRL_SEL)))
117 		return true;
118 	if ((reg >= TEGRA20_DAS_DAC_INPUT_DATA_CLK_SEL) &&
119 	    (reg <= LAST_REG(DAC_INPUT_DATA_CLK_SEL)))
120 		return true;
121 
122 	return false;
123 }
124 
125 static const struct regmap_config tegra20_das_regmap_config = {
126 	.reg_bits = 32,
127 	.reg_stride = 4,
128 	.val_bits = 32,
129 	.max_register = LAST_REG(DAC_INPUT_DATA_CLK_SEL),
130 	.writeable_reg = tegra20_das_wr_rd_reg,
131 	.readable_reg = tegra20_das_wr_rd_reg,
132 	.cache_type = REGCACHE_FLAT,
133 };
134 
135 static int tegra20_das_probe(struct platform_device *pdev)
136 {
137 	struct resource *res;
138 	void __iomem *regs;
139 	int ret = 0;
140 
141 	if (das)
142 		return -ENODEV;
143 
144 	das = devm_kzalloc(&pdev->dev, sizeof(struct tegra20_das), GFP_KERNEL);
145 	if (!das) {
146 		ret = -ENOMEM;
147 		goto err;
148 	}
149 	das->dev = &pdev->dev;
150 
151 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
152 	regs = devm_ioremap_resource(&pdev->dev, res);
153 	if (IS_ERR(regs)) {
154 		ret = PTR_ERR(regs);
155 		goto err;
156 	}
157 
158 	das->regmap = devm_regmap_init_mmio(&pdev->dev, regs,
159 					    &tegra20_das_regmap_config);
160 	if (IS_ERR(das->regmap)) {
161 		dev_err(&pdev->dev, "regmap init failed\n");
162 		ret = PTR_ERR(das->regmap);
163 		goto err;
164 	}
165 
166 	ret = tegra20_das_connect_dap_to_dac(TEGRA20_DAS_DAP_ID_1,
167 					     TEGRA20_DAS_DAP_SEL_DAC1);
168 	if (ret) {
169 		dev_err(&pdev->dev, "Can't set up DAS DAP connection\n");
170 		goto err;
171 	}
172 	ret = tegra20_das_connect_dac_to_dap(TEGRA20_DAS_DAC_ID_1,
173 					     TEGRA20_DAS_DAC_SEL_DAP1);
174 	if (ret) {
175 		dev_err(&pdev->dev, "Can't set up DAS DAC connection\n");
176 		goto err;
177 	}
178 
179 	ret = tegra20_das_connect_dap_to_dac(TEGRA20_DAS_DAP_ID_3,
180 					     TEGRA20_DAS_DAP_SEL_DAC3);
181 	if (ret) {
182 		dev_err(&pdev->dev, "Can't set up DAS DAP connection\n");
183 		goto err;
184 	}
185 	ret = tegra20_das_connect_dac_to_dap(TEGRA20_DAS_DAC_ID_3,
186 					     TEGRA20_DAS_DAC_SEL_DAP3);
187 	if (ret) {
188 		dev_err(&pdev->dev, "Can't set up DAS DAC connection\n");
189 		goto err;
190 	}
191 
192 	platform_set_drvdata(pdev, das);
193 
194 	return 0;
195 
196 err:
197 	das = NULL;
198 	return ret;
199 }
200 
201 static int tegra20_das_remove(struct platform_device *pdev)
202 {
203 	if (!das)
204 		return -ENODEV;
205 
206 	das = NULL;
207 
208 	return 0;
209 }
210 
211 static const struct of_device_id tegra20_das_of_match[] = {
212 	{ .compatible = "nvidia,tegra20-das", },
213 	{},
214 };
215 
216 static struct platform_driver tegra20_das_driver = {
217 	.probe = tegra20_das_probe,
218 	.remove = tegra20_das_remove,
219 	.driver = {
220 		.name = DRV_NAME,
221 		.of_match_table = tegra20_das_of_match,
222 	},
223 };
224 module_platform_driver(tegra20_das_driver);
225 
226 MODULE_AUTHOR("Stephen Warren <swarren@nvidia.com>");
227 MODULE_DESCRIPTION("Tegra20 DAS driver");
228 MODULE_LICENSE("GPL");
229 MODULE_ALIAS("platform:" DRV_NAME);
230 MODULE_DEVICE_TABLE(of, tegra20_das_of_match);
231