13e086edfSolivier moysan /* 23e086edfSolivier moysan * STM32 ALSA SoC Digital Audio Interface (SAI) driver. 33e086edfSolivier moysan * 43e086edfSolivier moysan * Copyright (C) 2016, STMicroelectronics - All Rights Reserved 53e086edfSolivier moysan * Author(s): Olivier Moysan <olivier.moysan@st.com> for STMicroelectronics. 63e086edfSolivier moysan * 73e086edfSolivier moysan * License terms: GPL V2.0. 83e086edfSolivier moysan * 93e086edfSolivier moysan * This program is free software; you can redistribute it and/or modify it 103e086edfSolivier moysan * under the terms of the GNU General Public License version 2 as published by 113e086edfSolivier moysan * the Free Software Foundation. 123e086edfSolivier moysan * 133e086edfSolivier moysan * This program is distributed in the hope that it will be useful, but 143e086edfSolivier moysan * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 153e086edfSolivier moysan * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more 163e086edfSolivier moysan * details. 173e086edfSolivier moysan */ 183e086edfSolivier moysan 193e086edfSolivier moysan #include <linux/clk.h> 203e086edfSolivier moysan #include <linux/kernel.h> 213e086edfSolivier moysan #include <linux/module.h> 223e086edfSolivier moysan #include <linux/of_irq.h> 233e086edfSolivier moysan #include <linux/of_platform.h> 243e086edfSolivier moysan #include <linux/regmap.h> 253e086edfSolivier moysan 266eb17d70SOlivier Moysan #include <sound/asoundef.h> 273e086edfSolivier moysan #include <sound/core.h> 283e086edfSolivier moysan #include <sound/dmaengine_pcm.h> 293e086edfSolivier moysan #include <sound/pcm_params.h> 303e086edfSolivier moysan 313e086edfSolivier moysan #include "stm32_sai.h" 323e086edfSolivier moysan 333e086edfSolivier moysan #define SAI_FREE_PROTOCOL 0x0 346eb17d70SOlivier Moysan #define SAI_SPDIF_PROTOCOL 0x1 353e086edfSolivier moysan 363e086edfSolivier moysan #define SAI_SLOT_SIZE_AUTO 0x0 373e086edfSolivier moysan #define SAI_SLOT_SIZE_16 0x1 383e086edfSolivier moysan #define SAI_SLOT_SIZE_32 0x2 393e086edfSolivier moysan 403e086edfSolivier moysan #define SAI_DATASIZE_8 0x2 413e086edfSolivier moysan #define SAI_DATASIZE_10 0x3 423e086edfSolivier moysan #define SAI_DATASIZE_16 0x4 433e086edfSolivier moysan #define SAI_DATASIZE_20 0x5 443e086edfSolivier moysan #define SAI_DATASIZE_24 0x6 453e086edfSolivier moysan #define SAI_DATASIZE_32 0x7 463e086edfSolivier moysan 473e086edfSolivier moysan #define STM_SAI_FIFO_SIZE 8 483e086edfSolivier moysan #define STM_SAI_DAI_NAME_SIZE 15 493e086edfSolivier moysan 503e086edfSolivier moysan #define STM_SAI_IS_PLAYBACK(ip) ((ip)->dir == SNDRV_PCM_STREAM_PLAYBACK) 513e086edfSolivier moysan #define STM_SAI_IS_CAPTURE(ip) ((ip)->dir == SNDRV_PCM_STREAM_CAPTURE) 523e086edfSolivier moysan 533e086edfSolivier moysan #define STM_SAI_A_ID 0x0 543e086edfSolivier moysan #define STM_SAI_B_ID 0x1 553e086edfSolivier moysan 5603e78a24Solivier moysan #define STM_SAI_IS_SUB_A(x) ((x)->id == STM_SAI_A_ID) 5703e78a24Solivier moysan #define STM_SAI_IS_SUB_B(x) ((x)->id == STM_SAI_B_ID) 583e086edfSolivier moysan #define STM_SAI_BLOCK_NAME(x) (((x)->id == STM_SAI_A_ID) ? "A" : "B") 593e086edfSolivier moysan 605914d285SOlivier Moysan #define SAI_SYNC_NONE 0x0 615914d285SOlivier Moysan #define SAI_SYNC_INTERNAL 0x1 625914d285SOlivier Moysan #define SAI_SYNC_EXTERNAL 0x2 635914d285SOlivier Moysan 646eb17d70SOlivier Moysan #define STM_SAI_PROTOCOL_IS_SPDIF(ip) ((ip)->spdif) 656eb17d70SOlivier Moysan #define STM_SAI_HAS_SPDIF(x) ((x)->pdata->conf->has_spdif) 665914d285SOlivier Moysan #define STM_SAI_HAS_EXT_SYNC(x) (!STM_SAI_IS_F4(sai->pdata)) 675914d285SOlivier Moysan 686eb17d70SOlivier Moysan #define SAI_IEC60958_BLOCK_FRAMES 192 696eb17d70SOlivier Moysan #define SAI_IEC60958_STATUS_BYTES 24 706eb17d70SOlivier Moysan 713e086edfSolivier moysan /** 723e086edfSolivier moysan * struct stm32_sai_sub_data - private data of SAI sub block (block A or B) 733e086edfSolivier moysan * @pdev: device data pointer 743e086edfSolivier moysan * @regmap: SAI register map pointer 7503e78a24Solivier moysan * @regmap_config: SAI sub block register map configuration pointer 763e086edfSolivier moysan * @dma_params: dma configuration data for rx or tx channel 773e086edfSolivier moysan * @cpu_dai_drv: DAI driver data pointer 783e086edfSolivier moysan * @cpu_dai: DAI runtime data pointer 793e086edfSolivier moysan * @substream: PCM substream data pointer 803e086edfSolivier moysan * @pdata: SAI block parent data pointer 815914d285SOlivier Moysan * @np_sync_provider: synchronization provider node 823e086edfSolivier moysan * @sai_ck: kernel clock feeding the SAI clock generator 833e086edfSolivier moysan * @phys_addr: SAI registers physical base address 843e086edfSolivier moysan * @mclk_rate: SAI block master clock frequency (Hz). set at init 853e086edfSolivier moysan * @id: SAI sub block id corresponding to sub-block A or B 863e086edfSolivier moysan * @dir: SAI block direction (playback or capture). set at init 873e086edfSolivier moysan * @master: SAI block mode flag. (true=master, false=slave) set at init 886eb17d70SOlivier Moysan * @spdif: SAI S/PDIF iec60958 mode flag. set at init 893e086edfSolivier moysan * @fmt: SAI block format. relevant only for custom protocols. set at init 903e086edfSolivier moysan * @sync: SAI block synchronization mode. (none, internal or external) 915914d285SOlivier Moysan * @synco: SAI block ext sync source (provider setting). (none, sub-block A/B) 925914d285SOlivier Moysan * @synci: SAI block ext sync source (client setting). (SAI sync provider index) 933e086edfSolivier moysan * @fs_length: frame synchronization length. depends on protocol settings 943e086edfSolivier moysan * @slots: rx or tx slot number 953e086edfSolivier moysan * @slot_width: rx or tx slot width in bits 963e086edfSolivier moysan * @slot_mask: rx or tx active slots mask. set at init or at runtime 973e086edfSolivier moysan * @data_size: PCM data width. corresponds to PCM substream width. 986eb17d70SOlivier Moysan * @spdif_frm_cnt: S/PDIF playback frame counter 996eb17d70SOlivier Moysan * @spdif_status_bits: S/PDIF status bits 1003e086edfSolivier moysan */ 1013e086edfSolivier moysan struct stm32_sai_sub_data { 1023e086edfSolivier moysan struct platform_device *pdev; 1033e086edfSolivier moysan struct regmap *regmap; 10403e78a24Solivier moysan const struct regmap_config *regmap_config; 1053e086edfSolivier moysan struct snd_dmaengine_dai_dma_data dma_params; 1063e086edfSolivier moysan struct snd_soc_dai_driver *cpu_dai_drv; 1073e086edfSolivier moysan struct snd_soc_dai *cpu_dai; 1083e086edfSolivier moysan struct snd_pcm_substream *substream; 1093e086edfSolivier moysan struct stm32_sai_data *pdata; 1105914d285SOlivier Moysan struct device_node *np_sync_provider; 1113e086edfSolivier moysan struct clk *sai_ck; 1123e086edfSolivier moysan dma_addr_t phys_addr; 1133e086edfSolivier moysan unsigned int mclk_rate; 1143e086edfSolivier moysan unsigned int id; 1153e086edfSolivier moysan int dir; 1163e086edfSolivier moysan bool master; 1176eb17d70SOlivier Moysan bool spdif; 1183e086edfSolivier moysan int fmt; 1193e086edfSolivier moysan int sync; 1205914d285SOlivier Moysan int synco; 1215914d285SOlivier Moysan int synci; 1223e086edfSolivier moysan int fs_length; 1233e086edfSolivier moysan int slots; 1243e086edfSolivier moysan int slot_width; 1253e086edfSolivier moysan int slot_mask; 1263e086edfSolivier moysan int data_size; 1276eb17d70SOlivier Moysan unsigned int spdif_frm_cnt; 1286eb17d70SOlivier Moysan unsigned char spdif_status_bits[SAI_IEC60958_STATUS_BYTES]; 1293e086edfSolivier moysan }; 1303e086edfSolivier moysan 1313e086edfSolivier moysan enum stm32_sai_fifo_th { 1323e086edfSolivier moysan STM_SAI_FIFO_TH_EMPTY, 1333e086edfSolivier moysan STM_SAI_FIFO_TH_QUARTER, 1343e086edfSolivier moysan STM_SAI_FIFO_TH_HALF, 1353e086edfSolivier moysan STM_SAI_FIFO_TH_3_QUARTER, 1363e086edfSolivier moysan STM_SAI_FIFO_TH_FULL, 1373e086edfSolivier moysan }; 1383e086edfSolivier moysan 1393e086edfSolivier moysan static bool stm32_sai_sub_readable_reg(struct device *dev, unsigned int reg) 1403e086edfSolivier moysan { 1413e086edfSolivier moysan switch (reg) { 1423e086edfSolivier moysan case STM_SAI_CR1_REGX: 1433e086edfSolivier moysan case STM_SAI_CR2_REGX: 1443e086edfSolivier moysan case STM_SAI_FRCR_REGX: 1453e086edfSolivier moysan case STM_SAI_SLOTR_REGX: 1463e086edfSolivier moysan case STM_SAI_IMR_REGX: 1473e086edfSolivier moysan case STM_SAI_SR_REGX: 1483e086edfSolivier moysan case STM_SAI_CLRFR_REGX: 1493e086edfSolivier moysan case STM_SAI_DR_REGX: 15003e78a24Solivier moysan case STM_SAI_PDMCR_REGX: 15103e78a24Solivier moysan case STM_SAI_PDMLY_REGX: 1523e086edfSolivier moysan return true; 1533e086edfSolivier moysan default: 1543e086edfSolivier moysan return false; 1553e086edfSolivier moysan } 1563e086edfSolivier moysan } 1573e086edfSolivier moysan 1583e086edfSolivier moysan static bool stm32_sai_sub_volatile_reg(struct device *dev, unsigned int reg) 1593e086edfSolivier moysan { 1603e086edfSolivier moysan switch (reg) { 1613e086edfSolivier moysan case STM_SAI_DR_REGX: 1623e086edfSolivier moysan return true; 1633e086edfSolivier moysan default: 1643e086edfSolivier moysan return false; 1653e086edfSolivier moysan } 1663e086edfSolivier moysan } 1673e086edfSolivier moysan 1683e086edfSolivier moysan static bool stm32_sai_sub_writeable_reg(struct device *dev, unsigned int reg) 1693e086edfSolivier moysan { 1703e086edfSolivier moysan switch (reg) { 1713e086edfSolivier moysan case STM_SAI_CR1_REGX: 1723e086edfSolivier moysan case STM_SAI_CR2_REGX: 1733e086edfSolivier moysan case STM_SAI_FRCR_REGX: 1743e086edfSolivier moysan case STM_SAI_SLOTR_REGX: 1753e086edfSolivier moysan case STM_SAI_IMR_REGX: 1763e086edfSolivier moysan case STM_SAI_SR_REGX: 1773e086edfSolivier moysan case STM_SAI_CLRFR_REGX: 1783e086edfSolivier moysan case STM_SAI_DR_REGX: 17903e78a24Solivier moysan case STM_SAI_PDMCR_REGX: 18003e78a24Solivier moysan case STM_SAI_PDMLY_REGX: 1813e086edfSolivier moysan return true; 1823e086edfSolivier moysan default: 1833e086edfSolivier moysan return false; 1843e086edfSolivier moysan } 1853e086edfSolivier moysan } 1863e086edfSolivier moysan 1876eb17d70SOlivier Moysan static const unsigned char default_status_bits[SAI_IEC60958_STATUS_BYTES] = { 1886eb17d70SOlivier Moysan 0, 0, 0, IEC958_AES3_CON_FS_48000, 1896eb17d70SOlivier Moysan }; 1906eb17d70SOlivier Moysan 19103e78a24Solivier moysan static const struct regmap_config stm32_sai_sub_regmap_config_f4 = { 1923e086edfSolivier moysan .reg_bits = 32, 1933e086edfSolivier moysan .reg_stride = 4, 1943e086edfSolivier moysan .val_bits = 32, 1953e086edfSolivier moysan .max_register = STM_SAI_DR_REGX, 1963e086edfSolivier moysan .readable_reg = stm32_sai_sub_readable_reg, 1973e086edfSolivier moysan .volatile_reg = stm32_sai_sub_volatile_reg, 1983e086edfSolivier moysan .writeable_reg = stm32_sai_sub_writeable_reg, 1993e086edfSolivier moysan .fast_io = true, 2003e086edfSolivier moysan }; 2013e086edfSolivier moysan 20203e78a24Solivier moysan static const struct regmap_config stm32_sai_sub_regmap_config_h7 = { 20303e78a24Solivier moysan .reg_bits = 32, 20403e78a24Solivier moysan .reg_stride = 4, 20503e78a24Solivier moysan .val_bits = 32, 20603e78a24Solivier moysan .max_register = STM_SAI_PDMLY_REGX, 20703e78a24Solivier moysan .readable_reg = stm32_sai_sub_readable_reg, 20803e78a24Solivier moysan .volatile_reg = stm32_sai_sub_volatile_reg, 20903e78a24Solivier moysan .writeable_reg = stm32_sai_sub_writeable_reg, 21003e78a24Solivier moysan .fast_io = true, 21103e78a24Solivier moysan }; 21203e78a24Solivier moysan 2133e086edfSolivier moysan static irqreturn_t stm32_sai_isr(int irq, void *devid) 2143e086edfSolivier moysan { 2153e086edfSolivier moysan struct stm32_sai_sub_data *sai = (struct stm32_sai_sub_data *)devid; 2163e086edfSolivier moysan struct platform_device *pdev = sai->pdev; 2173e086edfSolivier moysan unsigned int sr, imr, flags; 2183e086edfSolivier moysan snd_pcm_state_t status = SNDRV_PCM_STATE_RUNNING; 2193e086edfSolivier moysan 2203e086edfSolivier moysan regmap_read(sai->regmap, STM_SAI_IMR_REGX, &imr); 2213e086edfSolivier moysan regmap_read(sai->regmap, STM_SAI_SR_REGX, &sr); 2223e086edfSolivier moysan 2233e086edfSolivier moysan flags = sr & imr; 2243e086edfSolivier moysan if (!flags) 2253e086edfSolivier moysan return IRQ_NONE; 2263e086edfSolivier moysan 2273e086edfSolivier moysan regmap_update_bits(sai->regmap, STM_SAI_CLRFR_REGX, SAI_XCLRFR_MASK, 2283e086edfSolivier moysan SAI_XCLRFR_MASK); 2293e086edfSolivier moysan 230d807cdfbSOlivier Moysan if (!sai->substream) { 231d807cdfbSOlivier Moysan dev_err(&pdev->dev, "Device stopped. Spurious IRQ 0x%x\n", sr); 232d807cdfbSOlivier Moysan return IRQ_NONE; 233d807cdfbSOlivier Moysan } 234d807cdfbSOlivier Moysan 2353e086edfSolivier moysan if (flags & SAI_XIMR_OVRUDRIE) { 236602fdadcSolivier moysan dev_err(&pdev->dev, "IRQ %s\n", 2373e086edfSolivier moysan STM_SAI_IS_PLAYBACK(sai) ? "underrun" : "overrun"); 2383e086edfSolivier moysan status = SNDRV_PCM_STATE_XRUN; 2393e086edfSolivier moysan } 2403e086edfSolivier moysan 2413e086edfSolivier moysan if (flags & SAI_XIMR_MUTEDETIE) 242602fdadcSolivier moysan dev_dbg(&pdev->dev, "IRQ mute detected\n"); 2433e086edfSolivier moysan 2443e086edfSolivier moysan if (flags & SAI_XIMR_WCKCFGIE) { 245602fdadcSolivier moysan dev_err(&pdev->dev, "IRQ wrong clock configuration\n"); 2463e086edfSolivier moysan status = SNDRV_PCM_STATE_DISCONNECTED; 2473e086edfSolivier moysan } 2483e086edfSolivier moysan 2493e086edfSolivier moysan if (flags & SAI_XIMR_CNRDYIE) 250602fdadcSolivier moysan dev_err(&pdev->dev, "IRQ Codec not ready\n"); 2513e086edfSolivier moysan 2523e086edfSolivier moysan if (flags & SAI_XIMR_AFSDETIE) { 253602fdadcSolivier moysan dev_err(&pdev->dev, "IRQ Anticipated frame synchro\n"); 2543e086edfSolivier moysan status = SNDRV_PCM_STATE_XRUN; 2553e086edfSolivier moysan } 2563e086edfSolivier moysan 2573e086edfSolivier moysan if (flags & SAI_XIMR_LFSDETIE) { 258602fdadcSolivier moysan dev_err(&pdev->dev, "IRQ Late frame synchro\n"); 2593e086edfSolivier moysan status = SNDRV_PCM_STATE_XRUN; 2603e086edfSolivier moysan } 2613e086edfSolivier moysan 2623e086edfSolivier moysan if (status != SNDRV_PCM_STATE_RUNNING) { 263d807cdfbSOlivier Moysan snd_pcm_stream_lock(sai->substream); 264d807cdfbSOlivier Moysan snd_pcm_stop(sai->substream, SNDRV_PCM_STATE_XRUN); 265d807cdfbSOlivier Moysan snd_pcm_stream_unlock(sai->substream); 2663e086edfSolivier moysan } 2673e086edfSolivier moysan 2683e086edfSolivier moysan return IRQ_HANDLED; 2693e086edfSolivier moysan } 2703e086edfSolivier moysan 2713e086edfSolivier moysan static int stm32_sai_set_sysclk(struct snd_soc_dai *cpu_dai, 2723e086edfSolivier moysan int clk_id, unsigned int freq, int dir) 2733e086edfSolivier moysan { 2743e086edfSolivier moysan struct stm32_sai_sub_data *sai = snd_soc_dai_get_drvdata(cpu_dai); 275701a6ec3Solivier moysan int ret; 2763e086edfSolivier moysan 2773e086edfSolivier moysan if ((dir == SND_SOC_CLOCK_OUT) && sai->master) { 278701a6ec3Solivier moysan ret = regmap_update_bits(sai->regmap, STM_SAI_CR1_REGX, 279701a6ec3Solivier moysan SAI_XCR1_NODIV, 280701a6ec3Solivier moysan (unsigned int)~SAI_XCR1_NODIV); 281701a6ec3Solivier moysan if (ret < 0) 282701a6ec3Solivier moysan return ret; 283701a6ec3Solivier moysan 2843e086edfSolivier moysan sai->mclk_rate = freq; 2853e086edfSolivier moysan dev_dbg(cpu_dai->dev, "SAI MCLK frequency is %uHz\n", freq); 2863e086edfSolivier moysan } 2873e086edfSolivier moysan 2883e086edfSolivier moysan return 0; 2893e086edfSolivier moysan } 2903e086edfSolivier moysan 2913e086edfSolivier moysan static int stm32_sai_set_dai_tdm_slot(struct snd_soc_dai *cpu_dai, u32 tx_mask, 2923e086edfSolivier moysan u32 rx_mask, int slots, int slot_width) 2933e086edfSolivier moysan { 2943e086edfSolivier moysan struct stm32_sai_sub_data *sai = snd_soc_dai_get_drvdata(cpu_dai); 2953e086edfSolivier moysan int slotr, slotr_mask, slot_size; 2963e086edfSolivier moysan 2976eb17d70SOlivier Moysan if (STM_SAI_PROTOCOL_IS_SPDIF(sai)) { 2986eb17d70SOlivier Moysan dev_warn(cpu_dai->dev, "Slot setting relevant only for TDM\n"); 2996eb17d70SOlivier Moysan return 0; 3006eb17d70SOlivier Moysan } 3016eb17d70SOlivier Moysan 302602fdadcSolivier moysan dev_dbg(cpu_dai->dev, "Masks tx/rx:%#x/%#x, slots:%d, width:%d\n", 3033e086edfSolivier moysan tx_mask, rx_mask, slots, slot_width); 3043e086edfSolivier moysan 3053e086edfSolivier moysan switch (slot_width) { 3063e086edfSolivier moysan case 16: 3073e086edfSolivier moysan slot_size = SAI_SLOT_SIZE_16; 3083e086edfSolivier moysan break; 3093e086edfSolivier moysan case 32: 3103e086edfSolivier moysan slot_size = SAI_SLOT_SIZE_32; 3113e086edfSolivier moysan break; 3123e086edfSolivier moysan default: 3133e086edfSolivier moysan slot_size = SAI_SLOT_SIZE_AUTO; 3143e086edfSolivier moysan break; 3153e086edfSolivier moysan } 3163e086edfSolivier moysan 3173e086edfSolivier moysan slotr = SAI_XSLOTR_SLOTSZ_SET(slot_size) | 3183e086edfSolivier moysan SAI_XSLOTR_NBSLOT_SET(slots - 1); 3193e086edfSolivier moysan slotr_mask = SAI_XSLOTR_SLOTSZ_MASK | SAI_XSLOTR_NBSLOT_MASK; 3203e086edfSolivier moysan 3213e086edfSolivier moysan /* tx/rx mask set in machine init, if slot number defined in DT */ 3223e086edfSolivier moysan if (STM_SAI_IS_PLAYBACK(sai)) { 3233e086edfSolivier moysan sai->slot_mask = tx_mask; 3243e086edfSolivier moysan slotr |= SAI_XSLOTR_SLOTEN_SET(tx_mask); 3253e086edfSolivier moysan } 3263e086edfSolivier moysan 3273e086edfSolivier moysan if (STM_SAI_IS_CAPTURE(sai)) { 3283e086edfSolivier moysan sai->slot_mask = rx_mask; 3293e086edfSolivier moysan slotr |= SAI_XSLOTR_SLOTEN_SET(rx_mask); 3303e086edfSolivier moysan } 3313e086edfSolivier moysan 3323e086edfSolivier moysan slotr_mask |= SAI_XSLOTR_SLOTEN_MASK; 3333e086edfSolivier moysan 3343e086edfSolivier moysan regmap_update_bits(sai->regmap, STM_SAI_SLOTR_REGX, slotr_mask, slotr); 3353e086edfSolivier moysan 3363e086edfSolivier moysan sai->slot_width = slot_width; 3373e086edfSolivier moysan sai->slots = slots; 3383e086edfSolivier moysan 3393e086edfSolivier moysan return 0; 3403e086edfSolivier moysan } 3413e086edfSolivier moysan 3423e086edfSolivier moysan static int stm32_sai_set_dai_fmt(struct snd_soc_dai *cpu_dai, unsigned int fmt) 3433e086edfSolivier moysan { 3443e086edfSolivier moysan struct stm32_sai_sub_data *sai = snd_soc_dai_get_drvdata(cpu_dai); 34561fb4ff7SOlivier Moysan int cr1, frcr = 0; 34661fb4ff7SOlivier Moysan int cr1_mask, frcr_mask = 0; 3473e086edfSolivier moysan int ret; 3483e086edfSolivier moysan 3493e086edfSolivier moysan dev_dbg(cpu_dai->dev, "fmt %x\n", fmt); 3503e086edfSolivier moysan 3516eb17d70SOlivier Moysan /* Do not generate master by default */ 3526eb17d70SOlivier Moysan cr1 = SAI_XCR1_NODIV; 3536eb17d70SOlivier Moysan cr1_mask = SAI_XCR1_NODIV; 3546eb17d70SOlivier Moysan 3556eb17d70SOlivier Moysan cr1_mask |= SAI_XCR1_PRTCFG_MASK; 3566eb17d70SOlivier Moysan if (STM_SAI_PROTOCOL_IS_SPDIF(sai)) { 3576eb17d70SOlivier Moysan cr1 |= SAI_XCR1_PRTCFG_SET(SAI_SPDIF_PROTOCOL); 3586eb17d70SOlivier Moysan goto conf_update; 3596eb17d70SOlivier Moysan } 3606eb17d70SOlivier Moysan 3616eb17d70SOlivier Moysan cr1 |= SAI_XCR1_PRTCFG_SET(SAI_FREE_PROTOCOL); 36261fb4ff7SOlivier Moysan 3633e086edfSolivier moysan switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 3643e086edfSolivier moysan /* SCK active high for all protocols */ 3653e086edfSolivier moysan case SND_SOC_DAIFMT_I2S: 3663e086edfSolivier moysan cr1 |= SAI_XCR1_CKSTR; 3673e086edfSolivier moysan frcr |= SAI_XFRCR_FSOFF | SAI_XFRCR_FSDEF; 3683e086edfSolivier moysan break; 3693e086edfSolivier moysan /* Left justified */ 3703e086edfSolivier moysan case SND_SOC_DAIFMT_MSB: 3713e086edfSolivier moysan frcr |= SAI_XFRCR_FSPOL | SAI_XFRCR_FSDEF; 3723e086edfSolivier moysan break; 3733e086edfSolivier moysan /* Right justified */ 3743e086edfSolivier moysan case SND_SOC_DAIFMT_LSB: 3753e086edfSolivier moysan frcr |= SAI_XFRCR_FSPOL | SAI_XFRCR_FSDEF; 3763e086edfSolivier moysan break; 3773e086edfSolivier moysan case SND_SOC_DAIFMT_DSP_A: 3783e086edfSolivier moysan frcr |= SAI_XFRCR_FSPOL | SAI_XFRCR_FSOFF; 3793e086edfSolivier moysan break; 3803e086edfSolivier moysan case SND_SOC_DAIFMT_DSP_B: 3813e086edfSolivier moysan frcr |= SAI_XFRCR_FSPOL; 3823e086edfSolivier moysan break; 3833e086edfSolivier moysan default: 3843e086edfSolivier moysan dev_err(cpu_dai->dev, "Unsupported protocol %#x\n", 3853e086edfSolivier moysan fmt & SND_SOC_DAIFMT_FORMAT_MASK); 3863e086edfSolivier moysan return -EINVAL; 3873e086edfSolivier moysan } 3883e086edfSolivier moysan 38961fb4ff7SOlivier Moysan cr1_mask |= SAI_XCR1_CKSTR; 3903e086edfSolivier moysan frcr_mask |= SAI_XFRCR_FSPOL | SAI_XFRCR_FSOFF | 3913e086edfSolivier moysan SAI_XFRCR_FSDEF; 3923e086edfSolivier moysan 3933e086edfSolivier moysan /* DAI clock strobing. Invert setting previously set */ 3943e086edfSolivier moysan switch (fmt & SND_SOC_DAIFMT_INV_MASK) { 3953e086edfSolivier moysan case SND_SOC_DAIFMT_NB_NF: 3963e086edfSolivier moysan break; 3973e086edfSolivier moysan case SND_SOC_DAIFMT_IB_NF: 3983e086edfSolivier moysan cr1 ^= SAI_XCR1_CKSTR; 3993e086edfSolivier moysan break; 4003e086edfSolivier moysan case SND_SOC_DAIFMT_NB_IF: 4013e086edfSolivier moysan frcr ^= SAI_XFRCR_FSPOL; 4023e086edfSolivier moysan break; 4033e086edfSolivier moysan case SND_SOC_DAIFMT_IB_IF: 4043e086edfSolivier moysan /* Invert fs & sck */ 4053e086edfSolivier moysan cr1 ^= SAI_XCR1_CKSTR; 4063e086edfSolivier moysan frcr ^= SAI_XFRCR_FSPOL; 4073e086edfSolivier moysan break; 4083e086edfSolivier moysan default: 4093e086edfSolivier moysan dev_err(cpu_dai->dev, "Unsupported strobing %#x\n", 4103e086edfSolivier moysan fmt & SND_SOC_DAIFMT_INV_MASK); 4113e086edfSolivier moysan return -EINVAL; 4123e086edfSolivier moysan } 4133e086edfSolivier moysan cr1_mask |= SAI_XCR1_CKSTR; 4143e086edfSolivier moysan frcr_mask |= SAI_XFRCR_FSPOL; 4153e086edfSolivier moysan 4163e086edfSolivier moysan regmap_update_bits(sai->regmap, STM_SAI_FRCR_REGX, frcr_mask, frcr); 4173e086edfSolivier moysan 4183e086edfSolivier moysan /* DAI clock master masks */ 4193e086edfSolivier moysan switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 4203e086edfSolivier moysan case SND_SOC_DAIFMT_CBM_CFM: 4213e086edfSolivier moysan /* codec is master */ 4223e086edfSolivier moysan cr1 |= SAI_XCR1_SLAVE; 4233e086edfSolivier moysan sai->master = false; 4243e086edfSolivier moysan break; 4253e086edfSolivier moysan case SND_SOC_DAIFMT_CBS_CFS: 4263e086edfSolivier moysan sai->master = true; 4273e086edfSolivier moysan break; 4283e086edfSolivier moysan default: 4293e086edfSolivier moysan dev_err(cpu_dai->dev, "Unsupported mode %#x\n", 4303e086edfSolivier moysan fmt & SND_SOC_DAIFMT_MASTER_MASK); 4313e086edfSolivier moysan return -EINVAL; 4323e086edfSolivier moysan } 4335914d285SOlivier Moysan 4345914d285SOlivier Moysan /* Set slave mode if sub-block is synchronized with another SAI */ 4355914d285SOlivier Moysan if (sai->sync) { 4365914d285SOlivier Moysan dev_dbg(cpu_dai->dev, "Synchronized SAI configured as slave\n"); 4375914d285SOlivier Moysan cr1 |= SAI_XCR1_SLAVE; 4385914d285SOlivier Moysan sai->master = false; 4395914d285SOlivier Moysan } 4405914d285SOlivier Moysan 4413e086edfSolivier moysan cr1_mask |= SAI_XCR1_SLAVE; 4423e086edfSolivier moysan 4436eb17d70SOlivier Moysan conf_update: 4443e086edfSolivier moysan ret = regmap_update_bits(sai->regmap, STM_SAI_CR1_REGX, cr1_mask, cr1); 4453e086edfSolivier moysan if (ret < 0) { 4463e086edfSolivier moysan dev_err(cpu_dai->dev, "Failed to update CR1 register\n"); 4473e086edfSolivier moysan return ret; 4483e086edfSolivier moysan } 4493e086edfSolivier moysan 4503e086edfSolivier moysan sai->fmt = fmt; 4513e086edfSolivier moysan 4523e086edfSolivier moysan return 0; 4533e086edfSolivier moysan } 4543e086edfSolivier moysan 4553e086edfSolivier moysan static int stm32_sai_startup(struct snd_pcm_substream *substream, 4563e086edfSolivier moysan struct snd_soc_dai *cpu_dai) 4573e086edfSolivier moysan { 4583e086edfSolivier moysan struct stm32_sai_sub_data *sai = snd_soc_dai_get_drvdata(cpu_dai); 4593e086edfSolivier moysan int imr, cr2, ret; 4603e086edfSolivier moysan 4613e086edfSolivier moysan sai->substream = substream; 4623e086edfSolivier moysan 4633e086edfSolivier moysan ret = clk_prepare_enable(sai->sai_ck); 4643e086edfSolivier moysan if (ret < 0) { 465602fdadcSolivier moysan dev_err(cpu_dai->dev, "Failed to enable clock: %d\n", ret); 4663e086edfSolivier moysan return ret; 4673e086edfSolivier moysan } 4683e086edfSolivier moysan 4693e086edfSolivier moysan /* Enable ITs */ 4703e086edfSolivier moysan 4713e086edfSolivier moysan regmap_update_bits(sai->regmap, STM_SAI_CLRFR_REGX, 4723e086edfSolivier moysan SAI_XCLRFR_MASK, SAI_XCLRFR_MASK); 4733e086edfSolivier moysan 4743e086edfSolivier moysan imr = SAI_XIMR_OVRUDRIE; 4753e086edfSolivier moysan if (STM_SAI_IS_CAPTURE(sai)) { 4763e086edfSolivier moysan regmap_read(sai->regmap, STM_SAI_CR2_REGX, &cr2); 4773e086edfSolivier moysan if (cr2 & SAI_XCR2_MUTECNT_MASK) 4783e086edfSolivier moysan imr |= SAI_XIMR_MUTEDETIE; 4793e086edfSolivier moysan } 4803e086edfSolivier moysan 4813e086edfSolivier moysan if (sai->master) 4823e086edfSolivier moysan imr |= SAI_XIMR_WCKCFGIE; 4833e086edfSolivier moysan else 4843e086edfSolivier moysan imr |= SAI_XIMR_AFSDETIE | SAI_XIMR_LFSDETIE; 4853e086edfSolivier moysan 4863e086edfSolivier moysan regmap_update_bits(sai->regmap, STM_SAI_IMR_REGX, 4873e086edfSolivier moysan SAI_XIMR_MASK, imr); 4883e086edfSolivier moysan 4893e086edfSolivier moysan return 0; 4903e086edfSolivier moysan } 4913e086edfSolivier moysan 4923e086edfSolivier moysan static int stm32_sai_set_config(struct snd_soc_dai *cpu_dai, 4933e086edfSolivier moysan struct snd_pcm_substream *substream, 4943e086edfSolivier moysan struct snd_pcm_hw_params *params) 4953e086edfSolivier moysan { 4963e086edfSolivier moysan struct stm32_sai_sub_data *sai = snd_soc_dai_get_drvdata(cpu_dai); 4973e086edfSolivier moysan int cr1, cr1_mask, ret; 4983e086edfSolivier moysan 499a4529d2bSOlivier Moysan /* 500a4529d2bSOlivier Moysan * DMA bursts increment is set to 4 words. 501a4529d2bSOlivier Moysan * SAI fifo threshold is set to half fifo, to keep enough space 502a4529d2bSOlivier Moysan * for DMA incoming bursts. 503a4529d2bSOlivier Moysan */ 5043e086edfSolivier moysan regmap_update_bits(sai->regmap, STM_SAI_CR2_REGX, 5053e086edfSolivier moysan SAI_XCR2_FFLUSH | SAI_XCR2_FTH_MASK, 506a4529d2bSOlivier Moysan SAI_XCR2_FFLUSH | 507a4529d2bSOlivier Moysan SAI_XCR2_FTH_SET(STM_SAI_FIFO_TH_HALF)); 5083e086edfSolivier moysan 5096eb17d70SOlivier Moysan /* DS bits in CR1 not set for SPDIF (size forced to 24 bits).*/ 5106eb17d70SOlivier Moysan if (STM_SAI_PROTOCOL_IS_SPDIF(sai)) { 5116eb17d70SOlivier Moysan sai->spdif_frm_cnt = 0; 5126eb17d70SOlivier Moysan return 0; 5136eb17d70SOlivier Moysan } 5146eb17d70SOlivier Moysan 5153e086edfSolivier moysan /* Mode, data format and channel config */ 51661fb4ff7SOlivier Moysan cr1_mask = SAI_XCR1_DS_MASK; 5173e086edfSolivier moysan switch (params_format(params)) { 5183e086edfSolivier moysan case SNDRV_PCM_FORMAT_S8: 5197e751e37Solivier moysan cr1 = SAI_XCR1_DS_SET(SAI_DATASIZE_8); 5203e086edfSolivier moysan break; 5213e086edfSolivier moysan case SNDRV_PCM_FORMAT_S16_LE: 5227e751e37Solivier moysan cr1 = SAI_XCR1_DS_SET(SAI_DATASIZE_16); 5233e086edfSolivier moysan break; 5243e086edfSolivier moysan case SNDRV_PCM_FORMAT_S32_LE: 5257e751e37Solivier moysan cr1 = SAI_XCR1_DS_SET(SAI_DATASIZE_32); 5263e086edfSolivier moysan break; 5273e086edfSolivier moysan default: 5283e086edfSolivier moysan dev_err(cpu_dai->dev, "Data format not supported"); 5293e086edfSolivier moysan return -EINVAL; 5303e086edfSolivier moysan } 5313e086edfSolivier moysan 5323e086edfSolivier moysan cr1_mask |= SAI_XCR1_MONO; 5333e086edfSolivier moysan if ((sai->slots == 2) && (params_channels(params) == 1)) 5343e086edfSolivier moysan cr1 |= SAI_XCR1_MONO; 5353e086edfSolivier moysan 5363e086edfSolivier moysan ret = regmap_update_bits(sai->regmap, STM_SAI_CR1_REGX, cr1_mask, cr1); 5373e086edfSolivier moysan if (ret < 0) { 5383e086edfSolivier moysan dev_err(cpu_dai->dev, "Failed to update CR1 register\n"); 5393e086edfSolivier moysan return ret; 5403e086edfSolivier moysan } 5413e086edfSolivier moysan 5423e086edfSolivier moysan return 0; 5433e086edfSolivier moysan } 5443e086edfSolivier moysan 5453e086edfSolivier moysan static int stm32_sai_set_slots(struct snd_soc_dai *cpu_dai) 5463e086edfSolivier moysan { 5473e086edfSolivier moysan struct stm32_sai_sub_data *sai = snd_soc_dai_get_drvdata(cpu_dai); 5483e086edfSolivier moysan int slotr, slot_sz; 5493e086edfSolivier moysan 5503e086edfSolivier moysan regmap_read(sai->regmap, STM_SAI_SLOTR_REGX, &slotr); 5513e086edfSolivier moysan 5523e086edfSolivier moysan /* 5533e086edfSolivier moysan * If SLOTSZ is set to auto in SLOTR, align slot width on data size 5543e086edfSolivier moysan * By default slot width = data size, if not forced from DT 5553e086edfSolivier moysan */ 5563e086edfSolivier moysan slot_sz = slotr & SAI_XSLOTR_SLOTSZ_MASK; 5573e086edfSolivier moysan if (slot_sz == SAI_XSLOTR_SLOTSZ_SET(SAI_SLOT_SIZE_AUTO)) 5583e086edfSolivier moysan sai->slot_width = sai->data_size; 5593e086edfSolivier moysan 5603e086edfSolivier moysan if (sai->slot_width < sai->data_size) { 5613e086edfSolivier moysan dev_err(cpu_dai->dev, 5623e086edfSolivier moysan "Data size %d larger than slot width\n", 5633e086edfSolivier moysan sai->data_size); 5643e086edfSolivier moysan return -EINVAL; 5653e086edfSolivier moysan } 5663e086edfSolivier moysan 5673e086edfSolivier moysan /* Slot number is set to 2, if not specified in DT */ 5683e086edfSolivier moysan if (!sai->slots) 5693e086edfSolivier moysan sai->slots = 2; 5703e086edfSolivier moysan 5713e086edfSolivier moysan /* The number of slots in the audio frame is equal to NBSLOT[3:0] + 1*/ 5723e086edfSolivier moysan regmap_update_bits(sai->regmap, STM_SAI_SLOTR_REGX, 5733e086edfSolivier moysan SAI_XSLOTR_NBSLOT_MASK, 5743e086edfSolivier moysan SAI_XSLOTR_NBSLOT_SET((sai->slots - 1))); 5753e086edfSolivier moysan 5763e086edfSolivier moysan /* Set default slots mask if not already set from DT */ 5773e086edfSolivier moysan if (!(slotr & SAI_XSLOTR_SLOTEN_MASK)) { 5783e086edfSolivier moysan sai->slot_mask = (1 << sai->slots) - 1; 5793e086edfSolivier moysan regmap_update_bits(sai->regmap, 5803e086edfSolivier moysan STM_SAI_SLOTR_REGX, SAI_XSLOTR_SLOTEN_MASK, 5813e086edfSolivier moysan SAI_XSLOTR_SLOTEN_SET(sai->slot_mask)); 5823e086edfSolivier moysan } 5833e086edfSolivier moysan 584602fdadcSolivier moysan dev_dbg(cpu_dai->dev, "Slots %d, slot width %d\n", 5853e086edfSolivier moysan sai->slots, sai->slot_width); 5863e086edfSolivier moysan 5873e086edfSolivier moysan return 0; 5883e086edfSolivier moysan } 5893e086edfSolivier moysan 5903e086edfSolivier moysan static void stm32_sai_set_frame(struct snd_soc_dai *cpu_dai) 5913e086edfSolivier moysan { 5923e086edfSolivier moysan struct stm32_sai_sub_data *sai = snd_soc_dai_get_drvdata(cpu_dai); 5933e086edfSolivier moysan int fs_active, offset, format; 5943e086edfSolivier moysan int frcr, frcr_mask; 5953e086edfSolivier moysan 5963e086edfSolivier moysan format = sai->fmt & SND_SOC_DAIFMT_FORMAT_MASK; 5973e086edfSolivier moysan sai->fs_length = sai->slot_width * sai->slots; 5983e086edfSolivier moysan 5993e086edfSolivier moysan fs_active = sai->fs_length / 2; 6003e086edfSolivier moysan if ((format == SND_SOC_DAIFMT_DSP_A) || 6013e086edfSolivier moysan (format == SND_SOC_DAIFMT_DSP_B)) 6023e086edfSolivier moysan fs_active = 1; 6033e086edfSolivier moysan 6043e086edfSolivier moysan frcr = SAI_XFRCR_FRL_SET((sai->fs_length - 1)); 6053e086edfSolivier moysan frcr |= SAI_XFRCR_FSALL_SET((fs_active - 1)); 6063e086edfSolivier moysan frcr_mask = SAI_XFRCR_FRL_MASK | SAI_XFRCR_FSALL_MASK; 6073e086edfSolivier moysan 608602fdadcSolivier moysan dev_dbg(cpu_dai->dev, "Frame length %d, frame active %d\n", 6093e086edfSolivier moysan sai->fs_length, fs_active); 6103e086edfSolivier moysan 6113e086edfSolivier moysan regmap_update_bits(sai->regmap, STM_SAI_FRCR_REGX, frcr_mask, frcr); 6123e086edfSolivier moysan 6133e086edfSolivier moysan if ((sai->fmt & SND_SOC_DAIFMT_FORMAT_MASK) == SND_SOC_DAIFMT_LSB) { 6143e086edfSolivier moysan offset = sai->slot_width - sai->data_size; 6153e086edfSolivier moysan 6163e086edfSolivier moysan regmap_update_bits(sai->regmap, STM_SAI_SLOTR_REGX, 6173e086edfSolivier moysan SAI_XSLOTR_FBOFF_MASK, 6183e086edfSolivier moysan SAI_XSLOTR_FBOFF_SET(offset)); 6193e086edfSolivier moysan } 6203e086edfSolivier moysan } 6213e086edfSolivier moysan 6223e086edfSolivier moysan static int stm32_sai_configure_clock(struct snd_soc_dai *cpu_dai, 6233e086edfSolivier moysan struct snd_pcm_hw_params *params) 6243e086edfSolivier moysan { 6253e086edfSolivier moysan struct stm32_sai_sub_data *sai = snd_soc_dai_get_drvdata(cpu_dai); 6263e086edfSolivier moysan int cr1, mask, div = 0; 62703e78a24Solivier moysan int sai_clk_rate, mclk_ratio, den, ret; 62803e78a24Solivier moysan int version = sai->pdata->conf->version; 6296eb17d70SOlivier Moysan unsigned int rate = params_rate(params); 6303e086edfSolivier moysan 6313e086edfSolivier moysan if (!sai->mclk_rate) { 6323e086edfSolivier moysan dev_err(cpu_dai->dev, "Mclk rate is null\n"); 6333e086edfSolivier moysan return -EINVAL; 6343e086edfSolivier moysan } 6353e086edfSolivier moysan 6366eb17d70SOlivier Moysan if (!(rate % 11025)) 6373e086edfSolivier moysan clk_set_parent(sai->sai_ck, sai->pdata->clk_x11k); 6383e086edfSolivier moysan else 6393e086edfSolivier moysan clk_set_parent(sai->sai_ck, sai->pdata->clk_x8k); 6403e086edfSolivier moysan sai_clk_rate = clk_get_rate(sai->sai_ck); 6413e086edfSolivier moysan 64203e78a24Solivier moysan if (STM_SAI_IS_F4(sai->pdata)) { 6433e086edfSolivier moysan /* 6443e086edfSolivier moysan * mclk_rate = 256 * fs 6453e086edfSolivier moysan * MCKDIV = 0 if sai_ck < 3/2 * mclk_rate 6463e086edfSolivier moysan * MCKDIV = sai_ck / (2 * mclk_rate) otherwise 6473e086edfSolivier moysan */ 6483e086edfSolivier moysan if (2 * sai_clk_rate >= 3 * sai->mclk_rate) 64903e78a24Solivier moysan div = DIV_ROUND_CLOSEST(sai_clk_rate, 65003e78a24Solivier moysan 2 * sai->mclk_rate); 65103e78a24Solivier moysan } else { 65203e78a24Solivier moysan /* 65303e78a24Solivier moysan * TDM mode : 65403e78a24Solivier moysan * mclk on 65503e78a24Solivier moysan * MCKDIV = sai_ck / (ws x 256) (NOMCK=0. OSR=0) 65603e78a24Solivier moysan * MCKDIV = sai_ck / (ws x 512) (NOMCK=0. OSR=1) 65703e78a24Solivier moysan * mclk off 65803e78a24Solivier moysan * MCKDIV = sai_ck / (frl x ws) (NOMCK=1) 65903e78a24Solivier moysan * Note: NOMCK/NODIV correspond to same bit. 66003e78a24Solivier moysan */ 6616eb17d70SOlivier Moysan if (STM_SAI_PROTOCOL_IS_SPDIF(sai)) { 6626eb17d70SOlivier Moysan div = DIV_ROUND_CLOSEST(sai_clk_rate, 6636eb17d70SOlivier Moysan (params_rate(params) * 128)); 6646eb17d70SOlivier Moysan } else { 66503e78a24Solivier moysan if (sai->mclk_rate) { 6666eb17d70SOlivier Moysan mclk_ratio = sai->mclk_rate / rate; 66703e78a24Solivier moysan if (mclk_ratio == 512) { 66803e78a24Solivier moysan mask = SAI_XCR1_OSR; 66903e78a24Solivier moysan cr1 = SAI_XCR1_OSR; 6706eb17d70SOlivier Moysan } else if (mclk_ratio != 256) { 67103e78a24Solivier moysan dev_err(cpu_dai->dev, 67203e78a24Solivier moysan "Wrong mclk ratio %d\n", 67303e78a24Solivier moysan mclk_ratio); 67403e78a24Solivier moysan return -EINVAL; 67503e78a24Solivier moysan } 6766eb17d70SOlivier Moysan div = DIV_ROUND_CLOSEST(sai_clk_rate, 6776eb17d70SOlivier Moysan sai->mclk_rate); 67803e78a24Solivier moysan } else { 6796eb17d70SOlivier Moysan /* mclk-fs not set, master clock not active */ 68003e78a24Solivier moysan den = sai->fs_length * params_rate(params); 68103e78a24Solivier moysan div = DIV_ROUND_CLOSEST(sai_clk_rate, den); 68203e78a24Solivier moysan } 68303e78a24Solivier moysan } 6846eb17d70SOlivier Moysan } 6853e086edfSolivier moysan 68603e78a24Solivier moysan if (div > SAI_XCR1_MCKDIV_MAX(version)) { 6873e086edfSolivier moysan dev_err(cpu_dai->dev, "Divider %d out of range\n", div); 6883e086edfSolivier moysan return -EINVAL; 6893e086edfSolivier moysan } 6903e086edfSolivier moysan dev_dbg(cpu_dai->dev, "SAI clock %d, divider %d\n", sai_clk_rate, div); 6913e086edfSolivier moysan 69203e78a24Solivier moysan mask = SAI_XCR1_MCKDIV_MASK(SAI_XCR1_MCKDIV_WIDTH(version)); 6933e086edfSolivier moysan cr1 = SAI_XCR1_MCKDIV_SET(div); 6943e086edfSolivier moysan ret = regmap_update_bits(sai->regmap, STM_SAI_CR1_REGX, mask, cr1); 6953e086edfSolivier moysan if (ret < 0) { 6963e086edfSolivier moysan dev_err(cpu_dai->dev, "Failed to update CR1 register\n"); 6973e086edfSolivier moysan return ret; 6983e086edfSolivier moysan } 6993e086edfSolivier moysan 7003e086edfSolivier moysan return 0; 7013e086edfSolivier moysan } 7023e086edfSolivier moysan 7033e086edfSolivier moysan static int stm32_sai_hw_params(struct snd_pcm_substream *substream, 7043e086edfSolivier moysan struct snd_pcm_hw_params *params, 7053e086edfSolivier moysan struct snd_soc_dai *cpu_dai) 7063e086edfSolivier moysan { 7073e086edfSolivier moysan struct stm32_sai_sub_data *sai = snd_soc_dai_get_drvdata(cpu_dai); 7083e086edfSolivier moysan int ret; 7093e086edfSolivier moysan 7103e086edfSolivier moysan sai->data_size = params_width(params); 7113e086edfSolivier moysan 7126eb17d70SOlivier Moysan if (!STM_SAI_PROTOCOL_IS_SPDIF(sai)) { 7133e086edfSolivier moysan ret = stm32_sai_set_slots(cpu_dai); 7143e086edfSolivier moysan if (ret < 0) 7153e086edfSolivier moysan return ret; 7163e086edfSolivier moysan stm32_sai_set_frame(cpu_dai); 7176eb17d70SOlivier Moysan } 7183e086edfSolivier moysan 7193e086edfSolivier moysan ret = stm32_sai_set_config(cpu_dai, substream, params); 7203e086edfSolivier moysan if (ret) 7213e086edfSolivier moysan return ret; 7223e086edfSolivier moysan 7233e086edfSolivier moysan if (sai->master) 7243e086edfSolivier moysan ret = stm32_sai_configure_clock(cpu_dai, params); 7253e086edfSolivier moysan 7263e086edfSolivier moysan return ret; 7273e086edfSolivier moysan } 7283e086edfSolivier moysan 7293e086edfSolivier moysan static int stm32_sai_trigger(struct snd_pcm_substream *substream, int cmd, 7303e086edfSolivier moysan struct snd_soc_dai *cpu_dai) 7313e086edfSolivier moysan { 7323e086edfSolivier moysan struct stm32_sai_sub_data *sai = snd_soc_dai_get_drvdata(cpu_dai); 7333e086edfSolivier moysan int ret; 7343e086edfSolivier moysan 7353e086edfSolivier moysan switch (cmd) { 7363e086edfSolivier moysan case SNDRV_PCM_TRIGGER_START: 7373e086edfSolivier moysan case SNDRV_PCM_TRIGGER_RESUME: 7383e086edfSolivier moysan case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 7393e086edfSolivier moysan dev_dbg(cpu_dai->dev, "Enable DMA and SAI\n"); 7403e086edfSolivier moysan 7413e086edfSolivier moysan regmap_update_bits(sai->regmap, STM_SAI_CR1_REGX, 7423e086edfSolivier moysan SAI_XCR1_DMAEN, SAI_XCR1_DMAEN); 7433e086edfSolivier moysan 7443e086edfSolivier moysan /* Enable SAI */ 7453e086edfSolivier moysan ret = regmap_update_bits(sai->regmap, STM_SAI_CR1_REGX, 7463e086edfSolivier moysan SAI_XCR1_SAIEN, SAI_XCR1_SAIEN); 7473e086edfSolivier moysan if (ret < 0) 7483e086edfSolivier moysan dev_err(cpu_dai->dev, "Failed to update CR1 register\n"); 7493e086edfSolivier moysan break; 7503e086edfSolivier moysan case SNDRV_PCM_TRIGGER_SUSPEND: 7513e086edfSolivier moysan case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 7523e086edfSolivier moysan case SNDRV_PCM_TRIGGER_STOP: 7533e086edfSolivier moysan dev_dbg(cpu_dai->dev, "Disable DMA and SAI\n"); 7543e086edfSolivier moysan 75547a8907dSOlivier Moysan regmap_update_bits(sai->regmap, STM_SAI_IMR_REGX, 75647a8907dSOlivier Moysan SAI_XIMR_MASK, 0); 75747a8907dSOlivier Moysan 7583e086edfSolivier moysan regmap_update_bits(sai->regmap, STM_SAI_CR1_REGX, 7593e086edfSolivier moysan SAI_XCR1_SAIEN, 7603e086edfSolivier moysan (unsigned int)~SAI_XCR1_SAIEN); 7614fa17938Solivier moysan 7624fa17938Solivier moysan ret = regmap_update_bits(sai->regmap, STM_SAI_CR1_REGX, 7634fa17938Solivier moysan SAI_XCR1_DMAEN, 7644fa17938Solivier moysan (unsigned int)~SAI_XCR1_DMAEN); 7653e086edfSolivier moysan if (ret < 0) 7663e086edfSolivier moysan dev_err(cpu_dai->dev, "Failed to update CR1 register\n"); 7676eb17d70SOlivier Moysan 7686eb17d70SOlivier Moysan if (STM_SAI_PROTOCOL_IS_SPDIF(sai)) 7696eb17d70SOlivier Moysan sai->spdif_frm_cnt = 0; 7703e086edfSolivier moysan break; 7713e086edfSolivier moysan default: 7723e086edfSolivier moysan return -EINVAL; 7733e086edfSolivier moysan } 7743e086edfSolivier moysan 7753e086edfSolivier moysan return ret; 7763e086edfSolivier moysan } 7773e086edfSolivier moysan 7783e086edfSolivier moysan static void stm32_sai_shutdown(struct snd_pcm_substream *substream, 7793e086edfSolivier moysan struct snd_soc_dai *cpu_dai) 7803e086edfSolivier moysan { 7813e086edfSolivier moysan struct stm32_sai_sub_data *sai = snd_soc_dai_get_drvdata(cpu_dai); 7823e086edfSolivier moysan 7833e086edfSolivier moysan regmap_update_bits(sai->regmap, STM_SAI_IMR_REGX, SAI_XIMR_MASK, 0); 7843e086edfSolivier moysan 785701a6ec3Solivier moysan regmap_update_bits(sai->regmap, STM_SAI_CR1_REGX, SAI_XCR1_NODIV, 786701a6ec3Solivier moysan SAI_XCR1_NODIV); 787701a6ec3Solivier moysan 7883e086edfSolivier moysan clk_disable_unprepare(sai->sai_ck); 7893e086edfSolivier moysan sai->substream = NULL; 7903e086edfSolivier moysan } 7913e086edfSolivier moysan 7923e086edfSolivier moysan static int stm32_sai_dai_probe(struct snd_soc_dai *cpu_dai) 7933e086edfSolivier moysan { 7943e086edfSolivier moysan struct stm32_sai_sub_data *sai = dev_get_drvdata(cpu_dai->dev); 79561fb4ff7SOlivier Moysan int cr1 = 0, cr1_mask; 7963e086edfSolivier moysan 7973e086edfSolivier moysan sai->dma_params.addr = (dma_addr_t)(sai->phys_addr + STM_SAI_DR_REGX); 798a4529d2bSOlivier Moysan /* 799a4529d2bSOlivier Moysan * DMA supports 4, 8 or 16 burst sizes. Burst size 4 is the best choice, 800a4529d2bSOlivier Moysan * as it allows bytes, half-word and words transfers. (See DMA fifos 801a4529d2bSOlivier Moysan * constraints). 802a4529d2bSOlivier Moysan */ 803a4529d2bSOlivier Moysan sai->dma_params.maxburst = 4; 8043e086edfSolivier moysan /* Buswidth will be set by framework at runtime */ 8053e086edfSolivier moysan sai->dma_params.addr_width = DMA_SLAVE_BUSWIDTH_UNDEFINED; 8063e086edfSolivier moysan 8073e086edfSolivier moysan if (STM_SAI_IS_PLAYBACK(sai)) 8083e086edfSolivier moysan snd_soc_dai_init_dma_data(cpu_dai, &sai->dma_params, NULL); 8093e086edfSolivier moysan else 8103e086edfSolivier moysan snd_soc_dai_init_dma_data(cpu_dai, NULL, &sai->dma_params); 8113e086edfSolivier moysan 81261fb4ff7SOlivier Moysan cr1_mask = SAI_XCR1_RX_TX; 81361fb4ff7SOlivier Moysan if (STM_SAI_IS_CAPTURE(sai)) 81461fb4ff7SOlivier Moysan cr1 |= SAI_XCR1_RX_TX; 81561fb4ff7SOlivier Moysan 8165914d285SOlivier Moysan /* Configure synchronization */ 8175914d285SOlivier Moysan if (sai->sync == SAI_SYNC_EXTERNAL) { 8185914d285SOlivier Moysan /* Configure synchro client and provider */ 8195914d285SOlivier Moysan sai->pdata->set_sync(sai->pdata, sai->np_sync_provider, 8205914d285SOlivier Moysan sai->synco, sai->synci); 8215914d285SOlivier Moysan } 8225914d285SOlivier Moysan 8236eb17d70SOlivier Moysan if (STM_SAI_PROTOCOL_IS_SPDIF(sai)) 8246eb17d70SOlivier Moysan memcpy(sai->spdif_status_bits, default_status_bits, 8256eb17d70SOlivier Moysan sizeof(default_status_bits)); 8266eb17d70SOlivier Moysan 8275914d285SOlivier Moysan cr1_mask |= SAI_XCR1_SYNCEN_MASK; 8285914d285SOlivier Moysan cr1 |= SAI_XCR1_SYNCEN_SET(sai->sync); 8295914d285SOlivier Moysan 83061fb4ff7SOlivier Moysan return regmap_update_bits(sai->regmap, STM_SAI_CR1_REGX, cr1_mask, cr1); 8313e086edfSolivier moysan } 8323e086edfSolivier moysan 8333e086edfSolivier moysan static const struct snd_soc_dai_ops stm32_sai_pcm_dai_ops = { 8343e086edfSolivier moysan .set_sysclk = stm32_sai_set_sysclk, 8353e086edfSolivier moysan .set_fmt = stm32_sai_set_dai_fmt, 8363e086edfSolivier moysan .set_tdm_slot = stm32_sai_set_dai_tdm_slot, 8373e086edfSolivier moysan .startup = stm32_sai_startup, 8383e086edfSolivier moysan .hw_params = stm32_sai_hw_params, 8393e086edfSolivier moysan .trigger = stm32_sai_trigger, 8403e086edfSolivier moysan .shutdown = stm32_sai_shutdown, 8413e086edfSolivier moysan }; 8423e086edfSolivier moysan 8436eb17d70SOlivier Moysan static int stm32_sai_pcm_process_spdif(struct snd_pcm_substream *substream, 8446eb17d70SOlivier Moysan int channel, unsigned long hwoff, 8456eb17d70SOlivier Moysan void *buf, unsigned long bytes) 8466eb17d70SOlivier Moysan { 8476eb17d70SOlivier Moysan struct snd_pcm_runtime *runtime = substream->runtime; 8486eb17d70SOlivier Moysan struct snd_soc_pcm_runtime *rtd = substream->private_data; 8496eb17d70SOlivier Moysan struct snd_soc_dai *cpu_dai = rtd->cpu_dai; 8506eb17d70SOlivier Moysan struct stm32_sai_sub_data *sai = dev_get_drvdata(cpu_dai->dev); 8516eb17d70SOlivier Moysan int *ptr = (int *)(runtime->dma_area + hwoff + 8526eb17d70SOlivier Moysan channel * (runtime->dma_bytes / runtime->channels)); 8536eb17d70SOlivier Moysan ssize_t cnt = bytes_to_samples(runtime, bytes); 8546eb17d70SOlivier Moysan unsigned int frm_cnt = sai->spdif_frm_cnt; 8556eb17d70SOlivier Moysan unsigned int byte; 8566eb17d70SOlivier Moysan unsigned int mask; 8576eb17d70SOlivier Moysan 8586eb17d70SOlivier Moysan do { 8596eb17d70SOlivier Moysan *ptr = ((*ptr >> 8) & 0x00ffffff); 8606eb17d70SOlivier Moysan 8616eb17d70SOlivier Moysan /* Set channel status bit */ 8626eb17d70SOlivier Moysan byte = frm_cnt >> 3; 8636eb17d70SOlivier Moysan mask = 1 << (frm_cnt - (byte << 3)); 8646eb17d70SOlivier Moysan if (sai->spdif_status_bits[byte] & mask) 8656eb17d70SOlivier Moysan *ptr |= 0x04000000; 8666eb17d70SOlivier Moysan ptr++; 8676eb17d70SOlivier Moysan 8686eb17d70SOlivier Moysan if (!(cnt % 2)) 8696eb17d70SOlivier Moysan frm_cnt++; 8706eb17d70SOlivier Moysan 8716eb17d70SOlivier Moysan if (frm_cnt == SAI_IEC60958_BLOCK_FRAMES) 8726eb17d70SOlivier Moysan frm_cnt = 0; 8736eb17d70SOlivier Moysan } while (--cnt); 8746eb17d70SOlivier Moysan sai->spdif_frm_cnt = frm_cnt; 8756eb17d70SOlivier Moysan 8766eb17d70SOlivier Moysan return 0; 8776eb17d70SOlivier Moysan } 8786eb17d70SOlivier Moysan 8793e086edfSolivier moysan static const struct snd_pcm_hardware stm32_sai_pcm_hw = { 8803e086edfSolivier moysan .info = SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_MMAP, 8813e086edfSolivier moysan .buffer_bytes_max = 8 * PAGE_SIZE, 8823e086edfSolivier moysan .period_bytes_min = 1024, /* 5ms at 48kHz */ 8833e086edfSolivier moysan .period_bytes_max = PAGE_SIZE, 8843e086edfSolivier moysan .periods_min = 2, 8853e086edfSolivier moysan .periods_max = 8, 8863e086edfSolivier moysan }; 8873e086edfSolivier moysan 8883e086edfSolivier moysan static struct snd_soc_dai_driver stm32_sai_playback_dai[] = { 8893e086edfSolivier moysan { 8903e086edfSolivier moysan .probe = stm32_sai_dai_probe, 8913e086edfSolivier moysan .id = 1, /* avoid call to fmt_single_name() */ 8923e086edfSolivier moysan .playback = { 8933e086edfSolivier moysan .channels_min = 1, 8943e086edfSolivier moysan .channels_max = 2, 8953e086edfSolivier moysan .rate_min = 8000, 8963e086edfSolivier moysan .rate_max = 192000, 8973e086edfSolivier moysan .rates = SNDRV_PCM_RATE_CONTINUOUS, 8983e086edfSolivier moysan /* DMA does not support 24 bits transfers */ 8993e086edfSolivier moysan .formats = 9003e086edfSolivier moysan SNDRV_PCM_FMTBIT_S8 | 9013e086edfSolivier moysan SNDRV_PCM_FMTBIT_S16_LE | 9023e086edfSolivier moysan SNDRV_PCM_FMTBIT_S32_LE, 9033e086edfSolivier moysan }, 9043e086edfSolivier moysan .ops = &stm32_sai_pcm_dai_ops, 9053e086edfSolivier moysan } 9063e086edfSolivier moysan }; 9073e086edfSolivier moysan 9083e086edfSolivier moysan static struct snd_soc_dai_driver stm32_sai_capture_dai[] = { 9093e086edfSolivier moysan { 9103e086edfSolivier moysan .probe = stm32_sai_dai_probe, 9113e086edfSolivier moysan .id = 1, /* avoid call to fmt_single_name() */ 9123e086edfSolivier moysan .capture = { 9133e086edfSolivier moysan .channels_min = 1, 9143e086edfSolivier moysan .channels_max = 2, 9153e086edfSolivier moysan .rate_min = 8000, 9163e086edfSolivier moysan .rate_max = 192000, 9173e086edfSolivier moysan .rates = SNDRV_PCM_RATE_CONTINUOUS, 9183e086edfSolivier moysan /* DMA does not support 24 bits transfers */ 9193e086edfSolivier moysan .formats = 9203e086edfSolivier moysan SNDRV_PCM_FMTBIT_S8 | 9213e086edfSolivier moysan SNDRV_PCM_FMTBIT_S16_LE | 9223e086edfSolivier moysan SNDRV_PCM_FMTBIT_S32_LE, 9233e086edfSolivier moysan }, 9243e086edfSolivier moysan .ops = &stm32_sai_pcm_dai_ops, 9253e086edfSolivier moysan } 9263e086edfSolivier moysan }; 9273e086edfSolivier moysan 9283e086edfSolivier moysan static const struct snd_dmaengine_pcm_config stm32_sai_pcm_config = { 9293e086edfSolivier moysan .pcm_hardware = &stm32_sai_pcm_hw, 9303e086edfSolivier moysan .prepare_slave_config = snd_dmaengine_pcm_prepare_slave_config, 9313e086edfSolivier moysan }; 9323e086edfSolivier moysan 9336eb17d70SOlivier Moysan static const struct snd_dmaengine_pcm_config stm32_sai_pcm_config_spdif = { 9346eb17d70SOlivier Moysan .pcm_hardware = &stm32_sai_pcm_hw, 9356eb17d70SOlivier Moysan .prepare_slave_config = snd_dmaengine_pcm_prepare_slave_config, 9366eb17d70SOlivier Moysan .process = stm32_sai_pcm_process_spdif, 9376eb17d70SOlivier Moysan }; 9386eb17d70SOlivier Moysan 9393e086edfSolivier moysan static const struct snd_soc_component_driver stm32_component = { 9403e086edfSolivier moysan .name = "stm32-sai", 9413e086edfSolivier moysan }; 9423e086edfSolivier moysan 9433e086edfSolivier moysan static const struct of_device_id stm32_sai_sub_ids[] = { 9443e086edfSolivier moysan { .compatible = "st,stm32-sai-sub-a", 9453e086edfSolivier moysan .data = (void *)STM_SAI_A_ID}, 9463e086edfSolivier moysan { .compatible = "st,stm32-sai-sub-b", 9473e086edfSolivier moysan .data = (void *)STM_SAI_B_ID}, 9483e086edfSolivier moysan {} 9493e086edfSolivier moysan }; 9503e086edfSolivier moysan MODULE_DEVICE_TABLE(of, stm32_sai_sub_ids); 9513e086edfSolivier moysan 9523e086edfSolivier moysan static int stm32_sai_sub_parse_of(struct platform_device *pdev, 9533e086edfSolivier moysan struct stm32_sai_sub_data *sai) 9543e086edfSolivier moysan { 9553e086edfSolivier moysan struct device_node *np = pdev->dev.of_node; 9563e086edfSolivier moysan struct resource *res; 9573e086edfSolivier moysan void __iomem *base; 9585914d285SOlivier Moysan struct of_phandle_args args; 9595914d285SOlivier Moysan int ret; 9603e086edfSolivier moysan 9613e086edfSolivier moysan if (!np) 9623e086edfSolivier moysan return -ENODEV; 9633e086edfSolivier moysan 9643e086edfSolivier moysan res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 9653e086edfSolivier moysan base = devm_ioremap_resource(&pdev->dev, res); 9663e086edfSolivier moysan if (IS_ERR(base)) 9673e086edfSolivier moysan return PTR_ERR(base); 9683e086edfSolivier moysan 9693e086edfSolivier moysan sai->phys_addr = res->start; 97003e78a24Solivier moysan 97103e78a24Solivier moysan sai->regmap_config = &stm32_sai_sub_regmap_config_f4; 97203e78a24Solivier moysan /* Note: PDM registers not available for H7 sub-block B */ 97303e78a24Solivier moysan if (STM_SAI_IS_H7(sai->pdata) && STM_SAI_IS_SUB_A(sai)) 97403e78a24Solivier moysan sai->regmap_config = &stm32_sai_sub_regmap_config_h7; 97503e78a24Solivier moysan 97603e78a24Solivier moysan sai->regmap = devm_regmap_init_mmio_clk(&pdev->dev, "sai_ck", 97703e78a24Solivier moysan base, sai->regmap_config); 97803e78a24Solivier moysan if (IS_ERR(sai->regmap)) { 97903e78a24Solivier moysan dev_err(&pdev->dev, "Failed to initialize MMIO\n"); 98003e78a24Solivier moysan return PTR_ERR(sai->regmap); 98103e78a24Solivier moysan } 9823e086edfSolivier moysan 9833e086edfSolivier moysan /* Get direction property */ 9843e086edfSolivier moysan if (of_property_match_string(np, "dma-names", "tx") >= 0) { 9853e086edfSolivier moysan sai->dir = SNDRV_PCM_STREAM_PLAYBACK; 9863e086edfSolivier moysan } else if (of_property_match_string(np, "dma-names", "rx") >= 0) { 9873e086edfSolivier moysan sai->dir = SNDRV_PCM_STREAM_CAPTURE; 9883e086edfSolivier moysan } else { 9893e086edfSolivier moysan dev_err(&pdev->dev, "Unsupported direction\n"); 9903e086edfSolivier moysan return -EINVAL; 9913e086edfSolivier moysan } 9923e086edfSolivier moysan 9936eb17d70SOlivier Moysan /* Get spdif iec60958 property */ 9946eb17d70SOlivier Moysan sai->spdif = false; 9956eb17d70SOlivier Moysan if (of_get_property(np, "st,iec60958", NULL)) { 9966eb17d70SOlivier Moysan if (!STM_SAI_HAS_SPDIF(sai) || 9976eb17d70SOlivier Moysan sai->dir == SNDRV_PCM_STREAM_CAPTURE) { 9986eb17d70SOlivier Moysan dev_err(&pdev->dev, "S/PDIF IEC60958 not supported\n"); 9996eb17d70SOlivier Moysan return -EINVAL; 10006eb17d70SOlivier Moysan } 10016eb17d70SOlivier Moysan sai->spdif = true; 10026eb17d70SOlivier Moysan sai->master = true; 10036eb17d70SOlivier Moysan } 10046eb17d70SOlivier Moysan 10055914d285SOlivier Moysan /* Get synchronization property */ 10065914d285SOlivier Moysan args.np = NULL; 10075914d285SOlivier Moysan ret = of_parse_phandle_with_fixed_args(np, "st,sync", 1, 0, &args); 10085914d285SOlivier Moysan if (ret < 0 && ret != -ENOENT) { 10095914d285SOlivier Moysan dev_err(&pdev->dev, "Failed to get st,sync property\n"); 10105914d285SOlivier Moysan return ret; 10115914d285SOlivier Moysan } 10125914d285SOlivier Moysan 10135914d285SOlivier Moysan sai->sync = SAI_SYNC_NONE; 10145914d285SOlivier Moysan if (args.np) { 10155914d285SOlivier Moysan if (args.np == np) { 10165914d285SOlivier Moysan dev_err(&pdev->dev, "%s sync own reference\n", 10175914d285SOlivier Moysan np->name); 10185914d285SOlivier Moysan of_node_put(args.np); 10195914d285SOlivier Moysan return -EINVAL; 10205914d285SOlivier Moysan } 10215914d285SOlivier Moysan 10225914d285SOlivier Moysan sai->np_sync_provider = of_get_parent(args.np); 10235914d285SOlivier Moysan if (!sai->np_sync_provider) { 10245914d285SOlivier Moysan dev_err(&pdev->dev, "%s parent node not found\n", 10255914d285SOlivier Moysan np->name); 10265914d285SOlivier Moysan of_node_put(args.np); 10275914d285SOlivier Moysan return -ENODEV; 10285914d285SOlivier Moysan } 10295914d285SOlivier Moysan 10305914d285SOlivier Moysan sai->sync = SAI_SYNC_INTERNAL; 10315914d285SOlivier Moysan if (sai->np_sync_provider != sai->pdata->pdev->dev.of_node) { 10325914d285SOlivier Moysan if (!STM_SAI_HAS_EXT_SYNC(sai)) { 10335914d285SOlivier Moysan dev_err(&pdev->dev, 10345914d285SOlivier Moysan "External synchro not supported\n"); 10355914d285SOlivier Moysan of_node_put(args.np); 10365914d285SOlivier Moysan return -EINVAL; 10375914d285SOlivier Moysan } 10385914d285SOlivier Moysan sai->sync = SAI_SYNC_EXTERNAL; 10395914d285SOlivier Moysan 10405914d285SOlivier Moysan sai->synci = args.args[0]; 10415914d285SOlivier Moysan if (sai->synci < 1 || 10425914d285SOlivier Moysan (sai->synci > (SAI_GCR_SYNCIN_MAX + 1))) { 10435914d285SOlivier Moysan dev_err(&pdev->dev, "Wrong SAI index\n"); 10445914d285SOlivier Moysan of_node_put(args.np); 10455914d285SOlivier Moysan return -EINVAL; 10465914d285SOlivier Moysan } 10475914d285SOlivier Moysan 10485914d285SOlivier Moysan if (of_property_match_string(args.np, "compatible", 10495914d285SOlivier Moysan "st,stm32-sai-sub-a") >= 0) 10505914d285SOlivier Moysan sai->synco = STM_SAI_SYNC_OUT_A; 10515914d285SOlivier Moysan 10525914d285SOlivier Moysan if (of_property_match_string(args.np, "compatible", 10535914d285SOlivier Moysan "st,stm32-sai-sub-b") >= 0) 10545914d285SOlivier Moysan sai->synco = STM_SAI_SYNC_OUT_B; 10555914d285SOlivier Moysan 10565914d285SOlivier Moysan if (!sai->synco) { 10575914d285SOlivier Moysan dev_err(&pdev->dev, "Unknown SAI sub-block\n"); 10585914d285SOlivier Moysan of_node_put(args.np); 10595914d285SOlivier Moysan return -EINVAL; 10605914d285SOlivier Moysan } 10615914d285SOlivier Moysan } 10625914d285SOlivier Moysan 10635914d285SOlivier Moysan dev_dbg(&pdev->dev, "%s synchronized with %s\n", 10645914d285SOlivier Moysan pdev->name, args.np->full_name); 10655914d285SOlivier Moysan } 10665914d285SOlivier Moysan 10675914d285SOlivier Moysan of_node_put(args.np); 10683e086edfSolivier moysan sai->sai_ck = devm_clk_get(&pdev->dev, "sai_ck"); 10693e086edfSolivier moysan if (IS_ERR(sai->sai_ck)) { 1070602fdadcSolivier moysan dev_err(&pdev->dev, "Missing kernel clock sai_ck\n"); 10713e086edfSolivier moysan return PTR_ERR(sai->sai_ck); 10723e086edfSolivier moysan } 10733e086edfSolivier moysan 10743e086edfSolivier moysan return 0; 10753e086edfSolivier moysan } 10763e086edfSolivier moysan 10773e086edfSolivier moysan static int stm32_sai_sub_dais_init(struct platform_device *pdev, 10783e086edfSolivier moysan struct stm32_sai_sub_data *sai) 10793e086edfSolivier moysan { 10803e086edfSolivier moysan sai->cpu_dai_drv = devm_kzalloc(&pdev->dev, 10813e086edfSolivier moysan sizeof(struct snd_soc_dai_driver), 10823e086edfSolivier moysan GFP_KERNEL); 10833e086edfSolivier moysan if (!sai->cpu_dai_drv) 10843e086edfSolivier moysan return -ENOMEM; 10853e086edfSolivier moysan 10863e086edfSolivier moysan sai->cpu_dai_drv->name = dev_name(&pdev->dev); 10873e086edfSolivier moysan if (STM_SAI_IS_PLAYBACK(sai)) { 10883e086edfSolivier moysan memcpy(sai->cpu_dai_drv, &stm32_sai_playback_dai, 10893e086edfSolivier moysan sizeof(stm32_sai_playback_dai)); 10903e086edfSolivier moysan sai->cpu_dai_drv->playback.stream_name = sai->cpu_dai_drv->name; 10913e086edfSolivier moysan } else { 10923e086edfSolivier moysan memcpy(sai->cpu_dai_drv, &stm32_sai_capture_dai, 10933e086edfSolivier moysan sizeof(stm32_sai_capture_dai)); 10943e086edfSolivier moysan sai->cpu_dai_drv->capture.stream_name = sai->cpu_dai_drv->name; 10953e086edfSolivier moysan } 10963e086edfSolivier moysan 10973e086edfSolivier moysan return 0; 10983e086edfSolivier moysan } 10993e086edfSolivier moysan 11003e086edfSolivier moysan static int stm32_sai_sub_probe(struct platform_device *pdev) 11013e086edfSolivier moysan { 11023e086edfSolivier moysan struct stm32_sai_sub_data *sai; 11033e086edfSolivier moysan const struct of_device_id *of_id; 11046eb17d70SOlivier Moysan const struct snd_dmaengine_pcm_config *conf = &stm32_sai_pcm_config; 11053e086edfSolivier moysan int ret; 11063e086edfSolivier moysan 11073e086edfSolivier moysan sai = devm_kzalloc(&pdev->dev, sizeof(*sai), GFP_KERNEL); 11083e086edfSolivier moysan if (!sai) 11093e086edfSolivier moysan return -ENOMEM; 11103e086edfSolivier moysan 11113e086edfSolivier moysan of_id = of_match_device(stm32_sai_sub_ids, &pdev->dev); 11123e086edfSolivier moysan if (!of_id) 11133e086edfSolivier moysan return -EINVAL; 11143e086edfSolivier moysan sai->id = (uintptr_t)of_id->data; 11153e086edfSolivier moysan 11163e086edfSolivier moysan sai->pdev = pdev; 11173e086edfSolivier moysan platform_set_drvdata(pdev, sai); 11183e086edfSolivier moysan 11193e086edfSolivier moysan sai->pdata = dev_get_drvdata(pdev->dev.parent); 11203e086edfSolivier moysan if (!sai->pdata) { 11213e086edfSolivier moysan dev_err(&pdev->dev, "Parent device data not available\n"); 11223e086edfSolivier moysan return -EINVAL; 11233e086edfSolivier moysan } 11243e086edfSolivier moysan 11253e086edfSolivier moysan ret = stm32_sai_sub_parse_of(pdev, sai); 11263e086edfSolivier moysan if (ret) 11273e086edfSolivier moysan return ret; 11283e086edfSolivier moysan 11293e086edfSolivier moysan ret = stm32_sai_sub_dais_init(pdev, sai); 11303e086edfSolivier moysan if (ret) 11313e086edfSolivier moysan return ret; 11323e086edfSolivier moysan 11333e086edfSolivier moysan ret = devm_request_irq(&pdev->dev, sai->pdata->irq, stm32_sai_isr, 11343e086edfSolivier moysan IRQF_SHARED, dev_name(&pdev->dev), sai); 11353e086edfSolivier moysan if (ret) { 1136602fdadcSolivier moysan dev_err(&pdev->dev, "IRQ request returned %d\n", ret); 11373e086edfSolivier moysan return ret; 11383e086edfSolivier moysan } 11393e086edfSolivier moysan 11403e086edfSolivier moysan ret = devm_snd_soc_register_component(&pdev->dev, &stm32_component, 11413e086edfSolivier moysan sai->cpu_dai_drv, 1); 11423e086edfSolivier moysan if (ret) 11433e086edfSolivier moysan return ret; 11443e086edfSolivier moysan 11456eb17d70SOlivier Moysan if (STM_SAI_PROTOCOL_IS_SPDIF(sai)) 11466eb17d70SOlivier Moysan conf = &stm32_sai_pcm_config_spdif; 11476eb17d70SOlivier Moysan 11486eb17d70SOlivier Moysan ret = devm_snd_dmaengine_pcm_register(&pdev->dev, conf, 0); 11493e086edfSolivier moysan if (ret) { 1150602fdadcSolivier moysan dev_err(&pdev->dev, "Could not register pcm dma\n"); 11513e086edfSolivier moysan return ret; 11523e086edfSolivier moysan } 11533e086edfSolivier moysan 11543e086edfSolivier moysan return 0; 11553e086edfSolivier moysan } 11563e086edfSolivier moysan 11573e086edfSolivier moysan static struct platform_driver stm32_sai_sub_driver = { 11583e086edfSolivier moysan .driver = { 11593e086edfSolivier moysan .name = "st,stm32-sai-sub", 11603e086edfSolivier moysan .of_match_table = stm32_sai_sub_ids, 11613e086edfSolivier moysan }, 11623e086edfSolivier moysan .probe = stm32_sai_sub_probe, 11633e086edfSolivier moysan }; 11643e086edfSolivier moysan 11653e086edfSolivier moysan module_platform_driver(stm32_sai_sub_driver); 11663e086edfSolivier moysan 11673e086edfSolivier moysan MODULE_DESCRIPTION("STM32 Soc SAI sub-block Interface"); 1168602fdadcSolivier moysan MODULE_AUTHOR("Olivier Moysan <olivier.moysan@st.com>"); 11693e086edfSolivier moysan MODULE_ALIAS("platform:st,stm32-sai-sub"); 11703e086edfSolivier moysan MODULE_LICENSE("GPL v2"); 1171