xref: /openbmc/linux/sound/soc/sti/uniperif.h (revision e3b9f1e8)
1 /*
2  * Copyright (C) STMicroelectronics SA 2015
3  * Authors: Arnaud Pouliquen <arnaud.pouliquen@st.com>
4  *          for STMicroelectronics.
5  * License terms:  GNU General Public License (GPL), version 2
6  */
7 
8 #ifndef __SND_ST_AUD_UNIPERIF_H
9 #define __SND_ST_AUD_UNIPERIF_H
10 
11 #include <linux/regmap.h>
12 
13 #include <sound/dmaengine_pcm.h>
14 
15 /*
16  * Register access macros
17  */
18 
19 #define GET_UNIPERIF_REG(ip, offset, shift, mask) \
20 	((readl_relaxed(ip->base + offset) >> shift) & mask)
21 #define SET_UNIPERIF_REG(ip, offset, shift, mask, value) \
22 	writel_relaxed(((readl_relaxed(ip->base + offset) & \
23 	~(mask << shift)) | (((value) & mask) << shift)), ip->base + offset)
24 #define SET_UNIPERIF_BIT_REG(ip, offset, shift, mask, value) \
25 	writel_relaxed((((value) & mask) << shift), ip->base + offset)
26 
27 /*
28  * UNIPERIF_SOFT_RST reg
29  */
30 
31 #define UNIPERIF_SOFT_RST_OFFSET(ip) 0x0000
32 #define GET_UNIPERIF_SOFT_RST(ip) \
33 	((ip)->ver < SND_ST_UNIPERIF_VERSION_UNI_PLR_TOP_1_0 ? \
34 		readl_relaxed(ip->base + UNIPERIF_SOFT_RST_OFFSET(ip)) : 0)
35 #define SET_UNIPERIF_SOFT_RST(ip, value) \
36 	writel_relaxed(value, ip->base + UNIPERIF_SOFT_RST_OFFSET(ip))
37 
38 /* SOFT_RST */
39 #define UNIPERIF_SOFT_RST_SOFT_RST_SHIFT(ip) 0x0
40 #define UNIPERIF_SOFT_RST_SOFT_RST_MASK(ip) 0x1
41 #define SET_UNIPERIF_SOFT_RST_SOFT_RST(ip) \
42 	SET_UNIPERIF_BIT_REG(ip, \
43 		UNIPERIF_SOFT_RST_OFFSET(ip), \
44 		UNIPERIF_SOFT_RST_SOFT_RST_SHIFT(ip), \
45 		UNIPERIF_SOFT_RST_SOFT_RST_MASK(ip), 1)
46 #define GET_UNIPERIF_SOFT_RST_SOFT_RST(ip) \
47 	GET_UNIPERIF_REG(ip, \
48 		UNIPERIF_SOFT_RST_OFFSET(ip), \
49 		UNIPERIF_SOFT_RST_SOFT_RST_SHIFT(ip), \
50 		UNIPERIF_SOFT_RST_SOFT_RST_MASK(ip))
51 
52 /*
53  * UNIPERIF_FIFO_DATA reg
54  */
55 
56 #define UNIPERIF_FIFO_DATA_OFFSET(ip) 0x0004
57 #define SET_UNIPERIF_DATA(ip, value) \
58 	writel_relaxed(value, ip->base + UNIPERIF_FIFO_DATA_OFFSET(ip))
59 
60 /*
61  * UNIPERIF_CHANNEL_STA_REGN reg
62  */
63 
64 #define UNIPERIF_CHANNEL_STA_REGN(ip, n) (0x0060 + (4 * n))
65 #define GET_UNIPERIF_CHANNEL_STA_REGN(ip) \
66 	readl_relaxed(ip->base + UNIPERIF_CHANNEL_STA_REGN(ip, n))
67 #define SET_UNIPERIF_CHANNEL_STA_REGN(ip, n, value) \
68 	writel_relaxed(value, ip->base + \
69 			UNIPERIF_CHANNEL_STA_REGN(ip, n))
70 
71 #define UNIPERIF_CHANNEL_STA_REG0_OFFSET(ip) 0x0060
72 #define GET_UNIPERIF_CHANNEL_STA_REG0(ip) \
73 	readl_relaxed(ip->base + UNIPERIF_CHANNEL_STA_REG0_OFFSET(ip))
74 #define SET_UNIPERIF_CHANNEL_STA_REG0(ip, value) \
75 	writel_relaxed(value, ip->base + UNIPERIF_CHANNEL_STA_REG0_OFFSET(ip))
76 
77 #define UNIPERIF_CHANNEL_STA_REG1_OFFSET(ip) 0x0064
78 #define GET_UNIPERIF_CHANNEL_STA_REG1(ip) \
79 	readl_relaxed(ip->base + UNIPERIF_CHANNEL_STA_REG1_OFFSET(ip))
80 #define SET_UNIPERIF_CHANNEL_STA_REG1(ip, value) \
81 	writel_relaxed(value, ip->base + UNIPERIF_CHANNEL_STA_REG1_OFFSET(ip))
82 
83 #define UNIPERIF_CHANNEL_STA_REG2_OFFSET(ip) 0x0068
84 #define GET_UNIPERIF_CHANNEL_STA_REG2(ip) \
85 	readl_relaxed(ip->base + UNIPERIF_CHANNEL_STA_REG2_OFFSET(ip))
86 #define SET_UNIPERIF_CHANNEL_STA_REG2(ip, value) \
87 	writel_relaxed(value, ip->base + UNIPERIF_CHANNEL_STA_REG2_OFFSET(ip))
88 
89 #define UNIPERIF_CHANNEL_STA_REG3_OFFSET(ip) 0x006C
90 #define GET_UNIPERIF_CHANNEL_STA_REG3(ip) \
91 	readl_relaxed(ip->base + UNIPERIF_CHANNEL_STA_REG3_OFFSET(ip))
92 #define SET_UNIPERIF_CHANNEL_STA_REG3(ip, value) \
93 	writel_relaxed(value, ip->base + UNIPERIF_CHANNEL_STA_REG3_OFFSET(ip))
94 
95 #define UNIPERIF_CHANNEL_STA_REG4_OFFSET(ip) 0x0070
96 #define GET_UNIPERIF_CHANNEL_STA_REG4(ip) \
97 	readl_relaxed(ip->base + UNIPERIF_CHANNEL_STA_REG4_OFFSET(ip))
98 #define SET_UNIPERIF_CHANNEL_STA_REG4(ip, value) \
99 	writel_relaxed(value, ip->base + UNIPERIF_CHANNEL_STA_REG4_OFFSET(ip))
100 
101 #define UNIPERIF_CHANNEL_STA_REG5_OFFSET(ip) 0x0074
102 #define GET_UNIPERIF_CHANNEL_STA_REG5(ip) \
103 	readl_relaxed(ip->base + UNIPERIF_CHANNEL_STA_REG5_OFFSET(ip))
104 #define SET_UNIPERIF_CHANNEL_STA_REG5(ip, value) \
105 	writel_relaxed(value, ip->base + UNIPERIF_CHANNEL_STA_REG5_OFFSET(ip))
106 
107 /*
108  *  UNIPERIF_ITS reg
109  */
110 
111 #define UNIPERIF_ITS_OFFSET(ip) 0x000C
112 #define GET_UNIPERIF_ITS(ip) \
113 	readl_relaxed(ip->base + UNIPERIF_ITS_OFFSET(ip))
114 
115 /* MEM_BLK_READ */
116 #define UNIPERIF_ITS_MEM_BLK_READ_SHIFT(ip) 5
117 #define UNIPERIF_ITS_MEM_BLK_READ_MASK(ip) \
118 	(BIT(UNIPERIF_ITS_MEM_BLK_READ_SHIFT(ip)))
119 
120 /* FIFO_ERROR */
121 #define UNIPERIF_ITS_FIFO_ERROR_SHIFT(ip) \
122 	((ip)->ver < SND_ST_UNIPERIF_VERSION_UNI_PLR_TOP_1_0 ? 0 : 8)
123 #define UNIPERIF_ITS_FIFO_ERROR_MASK(ip) \
124 	(BIT(UNIPERIF_ITS_FIFO_ERROR_SHIFT(ip)))
125 
126 /* DMA_ERROR */
127 #define UNIPERIF_ITS_DMA_ERROR_SHIFT(ip) 9
128 #define UNIPERIF_ITS_DMA_ERROR_MASK(ip) \
129 	(BIT(UNIPERIF_ITS_DMA_ERROR_SHIFT(ip)))
130 
131 /* UNDERFLOW_REC_DONE */
132 #define UNIPERIF_ITS_UNDERFLOW_REC_DONE_SHIFT(ip) \
133 	((ip)->ver < SND_ST_UNIPERIF_VERSION_UNI_PLR_TOP_1_0 ? -1 : 12)
134 #define UNIPERIF_ITS_UNDERFLOW_REC_DONE_MASK(ip) \
135 	((ip)->ver < SND_ST_UNIPERIF_VERSION_UNI_PLR_TOP_1_0 ? \
136 		0 : (BIT(UNIPERIF_ITS_UNDERFLOW_REC_DONE_SHIFT(ip))))
137 
138 /* UNDERFLOW_REC_FAILED */
139 #define UNIPERIF_ITS_UNDERFLOW_REC_FAILED_SHIFT(ip) \
140 	((ip)->ver < SND_ST_UNIPERIF_VERSION_UNI_PLR_TOP_1_0 ? -1 : 13)
141 #define UNIPERIF_ITS_UNDERFLOW_REC_FAILED_MASK(ip) \
142 	((ip)->ver < SND_ST_UNIPERIF_VERSION_UNI_PLR_TOP_1_0 ? \
143 		0 : (BIT(UNIPERIF_ITS_UNDERFLOW_REC_FAILED_SHIFT(ip))))
144 
145 /*
146  *  UNIPERIF_ITS_BCLR reg
147  */
148 
149 /* FIFO_ERROR */
150 #define UNIPERIF_ITS_BCLR_FIFO_ERROR_SHIFT(ip) \
151 	((ip)->ver < SND_ST_UNIPERIF_VERSION_UNI_PLR_TOP_1_0 ? 0 : 8)
152 #define UNIPERIF_ITS_BCLR_FIFO_ERROR_MASK(ip) \
153 	(BIT(UNIPERIF_ITS_BCLR_FIFO_ERROR_SHIFT(ip)))
154 #define SET_UNIPERIF_ITS_BCLR_FIFO_ERROR(ip) \
155 	SET_UNIPERIF_ITS_BCLR(ip, \
156 		UNIPERIF_ITS_BCLR_FIFO_ERROR_MASK(ip))
157 
158 #define UNIPERIF_ITS_BCLR_OFFSET(ip) 0x0010
159 #define SET_UNIPERIF_ITS_BCLR(ip, value) \
160 	writel_relaxed(value, ip->base + UNIPERIF_ITS_BCLR_OFFSET(ip))
161 
162 /*
163  *  UNIPERIF_ITM reg
164  */
165 
166 #define UNIPERIF_ITM_OFFSET(ip) 0x0018
167 #define GET_UNIPERIF_ITM(ip) \
168 	readl_relaxed(ip->base + UNIPERIF_ITM_OFFSET(ip))
169 
170 /* FIFO_ERROR */
171 #define UNIPERIF_ITM_FIFO_ERROR_SHIFT(ip) \
172 	((ip)->ver < SND_ST_UNIPERIF_VERSION_UNI_PLR_TOP_1_0 ? 0 : 8)
173 #define UNIPERIF_ITM_FIFO_ERROR_MASK(ip) \
174 	(BIT(UNIPERIF_ITM_FIFO_ERROR_SHIFT(ip)))
175 
176 /* UNDERFLOW_REC_DONE */
177 #define UNIPERIF_ITM_UNDERFLOW_REC_DONE_SHIFT(ip) \
178 	((ip)->ver < SND_ST_UNIPERIF_VERSION_UNI_PLR_TOP_1_0 ? -1 : 12)
179 #define UNIPERIF_ITM_UNDERFLOW_REC_DONE_MASK(ip) \
180 	((ip)->ver < SND_ST_UNIPERIF_VERSION_UNI_PLR_TOP_1_0 ? \
181 		0 : (BIT(UNIPERIF_ITM_UNDERFLOW_REC_DONE_SHIFT(ip))))
182 
183 /* UNDERFLOW_REC_FAILED */
184 #define UNIPERIF_ITM_UNDERFLOW_REC_FAILED_SHIFT(ip) \
185 	((ip)->ver < SND_ST_UNIPERIF_VERSION_UNI_PLR_TOP_1_0 ? -1 : 13)
186 #define UNIPERIF_ITM_UNDERFLOW_REC_FAILED_MASK(ip) \
187 	((ip)->ver < SND_ST_UNIPERIF_VERSION_UNI_PLR_TOP_1_0 ? \
188 		0 : (BIT(UNIPERIF_ITM_UNDERFLOW_REC_FAILED_SHIFT(ip))))
189 
190 /*
191  *  UNIPERIF_ITM_BCLR reg
192  */
193 
194 #define UNIPERIF_ITM_BCLR_OFFSET(ip) 0x001c
195 #define SET_UNIPERIF_ITM_BCLR(ip, value) \
196 	writel_relaxed(value, ip->base + UNIPERIF_ITM_BCLR_OFFSET(ip))
197 
198 /* FIFO_ERROR */
199 #define UNIPERIF_ITM_BCLR_FIFO_ERROR_SHIFT(ip) \
200 	((ip)->ver < SND_ST_UNIPERIF_VERSION_UNI_PLR_TOP_1_0 ? 0 : 8)
201 #define UNIPERIF_ITM_BCLR_FIFO_ERROR_MASK(ip) \
202 	(BIT(UNIPERIF_ITM_BCLR_FIFO_ERROR_SHIFT(ip)))
203 #define SET_UNIPERIF_ITM_BCLR_FIFO_ERROR(ip) \
204 	SET_UNIPERIF_ITM_BCLR(ip, \
205 		UNIPERIF_ITM_BCLR_FIFO_ERROR_MASK(ip))
206 
207 /* DMA_ERROR */
208 #define UNIPERIF_ITM_BCLR_DMA_ERROR_SHIFT(ip) 9
209 #define UNIPERIF_ITM_BCLR_DMA_ERROR_MASK(ip) \
210 	(BIT(UNIPERIF_ITM_BCLR_DMA_ERROR_SHIFT(ip)))
211 #define SET_UNIPERIF_ITM_BCLR_DMA_ERROR(ip) \
212 	SET_UNIPERIF_ITM_BCLR(ip, \
213 		UNIPERIF_ITM_BCLR_DMA_ERROR_MASK(ip))
214 
215 /*
216  *  UNIPERIF_ITM_BSET reg
217  */
218 
219 #define UNIPERIF_ITM_BSET_OFFSET(ip) 0x0020
220 #define SET_UNIPERIF_ITM_BSET(ip, value) \
221 	writel_relaxed(value, ip->base + UNIPERIF_ITM_BSET_OFFSET(ip))
222 
223 /* FIFO_ERROR */
224 #define UNIPERIF_ITM_BSET_FIFO_ERROR_SHIFT(ip) \
225 	((ip)->ver < SND_ST_UNIPERIF_VERSION_UNI_PLR_TOP_1_0 ? 0 : 8)
226 #define UNIPERIF_ITM_BSET_FIFO_ERROR_MASK(ip) \
227 	(BIT(UNIPERIF_ITM_BSET_FIFO_ERROR_SHIFT(ip)))
228 #define SET_UNIPERIF_ITM_BSET_FIFO_ERROR(ip) \
229 	SET_UNIPERIF_ITM_BSET(ip, \
230 		UNIPERIF_ITM_BSET_FIFO_ERROR_MASK(ip))
231 
232 /* MEM_BLK_READ */
233 #define UNIPERIF_ITM_BSET_MEM_BLK_READ_SHIFT(ip) 5
234 #define UNIPERIF_ITM_BSET_MEM_BLK_READ_MASK(ip) \
235 	(BIT(UNIPERIF_ITM_BSET_MEM_BLK_READ_SHIFT(ip)))
236 #define SET_UNIPERIF_ITM_BSET_MEM_BLK_READ(ip) \
237 	SET_UNIPERIF_ITM_BSET(ip, \
238 		UNIPERIF_ITM_BSET_MEM_BLK_READ_MASK(ip))
239 
240 /* DMA_ERROR */
241 #define UNIPERIF_ITM_BSET_DMA_ERROR_SHIFT(ip) 9
242 #define UNIPERIF_ITM_BSET_DMA_ERROR_MASK(ip) \
243 	(BIT(UNIPERIF_ITM_BSET_DMA_ERROR_SHIFT(ip)))
244 #define SET_UNIPERIF_ITM_BSET_DMA_ERROR(ip) \
245 	SET_UNIPERIF_ITM_BSET(ip, \
246 		UNIPERIF_ITM_BSET_DMA_ERROR_MASK(ip))
247 
248 /* UNDERFLOW_REC_DONE */
249 #define UNIPERIF_ITM_BSET_UNDERFLOW_REC_DONE_SHIFT(ip) \
250 	((ip)->ver < SND_ST_UNIPERIF_VERSION_UNI_PLR_TOP_1_0 ? -1 : 12)
251 #define UNIPERIF_ITM_BSET_UNDERFLOW_REC_DONE_MASK(ip) \
252 	((ip)->ver < SND_ST_UNIPERIF_VERSION_UNI_PLR_TOP_1_0 ? \
253 		0 : (BIT(UNIPERIF_ITM_BSET_UNDERFLOW_REC_DONE_SHIFT(ip))))
254 #define SET_UNIPERIF_ITM_BSET_UNDERFLOW_REC_DONE(ip) \
255 	SET_UNIPERIF_ITM_BSET(ip, \
256 		UNIPERIF_ITM_BSET_UNDERFLOW_REC_DONE_MASK(ip))
257 
258 /* UNDERFLOW_REC_FAILED */
259 #define UNIPERIF_ITM_BSET_UNDERFLOW_REC_FAILED_SHIFT(ip) \
260 	((ip)->ver < SND_ST_UNIPERIF_VERSION_UNI_PLR_TOP_1_0 ? -1 : 13)
261 #define UNIPERIF_ITM_BSET_UNDERFLOW_REC_FAILED_MASK(ip) \
262 	((ip)->ver < SND_ST_UNIPERIF_VERSION_UNI_PLR_TOP_1_0 ? \
263 		0 : (BIT(UNIPERIF_ITM_BSET_UNDERFLOW_REC_FAILED_SHIFT(ip))))
264 #define SET_UNIPERIF_ITM_BSET_UNDERFLOW_REC_FAILED(ip) \
265 	SET_UNIPERIF_ITM_BSET(ip, \
266 		UNIPERIF_ITM_BSET_UNDERFLOW_REC_FAILED_MASK(ip))
267 
268 /*
269  * UNIPERIF_CONFIG reg
270  */
271 
272 #define UNIPERIF_CONFIG_OFFSET(ip) 0x0040
273 #define GET_UNIPERIF_CONFIG(ip) \
274 	readl_relaxed(ip->base + UNIPERIF_CONFIG_OFFSET(ip))
275 #define SET_UNIPERIF_CONFIG(ip, value) \
276 	writel_relaxed(value, ip->base + UNIPERIF_CONFIG_OFFSET(ip))
277 
278 /* PARITY_CNTR */
279 #define UNIPERIF_CONFIG_PARITY_CNTR_SHIFT(ip) 0
280 #define UNIPERIF_CONFIG_PARITY_CNTR_MASK(ip) 0x1
281 #define GET_UNIPERIF_CONFIG_PARITY_CNTR(ip) \
282 	GET_UNIPERIF_REG(ip, \
283 		UNIPERIF_CONFIG_OFFSET(ip), \
284 		UNIPERIF_CONFIG_PARITY_CNTR_SHIFT(ip), \
285 		UNIPERIF_CONFIG_PARITY_CNTR_MASK(ip))
286 #define SET_UNIPERIF_CONFIG_PARITY_CNTR_BY_HW(ip) \
287 	SET_UNIPERIF_REG(ip, \
288 		UNIPERIF_CONFIG_OFFSET(ip), \
289 		UNIPERIF_CONFIG_PARITY_CNTR_SHIFT(ip), \
290 		UNIPERIF_CONFIG_PARITY_CNTR_MASK(ip), 0)
291 #define SET_UNIPERIF_CONFIG_PARITY_CNTR_BY_SW(ip) \
292 	SET_UNIPERIF_REG(ip, \
293 		UNIPERIF_CONFIG_OFFSET(ip), \
294 		UNIPERIF_CONFIG_PARITY_CNTR_SHIFT(ip), \
295 		UNIPERIF_CONFIG_PARITY_CNTR_MASK(ip), 1)
296 
297 /* CHANNEL_STA_CNTR */
298 #define UNIPERIF_CONFIG_CHANNEL_STA_CNTR_SHIFT(ip) 1
299 #define UNIPERIF_CONFIG_CHANNEL_STA_CNTR_MASK(ip) 0x1
300 #define GET_UNIPERIF_CONFIG_CHANNEL_STA_CNTR(ip) \
301 	GET_UNIPERIF_REG(ip, \
302 		UNIPERIF_CONFIG_OFFSET(ip), \
303 		UNIPERIF_CONFIG_CHANNEL_STA_CNTR_SHIFT(ip), \
304 		UNIPERIF_CONFIG_CHANNEL_STA_CNTR_MASK(ip))
305 #define SET_UNIPERIF_CONFIG_CHANNEL_STA_CNTR_BY_SW(ip) \
306 	SET_UNIPERIF_REG(ip, \
307 		UNIPERIF_CONFIG_OFFSET(ip), \
308 		UNIPERIF_CONFIG_CHANNEL_STA_CNTR_SHIFT(ip), \
309 		UNIPERIF_CONFIG_CHANNEL_STA_CNTR_MASK(ip), 0)
310 #define SET_UNIPERIF_CONFIG_CHANNEL_STA_CNTR_BY_HW(ip) \
311 	SET_UNIPERIF_REG(ip, \
312 		UNIPERIF_CONFIG_OFFSET(ip),    \
313 		UNIPERIF_CONFIG_CHANNEL_STA_CNTR_SHIFT(ip), \
314 		UNIPERIF_CONFIG_CHANNEL_STA_CNTR_MASK(ip), 1)
315 
316 /* USER_DAT_CNTR */
317 #define UNIPERIF_CONFIG_USER_DAT_CNTR_SHIFT(ip) 2
318 #define UNIPERIF_CONFIG_USER_DAT_CNTR_MASK(ip) 0x1
319 #define GET_UNIPERIF_CONFIG_USER_DAT_CNTR(ip) \
320 	GET_UNIPERIF_REG(ip, \
321 		UNIPERIF_CONFIG_OFFSET(ip), \
322 		UNIPERIF_CONFIG_USER_DAT_CNTR_SHIFT(ip), \
323 		UNIPERIF_CONFIG_USER_DAT_CNTR_MASK(ip))
324 #define SET_UNIPERIF_CONFIG_USER_DAT_CNTR_BY_HW(ip) \
325 	SET_UNIPERIF_REG(ip, \
326 		UNIPERIF_CONFIG_OFFSET(ip), \
327 		UNIPERIF_CONFIG_USER_DAT_CNTR_SHIFT(ip), \
328 		UNIPERIF_CONFIG_USER_DAT_CNTR_MASK(ip), 1)
329 #define SET_UNIPERIF_CONFIG_USER_DAT_CNTR_BY_SW(ip) \
330 	SET_UNIPERIF_REG(ip, \
331 		UNIPERIF_CONFIG_OFFSET(ip), \
332 		UNIPERIF_CONFIG_USER_DAT_CNTR_SHIFT(ip), \
333 		UNIPERIF_CONFIG_USER_DAT_CNTR_MASK(ip), 0)
334 
335 /* VALIDITY_DAT_CNTR */
336 #define UNIPERIF_CONFIG_VALIDITY_DAT_CNTR_SHIFT(ip) 3
337 #define UNIPERIF_CONFIG_VALIDITY_DAT_CNTR_MASK(ip) 0x1
338 #define GET_UNIPERIF_CONFIG_VALIDITY_DAT_CNTR(ip) \
339 	GET_UNIPERIF_REG(ip, \
340 		UNIPERIF_CONFIG_OFFSET(ip), \
341 		UNIPERIF_CONFIG_VALIDITY_DAT_CNTR_SHIFT(ip), \
342 		UNIPERIF_CONFIG_VALIDITY_DAT_CNTR_MASK(ip))
343 #define SET_UNIPERIF_CONFIG_VALIDITY_DAT_CNTR_BY_SW(ip) \
344 	SET_UNIPERIF_REG(ip, \
345 		UNIPERIF_CONFIG_OFFSET(ip), \
346 		UNIPERIF_CONFIG_VALIDITY_DAT_CNTR_SHIFT(ip), \
347 		UNIPERIF_CONFIG_VALIDITY_DAT_CNTR_MASK(ip), 0)
348 #define SET_UNIPERIF_CONFIG_VALIDITY_DAT_CNTR_BY_HW(ip) \
349 	SET_UNIPERIF_REG(ip, \
350 		UNIPERIF_CONFIG_OFFSET(ip), \
351 		UNIPERIF_CONFIG_VALIDITY_DAT_CNTR_SHIFT(ip), \
352 		UNIPERIF_CONFIG_VALIDITY_DAT_CNTR_MASK(ip), 1)
353 
354 /* ONE_BIT_AUD_SUPPORT */
355 #define UNIPERIF_CONFIG_ONE_BIT_AUD_SHIFT(ip) 4
356 #define UNIPERIF_CONFIG_ONE_BIT_AUD_MASK(ip) 0x1
357 #define GET_UNIPERIF_CONFIG_ONE_BIT_AUD(ip) \
358 	GET_UNIPERIF_REG(ip, \
359 		UNIPERIF_CONFIG_OFFSET(ip), \
360 		UNIPERIF_CONFIG_ONE_BIT_AUD_SHIFT(ip), \
361 		UNIPERIF_CONFIG_ONE_BIT_AUD_MASK(ip))
362 #define SET_UNIPERIF_CONFIG_ONE_BIT_AUD_DISABLE(ip) \
363 	SET_UNIPERIF_REG(ip, \
364 		UNIPERIF_CONFIG_OFFSET(ip), \
365 		UNIPERIF_CONFIG_ONE_BIT_AUD_SHIFT(ip), \
366 		UNIPERIF_CONFIG_ONE_BIT_AUD_MASK(ip), 0)
367 #define SET_UNIPERIF_CONFIG_ONE_BIT_AUD_ENABLE(ip) \
368 	SET_UNIPERIF_REG(ip, \
369 		UNIPERIF_CONFIG_OFFSET(ip), \
370 		UNIPERIF_CONFIG_ONE_BIT_AUD_SHIFT(ip), \
371 		UNIPERIF_CONFIG_ONE_BIT_AUD_MASK(ip), 1)
372 
373 /* MEMORY_FMT */
374 #define UNIPERIF_CONFIG_MEM_FMT_SHIFT(ip) 5
375 #define UNIPERIF_CONFIG_MEM_FMT_MASK(ip) 0x1
376 #define VALUE_UNIPERIF_CONFIG_MEM_FMT_16_0(ip) 0
377 #define VALUE_UNIPERIF_CONFIG_MEM_FMT_16_16(ip) 1
378 #define GET_UNIPERIF_CONFIG_MEM_FMT(ip) \
379 	GET_UNIPERIF_REG(ip, \
380 		UNIPERIF_CONFIG_OFFSET(ip), \
381 		UNIPERIF_CONFIG_MEM_FMT_SHIFT(ip), \
382 		UNIPERIF_CONFIG_MEM_FMT_MASK(ip))
383 #define SET_UNIPERIF_CONFIG_MEM_FMT(ip, value)	\
384 	SET_UNIPERIF_REG(ip, \
385 		UNIPERIF_CONFIG_OFFSET(ip), \
386 		UNIPERIF_CONFIG_MEM_FMT_SHIFT(ip), \
387 		UNIPERIF_CONFIG_MEM_FMT_MASK(ip), value)
388 #define SET_UNIPERIF_CONFIG_MEM_FMT_16_0(ip)   \
389 	SET_UNIPERIF_CONFIG_MEM_FMT(ip, \
390 		VALUE_UNIPERIF_CONFIG_MEM_FMT_16_0(ip))
391 #define SET_UNIPERIF_CONFIG_MEM_FMT_16_16(ip) \
392 	SET_UNIPERIF_CONFIG_MEM_FMT(ip, \
393 		VALUE_UNIPERIF_CONFIG_MEM_FMT_16_16(ip))
394 
395 /* REPEAT_CHL_STS */
396 #define UNIPERIF_CONFIG_REPEAT_CHL_STS_SHIFT(ip) 6
397 #define UNIPERIF_CONFIG_REPEAT_CHL_STS_MASK(ip) 0x1
398 #define GET_UNIPERIF_CONFIG_REPEAT_CHL_STS(ip) \
399 	GET_UNIPERIF_REG(ip, \
400 		UNIPERIF_CONFIG_OFFSET(ip), \
401 		UNIPERIF_CONFIG_REPEAT_CHL_STS_SHIFT(ip), \
402 		UNIPERIF_CONFIG_REPEAT_CHL_STS_MASK(ip))
403 #define SET_UNIPERIF_CONFIG_REPEAT_CHL_STS_ENABLE(ip) \
404 	SET_UNIPERIF_REG(ip, \
405 		UNIPERIF_CONFIG_OFFSET(ip), \
406 		UNIPERIF_CONFIG_REPEAT_CHL_STS_SHIFT(ip), \
407 		UNIPERIF_CONFIG_REPEAT_CHL_STS_MASK(ip), 0)
408 #define SET_UNIPERIF_CONFIG_REPEAT_CHL_STS_DISABLE(ip) \
409 	SET_UNIPERIF_REG(ip, \
410 		UNIPERIF_CONFIG_OFFSET(ip), \
411 		UNIPERIF_CONFIG_REPEAT_CHL_STS_SHIFT(ip), \
412 		UNIPERIF_CONFIG_REPEAT_CHL_STS_MASK(ip), 1)
413 
414 /* BACK_STALL_REQ */
415 #define UNIPERIF_CONFIG_BACK_STALL_REQ_SHIFT(ip) \
416 	((ip)->ver < SND_ST_UNIPERIF_VERSION_UNI_PLR_TOP_1_0 ? 7 : -1)
417 #define UNIPERIF_CONFIG_BACK_STALL_REQ_MASK(ip) 0x1
418 #define GET_UNIPERIF_CONFIG_BACK_STALL_REQ(ip) \
419 	GET_UNIPERIF_REG(ip, \
420 		UNIPERIF_CONFIG_OFFSET(ip), \
421 		UNIPERIF_CONFIG_BACK_STALL_REQ_SHIFT(ip), \
422 		UNIPERIF_CONFIG_BACK_STALL_REQ_MASK(ip))
423 #define SET_UNIPERIF_CONFIG_BACK_STALL_REQ_DISABLE(ip) \
424 	SET_UNIPERIF_REG(ip, \
425 		UNIPERIF_CONFIG_OFFSET(ip), \
426 		UNIPERIF_CONFIG_BACK_STALL_REQ_SHIFT(ip), \
427 		UNIPERIF_CONFIG_BACK_STALL_REQ_MASK(ip), 0)
428 #define SET_UNIPERIF_CONFIG_BACK_STALL_REQ_ENABLE(ip) \
429 	SET_UNIPERIF_REG(ip, \
430 		UNIPERIF_CONFIG_OFFSET(ip), \
431 		UNIPERIF_CONFIG_BACK_STALL_REQ_SHIFT(ip), \
432 		UNIPERIF_CONFIG_BACK_STALL_REQ_MASK(ip), 1)
433 
434 /* FDMA_TRIGGER_LIMIT */
435 #define UNIPERIF_CONFIG_DMA_TRIG_LIMIT_SHIFT(ip) 8
436 #define UNIPERIF_CONFIG_DMA_TRIG_LIMIT_MASK(ip) 0x7F
437 #define GET_UNIPERIF_CONFIG_DMA_TRIG_LIMIT(ip) \
438 	GET_UNIPERIF_REG(ip, \
439 		UNIPERIF_CONFIG_OFFSET(ip), \
440 		UNIPERIF_CONFIG_DMA_TRIG_LIMIT_SHIFT(ip), \
441 		UNIPERIF_CONFIG_DMA_TRIG_LIMIT_MASK(ip))
442 #define SET_UNIPERIF_CONFIG_DMA_TRIG_LIMIT(ip, value) \
443 	SET_UNIPERIF_REG(ip, \
444 		UNIPERIF_CONFIG_OFFSET(ip), \
445 		UNIPERIF_CONFIG_DMA_TRIG_LIMIT_SHIFT(ip), \
446 		UNIPERIF_CONFIG_DMA_TRIG_LIMIT_MASK(ip), value)
447 
448 /* CHL_STS_UPDATE */
449 #define UNIPERIF_CONFIG_CHL_STS_UPDATE_SHIFT(ip) \
450 	((ip)->ver < SND_ST_UNIPERIF_VERSION_UNI_PLR_TOP_1_0 ? 16 : -1)
451 #define UNIPERIF_CONFIG_CHL_STS_UPDATE_MASK(ip) 0x1
452 #define GET_UNIPERIF_CONFIG_CHL_STS_UPDATE(ip) \
453 	GET_UNIPERIF_REG(ip, \
454 		UNIPERIF_CONFIG_OFFSET(ip),  \
455 		UNIPERIF_CONFIG_CHL_STS_UPDATE_SHIFT(ip), \
456 		UNIPERIF_CONFIG_CHL_STS_UPDATE_MASK(ip))
457 #define SET_UNIPERIF_CONFIG_CHL_STS_UPDATE(ip) \
458 	SET_UNIPERIF_REG(ip, \
459 		UNIPERIF_CONFIG_OFFSET(ip), \
460 		UNIPERIF_CONFIG_CHL_STS_UPDATE_SHIFT(ip), \
461 		UNIPERIF_CONFIG_CHL_STS_UPDATE_MASK(ip), 1)
462 
463 /* IDLE_MOD */
464 #define UNIPERIF_CONFIG_IDLE_MOD_SHIFT(ip) 18
465 #define UNIPERIF_CONFIG_IDLE_MOD_MASK(ip) 0x1
466 #define GET_UNIPERIF_CONFIG_IDLE_MOD(ip) \
467 	GET_UNIPERIF_REG(ip, \
468 		UNIPERIF_CONFIG_OFFSET(ip), \
469 		UNIPERIF_CONFIG_IDLE_MOD_SHIFT(ip), \
470 		UNIPERIF_CONFIG_IDLE_MOD_MASK(ip))
471 #define SET_UNIPERIF_CONFIG_IDLE_MOD_DISABLE(ip) \
472 	SET_UNIPERIF_REG(ip, \
473 		UNIPERIF_CONFIG_OFFSET(ip), \
474 		UNIPERIF_CONFIG_IDLE_MOD_SHIFT(ip), \
475 		UNIPERIF_CONFIG_IDLE_MOD_MASK(ip), 0)
476 #define SET_UNIPERIF_CONFIG_IDLE_MOD_ENABLE(ip) \
477 	SET_UNIPERIF_REG(ip, \
478 		UNIPERIF_CONFIG_OFFSET(ip), \
479 		UNIPERIF_CONFIG_IDLE_MOD_SHIFT(ip), \
480 		UNIPERIF_CONFIG_IDLE_MOD_MASK(ip), 1)
481 
482 /* SUBFRAME_SELECTION */
483 #define UNIPERIF_CONFIG_SUBFRAME_SEL_SHIFT(ip) 19
484 #define UNIPERIF_CONFIG_SUBFRAME_SEL_MASK(ip) 0x1
485 #define GET_UNIPERIF_CONFIG_SUBFRAME_SEL(ip) \
486 	GET_UNIPERIF_REG(ip, \
487 		UNIPERIF_CONFIG_OFFSET(ip), \
488 		UNIPERIF_CONFIG_SUBFRAME_SEL_SHIFT(ip), \
489 		UNIPERIF_CONFIG_SUBFRAME_SEL_MASK(ip))
490 #define SET_UNIPERIF_CONFIG_SUBFRAME_SEL_SUBF1_SUBF0(ip) \
491 	SET_UNIPERIF_REG(ip, \
492 		UNIPERIF_CONFIG_OFFSET(ip), \
493 		UNIPERIF_CONFIG_SUBFRAME_SEL_SHIFT(ip), \
494 		UNIPERIF_CONFIG_SUBFRAME_SEL_MASK(ip), 1)
495 #define SET_UNIPERIF_CONFIG_SUBFRAME_SEL_SUBF0_SUBF1(ip) \
496 	SET_UNIPERIF_REG(ip, \
497 		UNIPERIF_CONFIG_OFFSET(ip), \
498 		UNIPERIF_CONFIG_SUBFRAME_SEL_SHIFT(ip), \
499 		UNIPERIF_CONFIG_SUBFRAME_SEL_MASK(ip), 0)
500 
501 /* FULL_SW_CONTROL */
502 #define UNIPERIF_CONFIG_SPDIF_SW_CTRL_SHIFT(ip) 20
503 #define UNIPERIF_CONFIG_SPDIF_SW_CTRL_MASK(ip) 0x1
504 #define GET_UNIPERIF_CONFIG_SPDIF_SW_CTRL(ip) \
505 	GET_UNIPERIF_REG(ip, \
506 		UNIPERIF_CONFIG_OFFSET(ip), \
507 		UNIPERIF_CONFIG_SPDIF_SW_CTRL_SHIFT(ip), \
508 		UNIPERIF_CONFIG_SPDIF_SW_CTRL_MASK(ip))
509 #define SET_UNIPERIF_CONFIG_SPDIF_SW_CTRL_ENABLE(ip) \
510 	SET_UNIPERIF_REG(ip, \
511 		UNIPERIF_CONFIG_OFFSET(ip), \
512 		UNIPERIF_CONFIG_SPDIF_SW_CTRL_SHIFT(ip), \
513 		UNIPERIF_CONFIG_SPDIF_SW_CTRL_MASK(ip), 1)
514 #define SET_UNIPERIF_CONFIG_SPDIF_SW_CTRL_DISABLE(ip) \
515 	SET_UNIPERIF_REG(ip, \
516 		UNIPERIF_CONFIG_OFFSET(ip), \
517 		UNIPERIF_CONFIG_SPDIF_SW_CTRL_SHIFT(ip), \
518 		UNIPERIF_CONFIG_SPDIF_SW_CTRL_MASK(ip), 0)
519 
520 /* MASTER_CLKEDGE */
521 #define UNIPERIF_CONFIG_MSTR_CLKEDGE_SHIFT(ip) \
522 	((ip)->ver < SND_ST_UNIPERIF_VERSION_UNI_PLR_TOP_1_0 ? 24 : -1)
523 #define UNIPERIF_CONFIG_MSTR_CLKEDGE_MASK(ip) 0x1
524 #define GET_UNIPERIF_CONFIG_MSTR_CLKEDGE(ip) \
525 	GET_UNIPERIF_REG(ip, \
526 		UNIPERIF_CONFIG_OFFSET(ip), \
527 		UNIPERIF_CONFIG_MSTR_CLKEDGE_SHIFT(ip), \
528 		UNIPERIF_CONFIG_MSTR_CLKEDGE_MASK(ip))
529 #define SET_UNIPERIF_CONFIG_MSTR_CLKEDGE_FALLING(ip) \
530 	SET_UNIPERIF_REG(ip, \
531 		UNIPERIF_CONFIG_OFFSET(ip), \
532 		UNIPERIF_CONFIG_MSTR_CLKEDGE_SHIFT(ip), \
533 		UNIPERIF_CONFIG_MSTR_CLKEDGE_MASK(ip), 1)
534 #define SET_UNIPERIF_CONFIG_MSTR_CLKEDGE_RISING(ip) \
535 	SET_UNIPERIF_REG(ip, \
536 		UNIPERIF_CONFIG_OFFSET(ip), \
537 		UNIPERIF_CONFIG_MSTR_CLKEDGE_SHIFT(ip), \
538 		UNIPERIF_CONFIG_MSTR_CLKEDGE_MASK(ip), 0)
539 
540 /*
541  * UNIPERIF_CTRL reg
542  */
543 
544 #define UNIPERIF_CTRL_OFFSET(ip) 0x0044
545 #define GET_UNIPERIF_CTRL(ip) \
546 	readl_relaxed(ip->base + UNIPERIF_CTRL_OFFSET(ip))
547 #define SET_UNIPERIF_CTRL(ip, value) \
548 	writel_relaxed(value, ip->base + UNIPERIF_CTRL_OFFSET(ip))
549 
550 /* OPERATION */
551 #define UNIPERIF_CTRL_OPERATION_SHIFT(ip) 0
552 #define UNIPERIF_CTRL_OPERATION_MASK(ip) 0x7
553 #define GET_UNIPERIF_CTRL_OPERATION(ip) \
554 	GET_UNIPERIF_REG(ip, \
555 		UNIPERIF_CTRL_OFFSET(ip), \
556 		UNIPERIF_CTRL_OPERATION_SHIFT(ip), \
557 		UNIPERIF_CTRL_OPERATION_MASK(ip))
558 #define VALUE_UNIPERIF_CTRL_OPERATION_OFF(ip) 0
559 #define SET_UNIPERIF_CTRL_OPERATION_OFF(ip) \
560 	SET_UNIPERIF_REG(ip, \
561 		UNIPERIF_CTRL_OFFSET(ip), \
562 		UNIPERIF_CTRL_OPERATION_SHIFT(ip), \
563 		UNIPERIF_CTRL_OPERATION_MASK(ip), \
564 		VALUE_UNIPERIF_CTRL_OPERATION_OFF(ip))
565 #define VALUE_UNIPERIF_CTRL_OPERATION_MUTE_PCM_NULL(ip) \
566 	((ip)->ver < SND_ST_UNIPERIF_VERSION_UNI_PLR_TOP_1_0 ? 1 : -1)
567 #define SET_UNIPERIF_CTRL_OPERATION_MUTE_PCM_NULL(ip) \
568 	SET_UNIPERIF_REG(ip, \
569 		UNIPERIF_CTRL_OFFSET(ip), \
570 		UNIPERIF_CTRL_OPERATION_SHIFT(ip), \
571 		UNIPERIF_CTRL_OPERATION_MASK(ip), \
572 		VALUE_UNIPERIF_CTRL_OPERATION_MUTE_PCM_NULL(ip))
573 #define VALUE_UNIPERIF_CTRL_OPERATION_MUTE_PAUSE_BURST(ip) \
574 	((ip)->ver < SND_ST_UNIPERIF_VERSION_UNI_PLR_TOP_1_0 ? 2 : -1)
575 #define SET_UNIPERIF_CTRL_OPERATION_MUTE_PAUSE_BURST(ip) \
576 	SET_UNIPERIF_REG(ip, \
577 		UNIPERIF_CTRL_OFFSET(ip), \
578 		UNIPERIF_CTRL_OPERATION_SHIFT(ip), \
579 		UNIPERIF_CTRL_OPERATION_MASK(ip), \
580 		VALUE_UNIPERIF_CTRL_OPERATION_MUTE_PAUSE_BURST(ip))
581 #define VALUE_UNIPERIF_CTRL_OPERATION_PCM_DATA(ip) 3
582 #define SET_UNIPERIF_CTRL_OPERATION_PCM_DATA(ip) \
583 	SET_UNIPERIF_REG(ip, \
584 		UNIPERIF_CTRL_OFFSET(ip), \
585 		UNIPERIF_CTRL_OPERATION_SHIFT(ip), \
586 		UNIPERIF_CTRL_OPERATION_MASK(ip), \
587 		VALUE_UNIPERIF_CTRL_OPERATION_PCM_DATA(ip))
588 /* This is the same as above! */
589 #define VALUE_UNIPERIF_CTRL_OPERATION_AUDIO_DATA(ip) 3
590 #define SET_UNIPERIF_CTRL_OPERATION_AUDIO_DATA(ip) \
591 	SET_UNIPERIF_REG(ip, \
592 		UNIPERIF_CTRL_OFFSET(ip), \
593 		UNIPERIF_CTRL_OPERATION_SHIFT(ip), \
594 		UNIPERIF_CTRL_OPERATION_MASK(ip), \
595 		VALUE_UNIPERIF_CTRL_OPERATION_AUDIO_DATA(ip))
596 #define VALUE_UNIPERIF_CTRL_OPERATION_ENC_DATA(ip) 4
597 #define SET_UNIPERIF_CTRL_OPERATION_ENC_DATA(ip) \
598 	SET_UNIPERIF_REG(ip, \
599 		UNIPERIF_CTRL_OFFSET(ip), \
600 		UNIPERIF_CTRL_OPERATION_SHIFT(ip), \
601 		UNIPERIF_CTRL_OPERATION_MASK(ip), \
602 		VALUE_UNIPERIF_CTRL_OPERATION_ENC_DATA(ip))
603 #define VALUE_UNIPERIF_CTRL_OPERATION_CD_DATA(ip) \
604 	((ip)->ver < SND_ST_UNIPERIF_VERSION_UNI_PLR_TOP_1_0 ? 5 : -1)
605 #define SET_UNIPERIF_CTRL_OPERATION_CD_DATA(ip) \
606 	SET_UNIPERIF_REG(ip, \
607 		UNIPERIF_CTRL_OFFSET(ip), \
608 		UNIPERIF_CTRL_OPERATION_SHIFT(ip), \
609 		UNIPERIF_CTRL_OPERATION_MASK(ip), \
610 		VALUE_UNIPERIF_CTRL_OPERATION_CD_DATA(ip))
611 #define VALUE_UNIPERIF_CTRL_OPERATION_STANDBY(ip) \
612 	((ip)->ver < SND_ST_UNIPERIF_VERSION_UNI_PLR_TOP_1_0 ? -1 : 7)
613 #define SET_UNIPERIF_CTRL_OPERATION_STANDBY(ip) \
614 	SET_UNIPERIF_REG(ip, \
615 		UNIPERIF_CTRL_OFFSET(ip), \
616 		UNIPERIF_CTRL_OPERATION_SHIFT(ip), \
617 		UNIPERIF_CTRL_OPERATION_MASK(ip), \
618 		VALUE_UNIPERIF_CTRL_OPERATION_STANDBY(ip))
619 
620 /* EXIT_STBY_ON_EOBLOCK */
621 #define UNIPERIF_CTRL_EXIT_STBY_ON_EOBLOCK_SHIFT(ip) \
622 	((ip)->ver < SND_ST_UNIPERIF_VERSION_UNI_PLR_TOP_1_0 ? -1 : 3)
623 #define UNIPERIF_CTRL_EXIT_STBY_ON_EOBLOCK_MASK(ip) 0x1
624 #define GET_UNIPERIF_CTRL_EXIT_STBY_ON_EOBLOCK(ip) \
625 	GET_UNIPERIF_REG(ip, \
626 		UNIPERIF_CTRL_OFFSET(ip), \
627 		UNIPERIF_CTRL_EXIT_STBY_ON_EOBLOCK_SHIFT(ip), \
628 		UNIPERIF_CTRL_EXIT_STBY_ON_EOBLOCK_MASK(ip))
629 #define SET_UNIPERIF_CTRL_EXIT_STBY_ON_EOBLOCK_OFF(ip) \
630 	SET_UNIPERIF_REG(ip, \
631 		UNIPERIF_CTRL_OFFSET(ip), \
632 		UNIPERIF_CTRL_EXIT_STBY_ON_EOBLOCK_SHIFT(ip), \
633 		UNIPERIF_CTRL_EXIT_STBY_ON_EOBLOCK_MASK(ip), 0)
634 #define SET_UNIPERIF_CTRL_EXIT_STBY_ON_EOBLOCK_ON(ip) \
635 	SET_UNIPERIF_REG(ip, \
636 		UNIPERIF_CTRL_OFFSET(ip), \
637 		UNIPERIF_CTRL_EXIT_STBY_ON_EOBLOCK_SHIFT(ip), \
638 		UNIPERIF_CTRL_EXIT_STBY_ON_EOBLOCK_MASK(ip), 1)
639 
640 /* ROUNDING */
641 #define UNIPERIF_CTRL_ROUNDING_SHIFT(ip) 4
642 #define UNIPERIF_CTRL_ROUNDING_MASK(ip) 0x1
643 #define GET_UNIPERIF_CTRL_ROUNDING(ip) \
644 	GET_UNIPERIF_REG(ip, \
645 		UNIPERIF_CTRL_OFFSET(ip), \
646 		UNIPERIF_CTRL_ROUNDING_SHIFT(ip), \
647 		UNIPERIF_CTRL_ROUNDING_MASK(ip))
648 #define SET_UNIPERIF_CTRL_ROUNDING_OFF(ip) \
649 	SET_UNIPERIF_REG(ip, \
650 		UNIPERIF_CTRL_OFFSET(ip), \
651 		UNIPERIF_CTRL_ROUNDING_SHIFT(ip), \
652 		UNIPERIF_CTRL_ROUNDING_MASK(ip), 0)
653 #define SET_UNIPERIF_CTRL_ROUNDING_ON(ip) \
654 	SET_UNIPERIF_REG(ip, \
655 		UNIPERIF_CTRL_OFFSET(ip), \
656 		UNIPERIF_CTRL_ROUNDING_SHIFT(ip), \
657 		UNIPERIF_CTRL_ROUNDING_MASK(ip), 1)
658 
659 /* DIVIDER */
660 #define UNIPERIF_CTRL_DIVIDER_SHIFT(ip) 5
661 #define UNIPERIF_CTRL_DIVIDER_MASK(ip) 0xff
662 #define GET_UNIPERIF_CTRL_DIVIDER(ip) \
663 	GET_UNIPERIF_REG(ip, \
664 		UNIPERIF_CTRL_OFFSET(ip), \
665 		UNIPERIF_CTRL_DIVIDER_SHIFT(ip), \
666 		UNIPERIF_CTRL_DIVIDER_MASK(ip))
667 #define SET_UNIPERIF_CTRL_DIVIDER(ip, value) \
668 	SET_UNIPERIF_REG(ip, \
669 		UNIPERIF_CTRL_OFFSET(ip), \
670 		UNIPERIF_CTRL_DIVIDER_SHIFT(ip), \
671 		UNIPERIF_CTRL_DIVIDER_MASK(ip), value)
672 
673 /* BYTE_SWAP */
674 #define UNIPERIF_CTRL_BYTE_SWP_SHIFT(ip) \
675 	((ip)->ver < SND_ST_UNIPERIF_VERSION_UNI_PLR_TOP_1_0 ? 13 : -1)
676 #define UNIPERIF_CTRL_BYTE_SWP_MASK(ip) 0x1
677 #define GET_UNIPERIF_CTRL_BYTE_SWP(ip) \
678 	GET_UNIPERIF_REG(ip, \
679 		UNIPERIF_CTRL_OFFSET(ip), \
680 		UNIPERIF_CTRL_BYTE_SWP_SHIFT(ip), \
681 		UNIPERIF_CTRL_BYTE_SWP_MASK(ip))
682 #define SET_UNIPERIF_CTRL_BYTE_SWP_OFF(ip) \
683 	SET_UNIPERIF_REG(ip, \
684 		UNIPERIF_CTRL_OFFSET(ip), \
685 		UNIPERIF_CTRL_BYTE_SWP_SHIFT(ip), \
686 		UNIPERIF_CTRL_BYTE_SWP_MASK(ip), 0)
687 #define SET_UNIPERIF_CTRL_BYTE_SWP_ON(ip) \
688 	SET_UNIPERIF_REG(ip, \
689 		UNIPERIF_CTRL_OFFSET(ip), \
690 		UNIPERIF_CTRL_BYTE_SWP_SHIFT(ip), \
691 		UNIPERIF_CTRL_BYTE_SWP_MASK(ip), 1)
692 
693 /* ZERO_STUFFING_HW_SW */
694 #define UNIPERIF_CTRL_ZERO_STUFF_SHIFT(ip) \
695 	((ip)->ver < SND_ST_UNIPERIF_VERSION_UNI_PLR_TOP_1_0 ? 14 : -1)
696 #define UNIPERIF_CTRL_ZERO_STUFF_MASK(ip) 0x1
697 #define GET_UNIPERIF_CTRL_ZERO_STUFF(ip) \
698 	GET_UNIPERIF_REG(ip, \
699 		UNIPERIF_CTRL_OFFSET(ip), \
700 		UNIPERIF_CTRL_ZERO_STUFF_SHIFT(ip), \
701 		UNIPERIF_CTRL_ZERO_STUFF_MASK(ip))
702 #define SET_UNIPERIF_CTRL_ZERO_STUFF_HW(ip) \
703 	SET_UNIPERIF_REG(ip, \
704 		UNIPERIF_CTRL_OFFSET(ip), \
705 		UNIPERIF_CTRL_ZERO_STUFF_SHIFT(ip), \
706 		UNIPERIF_CTRL_ZERO_STUFF_MASK(ip), 1)
707 #define SET_UNIPERIF_CTRL_ZERO_STUFF_SW(ip) \
708 	SET_UNIPERIF_REG(ip, \
709 		UNIPERIF_CTRL_OFFSET(ip), \
710 		UNIPERIF_CTRL_ZERO_STUFF_SHIFT(ip), \
711 		UNIPERIF_CTRL_ZERO_STUFF_MASK(ip), 0)
712 
713 /* SPDIF_LAT */
714 #define UNIPERIF_CTRL_SPDIF_LAT_SHIFT(ip) \
715 	((ip)->ver < SND_ST_UNIPERIF_VERSION_UNI_PLR_TOP_1_0 ? 16 : -1)
716 #define UNIPERIF_CTRL_SPDIF_LAT_MASK(ip) 0x1
717 #define GET_UNIPERIF_CTRL_SPDIF_LAT(ip) \
718 	GET_UNIPERIF_REG(ip, \
719 		UNIPERIF_CTRL_OFFSET(ip), \
720 		UNIPERIF_CTRL_SPDIF_LAT_SHIFT(ip), \
721 		UNIPERIF_CTRL_SPDIF_LAT_MASK(ip))
722 #define SET_UNIPERIF_CTRL_SPDIF_LAT_ON(ip) \
723 	SET_UNIPERIF_REG(ip, \
724 		UNIPERIF_CTRL_OFFSET(ip), \
725 		UNIPERIF_CTRL_SPDIF_LAT_SHIFT(ip), \
726 		UNIPERIF_CTRL_SPDIF_LAT_MASK(ip), 1)
727 #define SET_UNIPERIF_CTRL_SPDIF_LAT_OFF(ip) \
728 	SET_UNIPERIF_REG(ip, \
729 		UNIPERIF_CTRL_OFFSET(ip), \
730 		UNIPERIF_CTRL_SPDIF_LAT_SHIFT(ip), \
731 		UNIPERIF_CTRL_SPDIF_LAT_MASK(ip), 0)
732 
733 /* EN_SPDIF_FORMATTING */
734 #define UNIPERIF_CTRL_SPDIF_FMT_SHIFT(ip) 17
735 #define UNIPERIF_CTRL_SPDIF_FMT_MASK(ip) 0x1
736 #define GET_UNIPERIF_CTRL_SPDIF_FMT(ip) \
737 	GET_UNIPERIF_REG(ip, \
738 		UNIPERIF_CTRL_OFFSET(ip), \
739 		UNIPERIF_CTRL_SPDIF_FMT_SHIFT(ip), \
740 		UNIPERIF_CTRL_SPDIF_FMT_MASK(ip))
741 #define SET_UNIPERIF_CTRL_SPDIF_FMT_ON(ip) \
742 	SET_UNIPERIF_REG(ip, \
743 		UNIPERIF_CTRL_OFFSET(ip), \
744 		UNIPERIF_CTRL_SPDIF_FMT_SHIFT(ip), \
745 		UNIPERIF_CTRL_SPDIF_FMT_MASK(ip), 1)
746 #define SET_UNIPERIF_CTRL_SPDIF_FMT_OFF(ip) \
747 	SET_UNIPERIF_REG(ip, \
748 		UNIPERIF_CTRL_OFFSET(ip), \
749 		UNIPERIF_CTRL_SPDIF_FMT_SHIFT(ip), \
750 		UNIPERIF_CTRL_SPDIF_FMT_MASK(ip), 0)
751 
752 /* READER_OUT_SELECT */
753 #define UNIPERIF_CTRL_READER_OUT_SEL_SHIFT(ip) \
754 	((ip)->ver < SND_ST_UNIPERIF_VERSION_UNI_PLR_TOP_1_0 ? 18 : -1)
755 #define UNIPERIF_CTRL_READER_OUT_SEL_MASK(ip) 0x1
756 #define GET_UNIPERIF_CTRL_READER_OUT_SEL(ip) \
757 	GET_UNIPERIF_REG(ip, \
758 		UNIPERIF_CTRL_OFFSET(ip), \
759 		UNIPERIF_CTRL_READER_OUT_SEL_SHIFT(ip), \
760 		UNIPERIF_CTRL_READER_OUT_SEL_MASK(ip))
761 #define SET_UNIPERIF_CTRL_READER_OUT_SEL_IN_MEM(ip) \
762 	SET_UNIPERIF_REG(ip, \
763 		UNIPERIF_CTRL_OFFSET(ip), \
764 		UNIPERIF_CTRL_READER_OUT_SEL_SHIFT(ip), \
765 		UNIPERIF_CTRL_READER_OUT_SEL_MASK(ip), 0)
766 #define SET_UNIPERIF_CTRL_READER_OUT_SEL_ON_I2S_LINE(ip) \
767 	SET_UNIPERIF_REG(ip, \
768 		UNIPERIF_CTRL_OFFSET(ip), \
769 		UNIPERIF_CTRL_READER_OUT_SEL_SHIFT(ip), \
770 		UNIPERIF_CTRL_READER_OUT_SEL_MASK(ip), 1)
771 
772 /* UNDERFLOW_REC_WINDOW */
773 #define UNIPERIF_CTRL_UNDERFLOW_REC_WINDOW_SHIFT(ip) 20
774 #define UNIPERIF_CTRL_UNDERFLOW_REC_WINDOW_MASK(ip) 0xff
775 #define GET_UNIPERIF_CTRL_UNDERFLOW_REC_WINDOW(ip) \
776 	GET_UNIPERIF_REG(ip, \
777 		UNIPERIF_CTRL_OFFSET(ip), \
778 		UNIPERIF_CTRL_UNDERFLOW_REC_WINDOW_SHIFT(ip), \
779 		UNIPERIF_CTRL_UNDERFLOW_REC_WINDOW_MASK(ip))
780 #define SET_UNIPERIF_CTRL_UNDERFLOW_REC_WINDOW(ip, value) \
781 	SET_UNIPERIF_REG(ip, \
782 		UNIPERIF_CTRL_OFFSET(ip), \
783 		UNIPERIF_CTRL_UNDERFLOW_REC_WINDOW_SHIFT(ip), \
784 		UNIPERIF_CTRL_UNDERFLOW_REC_WINDOW_MASK(ip), value)
785 
786 /*
787  * UNIPERIF_I2S_FMT a.k.a UNIPERIF_FORMAT reg
788  */
789 
790 #define UNIPERIF_I2S_FMT_OFFSET(ip) 0x0048
791 #define GET_UNIPERIF_I2S_FMT(ip) \
792 	readl_relaxed(ip->base + UNIPERIF_I2S_FMT_OFFSET(ip))
793 #define SET_UNIPERIF_I2S_FMT(ip, value) \
794 	writel_relaxed(value, ip->base + UNIPERIF_I2S_FMT_OFFSET(ip))
795 
796 /* NBIT */
797 #define UNIPERIF_I2S_FMT_NBIT_SHIFT(ip) 0
798 #define UNIPERIF_I2S_FMT_NBIT_MASK(ip) 0x1
799 #define GET_UNIPERIF_I2S_FMT_NBIT(ip) \
800 	GET_UNIPERIF_REG(ip, \
801 		UNIPERIF_I2S_FMT_OFFSET(ip), \
802 		UNIPERIF_I2S_FMT_NBIT_SHIFT(ip), \
803 		UNIPERIF_I2S_FMT_NBIT_MASK(ip))
804 #define SET_UNIPERIF_I2S_FMT_NBIT_32(ip) \
805 	SET_UNIPERIF_REG(ip, \
806 		UNIPERIF_I2S_FMT_OFFSET(ip), \
807 		UNIPERIF_I2S_FMT_NBIT_SHIFT(ip), \
808 		UNIPERIF_I2S_FMT_NBIT_MASK(ip), 0)
809 #define SET_UNIPERIF_I2S_FMT_NBIT_16(ip) \
810 	SET_UNIPERIF_REG(ip, \
811 		UNIPERIF_I2S_FMT_OFFSET(ip), \
812 		UNIPERIF_I2S_FMT_NBIT_SHIFT(ip), \
813 		UNIPERIF_I2S_FMT_NBIT_MASK(ip), 1)
814 
815 /* DATA_SIZE */
816 #define UNIPERIF_I2S_FMT_DATA_SIZE_SHIFT(ip) 1
817 #define UNIPERIF_I2S_FMT_DATA_SIZE_MASK(ip) 0x7
818 #define GET_UNIPERIF_I2S_FMT_DATA_SIZE(ip) \
819 	GET_UNIPERIF_REG(ip, \
820 		UNIPERIF_I2S_FMT_OFFSET(ip), \
821 		UNIPERIF_I2S_FMT_DATA_SIZE_SHIFT(ip), \
822 		UNIPERIF_I2S_FMT_DATA_SIZE_MASK(ip))
823 #define SET_UNIPERIF_I2S_FMT_DATA_SIZE_16(ip) \
824 	SET_UNIPERIF_REG(ip, \
825 		UNIPERIF_I2S_FMT_OFFSET(ip), \
826 		UNIPERIF_I2S_FMT_DATA_SIZE_SHIFT(ip), \
827 		UNIPERIF_I2S_FMT_DATA_SIZE_MASK(ip), 0)
828 #define SET_UNIPERIF_I2S_FMT_DATA_SIZE_18(ip) \
829 	SET_UNIPERIF_REG(ip, \
830 		UNIPERIF_I2S_FMT_OFFSET(ip), \
831 		UNIPERIF_I2S_FMT_DATA_SIZE_SHIFT(ip), \
832 		UNIPERIF_I2S_FMT_DATA_SIZE_MASK(ip), 1)
833 #define SET_UNIPERIF_I2S_FMT_DATA_SIZE_20(ip) \
834 	SET_UNIPERIF_REG(ip, \
835 		UNIPERIF_I2S_FMT_OFFSET(ip), \
836 		UNIPERIF_I2S_FMT_DATA_SIZE_SHIFT(ip), \
837 		UNIPERIF_I2S_FMT_DATA_SIZE_MASK(ip), 2)
838 #define SET_UNIPERIF_I2S_FMT_DATA_SIZE_24(ip) \
839 	SET_UNIPERIF_REG(ip, \
840 		UNIPERIF_I2S_FMT_OFFSET(ip), \
841 		UNIPERIF_I2S_FMT_DATA_SIZE_SHIFT(ip), \
842 		UNIPERIF_I2S_FMT_DATA_SIZE_MASK(ip), 3)
843 #define SET_UNIPERIF_I2S_FMTL_DATA_SIZE_28(ip) \
844 	SET_UNIPERIF_REG(ip, \
845 		UNIPERIF_I2S_FMT_OFFSET(ip), \
846 		UNIPERIF_I2S_FMT_DATA_SIZE_SHIFT(ip), \
847 		UNIPERIF_I2S_FMT_DATA_SIZE_MASK(ip), 4)
848 #define SET_UNIPERIF_I2S_FMT_DATA_SIZE_32(ip) \
849 	SET_UNIPERIF_REG(ip, \
850 		UNIPERIF_I2S_FMT_OFFSET(ip), \
851 		UNIPERIF_I2S_FMT_DATA_SIZE_SHIFT(ip), \
852 		UNIPERIF_I2S_FMT_DATA_SIZE_MASK(ip), 5)
853 
854 /* LR_POL */
855 #define UNIPERIF_I2S_FMT_LR_POL_SHIFT(ip) 4
856 #define UNIPERIF_I2S_FMT_LR_POL_MASK(ip) 0x1
857 #define VALUE_UNIPERIF_I2S_FMT_LR_POL_LOW(ip) 0x0
858 #define VALUE_UNIPERIF_I2S_FMT_LR_POL_HIG(ip) 0x1
859 #define GET_UNIPERIF_I2S_FMT_LR_POL(ip) \
860 	GET_UNIPERIF_REG(ip, \
861 		UNIPERIF_I2S_FMT_OFFSET(ip), \
862 		UNIPERIF_I2S_FMT_LR_POL_SHIFT(ip), \
863 		UNIPERIF_I2S_FMT_LR_POL_MASK(ip))
864 #define SET_UNIPERIF_I2S_FMT_LR_POL(ip, value) \
865 	SET_UNIPERIF_REG(ip, \
866 		UNIPERIF_I2S_FMT_OFFSET(ip), \
867 		UNIPERIF_I2S_FMT_LR_POL_SHIFT(ip), \
868 		UNIPERIF_I2S_FMT_LR_POL_MASK(ip), value)
869 #define SET_UNIPERIF_I2S_FMT_LR_POL_LOW(ip) \
870 	SET_UNIPERIF_I2S_FMT_LR_POL(ip, \
871 		VALUE_UNIPERIF_I2S_FMT_LR_POL_LOW(ip))
872 #define SET_UNIPERIF_I2S_FMT_LR_POL_HIG(ip) \
873 	SET_UNIPERIF_I2S_FMT_LR_POL(ip, \
874 		VALUE_UNIPERIF_I2S_FMT_LR_POL_HIG(ip))
875 
876 /* SCLK_EDGE */
877 #define UNIPERIF_I2S_FMT_SCLK_EDGE_SHIFT(ip) 5
878 #define UNIPERIF_I2S_FMT_SCLK_EDGE_MASK(ip) 0x1
879 #define GET_UNIPERIF_I2S_FMT_SCLK_EDGE(ip) \
880 	GET_UNIPERIF_REG(ip, \
881 		UNIPERIF_I2S_FMT_OFFSET(ip), \
882 		UNIPERIF_I2S_FMT_SCLK_EDGE_SHIFT(ip), \
883 		UNIPERIF_I2S_FMT_SCLK_EDGE_MASK(ip))
884 #define SET_UNIPERIF_I2S_FMT_SCLK_EDGE_RISING(ip) \
885 	SET_UNIPERIF_REG(ip, \
886 		UNIPERIF_I2S_FMT_OFFSET(ip), \
887 		UNIPERIF_I2S_FMT_SCLK_EDGE_SHIFT(ip), \
888 		UNIPERIF_I2S_FMT_SCLK_EDGE_MASK(ip), 0)
889 #define SET_UNIPERIF_I2S_FMT_SCLK_EDGE_FALLING(ip) \
890 	SET_UNIPERIF_REG(ip, \
891 		UNIPERIF_I2S_FMT_OFFSET(ip), \
892 		UNIPERIF_I2S_FMT_SCLK_EDGE_SHIFT(ip), \
893 		UNIPERIF_I2S_FMT_SCLK_EDGE_MASK(ip), 1)
894 
895 /* PADDING */
896 #define UNIPERIF_I2S_FMT_PADDING_SHIFT(ip) 6
897 #define UNIPERIF_I2S_FMT_PADDING_MASK(ip) 0x1
898 #define UNIPERIF_I2S_FMT_PADDING_MASK(ip) 0x1
899 #define VALUE_UNIPERIF_I2S_FMT_PADDING_I2S_MODE(ip) 0x0
900 #define VALUE_UNIPERIF_I2S_FMT_PADDING_SONY_MODE(ip) 0x1
901 #define GET_UNIPERIF_I2S_FMT_PADDING(ip) \
902 	GET_UNIPERIF_REG(ip, \
903 		UNIPERIF_I2S_FMT_OFFSET(ip), \
904 		UNIPERIF_I2S_FMT_PADDING_SHIFT(ip), \
905 		UNIPERIF_I2S_FMT_PADDING_MASK(ip))
906 #define SET_UNIPERIF_I2S_FMT_PADDING(ip, value) \
907 	SET_UNIPERIF_REG(ip, \
908 		UNIPERIF_I2S_FMT_OFFSET(ip), \
909 		UNIPERIF_I2S_FMT_PADDING_SHIFT(ip), \
910 		UNIPERIF_I2S_FMT_PADDING_MASK(ip), value)
911 #define SET_UNIPERIF_I2S_FMT_PADDING_I2S_MODE(ip) \
912 	SET_UNIPERIF_I2S_FMT_PADDING(ip, \
913 		VALUE_UNIPERIF_I2S_FMT_PADDING_I2S_MODE(ip))
914 #define SET_UNIPERIF_I2S_FMT_PADDING_SONY_MODE(ip) \
915 	SET_UNIPERIF_I2S_FMT_PADDING(ip, \
916 		VALUE_UNIPERIF_I2S_FMT_PADDING_SONY_MODE(ip))
917 
918 /* ALIGN */
919 #define UNIPERIF_I2S_FMT_ALIGN_SHIFT(ip) 7
920 #define UNIPERIF_I2S_FMT_ALIGN_MASK(ip) 0x1
921 #define GET_UNIPERIF_I2S_FMT_ALIGN(ip) \
922 	GET_UNIPERIF_REG(ip, \
923 		UNIPERIF_I2S_FMT_OFFSET(ip), \
924 		UNIPERIF_I2S_FMT_ALIGN_SHIFT(ip), \
925 		UNIPERIF_I2S_FMT_ALIGN_MASK(ip))
926 #define SET_UNIPERIF_I2S_FMT_ALIGN_LEFT(ip) \
927 	SET_UNIPERIF_REG(ip, \
928 		UNIPERIF_I2S_FMT_OFFSET(ip), \
929 		UNIPERIF_I2S_FMT_ALIGN_SHIFT(ip), \
930 		UNIPERIF_I2S_FMT_ALIGN_MASK(ip), 0)
931 #define SET_UNIPERIF_I2S_FMT_ALIGN_RIGHT(ip) \
932 	SET_UNIPERIF_REG(ip, \
933 		UNIPERIF_I2S_FMT_OFFSET(ip), \
934 		UNIPERIF_I2S_FMT_ALIGN_SHIFT(ip), \
935 		UNIPERIF_I2S_FMT_ALIGN_MASK(ip), 1)
936 
937 /* ORDER */
938 #define UNIPERIF_I2S_FMT_ORDER_SHIFT(ip) 8
939 #define UNIPERIF_I2S_FMT_ORDER_MASK(ip) 0x1
940 #define GET_UNIPERIF_I2S_FMT_ORDER(ip) \
941 	GET_UNIPERIF_REG(ip, \
942 		UNIPERIF_I2S_FMT_OFFSET(ip), \
943 		UNIPERIF_I2S_FMT_ORDER_SHIFT(ip), \
944 		UNIPERIF_I2S_FMT_ORDER_MASK(ip))
945 #define SET_UNIPERIF_I2S_FMT_ORDER_LSB(ip) \
946 	SET_UNIPERIF_REG(ip, \
947 		UNIPERIF_I2S_FMT_OFFSET(ip), \
948 		UNIPERIF_I2S_FMT_ORDER_SHIFT(ip), \
949 		UNIPERIF_I2S_FMT_ORDER_MASK(ip), 0)
950 #define SET_UNIPERIF_I2S_FMT_ORDER_MSB(ip) \
951 	SET_UNIPERIF_REG(ip, \
952 		UNIPERIF_I2S_FMT_OFFSET(ip), \
953 		UNIPERIF_I2S_FMT_ORDER_SHIFT(ip), \
954 		UNIPERIF_I2S_FMT_ORDER_MASK(ip), 1)
955 
956 /* NUM_CH */
957 #define UNIPERIF_I2S_FMT_NUM_CH_SHIFT(ip) 9
958 #define UNIPERIF_I2S_FMT_NUM_CH_MASK(ip) 0x7
959 #define GET_UNIPERIF_I2S_FMT_NUM_CH(ip) \
960 	GET_UNIPERIF_REG(ip, \
961 		UNIPERIF_I2S_FMT_OFFSET(ip), \
962 		UNIPERIF_I2S_FMT_NUM_CH_SHIFT(ip), \
963 		UNIPERIF_I2S_FMT_NUM_CH_MASK(ip))
964 #define SET_UNIPERIF_I2S_FMT_NUM_CH(ip, value) \
965 	SET_UNIPERIF_REG(ip, \
966 		UNIPERIF_I2S_FMT_OFFSET(ip), \
967 		UNIPERIF_I2S_FMT_NUM_CH_SHIFT(ip), \
968 		UNIPERIF_I2S_FMT_NUM_CH_MASK(ip), value)
969 
970 /* NO_OF_SAMPLES_TO_READ */
971 #define UNIPERIF_I2S_FMT_NO_OF_SAMPLES_TO_READ_SHIFT(ip) 12
972 #define UNIPERIF_I2S_FMT_NO_OF_SAMPLES_TO_READ_MASK(ip) 0xfffff
973 #define GET_UNIPERIF_I2S_FMT_NO_OF_SAMPLES_TO_READ(ip) \
974 	GET_UNIPERIF_REG(ip, \
975 		UNIPERIF_I2S_FMT_OFFSET(ip), \
976 		UNIPERIF_I2S_FMT_NO_OF_SAMPLES_TO_READ_SHIFT(ip), \
977 		UNIPERIF_I2S_FMT_NO_OF_SAMPLES_TO_READ_MASK(ip))
978 #define SET_UNIPERIF_I2S_FMT_NO_OF_SAMPLES_TO_READ(ip, value) \
979 	SET_UNIPERIF_REG(ip, \
980 		UNIPERIF_I2S_FMT_OFFSET(ip), \
981 		UNIPERIF_I2S_FMT_NO_OF_SAMPLES_TO_READ_SHIFT(ip), \
982 		UNIPERIF_I2S_FMT_NO_OF_SAMPLES_TO_READ_MASK(ip), value)
983 
984 /*
985  * UNIPERIF_BIT_CONTROL reg
986  */
987 
988 #define UNIPERIF_BIT_CONTROL_OFFSET(ip)  \
989 	((ip)->ver < SND_ST_UNIPERIF_VERSION_UNI_PLR_TOP_1_0 ? -1 : 0x004c)
990 #define GET_UNIPERIF_BIT_CONTROL(ip) \
991 	readl_relaxed(ip->base + UNIPERIF_BIT_CONTROL_OFFSET(ip))
992 #define SET_UNIPERIF_BIT_CONTROL(ip, value) \
993 	writel_relaxed(value, ip->base + UNIPERIF_BIT_CONTROL_OFFSET(ip))
994 
995 /* CLR_UNDERFLOW_DURATION */
996 #define UNIPERIF_BIT_CONTROL_CLR_UNDERFLOW_DURATION_SHIFT(ip) 0
997 #define UNIPERIF_BIT_CONTROL_CLR_UNDERFLOW_DURATION_MASK(ip) 0x1
998 #define GET_UNIPERIF_BIT_CONTROL_CLR_UNDERFLOW_DURATION(ip) \
999 	GET_UNIPERIF_REG(ip, \
1000 		UNIPERIF_BIT_CONTROL_OFFSET(ip), \
1001 		UNIPERIF_BIT_CONTROL_CLR_UNDERFLOW_DURATION_SHIFT(ip), \
1002 		UNIPERIF_BIT_CONTROL_CLR_UNDERFLOW_DURATION_MASK(ip))
1003 #define SET_UNIPERIF_BIT_CONTROL_CLR_UNDERFLOW_DURATION(ip) \
1004 	SET_UNIPERIF_REG(ip, \
1005 		UNIPERIF_BIT_CONTROL_OFFSET(ip), \
1006 		UNIPERIF_BIT_CONTROL_CLR_UNDERFLOW_DURATION_SHIFT(ip), \
1007 		UNIPERIF_BIT_CONTROL_CLR_UNDERFLOW_DURATION_MASK(ip), 1)
1008 
1009 /* CHL_STS_UPDATE */
1010 #define UNIPERIF_BIT_CONTROL_CHL_STS_UPDATE_SHIFT(ip) 1
1011 #define UNIPERIF_BIT_CONTROL_CHL_STS_UPDATE_MASK(ip) 0x1
1012 #define GET_UNIPERIF_BIT_CONTROL_CHL_STS_UPDATE(ip) \
1013 	GET_UNIPERIF_REG(ip, \
1014 		UNIPERIF_BIT_CONTROL_OFFSET(ip), \
1015 		UNIPERIF_BIT_CONTROL_CHL_STS_UPDATE_SHIFT(ip), \
1016 		UNIPERIF_BIT_CONTROL_CHL_STS_UPDATE_MASK(ip))
1017 #define SET_UNIPERIF_BIT_CONTROL_CHL_STS_UPDATE(ip) \
1018 	SET_UNIPERIF_BIT_REG(ip, \
1019 		UNIPERIF_BIT_CONTROL_OFFSET(ip), \
1020 		UNIPERIF_BIT_CONTROL_CHL_STS_UPDATE_SHIFT(ip), \
1021 		UNIPERIF_BIT_CONTROL_CHL_STS_UPDATE_MASK(ip), 1)
1022 
1023 /*
1024  * UNIPERIF_STATUS_1 reg
1025  */
1026 
1027 #define UNIPERIF_STATUS_1_OFFSET(ip) 0x0050
1028 #define GET_UNIPERIF_STATUS_1(ip) \
1029 	readl_relaxed(ip->base + UNIPERIF_STATUS_1_OFFSET(ip))
1030 #define SET_UNIPERIF_STATUS_1(ip, value) \
1031 	writel_relaxed(value, ip->base + UNIPERIF_STATUS_1_OFFSET(ip))
1032 
1033 /* UNDERFLOW_DURATION */
1034 #define UNIPERIF_STATUS_1_UNDERFLOW_DURATION_SHIFT(ip) \
1035 	((ip)->ver < SND_ST_UNIPERIF_VERSION_UNI_PLR_TOP_1_0 ? -1 : 0)
1036 #define UNIPERIF_STATUS_1_UNDERFLOW_DURATION_MASK(ip) 0xff
1037 #define GET_UNIPERIF_STATUS_1_UNDERFLOW_DURATION(ip) \
1038 	GET_UNIPERIF_REG(ip, \
1039 		UNIPERIF_STATUS_1_OFFSET(ip), \
1040 		UNIPERIF_STATUS_1_UNDERFLOW_DURATION_SHIFT(ip), \
1041 		UNIPERIF_STATUS_1_UNDERFLOW_DURATION_MASK(ip))
1042 #define SET_UNIPERIF_STATUS_1_UNDERFLOW_DURATION(ip, value) \
1043 	SET_UNIPERIF_REG(ip, \
1044 		UNIPERIF_STATUS_1_OFFSET(ip), \
1045 		UNIPERIF_STATUS_1_UNDERFLOW_DURATION_SHIFT(ip), \
1046 		UNIPERIF_STATUS_1_UNDERFLOW_DURATION_MASK(ip), value)
1047 
1048 /*
1049  * UNIPERIF_CHANNEL_STA_REGN reg
1050  */
1051 
1052 #define UNIPERIF_CHANNEL_STA_REGN(ip, n) (0x0060 + (4 * n))
1053 #define GET_UNIPERIF_CHANNEL_STA_REGN(ip) \
1054 	readl_relaxed(ip->base + UNIPERIF_CHANNEL_STA_REGN(ip, n))
1055 #define SET_UNIPERIF_CHANNEL_STA_REGN(ip, n, value) \
1056 	writel_relaxed(value, ip->base + \
1057 			UNIPERIF_CHANNEL_STA_REGN(ip, n))
1058 
1059 /*
1060  * UNIPERIF_USER_VALIDITY reg
1061  */
1062 
1063 #define UNIPERIF_USER_VALIDITY_OFFSET(ip) 0x0090
1064 #define GET_UNIPERIF_USER_VALIDITY(ip) \
1065 	readl_relaxed(ip->base + UNIPERIF_USER_VALIDITY_OFFSET(ip))
1066 #define SET_UNIPERIF_USER_VALIDITY(ip, value) \
1067 	writel_relaxed(value, ip->base + UNIPERIF_USER_VALIDITY_OFFSET(ip))
1068 
1069 /* VALIDITY_LEFT_AND_RIGHT */
1070 #define UNIPERIF_USER_VALIDITY_VALIDITY_LR_SHIFT(ip) 0
1071 #define UNIPERIF_USER_VALIDITY_VALIDITY_LR_MASK(ip) 0x3
1072 #define GET_UNIPERIF_USER_VALIDITY_VALIDITY_LR(ip) \
1073 	GET_UNIPERIF_REG(ip, \
1074 		UNIPERIF_USER_VALIDITY_OFFSET(ip), \
1075 		UNIPERIF_USER_VALIDITY_VALIDITY_LR_SHIFT(ip), \
1076 		UNIPERIF_USER_VALIDITY_VALIDITY_LR_MASK(ip))
1077 #define SET_UNIPERIF_USER_VALIDITY_VALIDITY_LR(ip, value) \
1078 	SET_UNIPERIF_REG(ip, \
1079 		UNIPERIF_USER_VALIDITY_OFFSET(ip), \
1080 		UNIPERIF_USER_VALIDITY_VALIDITY_LR_SHIFT(ip), \
1081 		UNIPERIF_USER_VALIDITY_VALIDITY_LR_MASK(ip), \
1082 		value ? 0x3 : 0)
1083 
1084 /*
1085  * UNIPERIF_DBG_STANDBY_LEFT_SP reg
1086  */
1087 #define UNIPERIF_DBG_STANDBY_LEFT_SP_OFFSET(ip) 0x0150
1088 #define UNIPERIF_DBG_STANDBY_LEFT_SP_SHIFT(ip) \
1089 	((ip)->ver < SND_ST_UNIPERIF_VERSION_UNI_PLR_TOP_1_0 ? -1 : 0)
1090 #define UNIPERIF_DBG_STANDBY_LEFT_SP_MASK(ip) \
1091 	((ip)->ver < SND_ST_UNIPERIF_VERSION_UNI_PLR_TOP_1_0 ? 0 : 0xFFFFFF)
1092 #define GET_UNIPERIF_DBG_STANDBY_LEFT_SP(ip) \
1093 	GET_UNIPERIF_REG(ip, \
1094 		UNIPERIF_DBG_STANDBY_LEFT_SP_OFFSET(ip), \
1095 		UNIPERIF_DBG_STANDBY_LEFT_SP_SHIFT(ip), \
1096 		UNIPERIF_DBG_STANDBY_LEFT_SP_MASK(ip))
1097 #define SET_UNIPERIF_DBG_STANDBY_LEFT_SP(ip, value) \
1098 	SET_UNIPERIF_REG(ip, \
1099 		UNIPERIF_DBG_STANDBY_LEFT_SP_OFFSET(ip), \
1100 		UNIPERIF_DBG_STANDBY_LEFT_SP_SHIFT(ip), \
1101 		UNIPERIF_DBG_STANDBY_LEFT_SP_MASK(ip), value)
1102 
1103 /*
1104  * UNIPERIF_TDM_ENABLE
1105  */
1106 #define UNIPERIF_TDM_ENABLE_OFFSET(ip) 0x0118
1107 #define GET_UNIPERIF_TDM_ENABLE(ip) \
1108 	readl_relaxed(ip->base + UNIPERIF_TDM_ENABLE_OFFSET(ip))
1109 #define SET_UNIPERIF_TDM_ENABLE(ip, value) \
1110 	writel_relaxed(value, ip->base + UNIPERIF_TDM_ENABLE_OFFSET(ip))
1111 
1112 /* TDM_ENABLE */
1113 #define UNIPERIF_TDM_ENABLE_EN_TDM_SHIFT(ip) 0x0
1114 #define UNIPERIF_TDM_ENABLE_EN_TDM_MASK(ip) 0x1
1115 #define GET_UNIPERIF_TDM_ENABLE_EN_TDM(ip) \
1116 		GET_UNIPERIF_REG(ip, \
1117 		UNIPERIF_TDM_ENABLE_OFFSET(ip), \
1118 		UNIPERIF_TDM_ENABLE_EN_TDM_SHIFT(ip), \
1119 		UNIPERIF_TDM_ENABLE_EN_TDM_MASK(ip))
1120 #define SET_UNIPERIF_TDM_ENABLE_TDM_ENABLE(ip) \
1121 		SET_UNIPERIF_REG(ip, \
1122 		UNIPERIF_TDM_ENABLE_OFFSET(ip), \
1123 		UNIPERIF_TDM_ENABLE_EN_TDM_SHIFT(ip), \
1124 		UNIPERIF_TDM_ENABLE_EN_TDM_MASK(ip), 1)
1125 #define SET_UNIPERIF_TDM_ENABLE_TDM_DISABLE(ip) \
1126 		SET_UNIPERIF_REG(ip, \
1127 		UNIPERIF_TDM_ENABLE_OFFSET(ip), \
1128 		UNIPERIF_TDM_ENABLE_EN_TDM_SHIFT(ip), \
1129 		UNIPERIF_TDM_ENABLE_EN_TDM_MASK(ip), 0)
1130 
1131 /*
1132  * UNIPERIF_TDM_FS_REF_FREQ
1133  */
1134 #define UNIPERIF_TDM_FS_REF_FREQ_OFFSET(ip) 0x011c
1135 #define GET_UNIPERIF_TDM_FS_REF_FREQ(ip) \
1136 	readl_relaxed(ip->base + UNIPERIF_TDM_FS_REF_FREQ_OFFSET(ip))
1137 #define SET_UNIPERIF_TDM_FS_REF_FREQ(ip, value) \
1138 	writel_relaxed(value, ip->base + \
1139 			UNIPERIF_TDM_FS_REF_FREQ_OFFSET(ip))
1140 
1141 /* REF_FREQ */
1142 #define UNIPERIF_TDM_FS_REF_FREQ_REF_FREQ_SHIFT(ip) 0x0
1143 #define VALUE_UNIPERIF_TDM_FS_REF_FREQ_8KHZ(ip) 0
1144 #define VALUE_UNIPERIF_TDM_FS_REF_FREQ_16KHZ(ip) 1
1145 #define VALUE_UNIPERIF_TDM_FS_REF_FREQ_32KHZ(ip) 2
1146 #define VALUE_UNIPERIF_TDM_FS_REF_FREQ_48KHZ(ip) 3
1147 #define UNIPERIF_TDM_FS_REF_FREQ_REF_FREQ_MASK(ip) 0x3
1148 #define GET_UNIPERIF_TDM_FS_REF_FREQ_REF_FREQ(ip) \
1149 		GET_UNIPERIF_REG(ip, \
1150 		UNIPERIF_TDM_FS_REF_FREQ_OFFSET(ip), \
1151 		UNIPERIF_TDM_FS_REF_FREQ_REF_FREQ_SHIFT(ip), \
1152 		UNIPERIF_TDM_FS_REF_FREQ_REF_FREQ_MASK(ip))
1153 #define SET_UNIPERIF_TDM_FS_REF_FREQ_8KHZ(ip) \
1154 		SET_UNIPERIF_REG(ip, \
1155 		UNIPERIF_TDM_FS_REF_FREQ_OFFSET(ip), \
1156 		UNIPERIF_TDM_FS_REF_FREQ_REF_FREQ_SHIFT(ip), \
1157 		UNIPERIF_TDM_FS_REF_FREQ_REF_FREQ_MASK(ip), \
1158 		VALUE_UNIPERIF_TDM_FS_REF_FREQ_8KHZ(ip))
1159 #define SET_UNIPERIF_TDM_FS_REF_FREQ_16KHZ(ip) \
1160 		SET_UNIPERIF_REG(ip, \
1161 		UNIPERIF_TDM_FS_REF_FREQ_OFFSET(ip), \
1162 		UNIPERIF_TDM_FS_REF_FREQ_REF_FREQ_SHIFT(ip), \
1163 		UNIPERIF_TDM_FS_REF_FREQ_REF_FREQ_MASK(ip), \
1164 		VALUE_UNIPERIF_TDM_FS_REF_FREQ_16KHZ(ip))
1165 #define SET_UNIPERIF_TDM_FS_REF_FREQ_32KHZ(ip) \
1166 		SET_UNIPERIF_REG(ip, \
1167 		UNIPERIF_TDM_FS_REF_FREQ_OFFSET(ip), \
1168 		UNIPERIF_TDM_FS_REF_FREQ_REF_FREQ_SHIFT(ip), \
1169 		UNIPERIF_TDM_FS_REF_FREQ_REF_FREQ_MASK(ip), \
1170 		VALUE_UNIPERIF_TDM_FS_REF_FREQ_32KHZ(ip))
1171 #define SET_UNIPERIF_TDM_FS_REF_FREQ_48KHZ(ip) \
1172 		SET_UNIPERIF_REG(ip, \
1173 		UNIPERIF_TDM_FS_REF_FREQ_OFFSET(ip), \
1174 		UNIPERIF_TDM_FS_REF_FREQ_REF_FREQ_SHIFT(ip), \
1175 		UNIPERIF_TDM_FS_REF_FREQ_REF_FREQ_MASK(ip), \
1176 		VALUE_UNIPERIF_TDM_FS_REF_FREQ_48KHZ(ip))
1177 
1178 /*
1179  * UNIPERIF_TDM_FS_REF_DIV
1180  */
1181 #define UNIPERIF_TDM_FS_REF_DIV_OFFSET(ip) 0x0120
1182 #define GET_UNIPERIF_TDM_FS_REF_DIV(ip) \
1183 	readl_relaxed(ip->base + UNIPERIF_TDM_FS_REF_DIV_OFFSET(ip))
1184 #define SET_UNIPERIF_TDM_FS_REF_DIV(ip, value) \
1185 		writel_relaxed(value, ip->base + \
1186 			UNIPERIF_TDM_FS_REF_DIV_OFFSET(ip))
1187 
1188 /* NUM_TIMESLOT */
1189 #define UNIPERIF_TDM_FS_REF_DIV_NUM_TIMESLOT_SHIFT(ip) 0x0
1190 #define UNIPERIF_TDM_FS_REF_DIV_NUM_TIMESLOT_MASK(ip) 0xff
1191 #define GET_UNIPERIF_TDM_FS_REF_DIV_NUM_TIMESLOT(ip) \
1192 		GET_UNIPERIF_REG(ip, \
1193 		UNIPERIF_TDM_FS_REF_DIV_OFFSET(ip), \
1194 		UNIPERIF_TDM_FS_REF_DIV_NUM_TIMESLOT_SHIFT(ip), \
1195 		UNIPERIF_TDM_FS_REF_DIV_NUM_TIMESLOT_MASK(ip))
1196 #define SET_UNIPERIF_TDM_FS_REF_DIV_NUM_TIMESLOT(ip, value) \
1197 		SET_UNIPERIF_REG(ip, \
1198 		UNIPERIF_TDM_FS_REF_DIV_OFFSET(ip), \
1199 		UNIPERIF_TDM_FS_REF_DIV_NUM_TIMESLOT_SHIFT(ip), \
1200 		UNIPERIF_TDM_FS_REF_DIV_NUM_TIMESLOT_MASK(ip), value)
1201 
1202 /*
1203  * UNIPERIF_TDM_WORD_POS_X_Y
1204  * 32 bits of UNIPERIF_TDM_WORD_POS_X_Y register shall be set in 1 shot
1205  */
1206 #define UNIPERIF_TDM_WORD_POS_1_2_OFFSET(ip) 0x013c
1207 #define UNIPERIF_TDM_WORD_POS_3_4_OFFSET(ip) 0x0140
1208 #define UNIPERIF_TDM_WORD_POS_5_6_OFFSET(ip) 0x0144
1209 #define UNIPERIF_TDM_WORD_POS_7_8_OFFSET(ip) 0x0148
1210 #define GET_UNIPERIF_TDM_WORD_POS(ip, words) \
1211 	readl_relaxed(ip->base + UNIPERIF_TDM_WORD_POS_##words##_OFFSET(ip))
1212 #define SET_UNIPERIF_TDM_WORD_POS(ip, words, value) \
1213 		writel_relaxed(value, ip->base + \
1214 		UNIPERIF_TDM_WORD_POS_##words##_OFFSET(ip))
1215 /*
1216  * uniperipheral IP capabilities
1217  */
1218 
1219 #define UNIPERIF_FIFO_SIZE		70 /* FIFO is 70 cells deep */
1220 #define UNIPERIF_FIFO_FRAMES		4  /* FDMA trigger limit in frames */
1221 
1222 #define UNIPERIF_TYPE_IS_HDMI(p) \
1223 	((p)->type == SND_ST_UNIPERIF_TYPE_HDMI)
1224 #define UNIPERIF_TYPE_IS_PCM(p) \
1225 	((p)->type == SND_ST_UNIPERIF_TYPE_PCM)
1226 #define UNIPERIF_TYPE_IS_SPDIF(p) \
1227 	((p)->type == SND_ST_UNIPERIF_TYPE_SPDIF)
1228 #define UNIPERIF_TYPE_IS_IEC958(p) \
1229 	(UNIPERIF_TYPE_IS_HDMI(p) || \
1230 		UNIPERIF_TYPE_IS_SPDIF(p))
1231 #define UNIPERIF_TYPE_IS_TDM(p) \
1232 	((p)->type == SND_ST_UNIPERIF_TYPE_TDM)
1233 
1234 /*
1235  * Uniperipheral IP revisions
1236  */
1237 enum uniperif_version {
1238 	SND_ST_UNIPERIF_VERSION_UNKNOWN,
1239 	/* SASG1 (Orly), Newman */
1240 	SND_ST_UNIPERIF_VERSION_C6AUD0_UNI_1_0,
1241 	/* SASC1, SASG2 (Orly2) */
1242 	SND_ST_UNIPERIF_VERSION_UNI_PLR_1_0,
1243 	/* SASC1, SASG2 (Orly2), TELSS, Cannes */
1244 	SND_ST_UNIPERIF_VERSION_UNI_RDR_1_0,
1245 	/* TELSS (SASC1) */
1246 	SND_ST_UNIPERIF_VERSION_TDM_PLR_1_0,
1247 	/* Cannes/Monaco */
1248 	SND_ST_UNIPERIF_VERSION_UNI_PLR_TOP_1_0
1249 };
1250 
1251 enum uniperif_type {
1252 	SND_ST_UNIPERIF_TYPE_NONE	= 0x00,
1253 	SND_ST_UNIPERIF_TYPE_HDMI	= 0x01,
1254 	SND_ST_UNIPERIF_TYPE_PCM	= 0x02,
1255 	SND_ST_UNIPERIF_TYPE_SPDIF	= 0x04,
1256 	SND_ST_UNIPERIF_TYPE_TDM	= 0x08
1257 };
1258 
1259 enum uniperif_state {
1260 	UNIPERIF_STATE_STOPPED,
1261 	UNIPERIF_STATE_STARTED,
1262 	UNIPERIF_STATE_STANDBY,
1263 	UNIPERIF_STATE_UNDERFLOW,
1264 	UNIPERIF_STATE_OVERFLOW = UNIPERIF_STATE_UNDERFLOW,
1265 	UNIPERIF_STATE_XRUN
1266 };
1267 
1268 enum uniperif_iec958_encoding_mode {
1269 	UNIPERIF_IEC958_ENCODING_MODE_PCM,
1270 	UNIPERIF_IEC958_ENCODING_MODE_ENCODED
1271 };
1272 
1273 enum uniperif_word_pos {
1274 	WORD_1_2,
1275 	WORD_3_4,
1276 	WORD_5_6,
1277 	WORD_7_8,
1278 	WORD_MAX
1279 };
1280 
1281 struct uniperif_iec958_settings {
1282 	enum uniperif_iec958_encoding_mode encoding_mode;
1283 	struct snd_aes_iec958 iec958;
1284 };
1285 
1286 struct dai_tdm_slot {
1287 	unsigned int mask;
1288 	int slots;
1289 	int slot_width;
1290 	unsigned int avail_slots;
1291 };
1292 
1293 struct uniperif {
1294 	/* System information */
1295 	enum uniperif_type type;
1296 	int underflow_enabled; /* Underflow recovery mode */
1297 	struct device *dev;
1298 	int id; /* instance value of the uniperipheral IP */
1299 	int ver; /* IP version, used by register access macros */
1300 	struct regmap_field *clk_sel;
1301 	struct regmap_field *valid_sel;
1302 	spinlock_t irq_lock; /* use to prevent race condition with IRQ */
1303 
1304 	/* capabilities */
1305 	const struct snd_pcm_hardware *hw;
1306 
1307 	/* Resources */
1308 	struct resource *mem_region;
1309 	void __iomem *base;
1310 	unsigned long fifo_phys_address;
1311 	int irq;
1312 
1313 	/* Clocks */
1314 	struct clk *clk;
1315 	int mclk;
1316 	int clk_adj;
1317 
1318 	/* Runtime data */
1319 	enum uniperif_state state;
1320 
1321 	struct snd_pcm_substream *substream;
1322 
1323 	/* Specific to IEC958 player */
1324 	struct uniperif_iec958_settings stream_settings;
1325 	struct mutex ctrl_lock; /* For resource updated by stream and controls*/
1326 
1327 	/*alsa ctrl*/
1328 	struct snd_kcontrol_new *snd_ctrls;
1329 	int num_ctrls;
1330 
1331 	/* dai properties */
1332 	unsigned int daifmt;
1333 	struct dai_tdm_slot tdm_slot;
1334 
1335 	/* DAI callbacks */
1336 	const struct snd_soc_dai_ops *dai_ops;
1337 };
1338 
1339 struct sti_uniperiph_dai {
1340 	int stream;
1341 	struct uniperif *uni;
1342 	struct snd_dmaengine_dai_dma_data dma_data;
1343 };
1344 
1345 struct sti_uniperiph_data {
1346 	struct platform_device *pdev;
1347 	struct snd_soc_dai_driver *dai;
1348 	struct sti_uniperiph_dai dai_data;
1349 };
1350 
1351 static const struct snd_pcm_hardware uni_tdm_hw = {
1352 	.info = SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BLOCK_TRANSFER |
1353 		SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_MMAP |
1354 		SNDRV_PCM_INFO_MMAP_VALID,
1355 
1356 	.formats = SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_S16_LE,
1357 
1358 	.rates = SNDRV_PCM_RATE_CONTINUOUS,
1359 	.rate_min = 8000,
1360 	.rate_max = 48000,
1361 
1362 	.channels_min = 1,
1363 	.channels_max = 32,
1364 
1365 	.periods_min = 2,
1366 	.periods_max = 10,
1367 
1368 	.period_bytes_min = 128,
1369 	.period_bytes_max = 64 * PAGE_SIZE,
1370 	.buffer_bytes_max = 256 * PAGE_SIZE
1371 };
1372 
1373 /* uniperiph player*/
1374 int uni_player_init(struct platform_device *pdev,
1375 		    struct uniperif *uni_player);
1376 int uni_player_resume(struct uniperif *player);
1377 
1378 /* uniperiph reader */
1379 int uni_reader_init(struct platform_device *pdev,
1380 		    struct uniperif *uni_reader);
1381 
1382 /* common */
1383 int sti_uniperiph_dai_set_fmt(struct snd_soc_dai *dai,
1384 			      unsigned int fmt);
1385 
1386 int sti_uniperiph_dai_hw_params(struct snd_pcm_substream *substream,
1387 				struct snd_pcm_hw_params *params,
1388 				struct snd_soc_dai *dai);
1389 
1390 static inline int sti_uniperiph_get_user_frame_size(
1391 	struct snd_pcm_runtime *runtime)
1392 {
1393 	return (runtime->channels * snd_pcm_format_width(runtime->format) / 8);
1394 }
1395 
1396 static inline int sti_uniperiph_get_unip_tdm_frame_size(struct uniperif *uni)
1397 {
1398 	return (uni->tdm_slot.slots * uni->tdm_slot.slot_width / 8);
1399 }
1400 
1401 int  sti_uniperiph_reset(struct uniperif *uni);
1402 
1403 int sti_uniperiph_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
1404 			       unsigned int rx_mask, int slots,
1405 			       int slot_width);
1406 
1407 int sti_uniperiph_get_tdm_word_pos(struct uniperif *uni,
1408 				   unsigned int *word_pos);
1409 
1410 int sti_uniperiph_fix_tdm_chan(struct snd_pcm_hw_params *params,
1411 			       struct snd_pcm_hw_rule *rule);
1412 
1413 int sti_uniperiph_fix_tdm_format(struct snd_pcm_hw_params *params,
1414 				 struct snd_pcm_hw_rule *rule);
1415 
1416 #endif
1417