1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */ 2 /* 3 * This file is provided under a dual BSD/GPLv2 license. When using or 4 * redistributing this file, you may do so under either license. 5 * 6 * Copyright(c) 2018 Intel Corporation. All rights reserved. 7 * 8 * Author: Liam Girdwood <liam.r.girdwood@linux.intel.com> 9 */ 10 11 #ifndef __SOUND_SOC_SOF_PRIV_H 12 #define __SOUND_SOC_SOF_PRIV_H 13 14 #include <linux/device.h> 15 #include <sound/hdaudio.h> 16 #include <sound/sof.h> 17 #include <sound/sof/info.h> 18 #include <sound/sof/pm.h> 19 #include <sound/sof/trace.h> 20 #include <uapi/sound/sof/fw.h> 21 #include <sound/sof/ext_manifest.h> 22 23 /* debug flags */ 24 #define SOF_DBG_ENABLE_TRACE BIT(0) 25 #define SOF_DBG_RETAIN_CTX BIT(1) /* prevent DSP D3 on FW exception */ 26 27 #define SOF_DBG_DUMP_REGS BIT(0) 28 #define SOF_DBG_DUMP_MBOX BIT(1) 29 #define SOF_DBG_DUMP_TEXT BIT(2) 30 #define SOF_DBG_DUMP_PCI BIT(3) 31 #define SOF_DBG_DUMP_FORCE_ERR_LEVEL BIT(4) /* used to dump dsp status with error log level */ 32 33 34 /* global debug state set by SOF_DBG_ flags */ 35 extern int sof_core_debug; 36 37 /* max BARs mmaped devices can use */ 38 #define SND_SOF_BARS 8 39 40 /* time in ms for runtime suspend delay */ 41 #define SND_SOF_SUSPEND_DELAY_MS 2000 42 43 /* DMA buffer size for trace */ 44 #define DMA_BUF_SIZE_FOR_TRACE (PAGE_SIZE * 16) 45 46 #define SOF_IPC_DSP_REPLY 0 47 #define SOF_IPC_HOST_REPLY 1 48 49 /* convenience constructor for DAI driver streams */ 50 #define SOF_DAI_STREAM(sname, scmin, scmax, srates, sfmt) \ 51 {.stream_name = sname, .channels_min = scmin, .channels_max = scmax, \ 52 .rates = srates, .formats = sfmt} 53 54 #define SOF_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE | \ 55 SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_FLOAT) 56 57 #define ENABLE_DEBUGFS_CACHEBUF \ 58 (IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_ENABLE_DEBUGFS_CACHE) || \ 59 IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_IPC_FLOOD_TEST)) 60 61 /* So far the primary core on all DSPs has ID 0 */ 62 #define SOF_DSP_PRIMARY_CORE 0 63 64 /* DSP power state */ 65 enum sof_dsp_power_states { 66 SOF_DSP_PM_D0, 67 SOF_DSP_PM_D1, 68 SOF_DSP_PM_D2, 69 SOF_DSP_PM_D3_HOT, 70 SOF_DSP_PM_D3, 71 SOF_DSP_PM_D3_COLD, 72 }; 73 74 struct sof_dsp_power_state { 75 u32 state; 76 u32 substate; /* platform-specific */ 77 }; 78 79 /* System suspend target state */ 80 enum sof_system_suspend_state { 81 SOF_SUSPEND_NONE = 0, 82 SOF_SUSPEND_S0IX, 83 SOF_SUSPEND_S3, 84 }; 85 86 struct snd_sof_dev; 87 struct snd_sof_ipc_msg; 88 struct snd_sof_ipc; 89 struct snd_sof_debugfs_map; 90 struct snd_soc_tplg_ops; 91 struct snd_soc_component; 92 struct snd_sof_pdata; 93 94 /* 95 * SOF DSP HW abstraction operations. 96 * Used to abstract DSP HW architecture and any IO busses between host CPU 97 * and DSP device(s). 98 */ 99 struct snd_sof_dsp_ops { 100 101 /* probe and remove */ 102 int (*probe)(struct snd_sof_dev *sof_dev); /* mandatory */ 103 int (*remove)(struct snd_sof_dev *sof_dev); /* optional */ 104 105 /* DSP core boot / reset */ 106 int (*run)(struct snd_sof_dev *sof_dev); /* mandatory */ 107 int (*stall)(struct snd_sof_dev *sof_dev, unsigned int core_mask); /* optional */ 108 int (*reset)(struct snd_sof_dev *sof_dev); /* optional */ 109 int (*core_power_up)(struct snd_sof_dev *sof_dev, 110 unsigned int core_mask); /* optional */ 111 int (*core_power_down)(struct snd_sof_dev *sof_dev, 112 unsigned int core_mask); /* optional */ 113 114 /* 115 * Register IO: only used by respective drivers themselves, 116 * TODO: consider removing these operations and calling respective 117 * implementations directly 118 */ 119 void (*write)(struct snd_sof_dev *sof_dev, void __iomem *addr, 120 u32 value); /* optional */ 121 u32 (*read)(struct snd_sof_dev *sof_dev, 122 void __iomem *addr); /* optional */ 123 void (*write64)(struct snd_sof_dev *sof_dev, void __iomem *addr, 124 u64 value); /* optional */ 125 u64 (*read64)(struct snd_sof_dev *sof_dev, 126 void __iomem *addr); /* optional */ 127 128 /* memcpy IO */ 129 void (*block_read)(struct snd_sof_dev *sof_dev, u32 bar, 130 u32 offset, void *dest, 131 size_t size); /* mandatory */ 132 void (*block_write)(struct snd_sof_dev *sof_dev, u32 bar, 133 u32 offset, void *src, 134 size_t size); /* mandatory */ 135 136 /* doorbell */ 137 irqreturn_t (*irq_handler)(int irq, void *context); /* optional */ 138 irqreturn_t (*irq_thread)(int irq, void *context); /* optional */ 139 140 /* ipc */ 141 int (*send_msg)(struct snd_sof_dev *sof_dev, 142 struct snd_sof_ipc_msg *msg); /* mandatory */ 143 144 /* FW loading */ 145 int (*load_firmware)(struct snd_sof_dev *sof_dev); /* mandatory */ 146 int (*load_module)(struct snd_sof_dev *sof_dev, 147 struct snd_sof_mod_hdr *hdr); /* optional */ 148 /* 149 * FW ready checks for ABI compatibility and creates 150 * memory windows at first boot 151 */ 152 int (*fw_ready)(struct snd_sof_dev *sdev, u32 msg_id); /* mandatory */ 153 154 /* connect pcm substream to a host stream */ 155 int (*pcm_open)(struct snd_sof_dev *sdev, 156 struct snd_pcm_substream *substream); /* optional */ 157 /* disconnect pcm substream to a host stream */ 158 int (*pcm_close)(struct snd_sof_dev *sdev, 159 struct snd_pcm_substream *substream); /* optional */ 160 161 /* host stream hw params */ 162 int (*pcm_hw_params)(struct snd_sof_dev *sdev, 163 struct snd_pcm_substream *substream, 164 struct snd_pcm_hw_params *params, 165 struct sof_ipc_stream_params *ipc_params); /* optional */ 166 167 /* host stream hw_free */ 168 int (*pcm_hw_free)(struct snd_sof_dev *sdev, 169 struct snd_pcm_substream *substream); /* optional */ 170 171 /* host stream trigger */ 172 int (*pcm_trigger)(struct snd_sof_dev *sdev, 173 struct snd_pcm_substream *substream, 174 int cmd); /* optional */ 175 176 /* host stream pointer */ 177 snd_pcm_uframes_t (*pcm_pointer)(struct snd_sof_dev *sdev, 178 struct snd_pcm_substream *substream); /* optional */ 179 180 #if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_PROBES) 181 /* Except for probe_pointer, all probe ops are mandatory */ 182 int (*probe_assign)(struct snd_sof_dev *sdev, 183 struct snd_compr_stream *cstream, 184 struct snd_soc_dai *dai); /* mandatory */ 185 int (*probe_free)(struct snd_sof_dev *sdev, 186 struct snd_compr_stream *cstream, 187 struct snd_soc_dai *dai); /* mandatory */ 188 int (*probe_set_params)(struct snd_sof_dev *sdev, 189 struct snd_compr_stream *cstream, 190 struct snd_compr_params *params, 191 struct snd_soc_dai *dai); /* mandatory */ 192 int (*probe_trigger)(struct snd_sof_dev *sdev, 193 struct snd_compr_stream *cstream, int cmd, 194 struct snd_soc_dai *dai); /* mandatory */ 195 int (*probe_pointer)(struct snd_sof_dev *sdev, 196 struct snd_compr_stream *cstream, 197 struct snd_compr_tstamp *tstamp, 198 struct snd_soc_dai *dai); /* optional */ 199 #endif 200 201 /* host read DSP stream data */ 202 void (*ipc_msg_data)(struct snd_sof_dev *sdev, 203 struct snd_pcm_substream *substream, 204 void *p, size_t sz); /* mandatory */ 205 206 /* host configure DSP HW parameters */ 207 int (*ipc_pcm_params)(struct snd_sof_dev *sdev, 208 struct snd_pcm_substream *substream, 209 const struct sof_ipc_pcm_params_reply *reply); /* mandatory */ 210 211 /* pre/post firmware run */ 212 int (*pre_fw_run)(struct snd_sof_dev *sof_dev); /* optional */ 213 int (*post_fw_run)(struct snd_sof_dev *sof_dev); /* optional */ 214 215 /* parse platform specific extended manifest, optional */ 216 int (*parse_platform_ext_manifest)(struct snd_sof_dev *sof_dev, 217 const struct sof_ext_man_elem_header *hdr); 218 219 /* DSP PM */ 220 int (*suspend)(struct snd_sof_dev *sof_dev, 221 u32 target_state); /* optional */ 222 int (*resume)(struct snd_sof_dev *sof_dev); /* optional */ 223 int (*runtime_suspend)(struct snd_sof_dev *sof_dev); /* optional */ 224 int (*runtime_resume)(struct snd_sof_dev *sof_dev); /* optional */ 225 int (*runtime_idle)(struct snd_sof_dev *sof_dev); /* optional */ 226 int (*set_hw_params_upon_resume)(struct snd_sof_dev *sdev); /* optional */ 227 int (*set_power_state)(struct snd_sof_dev *sdev, 228 const struct sof_dsp_power_state *target_state); /* optional */ 229 230 /* DSP clocking */ 231 int (*set_clk)(struct snd_sof_dev *sof_dev, u32 freq); /* optional */ 232 233 /* debug */ 234 const struct snd_sof_debugfs_map *debug_map; /* optional */ 235 int debug_map_count; /* optional */ 236 void (*dbg_dump)(struct snd_sof_dev *sof_dev, 237 u32 flags); /* optional */ 238 void (*ipc_dump)(struct snd_sof_dev *sof_dev); /* optional */ 239 240 /* host DMA trace initialization */ 241 int (*trace_init)(struct snd_sof_dev *sdev, 242 u32 *stream_tag); /* optional */ 243 int (*trace_release)(struct snd_sof_dev *sdev); /* optional */ 244 int (*trace_trigger)(struct snd_sof_dev *sdev, 245 int cmd); /* optional */ 246 247 /* misc */ 248 int (*get_bar_index)(struct snd_sof_dev *sdev, 249 u32 type); /* optional */ 250 int (*get_mailbox_offset)(struct snd_sof_dev *sdev);/* mandatory for common loader code */ 251 int (*get_window_offset)(struct snd_sof_dev *sdev, 252 u32 id);/* mandatory for common loader code */ 253 254 /* machine driver ops */ 255 int (*machine_register)(struct snd_sof_dev *sdev, 256 void *pdata); /* optional */ 257 void (*machine_unregister)(struct snd_sof_dev *sdev, 258 void *pdata); /* optional */ 259 void (*machine_select)(struct snd_sof_dev *sdev); /* optional */ 260 void (*set_mach_params)(const struct snd_soc_acpi_mach *mach, 261 struct device *dev); /* optional */ 262 263 /* DAI ops */ 264 struct snd_soc_dai_driver *drv; 265 int num_drv; 266 267 /* ALSA HW info flags, will be stored in snd_pcm_runtime.hw.info */ 268 u32 hw_info; 269 270 const struct sof_arch_ops *arch_ops; 271 }; 272 273 /* DSP architecture specific callbacks for oops and stack dumps */ 274 struct sof_arch_ops { 275 void (*dsp_oops)(struct snd_sof_dev *sdev, void *oops); 276 void (*dsp_stack)(struct snd_sof_dev *sdev, void *oops, 277 u32 *stack, u32 stack_words); 278 }; 279 280 #define sof_arch_ops(sdev) ((sdev)->pdata->desc->ops->arch_ops) 281 282 /* DSP device HW descriptor mapping between bus ID and ops */ 283 struct sof_ops_table { 284 const struct sof_dev_desc *desc; 285 const struct snd_sof_dsp_ops *ops; 286 }; 287 288 enum sof_dfsentry_type { 289 SOF_DFSENTRY_TYPE_IOMEM = 0, 290 SOF_DFSENTRY_TYPE_BUF, 291 }; 292 293 enum sof_debugfs_access_type { 294 SOF_DEBUGFS_ACCESS_ALWAYS = 0, 295 SOF_DEBUGFS_ACCESS_D0_ONLY, 296 }; 297 298 /* FS entry for debug files that can expose DSP memories, registers */ 299 struct snd_sof_dfsentry { 300 size_t size; 301 size_t buf_data_size; /* length of buffered data for file read operation */ 302 enum sof_dfsentry_type type; 303 /* 304 * access_type specifies if the 305 * memory -> DSP resource (memory, register etc) is always accessible 306 * or if it is accessible only when the DSP is in D0. 307 */ 308 enum sof_debugfs_access_type access_type; 309 #if ENABLE_DEBUGFS_CACHEBUF 310 char *cache_buf; /* buffer to cache the contents of debugfs memory */ 311 #endif 312 struct snd_sof_dev *sdev; 313 struct list_head list; /* list in sdev dfsentry list */ 314 union { 315 void __iomem *io_mem; 316 void *buf; 317 }; 318 }; 319 320 /* Debug mapping for any DSP memory or registers that can used for debug */ 321 struct snd_sof_debugfs_map { 322 const char *name; 323 u32 bar; 324 u32 offset; 325 u32 size; 326 /* 327 * access_type specifies if the memory is always accessible 328 * or if it is accessible only when the DSP is in D0. 329 */ 330 enum sof_debugfs_access_type access_type; 331 }; 332 333 /* mailbox descriptor, used for host <-> DSP IPC */ 334 struct snd_sof_mailbox { 335 u32 offset; 336 size_t size; 337 }; 338 339 /* IPC message descriptor for host <-> DSP IO */ 340 struct snd_sof_ipc_msg { 341 /* message data */ 342 u32 header; 343 void *msg_data; 344 void *reply_data; 345 size_t msg_size; 346 size_t reply_size; 347 int reply_error; 348 349 wait_queue_head_t waitq; 350 bool ipc_complete; 351 }; 352 353 enum snd_sof_fw_state { 354 SOF_FW_BOOT_NOT_STARTED = 0, 355 SOF_FW_BOOT_PREPARE, 356 SOF_FW_BOOT_IN_PROGRESS, 357 SOF_FW_BOOT_FAILED, 358 SOF_FW_BOOT_READY_FAILED, /* firmware booted but fw_ready op failed */ 359 SOF_FW_BOOT_COMPLETE, 360 }; 361 362 /* 363 * SOF Device Level. 364 */ 365 struct snd_sof_dev { 366 struct device *dev; 367 spinlock_t ipc_lock; /* lock for IPC users */ 368 spinlock_t hw_lock; /* lock for HW IO access */ 369 370 /* 371 * ASoC components. plat_drv fields are set dynamically so 372 * can't use const 373 */ 374 struct snd_soc_component_driver plat_drv; 375 376 /* current DSP power state */ 377 struct sof_dsp_power_state dsp_power_state; 378 379 /* Intended power target of system suspend */ 380 enum sof_system_suspend_state system_suspend_target; 381 382 /* DSP firmware boot */ 383 wait_queue_head_t boot_wait; 384 enum snd_sof_fw_state fw_state; 385 bool first_boot; 386 387 /* work queue in case the probe is implemented in two steps */ 388 struct work_struct probe_work; 389 390 /* DSP HW differentiation */ 391 struct snd_sof_pdata *pdata; 392 393 /* IPC */ 394 struct snd_sof_ipc *ipc; 395 struct snd_sof_mailbox dsp_box; /* DSP initiated IPC */ 396 struct snd_sof_mailbox host_box; /* Host initiated IPC */ 397 struct snd_sof_mailbox stream_box; /* Stream position update */ 398 struct snd_sof_mailbox debug_box; /* Debug info updates */ 399 struct snd_sof_ipc_msg *msg; 400 int ipc_irq; 401 u32 next_comp_id; /* monotonic - reset during S3 */ 402 403 /* memory bases for mmaped DSPs - set by dsp_init() */ 404 void __iomem *bar[SND_SOF_BARS]; /* DSP base address */ 405 int mmio_bar; 406 int mailbox_bar; 407 size_t dsp_oops_offset; 408 409 /* debug */ 410 struct dentry *debugfs_root; 411 struct list_head dfsentry_list; 412 413 /* firmware loader */ 414 struct snd_dma_buffer dmab; 415 struct snd_dma_buffer dmab_bdl; 416 struct sof_ipc_fw_ready fw_ready; 417 struct sof_ipc_fw_version fw_version; 418 struct sof_ipc_cc_version *cc_version; 419 420 /* topology */ 421 struct snd_soc_tplg_ops *tplg_ops; 422 struct list_head pcm_list; 423 struct list_head kcontrol_list; 424 struct list_head widget_list; 425 struct list_head dai_list; 426 struct list_head route_list; 427 struct snd_soc_component *component; 428 u32 enabled_cores_mask; /* keep track of enabled cores */ 429 430 /* FW configuration */ 431 struct sof_ipc_window *info_window; 432 433 /* IPC timeouts in ms */ 434 int ipc_timeout; 435 int boot_timeout; 436 437 #if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_PROBES) 438 unsigned int extractor_stream_tag; 439 #endif 440 441 /* DMA for Trace */ 442 struct snd_dma_buffer dmatb; 443 struct snd_dma_buffer dmatp; 444 int dma_trace_pages; 445 wait_queue_head_t trace_sleep; 446 u32 host_offset; 447 bool dtrace_is_supported; /* set with Kconfig or module parameter */ 448 bool dtrace_is_enabled; 449 bool dtrace_error; 450 bool dtrace_draining; 451 452 bool msi_enabled; 453 454 void *private; /* core does not touch this */ 455 }; 456 457 /* 458 * Device Level. 459 */ 460 461 int snd_sof_device_probe(struct device *dev, struct snd_sof_pdata *plat_data); 462 int snd_sof_device_remove(struct device *dev); 463 464 int snd_sof_runtime_suspend(struct device *dev); 465 int snd_sof_runtime_resume(struct device *dev); 466 int snd_sof_runtime_idle(struct device *dev); 467 int snd_sof_resume(struct device *dev); 468 int snd_sof_suspend(struct device *dev); 469 int snd_sof_dsp_power_down_notify(struct snd_sof_dev *sdev); 470 int snd_sof_prepare(struct device *dev); 471 void snd_sof_complete(struct device *dev); 472 473 void snd_sof_new_platform_drv(struct snd_sof_dev *sdev); 474 475 int snd_sof_create_page_table(struct device *dev, 476 struct snd_dma_buffer *dmab, 477 unsigned char *page_table, size_t size); 478 479 /* 480 * Firmware loading. 481 */ 482 int snd_sof_load_firmware(struct snd_sof_dev *sdev); 483 int snd_sof_load_firmware_raw(struct snd_sof_dev *sdev); 484 int snd_sof_load_firmware_memcpy(struct snd_sof_dev *sdev); 485 int snd_sof_run_firmware(struct snd_sof_dev *sdev); 486 int snd_sof_parse_module_memcpy(struct snd_sof_dev *sdev, 487 struct snd_sof_mod_hdr *module); 488 void snd_sof_fw_unload(struct snd_sof_dev *sdev); 489 int snd_sof_fw_parse_ext_data(struct snd_sof_dev *sdev, u32 bar, u32 offset); 490 491 /* 492 * IPC low level APIs. 493 */ 494 struct snd_sof_ipc *snd_sof_ipc_init(struct snd_sof_dev *sdev); 495 void snd_sof_ipc_free(struct snd_sof_dev *sdev); 496 void snd_sof_ipc_reply(struct snd_sof_dev *sdev, u32 msg_id); 497 void snd_sof_ipc_msgs_rx(struct snd_sof_dev *sdev); 498 int snd_sof_ipc_stream_pcm_params(struct snd_sof_dev *sdev, 499 struct sof_ipc_pcm_params *params); 500 int snd_sof_dsp_mailbox_init(struct snd_sof_dev *sdev, u32 dspbox, 501 size_t dspbox_size, u32 hostbox, 502 size_t hostbox_size); 503 int snd_sof_ipc_valid(struct snd_sof_dev *sdev); 504 int sof_ipc_tx_message(struct snd_sof_ipc *ipc, u32 header, 505 void *msg_data, size_t msg_bytes, void *reply_data, 506 size_t reply_bytes); 507 int sof_ipc_tx_message_no_pm(struct snd_sof_ipc *ipc, u32 header, 508 void *msg_data, size_t msg_bytes, 509 void *reply_data, size_t reply_bytes); 510 511 /* 512 * Trace/debug 513 */ 514 int snd_sof_init_trace(struct snd_sof_dev *sdev); 515 void snd_sof_release_trace(struct snd_sof_dev *sdev); 516 void snd_sof_free_trace(struct snd_sof_dev *sdev); 517 int snd_sof_dbg_init(struct snd_sof_dev *sdev); 518 void snd_sof_free_debug(struct snd_sof_dev *sdev); 519 int snd_sof_debugfs_io_item(struct snd_sof_dev *sdev, 520 void __iomem *base, size_t size, 521 const char *name, 522 enum sof_debugfs_access_type access_type); 523 int snd_sof_debugfs_buf_item(struct snd_sof_dev *sdev, 524 void *base, size_t size, 525 const char *name, mode_t mode); 526 int snd_sof_trace_update_pos(struct snd_sof_dev *sdev, 527 struct sof_ipc_dma_trace_posn *posn); 528 void snd_sof_trace_notify_for_error(struct snd_sof_dev *sdev); 529 void snd_sof_get_status(struct snd_sof_dev *sdev, u32 panic_code, 530 u32 tracep_code, void *oops, 531 struct sof_ipc_panic_info *panic_info, 532 void *stack, size_t stack_words); 533 int snd_sof_init_trace_ipc(struct snd_sof_dev *sdev); 534 void snd_sof_handle_fw_exception(struct snd_sof_dev *sdev); 535 int snd_sof_dbg_memory_info_init(struct snd_sof_dev *sdev); 536 537 /* 538 * Platform specific ops. 539 */ 540 extern struct snd_compress_ops sof_compressed_ops; 541 542 /* 543 * DSP Architectures. 544 */ 545 static inline void sof_stack(struct snd_sof_dev *sdev, void *oops, u32 *stack, 546 u32 stack_words) 547 { 548 sof_arch_ops(sdev)->dsp_stack(sdev, oops, stack, stack_words); 549 } 550 551 static inline void sof_oops(struct snd_sof_dev *sdev, void *oops) 552 { 553 if (sof_arch_ops(sdev)->dsp_oops) 554 sof_arch_ops(sdev)->dsp_oops(sdev, oops); 555 } 556 557 extern const struct sof_arch_ops sof_xtensa_arch_ops; 558 559 /* 560 * Utilities 561 */ 562 void sof_io_write(struct snd_sof_dev *sdev, void __iomem *addr, u32 value); 563 void sof_io_write64(struct snd_sof_dev *sdev, void __iomem *addr, u64 value); 564 u32 sof_io_read(struct snd_sof_dev *sdev, void __iomem *addr); 565 u64 sof_io_read64(struct snd_sof_dev *sdev, void __iomem *addr); 566 void sof_mailbox_write(struct snd_sof_dev *sdev, u32 offset, 567 void *message, size_t bytes); 568 void sof_mailbox_read(struct snd_sof_dev *sdev, u32 offset, 569 void *message, size_t bytes); 570 void sof_block_write(struct snd_sof_dev *sdev, u32 bar, u32 offset, void *src, 571 size_t size); 572 void sof_block_read(struct snd_sof_dev *sdev, u32 bar, u32 offset, void *dest, 573 size_t size); 574 575 int sof_fw_ready(struct snd_sof_dev *sdev, u32 msg_id); 576 577 void intel_ipc_msg_data(struct snd_sof_dev *sdev, 578 struct snd_pcm_substream *substream, 579 void *p, size_t sz); 580 int intel_ipc_pcm_params(struct snd_sof_dev *sdev, 581 struct snd_pcm_substream *substream, 582 const struct sof_ipc_pcm_params_reply *reply); 583 584 int intel_pcm_open(struct snd_sof_dev *sdev, 585 struct snd_pcm_substream *substream); 586 int intel_pcm_close(struct snd_sof_dev *sdev, 587 struct snd_pcm_substream *substream); 588 589 int sof_machine_check(struct snd_sof_dev *sdev); 590 591 #define sof_dev_dbg_or_err(dev, is_err, fmt, ...) \ 592 do { \ 593 if (is_err) \ 594 dev_err(dev, "error: " fmt, __VA_ARGS__); \ 595 else \ 596 dev_dbg(dev, fmt, __VA_ARGS__); \ 597 } while (0) 598 599 #endif 600