xref: /openbmc/linux/sound/soc/sof/sof-priv.h (revision 3ed03f4d)
1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
2 /*
3  * This file is provided under a dual BSD/GPLv2 license.  When using or
4  * redistributing this file, you may do so under either license.
5  *
6  * Copyright(c) 2018 Intel Corporation. All rights reserved.
7  *
8  * Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
9  */
10 
11 #ifndef __SOUND_SOC_SOF_PRIV_H
12 #define __SOUND_SOC_SOF_PRIV_H
13 
14 #include <linux/device.h>
15 #include <sound/hdaudio.h>
16 #include <sound/sof.h>
17 #include <sound/sof/info.h>
18 #include <sound/sof/pm.h>
19 #include <sound/sof/trace.h>
20 #include <uapi/sound/sof/fw.h>
21 #include <sound/sof/ext_manifest.h>
22 
23 struct snd_sof_pcm_stream;
24 
25 /* Flag definitions used in sof_core_debug (sof_debug module parameter) */
26 #define SOF_DBG_ENABLE_TRACE	BIT(0)
27 #define SOF_DBG_RETAIN_CTX	BIT(1)	/* prevent DSP D3 on FW exception */
28 #define SOF_DBG_VERIFY_TPLG	BIT(2) /* verify topology during load */
29 #define SOF_DBG_DYNAMIC_PIPELINES_OVERRIDE	BIT(3) /* 0: use topology token
30 							* 1: override topology
31 							*/
32 #define SOF_DBG_DYNAMIC_PIPELINES_ENABLE	BIT(4) /* 0: use static pipelines
33 							* 1: use dynamic pipelines
34 							*/
35 #define SOF_DBG_DISABLE_MULTICORE		BIT(5) /* schedule all pipelines/widgets
36 							* on primary core
37 							*/
38 #define SOF_DBG_PRINT_ALL_DUMPS		BIT(6) /* Print all ipc and dsp dumps */
39 #define SOF_DBG_IGNORE_D3_PERSISTENT		BIT(7) /* ignore the DSP D3 persistent capability
40 							* and always download firmware upon D3 exit
41 							*/
42 #define SOF_DBG_PRINT_DMA_POSITION_UPDATE_LOGS	BIT(8) /* print DMA position updates
43 							* in dmesg logs
44 							*/
45 #define SOF_DBG_PRINT_IPC_SUCCESS_LOGS		BIT(9) /* print IPC success
46 							* in dmesg logs
47 							*/
48 #define SOF_DBG_FORCE_NOCODEC			BIT(10) /* ignore all codec-related
49 							 * configurations
50 							 */
51 #define SOF_DBG_DSPLESS_MODE			BIT(15) /* Do not initialize and use the DSP */
52 
53 /* Flag definitions used for controlling the DSP dump behavior */
54 #define SOF_DBG_DUMP_REGS		BIT(0)
55 #define SOF_DBG_DUMP_MBOX		BIT(1)
56 #define SOF_DBG_DUMP_TEXT		BIT(2)
57 #define SOF_DBG_DUMP_PCI		BIT(3)
58 /* Output this dump (at the DEBUG level) only when SOF_DBG_PRINT_ALL_DUMPS is set */
59 #define SOF_DBG_DUMP_OPTIONAL		BIT(4)
60 
61 /* global debug state set by SOF_DBG_ flags */
62 bool sof_debug_check_flag(int mask);
63 
64 /* max BARs mmaped devices can use */
65 #define SND_SOF_BARS	8
66 
67 /* time in ms for runtime suspend delay */
68 #define SND_SOF_SUSPEND_DELAY_MS	2000
69 
70 /* DMA buffer size for trace */
71 #define DMA_BUF_SIZE_FOR_TRACE (PAGE_SIZE * 16)
72 
73 #define SOF_IPC_DSP_REPLY		0
74 #define SOF_IPC_HOST_REPLY		1
75 
76 /* convenience constructor for DAI driver streams */
77 #define SOF_DAI_STREAM(sname, scmin, scmax, srates, sfmt) \
78 	{.stream_name = sname, .channels_min = scmin, .channels_max = scmax, \
79 	 .rates = srates, .formats = sfmt}
80 
81 #define SOF_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE | \
82 	SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_FLOAT)
83 
84 /* So far the primary core on all DSPs has ID 0 */
85 #define SOF_DSP_PRIMARY_CORE 0
86 
87 /* max number of DSP cores */
88 #define SOF_MAX_DSP_NUM_CORES 8
89 
90 struct sof_dsp_power_state {
91 	u32 state;
92 	u32 substate; /* platform-specific */
93 };
94 
95 /* System suspend target state */
96 enum sof_system_suspend_state {
97 	SOF_SUSPEND_NONE = 0,
98 	SOF_SUSPEND_S0IX,
99 	SOF_SUSPEND_S3,
100 	SOF_SUSPEND_S4,
101 	SOF_SUSPEND_S5,
102 };
103 
104 enum sof_dfsentry_type {
105 	SOF_DFSENTRY_TYPE_IOMEM = 0,
106 	SOF_DFSENTRY_TYPE_BUF,
107 };
108 
109 enum sof_debugfs_access_type {
110 	SOF_DEBUGFS_ACCESS_ALWAYS = 0,
111 	SOF_DEBUGFS_ACCESS_D0_ONLY,
112 };
113 
114 struct sof_compr_stream {
115 	u64 copied_total;
116 	u32 sampling_rate;
117 	u16 channels;
118 	u16 sample_container_bytes;
119 	size_t posn_offset;
120 };
121 
122 struct snd_sof_dev;
123 struct snd_sof_ipc_msg;
124 struct snd_sof_ipc;
125 struct snd_sof_debugfs_map;
126 struct snd_soc_tplg_ops;
127 struct snd_soc_component;
128 struct snd_sof_pdata;
129 
130 /**
131  * struct snd_sof_platform_stream_params - platform dependent stream parameters
132  * @stream_tag:		Stream tag to use
133  * @use_phy_addr:	Use the provided @phy_addr for configuration
134  * @phy_addr:		Platform dependent address to be used, if  @use_phy_addr
135  *			is true
136  * @no_ipc_position:	Disable position update IPC from firmware
137  */
138 struct snd_sof_platform_stream_params {
139 	u16 stream_tag;
140 	bool use_phy_address;
141 	u32 phy_addr;
142 	bool no_ipc_position;
143 	bool cont_update_posn;
144 };
145 
146 /**
147  * struct sof_firmware - Container struct for SOF firmware
148  * @fw:			Pointer to the firmware
149  * @payload_offset:	Offset of the data within the loaded firmware image to be
150  *			loaded to the DSP (skipping for example ext_manifest section)
151  */
152 struct sof_firmware {
153 	const struct firmware *fw;
154 	u32 payload_offset;
155 };
156 
157 /*
158  * SOF DSP HW abstraction operations.
159  * Used to abstract DSP HW architecture and any IO busses between host CPU
160  * and DSP device(s).
161  */
162 struct snd_sof_dsp_ops {
163 
164 	/* probe/remove/shutdown */
165 	int (*probe)(struct snd_sof_dev *sof_dev); /* mandatory */
166 	int (*remove)(struct snd_sof_dev *sof_dev); /* optional */
167 	int (*shutdown)(struct snd_sof_dev *sof_dev); /* optional */
168 
169 	/* DSP core boot / reset */
170 	int (*run)(struct snd_sof_dev *sof_dev); /* mandatory */
171 	int (*stall)(struct snd_sof_dev *sof_dev, unsigned int core_mask); /* optional */
172 	int (*reset)(struct snd_sof_dev *sof_dev); /* optional */
173 	int (*core_get)(struct snd_sof_dev *sof_dev, int core); /* optional */
174 	int (*core_put)(struct snd_sof_dev *sof_dev, int core); /* optional */
175 
176 	/*
177 	 * Register IO: only used by respective drivers themselves,
178 	 * TODO: consider removing these operations and calling respective
179 	 * implementations directly
180 	 */
181 	void (*write8)(struct snd_sof_dev *sof_dev, void __iomem *addr,
182 		       u8 value); /* optional */
183 	u8 (*read8)(struct snd_sof_dev *sof_dev,
184 		    void __iomem *addr); /* optional */
185 	void (*write)(struct snd_sof_dev *sof_dev, void __iomem *addr,
186 		      u32 value); /* optional */
187 	u32 (*read)(struct snd_sof_dev *sof_dev,
188 		    void __iomem *addr); /* optional */
189 	void (*write64)(struct snd_sof_dev *sof_dev, void __iomem *addr,
190 			u64 value); /* optional */
191 	u64 (*read64)(struct snd_sof_dev *sof_dev,
192 		      void __iomem *addr); /* optional */
193 
194 	/* memcpy IO */
195 	int (*block_read)(struct snd_sof_dev *sof_dev,
196 			  enum snd_sof_fw_blk_type type, u32 offset,
197 			  void *dest, size_t size); /* mandatory */
198 	int (*block_write)(struct snd_sof_dev *sof_dev,
199 			   enum snd_sof_fw_blk_type type, u32 offset,
200 			   void *src, size_t size); /* mandatory */
201 
202 	/* Mailbox IO */
203 	void (*mailbox_read)(struct snd_sof_dev *sof_dev,
204 			     u32 offset, void *dest,
205 			     size_t size); /* optional */
206 	void (*mailbox_write)(struct snd_sof_dev *sof_dev,
207 			      u32 offset, void *src,
208 			      size_t size); /* optional */
209 
210 	/* doorbell */
211 	irqreturn_t (*irq_handler)(int irq, void *context); /* optional */
212 	irqreturn_t (*irq_thread)(int irq, void *context); /* optional */
213 
214 	/* ipc */
215 	int (*send_msg)(struct snd_sof_dev *sof_dev,
216 			struct snd_sof_ipc_msg *msg); /* mandatory */
217 
218 	/* FW loading */
219 	int (*load_firmware)(struct snd_sof_dev *sof_dev); /* mandatory */
220 	int (*load_module)(struct snd_sof_dev *sof_dev,
221 			   struct snd_sof_mod_hdr *hdr); /* optional */
222 
223 	/* connect pcm substream to a host stream */
224 	int (*pcm_open)(struct snd_sof_dev *sdev,
225 			struct snd_pcm_substream *substream); /* optional */
226 	/* disconnect pcm substream to a host stream */
227 	int (*pcm_close)(struct snd_sof_dev *sdev,
228 			 struct snd_pcm_substream *substream); /* optional */
229 
230 	/* host stream hw params */
231 	int (*pcm_hw_params)(struct snd_sof_dev *sdev,
232 			     struct snd_pcm_substream *substream,
233 			     struct snd_pcm_hw_params *params,
234 			     struct snd_sof_platform_stream_params *platform_params); /* optional */
235 
236 	/* host stream hw_free */
237 	int (*pcm_hw_free)(struct snd_sof_dev *sdev,
238 			   struct snd_pcm_substream *substream); /* optional */
239 
240 	/* host stream trigger */
241 	int (*pcm_trigger)(struct snd_sof_dev *sdev,
242 			   struct snd_pcm_substream *substream,
243 			   int cmd); /* optional */
244 
245 	/* host stream pointer */
246 	snd_pcm_uframes_t (*pcm_pointer)(struct snd_sof_dev *sdev,
247 					 struct snd_pcm_substream *substream); /* optional */
248 
249 	/* pcm ack */
250 	int (*pcm_ack)(struct snd_sof_dev *sdev, struct snd_pcm_substream *substream); /* optional */
251 
252 	/*
253 	 * optional callback to retrieve the link DMA position for the substream
254 	 * when the position is not reported in the shared SRAM windows but
255 	 * instead from a host-accessible hardware counter.
256 	 */
257 	u64 (*get_stream_position)(struct snd_sof_dev *sdev,
258 				   struct snd_soc_component *component,
259 				   struct snd_pcm_substream *substream); /* optional */
260 
261 	/* host read DSP stream data */
262 	int (*ipc_msg_data)(struct snd_sof_dev *sdev,
263 			    struct snd_sof_pcm_stream *sps,
264 			    void *p, size_t sz); /* mandatory */
265 
266 	/* host side configuration of the stream's data offset in stream mailbox area */
267 	int (*set_stream_data_offset)(struct snd_sof_dev *sdev,
268 				      struct snd_sof_pcm_stream *sps,
269 				      size_t posn_offset); /* optional */
270 
271 	/* pre/post firmware run */
272 	int (*pre_fw_run)(struct snd_sof_dev *sof_dev); /* optional */
273 	int (*post_fw_run)(struct snd_sof_dev *sof_dev); /* optional */
274 
275 	/* parse platform specific extended manifest, optional */
276 	int (*parse_platform_ext_manifest)(struct snd_sof_dev *sof_dev,
277 					   const struct sof_ext_man_elem_header *hdr);
278 
279 	/* DSP PM */
280 	int (*suspend)(struct snd_sof_dev *sof_dev,
281 		       u32 target_state); /* optional */
282 	int (*resume)(struct snd_sof_dev *sof_dev); /* optional */
283 	int (*runtime_suspend)(struct snd_sof_dev *sof_dev); /* optional */
284 	int (*runtime_resume)(struct snd_sof_dev *sof_dev); /* optional */
285 	int (*runtime_idle)(struct snd_sof_dev *sof_dev); /* optional */
286 	int (*set_hw_params_upon_resume)(struct snd_sof_dev *sdev); /* optional */
287 	int (*set_power_state)(struct snd_sof_dev *sdev,
288 			       const struct sof_dsp_power_state *target_state); /* optional */
289 
290 	/* DSP clocking */
291 	int (*set_clk)(struct snd_sof_dev *sof_dev, u32 freq); /* optional */
292 
293 	/* debug */
294 	const struct snd_sof_debugfs_map *debug_map; /* optional */
295 	int debug_map_count; /* optional */
296 	void (*dbg_dump)(struct snd_sof_dev *sof_dev,
297 			 u32 flags); /* optional */
298 	void (*ipc_dump)(struct snd_sof_dev *sof_dev); /* optional */
299 	int (*debugfs_add_region_item)(struct snd_sof_dev *sdev,
300 				       enum snd_sof_fw_blk_type blk_type, u32 offset,
301 				       size_t size, const char *name,
302 				       enum sof_debugfs_access_type access_type); /* optional */
303 
304 	/* host DMA trace (IPC3) */
305 	int (*trace_init)(struct snd_sof_dev *sdev,
306 			  struct snd_dma_buffer *dmatb,
307 			  struct sof_ipc_dma_trace_params_ext *dtrace_params); /* optional */
308 	int (*trace_release)(struct snd_sof_dev *sdev); /* optional */
309 	int (*trace_trigger)(struct snd_sof_dev *sdev,
310 			     int cmd); /* optional */
311 
312 	/* misc */
313 	int (*get_bar_index)(struct snd_sof_dev *sdev,
314 			     u32 type); /* optional */
315 	int (*get_mailbox_offset)(struct snd_sof_dev *sdev);/* mandatory for common loader code */
316 	int (*get_window_offset)(struct snd_sof_dev *sdev,
317 				 u32 id);/* mandatory for common loader code */
318 
319 	/* machine driver ops */
320 	int (*machine_register)(struct snd_sof_dev *sdev,
321 				void *pdata); /* optional */
322 	void (*machine_unregister)(struct snd_sof_dev *sdev,
323 				   void *pdata); /* optional */
324 	struct snd_soc_acpi_mach * (*machine_select)(struct snd_sof_dev *sdev); /* optional */
325 	void (*set_mach_params)(struct snd_soc_acpi_mach *mach,
326 				struct snd_sof_dev *sdev); /* optional */
327 
328 	/* IPC client ops */
329 	int (*register_ipc_clients)(struct snd_sof_dev *sdev); /* optional */
330 	void (*unregister_ipc_clients)(struct snd_sof_dev *sdev); /* optional */
331 
332 	/* DAI ops */
333 	struct snd_soc_dai_driver *drv;
334 	int num_drv;
335 
336 	/* ALSA HW info flags, will be stored in snd_pcm_runtime.hw.info */
337 	u32 hw_info;
338 
339 	const struct dsp_arch_ops *dsp_arch_ops;
340 };
341 
342 /* DSP architecture specific callbacks for oops and stack dumps */
343 struct dsp_arch_ops {
344 	void (*dsp_oops)(struct snd_sof_dev *sdev, const char *level, void *oops);
345 	void (*dsp_stack)(struct snd_sof_dev *sdev, const char *level, void *oops,
346 			  u32 *stack, u32 stack_words);
347 };
348 
349 #define sof_dsp_arch_ops(sdev) ((sdev)->pdata->desc->ops->dsp_arch_ops)
350 
351 /* FS entry for debug files that can expose DSP memories, registers */
352 struct snd_sof_dfsentry {
353 	size_t size;
354 	size_t buf_data_size;  /* length of buffered data for file read operation */
355 	enum sof_dfsentry_type type;
356 	/*
357 	 * access_type specifies if the
358 	 * memory -> DSP resource (memory, register etc) is always accessible
359 	 * or if it is accessible only when the DSP is in D0.
360 	 */
361 	enum sof_debugfs_access_type access_type;
362 #if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_ENABLE_DEBUGFS_CACHE)
363 	char *cache_buf; /* buffer to cache the contents of debugfs memory */
364 #endif
365 	struct snd_sof_dev *sdev;
366 	struct list_head list;  /* list in sdev dfsentry list */
367 	union {
368 		void __iomem *io_mem;
369 		void *buf;
370 	};
371 };
372 
373 /* Debug mapping for any DSP memory or registers that can used for debug */
374 struct snd_sof_debugfs_map {
375 	const char *name;
376 	u32 bar;
377 	u32 offset;
378 	u32 size;
379 	/*
380 	 * access_type specifies if the memory is always accessible
381 	 * or if it is accessible only when the DSP is in D0.
382 	 */
383 	enum sof_debugfs_access_type access_type;
384 };
385 
386 /* mailbox descriptor, used for host <-> DSP IPC */
387 struct snd_sof_mailbox {
388 	u32 offset;
389 	size_t size;
390 };
391 
392 /* IPC message descriptor for host <-> DSP IO */
393 struct snd_sof_ipc_msg {
394 	/* message data */
395 	void *msg_data;
396 	void *reply_data;
397 	size_t msg_size;
398 	size_t reply_size;
399 	int reply_error;
400 
401 	/* notification, firmware initiated messages */
402 	void *rx_data;
403 
404 	wait_queue_head_t waitq;
405 	bool ipc_complete;
406 };
407 
408 /**
409  * struct sof_ipc_fw_tracing_ops - IPC-specific firmware tracing ops
410  * @init:	Function pointer for initialization of the tracing
411  * @free:	Optional function pointer for freeing of the tracing
412  * @fw_crashed:	Optional function pointer to notify the tracing of a firmware crash
413  * @suspend:	Function pointer for system/runtime suspend
414  * @resume:	Function pointer for system/runtime resume
415  */
416 struct sof_ipc_fw_tracing_ops {
417 	int (*init)(struct snd_sof_dev *sdev);
418 	void (*free)(struct snd_sof_dev *sdev);
419 	void (*fw_crashed)(struct snd_sof_dev *sdev);
420 	void (*suspend)(struct snd_sof_dev *sdev, pm_message_t pm_state);
421 	int (*resume)(struct snd_sof_dev *sdev);
422 };
423 
424 /**
425  * struct sof_ipc_pm_ops - IPC-specific PM ops
426  * @ctx_save:		Optional function pointer for context save
427  * @ctx_restore:	Optional function pointer for context restore
428  * @set_core_state:	Optional function pointer for turning on/off a DSP core
429  * @set_pm_gate:	Optional function pointer for pm gate settings
430  */
431 struct sof_ipc_pm_ops {
432 	int (*ctx_save)(struct snd_sof_dev *sdev);
433 	int (*ctx_restore)(struct snd_sof_dev *sdev);
434 	int (*set_core_state)(struct snd_sof_dev *sdev, int core_idx, bool on);
435 	int (*set_pm_gate)(struct snd_sof_dev *sdev, u32 flags);
436 };
437 
438 /**
439  * struct sof_ipc_fw_loader_ops - IPC/FW-specific loader ops
440  * @validate:		Function pointer for validating the firmware image
441  * @parse_ext_manifest:	Function pointer for parsing the manifest of the firmware
442  * @load_fw_to_dsp:	Optional function pointer for loading the firmware to the
443  *			DSP.
444  *			The function implements generic, hardware independent way
445  *			of loading the initial firmware and its modules (if any).
446  */
447 struct sof_ipc_fw_loader_ops {
448 	int (*validate)(struct snd_sof_dev *sdev);
449 	size_t (*parse_ext_manifest)(struct snd_sof_dev *sdev);
450 	int (*load_fw_to_dsp)(struct snd_sof_dev *sdev);
451 };
452 
453 struct sof_ipc_tplg_ops;
454 struct sof_ipc_pcm_ops;
455 
456 /**
457  * struct sof_ipc_ops - IPC-specific ops
458  * @tplg:	Pointer to IPC-specific topology ops
459  * @pm:		Pointer to PM ops
460  * @pcm:	Pointer to PCM ops
461  * @fw_loader:	Pointer to Firmware Loader ops
462  * @fw_tracing:	Optional pointer to Firmware tracing ops
463  *
464  * @init:	Optional pointer for IPC related initialization
465  * @exit:	Optional pointer for IPC related cleanup
466  * @post_fw_boot: Optional pointer to execute IPC related tasks after firmware
467  *		boot.
468  *
469  * @tx_msg:	Function pointer for sending a 'short' IPC message
470  * @set_get_data: Function pointer for set/get data ('large' IPC message). This
471  *		function may split up the 'large' message and use the @tx_msg
472  *		path to transfer individual chunks, or use other means to transfer
473  *		the message.
474  * @get_reply:	Function pointer for fetching the reply to
475  *		sdev->ipc->msg.reply_data
476  * @rx_msg:	Function pointer for handling a received message
477  *
478  * Note: both @tx_msg and @set_get_data considered as TX functions and they are
479  * serialized for the duration of the instructed transfer. A large message sent
480  * via @set_get_data is a single transfer even if at the hardware level it is
481  * handled with multiple chunks.
482  */
483 struct sof_ipc_ops {
484 	const struct sof_ipc_tplg_ops *tplg;
485 	const struct sof_ipc_pm_ops *pm;
486 	const struct sof_ipc_pcm_ops *pcm;
487 	const struct sof_ipc_fw_loader_ops *fw_loader;
488 	const struct sof_ipc_fw_tracing_ops *fw_tracing;
489 
490 	int (*init)(struct snd_sof_dev *sdev);
491 	void (*exit)(struct snd_sof_dev *sdev);
492 	int (*post_fw_boot)(struct snd_sof_dev *sdev);
493 
494 	int (*tx_msg)(struct snd_sof_dev *sdev, void *msg_data, size_t msg_bytes,
495 		      void *reply_data, size_t reply_bytes, bool no_pm);
496 	int (*set_get_data)(struct snd_sof_dev *sdev, void *data, size_t data_bytes,
497 			    bool set);
498 	int (*get_reply)(struct snd_sof_dev *sdev);
499 	void (*rx_msg)(struct snd_sof_dev *sdev);
500 };
501 
502 /* SOF generic IPC data */
503 struct snd_sof_ipc {
504 	struct snd_sof_dev *sdev;
505 
506 	/* protects messages and the disable flag */
507 	struct mutex tx_mutex;
508 	/* disables further sending of ipc's */
509 	bool disable_ipc_tx;
510 
511 	/* Maximum allowed size of a single IPC message/reply */
512 	size_t max_payload_size;
513 
514 	struct snd_sof_ipc_msg msg;
515 
516 	/* IPC ops based on version */
517 	const struct sof_ipc_ops *ops;
518 };
519 
520 /* Helper to retrieve the IPC ops */
521 #define sof_ipc_get_ops(sdev, ops_name)		\
522 		(((sdev)->ipc && (sdev)->ipc->ops) ? (sdev)->ipc->ops->ops_name : NULL)
523 
524 /*
525  * SOF Device Level.
526  */
527 struct snd_sof_dev {
528 	struct device *dev;
529 	spinlock_t ipc_lock;	/* lock for IPC users */
530 	spinlock_t hw_lock;	/* lock for HW IO access */
531 
532 	/*
533 	 * When true the DSP is not used.
534 	 * It is set under the following condition:
535 	 * User sets the SOF_DBG_DSPLESS_MODE flag in sof_debug module parameter
536 	 * and
537 	 * the platform advertises that it can support such mode
538 	 * pdata->desc->dspless_mode_supported is true.
539 	 */
540 	bool dspless_mode_selected;
541 
542 	/* Main, Base firmware image */
543 	struct sof_firmware basefw;
544 
545 	/*
546 	 * ASoC components. plat_drv fields are set dynamically so
547 	 * can't use const
548 	 */
549 	struct snd_soc_component_driver plat_drv;
550 
551 	/* current DSP power state */
552 	struct sof_dsp_power_state dsp_power_state;
553 	/* mutex to protect the dsp_power_state access */
554 	struct mutex power_state_access;
555 
556 	/* Intended power target of system suspend */
557 	enum sof_system_suspend_state system_suspend_target;
558 
559 	/* DSP firmware boot */
560 	wait_queue_head_t boot_wait;
561 	enum sof_fw_state fw_state;
562 	bool first_boot;
563 
564 	/* work queue in case the probe is implemented in two steps */
565 	struct work_struct probe_work;
566 	bool probe_completed;
567 
568 	/* DSP HW differentiation */
569 	struct snd_sof_pdata *pdata;
570 
571 	/* IPC */
572 	struct snd_sof_ipc *ipc;
573 	struct snd_sof_mailbox fw_info_box;	/* FW shared memory */
574 	struct snd_sof_mailbox dsp_box;		/* DSP initiated IPC */
575 	struct snd_sof_mailbox host_box;	/* Host initiated IPC */
576 	struct snd_sof_mailbox stream_box;	/* Stream position update */
577 	struct snd_sof_mailbox debug_box;	/* Debug info updates */
578 	struct snd_sof_ipc_msg *msg;
579 	int ipc_irq;
580 	u32 next_comp_id; /* monotonic - reset during S3 */
581 
582 	/* memory bases for mmaped DSPs - set by dsp_init() */
583 	void __iomem *bar[SND_SOF_BARS];	/* DSP base address */
584 	int mmio_bar;
585 	int mailbox_bar;
586 	size_t dsp_oops_offset;
587 
588 	/* debug */
589 	struct dentry *debugfs_root;
590 	struct list_head dfsentry_list;
591 	bool dbg_dump_printed;
592 	bool ipc_dump_printed;
593 
594 	/* firmware loader */
595 	struct sof_ipc_fw_ready fw_ready;
596 	struct sof_ipc_fw_version fw_version;
597 	struct sof_ipc_cc_version *cc_version;
598 
599 	/* topology */
600 	struct snd_soc_tplg_ops *tplg_ops;
601 	struct list_head pcm_list;
602 	struct list_head kcontrol_list;
603 	struct list_head widget_list;
604 	struct list_head pipeline_list;
605 	struct list_head dai_list;
606 	struct list_head dai_link_list;
607 	struct list_head route_list;
608 	struct snd_soc_component *component;
609 	u32 enabled_cores_mask; /* keep track of enabled cores */
610 	bool led_present;
611 
612 	/* FW configuration */
613 	struct sof_ipc_window *info_window;
614 
615 	/* IPC timeouts in ms */
616 	int ipc_timeout;
617 	int boot_timeout;
618 
619 	/* firmwre tracing */
620 	bool fw_trace_is_supported; /* set with Kconfig or module parameter */
621 	void *fw_trace_data; /* private data used by firmware tracing implementation */
622 
623 	bool msi_enabled;
624 
625 	/* DSP core context */
626 	u32 num_cores;
627 
628 	/*
629 	 * ref count per core that will be modified during system suspend/resume and during pcm
630 	 * hw_params/hw_free. This doesn't need to be protected with a mutex because pcm
631 	 * hw_params/hw_free are already protected by the PCM mutex in the ALSA framework in
632 	 * sound/core/ when streams are active and during system suspend/resume, streams are
633 	 * already suspended.
634 	 */
635 	int dsp_core_ref_count[SOF_MAX_DSP_NUM_CORES];
636 
637 	/*
638 	 * Used to keep track of registered IPC client devices so that they can
639 	 * be removed when the parent SOF module is removed.
640 	 */
641 	struct list_head ipc_client_list;
642 
643 	/* mutex to protect client list */
644 	struct mutex ipc_client_mutex;
645 
646 	/*
647 	 * Used for tracking the IPC client's RX registration for DSP initiated
648 	 * message handling.
649 	 */
650 	struct list_head ipc_rx_handler_list;
651 
652 	/*
653 	 * Used for tracking the IPC client's registration for DSP state change
654 	 * notification
655 	 */
656 	struct list_head fw_state_handler_list;
657 
658 	/* to protect the ipc_rx_handler_list  and  dsp_state_handler_list list */
659 	struct mutex client_event_handler_mutex;
660 
661 	/* quirks to override topology values */
662 	bool mclk_id_override;
663 	u16  mclk_id_quirk; /* same size as in IPC3 definitions */
664 
665 	void *private;			/* core does not touch this */
666 };
667 
668 /*
669  * Device Level.
670  */
671 
672 int snd_sof_device_probe(struct device *dev, struct snd_sof_pdata *plat_data);
673 int snd_sof_device_remove(struct device *dev);
674 int snd_sof_device_shutdown(struct device *dev);
675 bool snd_sof_device_probe_completed(struct device *dev);
676 
677 int snd_sof_runtime_suspend(struct device *dev);
678 int snd_sof_runtime_resume(struct device *dev);
679 int snd_sof_runtime_idle(struct device *dev);
680 int snd_sof_resume(struct device *dev);
681 int snd_sof_suspend(struct device *dev);
682 int snd_sof_dsp_power_down_notify(struct snd_sof_dev *sdev);
683 int snd_sof_prepare(struct device *dev);
684 void snd_sof_complete(struct device *dev);
685 
686 void snd_sof_new_platform_drv(struct snd_sof_dev *sdev);
687 
688 /*
689  * Compress support
690  */
691 extern struct snd_compress_ops sof_compressed_ops;
692 
693 /*
694  * Firmware loading.
695  */
696 int snd_sof_load_firmware_raw(struct snd_sof_dev *sdev);
697 int snd_sof_load_firmware_memcpy(struct snd_sof_dev *sdev);
698 int snd_sof_run_firmware(struct snd_sof_dev *sdev);
699 void snd_sof_fw_unload(struct snd_sof_dev *sdev);
700 
701 /*
702  * IPC low level APIs.
703  */
704 struct snd_sof_ipc *snd_sof_ipc_init(struct snd_sof_dev *sdev);
705 void snd_sof_ipc_free(struct snd_sof_dev *sdev);
706 void snd_sof_ipc_get_reply(struct snd_sof_dev *sdev);
707 void snd_sof_ipc_reply(struct snd_sof_dev *sdev, u32 msg_id);
708 static inline void snd_sof_ipc_msgs_rx(struct snd_sof_dev *sdev)
709 {
710 	sdev->ipc->ops->rx_msg(sdev);
711 }
712 int sof_ipc_tx_message(struct snd_sof_ipc *ipc, void *msg_data, size_t msg_bytes,
713 		       void *reply_data, size_t reply_bytes);
714 static inline int sof_ipc_tx_message_no_reply(struct snd_sof_ipc *ipc, void *msg_data,
715 					      size_t msg_bytes)
716 {
717 	return sof_ipc_tx_message(ipc, msg_data, msg_bytes, NULL, 0);
718 }
719 int sof_ipc_set_get_data(struct snd_sof_ipc *ipc, void *msg_data,
720 			 size_t msg_bytes, bool set);
721 int sof_ipc_tx_message_no_pm(struct snd_sof_ipc *ipc, void *msg_data, size_t msg_bytes,
722 			     void *reply_data, size_t reply_bytes);
723 static inline int sof_ipc_tx_message_no_pm_no_reply(struct snd_sof_ipc *ipc, void *msg_data,
724 						    size_t msg_bytes)
725 {
726 	return sof_ipc_tx_message_no_pm(ipc, msg_data, msg_bytes, NULL, 0);
727 }
728 int sof_ipc_send_msg(struct snd_sof_dev *sdev, void *msg_data, size_t msg_bytes,
729 		     size_t reply_bytes);
730 
731 static inline void snd_sof_ipc_process_reply(struct snd_sof_dev *sdev, u32 msg_id)
732 {
733 	snd_sof_ipc_get_reply(sdev);
734 	snd_sof_ipc_reply(sdev, msg_id);
735 }
736 
737 /*
738  * Trace/debug
739  */
740 int snd_sof_dbg_init(struct snd_sof_dev *sdev);
741 void snd_sof_free_debug(struct snd_sof_dev *sdev);
742 int snd_sof_debugfs_buf_item(struct snd_sof_dev *sdev,
743 			     void *base, size_t size,
744 			     const char *name, mode_t mode);
745 void sof_print_oops_and_stack(struct snd_sof_dev *sdev, const char *level,
746 			      u32 panic_code, u32 tracep_code, void *oops,
747 			      struct sof_ipc_panic_info *panic_info,
748 			      void *stack, size_t stack_words);
749 void snd_sof_handle_fw_exception(struct snd_sof_dev *sdev, const char *msg);
750 int snd_sof_dbg_memory_info_init(struct snd_sof_dev *sdev);
751 int snd_sof_debugfs_add_region_item_iomem(struct snd_sof_dev *sdev,
752 		enum snd_sof_fw_blk_type blk_type, u32 offset, size_t size,
753 		const char *name, enum sof_debugfs_access_type access_type);
754 /* Firmware tracing */
755 int sof_fw_trace_init(struct snd_sof_dev *sdev);
756 void sof_fw_trace_free(struct snd_sof_dev *sdev);
757 void sof_fw_trace_fw_crashed(struct snd_sof_dev *sdev);
758 void sof_fw_trace_suspend(struct snd_sof_dev *sdev, pm_message_t pm_state);
759 int sof_fw_trace_resume(struct snd_sof_dev *sdev);
760 
761 /*
762  * DSP Architectures.
763  */
764 static inline void sof_stack(struct snd_sof_dev *sdev, const char *level,
765 			     void *oops, u32 *stack, u32 stack_words)
766 {
767 		sof_dsp_arch_ops(sdev)->dsp_stack(sdev, level,  oops, stack,
768 						  stack_words);
769 }
770 
771 static inline void sof_oops(struct snd_sof_dev *sdev, const char *level, void *oops)
772 {
773 	if (sof_dsp_arch_ops(sdev)->dsp_oops)
774 		sof_dsp_arch_ops(sdev)->dsp_oops(sdev, level, oops);
775 }
776 
777 extern const struct dsp_arch_ops sof_xtensa_arch_ops;
778 
779 /*
780  * Firmware state tracking
781  */
782 void sof_set_fw_state(struct snd_sof_dev *sdev, enum sof_fw_state new_state);
783 
784 /*
785  * Utilities
786  */
787 void sof_io_write(struct snd_sof_dev *sdev, void __iomem *addr, u32 value);
788 void sof_io_write64(struct snd_sof_dev *sdev, void __iomem *addr, u64 value);
789 u32 sof_io_read(struct snd_sof_dev *sdev, void __iomem *addr);
790 u64 sof_io_read64(struct snd_sof_dev *sdev, void __iomem *addr);
791 void sof_mailbox_write(struct snd_sof_dev *sdev, u32 offset,
792 		       void *message, size_t bytes);
793 void sof_mailbox_read(struct snd_sof_dev *sdev, u32 offset,
794 		      void *message, size_t bytes);
795 int sof_block_write(struct snd_sof_dev *sdev, enum snd_sof_fw_blk_type blk_type,
796 		    u32 offset, void *src, size_t size);
797 int sof_block_read(struct snd_sof_dev *sdev, enum snd_sof_fw_blk_type blk_type,
798 		   u32 offset, void *dest, size_t size);
799 
800 int sof_ipc_msg_data(struct snd_sof_dev *sdev,
801 		     struct snd_sof_pcm_stream *sps,
802 		     void *p, size_t sz);
803 int sof_set_stream_data_offset(struct snd_sof_dev *sdev,
804 			       struct snd_sof_pcm_stream *sps,
805 			       size_t posn_offset);
806 
807 int sof_stream_pcm_open(struct snd_sof_dev *sdev,
808 			struct snd_pcm_substream *substream);
809 int sof_stream_pcm_close(struct snd_sof_dev *sdev,
810 			 struct snd_pcm_substream *substream);
811 
812 int sof_machine_check(struct snd_sof_dev *sdev);
813 
814 /* SOF client support */
815 #if IS_ENABLED(CONFIG_SND_SOC_SOF_CLIENT)
816 int sof_client_dev_register(struct snd_sof_dev *sdev, const char *name, u32 id,
817 			    const void *data, size_t size);
818 void sof_client_dev_unregister(struct snd_sof_dev *sdev, const char *name, u32 id);
819 int sof_register_clients(struct snd_sof_dev *sdev);
820 void sof_unregister_clients(struct snd_sof_dev *sdev);
821 void sof_client_ipc_rx_dispatcher(struct snd_sof_dev *sdev, void *msg_buf);
822 void sof_client_fw_state_dispatcher(struct snd_sof_dev *sdev);
823 int sof_suspend_clients(struct snd_sof_dev *sdev, pm_message_t state);
824 int sof_resume_clients(struct snd_sof_dev *sdev);
825 #else /* CONFIG_SND_SOC_SOF_CLIENT */
826 static inline int sof_client_dev_register(struct snd_sof_dev *sdev, const char *name,
827 					  u32 id, const void *data, size_t size)
828 {
829 	return 0;
830 }
831 
832 static inline void sof_client_dev_unregister(struct snd_sof_dev *sdev,
833 					     const char *name, u32 id)
834 {
835 }
836 
837 static inline int sof_register_clients(struct snd_sof_dev *sdev)
838 {
839 	return 0;
840 }
841 
842 static inline  void sof_unregister_clients(struct snd_sof_dev *sdev)
843 {
844 }
845 
846 static inline void sof_client_ipc_rx_dispatcher(struct snd_sof_dev *sdev, void *msg_buf)
847 {
848 }
849 
850 static inline void sof_client_fw_state_dispatcher(struct snd_sof_dev *sdev)
851 {
852 }
853 
854 static inline int sof_suspend_clients(struct snd_sof_dev *sdev, pm_message_t state)
855 {
856 	return 0;
857 }
858 
859 static inline int sof_resume_clients(struct snd_sof_dev *sdev)
860 {
861 	return 0;
862 }
863 #endif /* CONFIG_SND_SOC_SOF_CLIENT */
864 
865 /* Main ops for IPC implementations */
866 extern const struct sof_ipc_ops ipc3_ops;
867 extern const struct sof_ipc_ops ipc4_ops;
868 
869 #endif
870