xref: /openbmc/linux/sound/soc/sof/sof-priv.h (revision 06b72824)
1 /* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */
2 /*
3  * This file is provided under a dual BSD/GPLv2 license.  When using or
4  * redistributing this file, you may do so under either license.
5  *
6  * Copyright(c) 2018 Intel Corporation. All rights reserved.
7  *
8  * Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
9  */
10 
11 #ifndef __SOUND_SOC_SOF_PRIV_H
12 #define __SOUND_SOC_SOF_PRIV_H
13 
14 #include <linux/device.h>
15 #include <sound/hdaudio.h>
16 #include <sound/sof.h>
17 #include <sound/sof/info.h>
18 #include <sound/sof/pm.h>
19 #include <sound/sof/trace.h>
20 #include <uapi/sound/sof/fw.h>
21 
22 /* debug flags */
23 #define SOF_DBG_ENABLE_TRACE	BIT(0)
24 #define SOF_DBG_REGS		BIT(1)
25 #define SOF_DBG_MBOX		BIT(2)
26 #define SOF_DBG_TEXT		BIT(3)
27 #define SOF_DBG_PCI		BIT(4)
28 #define SOF_DBG_RETAIN_CTX	BIT(5)	/* prevent DSP D3 on FW exception */
29 
30 /* global debug state set by SOF_DBG_ flags */
31 extern int sof_core_debug;
32 
33 /* max BARs mmaped devices can use */
34 #define SND_SOF_BARS	8
35 
36 /* time in ms for runtime suspend delay */
37 #define SND_SOF_SUSPEND_DELAY_MS	2000
38 
39 /* DMA buffer size for trace */
40 #define DMA_BUF_SIZE_FOR_TRACE (PAGE_SIZE * 16)
41 
42 #define SOF_IPC_DSP_REPLY		0
43 #define SOF_IPC_HOST_REPLY		1
44 
45 /* convenience constructor for DAI driver streams */
46 #define SOF_DAI_STREAM(sname, scmin, scmax, srates, sfmt) \
47 	{.stream_name = sname, .channels_min = scmin, .channels_max = scmax, \
48 	 .rates = srates, .formats = sfmt}
49 
50 #define SOF_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE | \
51 	SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_FLOAT)
52 
53 #define ENABLE_DEBUGFS_CACHEBUF \
54 	(IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_ENABLE_DEBUGFS_CACHE) || \
55 	 IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_IPC_FLOOD_TEST))
56 
57 /* DSP power state */
58 enum sof_dsp_power_states {
59 	SOF_DSP_PM_D0,
60 	SOF_DSP_PM_D1,
61 	SOF_DSP_PM_D2,
62 	SOF_DSP_PM_D3_HOT,
63 	SOF_DSP_PM_D3,
64 	SOF_DSP_PM_D3_COLD,
65 };
66 
67 struct sof_dsp_power_state {
68 	u32 state;
69 	u32 substate; /* platform-specific */
70 };
71 
72 /* System suspend target state */
73 enum sof_system_suspend_state {
74 	SOF_SUSPEND_NONE = 0,
75 	SOF_SUSPEND_S0IX,
76 	SOF_SUSPEND_S3,
77 };
78 
79 struct snd_sof_dev;
80 struct snd_sof_ipc_msg;
81 struct snd_sof_ipc;
82 struct snd_sof_debugfs_map;
83 struct snd_soc_tplg_ops;
84 struct snd_soc_component;
85 struct snd_sof_pdata;
86 
87 /*
88  * SOF DSP HW abstraction operations.
89  * Used to abstract DSP HW architecture and any IO busses between host CPU
90  * and DSP device(s).
91  */
92 struct snd_sof_dsp_ops {
93 
94 	/* probe and remove */
95 	int (*probe)(struct snd_sof_dev *sof_dev); /* mandatory */
96 	int (*remove)(struct snd_sof_dev *sof_dev); /* optional */
97 
98 	/* DSP core boot / reset */
99 	int (*run)(struct snd_sof_dev *sof_dev); /* mandatory */
100 	int (*stall)(struct snd_sof_dev *sof_dev); /* optional */
101 	int (*reset)(struct snd_sof_dev *sof_dev); /* optional */
102 	int (*core_power_up)(struct snd_sof_dev *sof_dev,
103 			     unsigned int core_mask); /* optional */
104 	int (*core_power_down)(struct snd_sof_dev *sof_dev,
105 			       unsigned int core_mask); /* optional */
106 
107 	/*
108 	 * Register IO: only used by respective drivers themselves,
109 	 * TODO: consider removing these operations and calling respective
110 	 * implementations directly
111 	 */
112 	void (*write)(struct snd_sof_dev *sof_dev, void __iomem *addr,
113 		      u32 value); /* optional */
114 	u32 (*read)(struct snd_sof_dev *sof_dev,
115 		    void __iomem *addr); /* optional */
116 	void (*write64)(struct snd_sof_dev *sof_dev, void __iomem *addr,
117 			u64 value); /* optional */
118 	u64 (*read64)(struct snd_sof_dev *sof_dev,
119 		      void __iomem *addr); /* optional */
120 
121 	/* memcpy IO */
122 	void (*block_read)(struct snd_sof_dev *sof_dev, u32 bar,
123 			   u32 offset, void *dest,
124 			   size_t size); /* mandatory */
125 	void (*block_write)(struct snd_sof_dev *sof_dev, u32 bar,
126 			    u32 offset, void *src,
127 			    size_t size); /* mandatory */
128 
129 	/* doorbell */
130 	irqreturn_t (*irq_handler)(int irq, void *context); /* optional */
131 	irqreturn_t (*irq_thread)(int irq, void *context); /* optional */
132 
133 	/* ipc */
134 	int (*send_msg)(struct snd_sof_dev *sof_dev,
135 			struct snd_sof_ipc_msg *msg); /* mandatory */
136 
137 	/* FW loading */
138 	int (*load_firmware)(struct snd_sof_dev *sof_dev); /* mandatory */
139 	int (*load_module)(struct snd_sof_dev *sof_dev,
140 			   struct snd_sof_mod_hdr *hdr); /* optional */
141 	/*
142 	 * FW ready checks for ABI compatibility and creates
143 	 * memory windows at first boot
144 	 */
145 	int (*fw_ready)(struct snd_sof_dev *sdev, u32 msg_id); /* mandatory */
146 
147 	/* connect pcm substream to a host stream */
148 	int (*pcm_open)(struct snd_sof_dev *sdev,
149 			struct snd_pcm_substream *substream); /* optional */
150 	/* disconnect pcm substream to a host stream */
151 	int (*pcm_close)(struct snd_sof_dev *sdev,
152 			 struct snd_pcm_substream *substream); /* optional */
153 
154 	/* host stream hw params */
155 	int (*pcm_hw_params)(struct snd_sof_dev *sdev,
156 			     struct snd_pcm_substream *substream,
157 			     struct snd_pcm_hw_params *params,
158 			     struct sof_ipc_stream_params *ipc_params); /* optional */
159 
160 	/* host stream hw_free */
161 	int (*pcm_hw_free)(struct snd_sof_dev *sdev,
162 			   struct snd_pcm_substream *substream); /* optional */
163 
164 	/* host stream trigger */
165 	int (*pcm_trigger)(struct snd_sof_dev *sdev,
166 			   struct snd_pcm_substream *substream,
167 			   int cmd); /* optional */
168 
169 	/* host stream pointer */
170 	snd_pcm_uframes_t (*pcm_pointer)(struct snd_sof_dev *sdev,
171 					 struct snd_pcm_substream *substream); /* optional */
172 
173 	/* host read DSP stream data */
174 	void (*ipc_msg_data)(struct snd_sof_dev *sdev,
175 			     struct snd_pcm_substream *substream,
176 			     void *p, size_t sz); /* mandatory */
177 
178 	/* host configure DSP HW parameters */
179 	int (*ipc_pcm_params)(struct snd_sof_dev *sdev,
180 			      struct snd_pcm_substream *substream,
181 			      const struct sof_ipc_pcm_params_reply *reply); /* mandatory */
182 
183 	/* pre/post firmware run */
184 	int (*pre_fw_run)(struct snd_sof_dev *sof_dev); /* optional */
185 	int (*post_fw_run)(struct snd_sof_dev *sof_dev); /* optional */
186 
187 	/* DSP PM */
188 	int (*suspend)(struct snd_sof_dev *sof_dev,
189 		       u32 target_state); /* optional */
190 	int (*resume)(struct snd_sof_dev *sof_dev); /* optional */
191 	int (*runtime_suspend)(struct snd_sof_dev *sof_dev); /* optional */
192 	int (*runtime_resume)(struct snd_sof_dev *sof_dev); /* optional */
193 	int (*runtime_idle)(struct snd_sof_dev *sof_dev); /* optional */
194 	int (*set_hw_params_upon_resume)(struct snd_sof_dev *sdev); /* optional */
195 	int (*set_power_state)(struct snd_sof_dev *sdev,
196 			       const struct sof_dsp_power_state *target_state); /* optional */
197 
198 	/* DSP clocking */
199 	int (*set_clk)(struct snd_sof_dev *sof_dev, u32 freq); /* optional */
200 
201 	/* debug */
202 	const struct snd_sof_debugfs_map *debug_map; /* optional */
203 	int debug_map_count; /* optional */
204 	void (*dbg_dump)(struct snd_sof_dev *sof_dev,
205 			 u32 flags); /* optional */
206 	void (*ipc_dump)(struct snd_sof_dev *sof_dev); /* optional */
207 
208 	/* host DMA trace initialization */
209 	int (*trace_init)(struct snd_sof_dev *sdev,
210 			  u32 *stream_tag); /* optional */
211 	int (*trace_release)(struct snd_sof_dev *sdev); /* optional */
212 	int (*trace_trigger)(struct snd_sof_dev *sdev,
213 			     int cmd); /* optional */
214 
215 	/* misc */
216 	int (*get_bar_index)(struct snd_sof_dev *sdev,
217 			     u32 type); /* optional */
218 	int (*get_mailbox_offset)(struct snd_sof_dev *sdev);/* mandatory for common loader code */
219 	int (*get_window_offset)(struct snd_sof_dev *sdev,
220 				 u32 id);/* mandatory for common loader code */
221 
222 	/* machine driver ops */
223 	int (*machine_register)(struct snd_sof_dev *sdev,
224 				void *pdata); /* optional */
225 	void (*machine_unregister)(struct snd_sof_dev *sdev,
226 				   void *pdata); /* optional */
227 	void (*machine_select)(struct snd_sof_dev *sdev); /* optional */
228 	void (*set_mach_params)(const struct snd_soc_acpi_mach *mach,
229 				struct device *dev); /* optional */
230 
231 	/* DAI ops */
232 	struct snd_soc_dai_driver *drv;
233 	int num_drv;
234 
235 	/* ALSA HW info flags, will be stored in snd_pcm_runtime.hw.info */
236 	u32 hw_info;
237 
238 	const struct sof_arch_ops *arch_ops;
239 };
240 
241 /* DSP architecture specific callbacks for oops and stack dumps */
242 struct sof_arch_ops {
243 	void (*dsp_oops)(struct snd_sof_dev *sdev, void *oops);
244 	void (*dsp_stack)(struct snd_sof_dev *sdev, void *oops,
245 			  u32 *stack, u32 stack_words);
246 };
247 
248 #define sof_arch_ops(sdev) ((sdev)->pdata->desc->ops->arch_ops)
249 
250 /* DSP device HW descriptor mapping between bus ID and ops */
251 struct sof_ops_table {
252 	const struct sof_dev_desc *desc;
253 	const struct snd_sof_dsp_ops *ops;
254 };
255 
256 enum sof_dfsentry_type {
257 	SOF_DFSENTRY_TYPE_IOMEM = 0,
258 	SOF_DFSENTRY_TYPE_BUF,
259 };
260 
261 enum sof_debugfs_access_type {
262 	SOF_DEBUGFS_ACCESS_ALWAYS = 0,
263 	SOF_DEBUGFS_ACCESS_D0_ONLY,
264 };
265 
266 /* FS entry for debug files that can expose DSP memories, registers */
267 struct snd_sof_dfsentry {
268 	size_t size;
269 	enum sof_dfsentry_type type;
270 	/*
271 	 * access_type specifies if the
272 	 * memory -> DSP resource (memory, register etc) is always accessible
273 	 * or if it is accessible only when the DSP is in D0.
274 	 */
275 	enum sof_debugfs_access_type access_type;
276 #if ENABLE_DEBUGFS_CACHEBUF
277 	char *cache_buf; /* buffer to cache the contents of debugfs memory */
278 #endif
279 	struct snd_sof_dev *sdev;
280 	struct list_head list;  /* list in sdev dfsentry list */
281 	union {
282 		void __iomem *io_mem;
283 		void *buf;
284 	};
285 };
286 
287 /* Debug mapping for any DSP memory or registers that can used for debug */
288 struct snd_sof_debugfs_map {
289 	const char *name;
290 	u32 bar;
291 	u32 offset;
292 	u32 size;
293 	/*
294 	 * access_type specifies if the memory is always accessible
295 	 * or if it is accessible only when the DSP is in D0.
296 	 */
297 	enum sof_debugfs_access_type access_type;
298 };
299 
300 /* mailbox descriptor, used for host <-> DSP IPC */
301 struct snd_sof_mailbox {
302 	u32 offset;
303 	size_t size;
304 };
305 
306 /* IPC message descriptor for host <-> DSP IO */
307 struct snd_sof_ipc_msg {
308 	/* message data */
309 	u32 header;
310 	void *msg_data;
311 	void *reply_data;
312 	size_t msg_size;
313 	size_t reply_size;
314 	int reply_error;
315 
316 	wait_queue_head_t waitq;
317 	bool ipc_complete;
318 };
319 
320 enum snd_sof_fw_state {
321 	SOF_FW_BOOT_NOT_STARTED = 0,
322 	SOF_FW_BOOT_PREPARE,
323 	SOF_FW_BOOT_IN_PROGRESS,
324 	SOF_FW_BOOT_FAILED,
325 	SOF_FW_BOOT_READY_FAILED, /* firmware booted but fw_ready op failed */
326 	SOF_FW_BOOT_COMPLETE,
327 };
328 
329 /*
330  * SOF Device Level.
331  */
332 struct snd_sof_dev {
333 	struct device *dev;
334 	spinlock_t ipc_lock;	/* lock for IPC users */
335 	spinlock_t hw_lock;	/* lock for HW IO access */
336 
337 	/*
338 	 * ASoC components. plat_drv fields are set dynamically so
339 	 * can't use const
340 	 */
341 	struct snd_soc_component_driver plat_drv;
342 
343 	/* current DSP power state */
344 	struct sof_dsp_power_state dsp_power_state;
345 
346 	/* Intended power target of system suspend */
347 	enum sof_system_suspend_state system_suspend_target;
348 
349 	/* DSP firmware boot */
350 	wait_queue_head_t boot_wait;
351 	enum snd_sof_fw_state fw_state;
352 	u32 first_boot;
353 
354 	/* work queue in case the probe is implemented in two steps */
355 	struct work_struct probe_work;
356 
357 	/* DSP HW differentiation */
358 	struct snd_sof_pdata *pdata;
359 
360 	/* IPC */
361 	struct snd_sof_ipc *ipc;
362 	struct snd_sof_mailbox dsp_box;		/* DSP initiated IPC */
363 	struct snd_sof_mailbox host_box;	/* Host initiated IPC */
364 	struct snd_sof_mailbox stream_box;	/* Stream position update */
365 	struct snd_sof_ipc_msg *msg;
366 	int ipc_irq;
367 	u32 next_comp_id; /* monotonic - reset during S3 */
368 
369 	/* memory bases for mmaped DSPs - set by dsp_init() */
370 	void __iomem *bar[SND_SOF_BARS];	/* DSP base address */
371 	int mmio_bar;
372 	int mailbox_bar;
373 	size_t dsp_oops_offset;
374 
375 	/* debug */
376 	struct dentry *debugfs_root;
377 	struct list_head dfsentry_list;
378 
379 	/* firmware loader */
380 	struct snd_dma_buffer dmab;
381 	struct snd_dma_buffer dmab_bdl;
382 	struct sof_ipc_fw_ready fw_ready;
383 	struct sof_ipc_fw_version fw_version;
384 	struct sof_ipc_cc_version *cc_version;
385 
386 	/* topology */
387 	struct snd_soc_tplg_ops *tplg_ops;
388 	struct list_head pcm_list;
389 	struct list_head kcontrol_list;
390 	struct list_head widget_list;
391 	struct list_head dai_list;
392 	struct list_head route_list;
393 	struct snd_soc_component *component;
394 	u32 enabled_cores_mask; /* keep track of enabled cores */
395 
396 	/* FW configuration */
397 	struct sof_ipc_dma_buffer_data *info_buffer;
398 	struct sof_ipc_window *info_window;
399 
400 	/* IPC timeouts in ms */
401 	int ipc_timeout;
402 	int boot_timeout;
403 
404 	/* Wait queue for code loading */
405 	wait_queue_head_t waitq;
406 	int code_loading;
407 
408 	/* DMA for Trace */
409 	struct snd_dma_buffer dmatb;
410 	struct snd_dma_buffer dmatp;
411 	int dma_trace_pages;
412 	wait_queue_head_t trace_sleep;
413 	u32 host_offset;
414 	u32 dtrace_is_supported; /* set with Kconfig or module parameter */
415 	u32 dtrace_is_enabled;
416 	u32 dtrace_error;
417 	u32 dtrace_draining;
418 
419 	bool msi_enabled;
420 
421 	void *private;			/* core does not touch this */
422 };
423 
424 /*
425  * Device Level.
426  */
427 
428 int snd_sof_device_probe(struct device *dev, struct snd_sof_pdata *plat_data);
429 int snd_sof_device_remove(struct device *dev);
430 
431 int snd_sof_runtime_suspend(struct device *dev);
432 int snd_sof_runtime_resume(struct device *dev);
433 int snd_sof_runtime_idle(struct device *dev);
434 int snd_sof_resume(struct device *dev);
435 int snd_sof_suspend(struct device *dev);
436 int snd_sof_prepare(struct device *dev);
437 void snd_sof_complete(struct device *dev);
438 
439 void snd_sof_new_platform_drv(struct snd_sof_dev *sdev);
440 
441 int snd_sof_create_page_table(struct device *dev,
442 			      struct snd_dma_buffer *dmab,
443 			      unsigned char *page_table, size_t size);
444 
445 /*
446  * Firmware loading.
447  */
448 int snd_sof_load_firmware(struct snd_sof_dev *sdev);
449 int snd_sof_load_firmware_raw(struct snd_sof_dev *sdev);
450 int snd_sof_load_firmware_memcpy(struct snd_sof_dev *sdev);
451 int snd_sof_run_firmware(struct snd_sof_dev *sdev);
452 int snd_sof_parse_module_memcpy(struct snd_sof_dev *sdev,
453 				struct snd_sof_mod_hdr *module);
454 void snd_sof_fw_unload(struct snd_sof_dev *sdev);
455 int snd_sof_fw_parse_ext_data(struct snd_sof_dev *sdev, u32 bar, u32 offset);
456 
457 /*
458  * IPC low level APIs.
459  */
460 struct snd_sof_ipc *snd_sof_ipc_init(struct snd_sof_dev *sdev);
461 void snd_sof_ipc_free(struct snd_sof_dev *sdev);
462 int snd_sof_ipc_reply(struct snd_sof_dev *sdev, u32 msg_id);
463 void snd_sof_ipc_msgs_rx(struct snd_sof_dev *sdev);
464 int snd_sof_ipc_stream_pcm_params(struct snd_sof_dev *sdev,
465 				  struct sof_ipc_pcm_params *params);
466 int snd_sof_dsp_mailbox_init(struct snd_sof_dev *sdev, u32 dspbox,
467 			     size_t dspbox_size, u32 hostbox,
468 			     size_t hostbox_size);
469 int snd_sof_ipc_valid(struct snd_sof_dev *sdev);
470 int sof_ipc_tx_message(struct snd_sof_ipc *ipc, u32 header,
471 		       void *msg_data, size_t msg_bytes, void *reply_data,
472 		       size_t reply_bytes);
473 int sof_ipc_tx_message_no_pm(struct snd_sof_ipc *ipc, u32 header,
474 			     void *msg_data, size_t msg_bytes,
475 			     void *reply_data, size_t reply_bytes);
476 
477 /*
478  * Trace/debug
479  */
480 int snd_sof_init_trace(struct snd_sof_dev *sdev);
481 void snd_sof_release_trace(struct snd_sof_dev *sdev);
482 void snd_sof_free_trace(struct snd_sof_dev *sdev);
483 int snd_sof_dbg_init(struct snd_sof_dev *sdev);
484 void snd_sof_free_debug(struct snd_sof_dev *sdev);
485 int snd_sof_debugfs_io_item(struct snd_sof_dev *sdev,
486 			    void __iomem *base, size_t size,
487 			    const char *name,
488 			    enum sof_debugfs_access_type access_type);
489 int snd_sof_debugfs_buf_item(struct snd_sof_dev *sdev,
490 			     void *base, size_t size,
491 			     const char *name, mode_t mode);
492 int snd_sof_trace_update_pos(struct snd_sof_dev *sdev,
493 			     struct sof_ipc_dma_trace_posn *posn);
494 void snd_sof_trace_notify_for_error(struct snd_sof_dev *sdev);
495 void snd_sof_get_status(struct snd_sof_dev *sdev, u32 panic_code,
496 			u32 tracep_code, void *oops,
497 			struct sof_ipc_panic_info *panic_info,
498 			void *stack, size_t stack_words);
499 int snd_sof_init_trace_ipc(struct snd_sof_dev *sdev);
500 void snd_sof_handle_fw_exception(struct snd_sof_dev *sdev);
501 
502 /*
503  * Platform specific ops.
504  */
505 extern struct snd_compr_ops sof_compressed_ops;
506 
507 /*
508  * DSP Architectures.
509  */
510 static inline void sof_stack(struct snd_sof_dev *sdev, void *oops, u32 *stack,
511 			     u32 stack_words)
512 {
513 		sof_arch_ops(sdev)->dsp_stack(sdev, oops, stack, stack_words);
514 }
515 
516 static inline void sof_oops(struct snd_sof_dev *sdev, void *oops)
517 {
518 	if (sof_arch_ops(sdev)->dsp_oops)
519 		sof_arch_ops(sdev)->dsp_oops(sdev, oops);
520 }
521 
522 extern const struct sof_arch_ops sof_xtensa_arch_ops;
523 
524 /*
525  * Utilities
526  */
527 void sof_io_write(struct snd_sof_dev *sdev, void __iomem *addr, u32 value);
528 void sof_io_write64(struct snd_sof_dev *sdev, void __iomem *addr, u64 value);
529 u32 sof_io_read(struct snd_sof_dev *sdev, void __iomem *addr);
530 u64 sof_io_read64(struct snd_sof_dev *sdev, void __iomem *addr);
531 void sof_mailbox_write(struct snd_sof_dev *sdev, u32 offset,
532 		       void *message, size_t bytes);
533 void sof_mailbox_read(struct snd_sof_dev *sdev, u32 offset,
534 		      void *message, size_t bytes);
535 void sof_block_write(struct snd_sof_dev *sdev, u32 bar, u32 offset, void *src,
536 		     size_t size);
537 void sof_block_read(struct snd_sof_dev *sdev, u32 bar, u32 offset, void *dest,
538 		    size_t size);
539 
540 int sof_fw_ready(struct snd_sof_dev *sdev, u32 msg_id);
541 
542 void intel_ipc_msg_data(struct snd_sof_dev *sdev,
543 			struct snd_pcm_substream *substream,
544 			void *p, size_t sz);
545 int intel_ipc_pcm_params(struct snd_sof_dev *sdev,
546 			 struct snd_pcm_substream *substream,
547 			 const struct sof_ipc_pcm_params_reply *reply);
548 
549 int intel_pcm_open(struct snd_sof_dev *sdev,
550 		   struct snd_pcm_substream *substream);
551 int intel_pcm_close(struct snd_sof_dev *sdev,
552 		    struct snd_pcm_substream *substream);
553 
554 int sof_machine_check(struct snd_sof_dev *sdev);
555 
556 #endif
557